arch/sparc/net/bpf_jit_comp.c

   1 #include <linux/moduleloader.h>
   2 #include <linux/workqueue.h>
   3 #include <linux/netdevice.h>
   4 #include <linux/filter.h>
   5 #include <linux/cache.h>
   6
   7 #include <asm/cacheflush.h>
   8 #include <asm/ptrace.h>
   9
  10 #include "bpf_jit.h"
  11
  12 int bpf_jit_enable __read_mostly;
  13
  14 static inline bool is_simm13(unsigned int value)
  15 {
  16         return value + 0x1000 < 0x2000;
  17 }
  18
  19 static void bpf_flush_icache(void *start_, void *end_)
  20 {
  21 #ifdef CONFIG_SPARC64
  22         /* Cheetah's I-cache is fully coherent.  */
  23         if (tlb_type == spitfire) {
  24                 unsigned long start = (unsigned long) start_;
  25                 unsigned long end = (unsigned long) end_;
  26
  27                 start &= ~7UL;
  28                 end = (end + 7UL) & ~7UL;
  29                 while (start < end) {
  30                         flushi(start);
  31                         start += 32;
  32                 }
  33         }
  34 #endif
  35 }
  36
  37 #define SEEN_DATAREF 1 /* might call external helpers */
  38 #define SEEN_XREG    2 /* ebx is used */
  39 #define SEEN_MEM     4 /* use mem[] for temporary storage */
  40
  41 #define S13(X)          ((X) & 0x1fff)
  42 #define IMMED           0x00002000
  43 #define RD(X)           ((X) << 25)
  44 #define RS1(X)          ((X) << 14)
  45 #define RS2(X)          ((X))
  46 #define OP(X)           ((X) << 30)
  47 #define OP2(X)          ((X) << 22)
  48 #define OP3(X)          ((X) << 19)
  49 #define COND(X)         ((X) << 25)
  50 #define F1(X)           OP(X)
  51 #define F2(X, Y)        (OP(X) | OP2(Y))
  52 #define F3(X, Y)        (OP(X) | OP3(Y))
  53
  54 #define CONDN           COND(0x0)
  55 #define CONDE           COND(0x1)
  56 #define CONDLE          COND(0x2)
  57 #define CONDL           COND(0x3)
  58 #define CONDLEU         COND(0x4)
  59 #define CONDCS          COND(0x5)
  60 #define CONDNEG         COND(0x6)
  61 #define CONDVC          COND(0x7)
  62 #define CONDA           COND(0x8)
  63 #define CONDNE          COND(0x9)
  64 #define CONDG           COND(0xa)
  65 #define CONDGE          COND(0xb)
  66 #define CONDGU          COND(0xc)
  67 #define CONDCC          COND(0xd)
  68 #define CONDPOS         COND(0xe)
  69 #define CONDVS          COND(0xf)
  70
  71 #define CONDGEU         CONDCC
  72 #define CONDLU          CONDCS
  73
  74 #define WDISP22(X)      (((X) >> 2) & 0x3fffff)
  75
  76 #define BA              (F2(0, 2) | CONDA)
  77 #define BGU             (F2(0, 2) | CONDGU)
  78 #define BLEU            (F2(0, 2) | CONDLEU)
  79 #define BGEU            (F2(0, 2) | CONDGEU)
  80 #define BLU             (F2(0, 2) | CONDLU)
  81 #define BE              (F2(0, 2) | CONDE)
  82 #define BNE             (F2(0, 2) | CONDNE)
  83
  84 #ifdef CONFIG_SPARC64
  85 #define BNE_PTR         (F2(0, 1) | CONDNE | (2 << 20))
  86 #else
  87 #define BNE_PTR         BNE
  88 #endif
  89
  90 #define SETHI(K, REG)   \
  91         (F2(0, 0x4) | RD(REG) | (((K) >> 10) & 0x3fffff))
  92 #define OR_LO(K, REG)   \
  93         (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
  94
  95 #define ADD             F3(2, 0x00)
  96 #define AND             F3(2, 0x01)
  97 #define ANDCC           F3(2, 0x11)
  98 #define OR              F3(2, 0x02)
  99 #define SUB             F3(2, 0x04)
 100 #define SUBCC           F3(2, 0x14)
 101 #define MUL             F3(2, 0x0a)     /* umul */
 102 #define DIV             F3(2, 0x0e)     /* udiv */
 103 #define SLL             F3(2, 0x25)
 104 #define SRL             F3(2, 0x26)
 105 #define JMPL            F3(2, 0x38)
 106 #define CALL            F1(1)
 107 #define BR              F2(0, 0x01)
 108 #define RD_Y            F3(2, 0x28)
 109 #define WR_Y            F3(2, 0x30)
 110
 111 #define LD32            F3(3, 0x00)
 112 #define LD8             F3(3, 0x01)
 113 #define LD16            F3(3, 0x02)
 114 #define LD64            F3(3, 0x0b)
 115 #define ST32            F3(3, 0x04)
 116
 117 #ifdef CONFIG_SPARC64
 118 #define LDPTR           LD64
 119 #define BASE_STACKFRAME 176
 120 #else
 121 #define LDPTR           LD32
 122 #define BASE_STACKFRAME 96
 123 #endif
 124
 125 #define LD32I           (LD32 | IMMED)
 126 #define LD8I            (LD8 | IMMED)
 127 #define LD16I           (LD16 | IMMED)
 128 #define LD64I           (LD64 | IMMED)
 129 #define LDPTRI          (LDPTR | IMMED)
 130 #define ST32I           (ST32 | IMMED)
 131
 132 #define emit_nop()              \
 133 do {                            \
 134         *prog++ = SETHI(0, G0); \
 135 } while (0)
 136
 137 #define emit_neg()                                      \
 138 do {    /* sub %g0, r_A, r_A */                         \
 139         *prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A);   \
 140 } while (0)
 141
 142 #define emit_reg_move(FROM, TO)                         \
 143 do {    /* or %g0, FROM, TO */                          \
 144         *prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO);    \
 145 } while (0)
 146
 147 #define emit_clear(REG)                                 \
 148 do {    /* or %g0, %g0, REG */                          \
 149         *prog++ = OR | RS1(G0) | RS2(G0) | RD(REG);     \
 150 } while (0)
 151
 152 #define emit_set_const(K, REG)                                  \
 153 do {    /* sethi %hi(K), REG */                                 \
 154         *prog++ = SETHI(K, REG);                                \
 155         /* or REG, %lo(K), REG */                               \
 156         *prog++ = OR_LO(K, REG);                                \
 157 } while (0)
 158
 159         /* Emit
 160          *
 161          *      OP      r_A, r_X, r_A
 162          */
 163 #define emit_alu_X(OPCODE)                                      \
 164 do {                                                            \
 165         seen |= SEEN_XREG;                                      \
 166         *prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A);       \
 167 } while (0)
 168
 169         /* Emit either:
 170          *
 171          *      OP      r_A, K, r_A
 172          *
 173          * or
 174          *
 175          *      sethi   %hi(K), r_TMP
 176          *      or      r_TMP, %lo(K), r_TMP
 177          *      OP      r_A, r_TMP, r_A
 178          *
 179          * depending upon whether K fits in a signed 13-bit
 180          * immediate instruction field.  Emit nothing if K
 181          * is zero.
 182          */
 183 #define emit_alu_K(OPCODE, K)                                   \
 184 do {                                                            \
 185         if (K) {                                                \
 186                 unsigned int _insn = OPCODE;                    \
 187                 _insn |= RS1(r_A) | RD(r_A);                    \
 188                 if (is_simm13(K)) {                             \
 189                         *prog++ = _insn | IMMED | S13(K);       \
 190                 } else {                                        \
 191                         emit_set_const(K, r_TMP);               \
 192                         *prog++ = _insn | RS2(r_TMP);           \
 193                 }                                               \
 194         }                                                       \
 195 } while (0)
 196
 197 #define emit_loadimm(K, DEST)                                           \
 198 do {                                                                    \
 199         if (is_simm13(K)) {                                             \
 200                 /* or %g0, K, DEST */                                   \
 201                 *prog++ = OR | IMMED | RS1(G0) | S13(K) | RD(DEST);     \
 202         } else {                                                        \
 203                 emit_set_const(K, DEST);                                \
 204         }                                                               \
 205 } while (0)
 206
 207 #define emit_loadptr(BASE, STRUCT, FIELD, DEST)                         \
 208 do {    unsigned int _off = offsetof(STRUCT, FIELD);                    \
 209         BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(void *));    \
 210         *prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST);            \
 211 } while (0)
 212
 213 #define emit_load32(BASE, STRUCT, FIELD, DEST)                          \
 214 do {    unsigned int _off = offsetof(STRUCT, FIELD);                    \
 215         BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u32));       \
 216         *prog++ = LD32I | RS1(BASE) | S13(_off) | RD(DEST);             \
 217 } while (0)
 218
 219 #define emit_load16(BASE, STRUCT, FIELD, DEST)                          \
 220 do {    unsigned int _off = offsetof(STRUCT, FIELD);                    \
 221         BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u16));       \
 222         *prog++ = LD16I | RS1(BASE) | S13(_off) | RD(DEST);             \
 223 } while (0)
 224
 225 #define __emit_load8(BASE, STRUCT, FIELD, DEST)                         \
 226 do {    unsigned int _off = offsetof(STRUCT, FIELD);                    \
 227         *prog++ = LD8I | RS1(BASE) | S13(_off) | RD(DEST);              \
 228 } while (0)
 229
 230 #define emit_load8(BASE, STRUCT, FIELD, DEST)                           \
 231 do {    BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u8));        \
 232         __emit_load8(BASE, STRUCT, FIELD, DEST);                        \
 233 } while (0)
 234
 235 #define emit_ldmem(OFF, DEST)                                   \
 236 do {    *prog++ = LD32I | RS1(FP) | S13(-(OFF)) | RD(DEST);     \
 237 } while (0)
 238
 239 #define emit_stmem(OFF, SRC)                                    \
 240 do {    *prog++ = LD32I | RS1(FP) | S13(-(OFF)) | RD(SRC);      \
 241 } while (0)
 242
 243 #define cpu_off         offsetof(struct thread_info, cpu)
 244
 245 #ifdef CONFIG_SMP
 246 #ifdef CONFIG_SPARC64
 247 #define emit_load_cpu(REG)                                              \
 248         emit_load16(G6, struct thread_info, cpu, REG)
 249 #else
 250 #define emit_load_cpu(REG)                                              \
 251         emit_load32(G6, struct thread_info, cpu, REG)
 252 #endif
 253 #else
 254 #define emit_load_cpu(REG)      emit_clear(REG)
 255 #endif
 256
 257 #define emit_skb_loadptr(FIELD, DEST) \
 258         emit_loadptr(r_SKB, struct sk_buff, FIELD, DEST)
 259 #define emit_skb_load32(FIELD, DEST) \
 260         emit_load32(r_SKB, struct sk_buff, FIELD, DEST)
 261 #define emit_skb_load16(FIELD, DEST) \
 262         emit_load16(r_SKB, struct sk_buff, FIELD, DEST)
 263 #define __emit_skb_load8(FIELD, DEST) \
 264         __emit_load8(r_SKB, struct sk_buff, FIELD, DEST)
 265 #define emit_skb_load8(FIELD, DEST) \
 266         emit_load8(r_SKB, struct sk_buff, FIELD, DEST)
 267
 268 #define emit_jmpl(BASE, IMM_OFF, LREG) \
 269         *prog++ = (JMPL | IMMED | RS1(BASE) | S13(IMM_OFF) | RD(LREG))
 270
 271 #define emit_call(FUNC)                                 \
 272 do {    void *_here = image + addrs[i] - 8;             \
 273         unsigned int _off = (void *)(FUNC) - _here;     \
 274         *prog++ = CALL | (((_off) >> 2) & 0x3fffffff);  \
 275         emit_nop();                                     \
 276 } while (0)
 277
 278 #define emit_branch(BR_OPC, DEST)                       \
 279 do {    unsigned int _here = addrs[i] - 8;              \
 280         *prog++ = BR_OPC | WDISP22((DEST) - _here);     \
 281 } while (0)
 282
 283 #define emit_branch_off(BR_OPC, OFF)                    \
 284 do {    *prog++ = BR_OPC | WDISP22(OFF);                \
 285 } while (0)
 286
 287 #define emit_jump(DEST)         emit_branch(BA, DEST)
 288
 289 #define emit_read_y(REG)        *prog++ = RD_Y | RD(REG)
 290 #define emit_write_y(REG)       *prog++ = WR_Y | IMMED | RS1(REG) | S13(0)
 291
 292 #define emit_cmp(R1, R2) \
 293         *prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0))
 294
 295 #define emit_cmpi(R1, IMM) \
 296         *prog++ = (SUBCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
 297
 298 #define emit_btst(R1, R2) \
 299         *prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0))
 300
 301 #define emit_btsti(R1, IMM) \
 302         *prog++ = (ANDCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
 303
 304 #define emit_sub(R1, R2, R3) \
 305         *prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))
 306
 307 #define emit_subi(R1, IMM, R3) \
 308         *prog++ = (SUB | IMMED | RS1(R1) | S13(IMM) | RD(R3))
 309
 310 #define emit_add(R1, R2, R3) \
 311         *prog++ = (ADD | RS1(R1) | RS2(R2) | RD(R3))
 312
 313 #define emit_addi(R1, IMM, R3) \
 314         *prog++ = (ADD | IMMED | RS1(R1) | S13(IMM) | RD(R3))
 315
 316 #define emit_alloc_stack(SZ) \
 317         *prog++ = (SUB | IMMED | RS1(SP) | S13(SZ) | RD(SP))
 318
 319 #define emit_release_stack(SZ) \
 320         *prog++ = (ADD | IMMED | RS1(SP) | S13(SZ) | RD(SP))
 321
 322 /* A note about branch offset calculations.  The addrs[] array,
 323  * indexed by BPF instruction, records the address after all the
 324  * sparc instructions emitted for that BPF instruction.
 325  *
 326  * The most common case is to emit a branch at the end of such
 327  * a code sequence.  So this would be two instructions, the
 328  * branch and it's delay slot.
 329  *
 330  * Therefore by default the branch emitters calculate the branch
 331  * offset field as:
 332  *
 333  *      destination - (addrs[i] - 8)
 334  *
 335  * This "addrs[i] - 8" is the address of the branch itself or
 336  * what "." would be in assembler notation.  The "8" part is
 337  * how we take into consideration the branch and it's delay
 338  * slot mentioned above.
 339  *
 340  * Sometimes we need to emit a branch earlier in the code
 341  * sequence.  And in these situations we adjust "destination"
 342  * to accomodate this difference.  For example, if we needed
 343  * to emit a branch (and it's delay slot) right before the
 344  * final instruction emitted for a BPF opcode, we'd use
 345  * "destination + 4" instead of just plain "destination" above.
 346  *
 347  * This is why you see all of these funny emit_branch() and
 348  * emit_jump() calls with adjusted offsets.
 349  */
 350
 351 void bpf_jit_compile(struct sk_filter *fp)
 352 {
 353         unsigned int cleanup_addr, proglen, oldproglen = 0;
 354         u32 temp[8], *prog, *func, seen = 0, pass;
 355         const struct sock_filter *filter = fp->insns;
 356         int i, flen = fp->len, pc_ret0 = -1;
 357         unsigned int *addrs;
 358         void *image;
 359
 360         if (!bpf_jit_enable)
 361                 return;
 362
 363         addrs = kmalloc(flen * sizeof(*addrs), GFP_KERNEL);
 364         if (addrs == NULL)
 365                 return;
 366
 367         /* Before first pass, make a rough estimation of addrs[]
 368          * each bpf instruction is translated to less than 64 bytes
 369          */
 370         for (proglen = 0, i = 0; i < flen; i++) {
 371                 proglen += 64;
 372                 addrs[i] = proglen;
 373         }
 374         cleanup_addr = proglen; /* epilogue address */
 375         image = NULL;
 376         for (pass = 0; pass < 10; pass++) {
 377                 u8 seen_or_pass0 = (pass == 0) ? (SEEN_XREG | SEEN_DATAREF | SEEN_MEM) : seen;
 378
 379                 /* no prologue/epilogue for trivial filters (RET something) */
 380                 proglen = 0;
 381                 prog = temp;
 382
 383                 /* Prologue */
 384                 if (seen_or_pass0) {
 385                         if (seen_or_pass0 & SEEN_MEM) {
 386                                 unsigned int sz = BASE_STACKFRAME;
 387                                 sz += BPF_MEMWORDS * sizeof(u32);
 388                                 emit_alloc_stack(sz);
 389                         }
 390
 391                         /* Make sure we dont leek kernel memory. */
 392                         if (seen_or_pass0 & SEEN_XREG)
 393                                 emit_clear(r_X);
 394
 395                         /* If this filter needs to access skb data,
 396                          * load %o4 and %o5 with:
 397                          *  %o4 = skb->len - skb->data_len
 398                          *  %o5 = skb->data
 399                          * And also back up %o7 into r_saved_O7 so we can
 400                          * invoke the stubs using 'call'.
 401                          */
 402                         if (seen_or_pass0 & SEEN_DATAREF) {
 403                                 emit_load32(r_SKB, struct sk_buff, len, r_HEADLEN);
 404                                 emit_load32(r_SKB, struct sk_buff, data_len, r_TMP);
 405                                 emit_sub(r_HEADLEN, r_TMP, r_HEADLEN);
 406                                 emit_loadptr(r_SKB, struct sk_buff, data, r_SKB_DATA);
 407                         }
 408                 }
 409                 emit_reg_move(O7, r_saved_O7);
 410
 411                 switch (filter[0].code) {
 412                 case BPF_S_RET_K:
 413                 case BPF_S_LD_W_LEN:
 414                 case BPF_S_ANC_PROTOCOL:
 415                 case BPF_S_ANC_PKTTYPE:
 416                 case BPF_S_ANC_IFINDEX:
 417                 case BPF_S_ANC_MARK:
 418                 case BPF_S_ANC_RXHASH:
 419                 case BPF_S_ANC_CPU:
 420                 case BPF_S_ANC_QUEUE:
 421                 case BPF_S_LD_W_ABS:
 422                 case BPF_S_LD_H_ABS:
 423                 case BPF_S_LD_B_ABS:
 424                         /* The first instruction sets the A register (or is
 425                          * a "RET 'constant'")
 426                          */
 427                         break;
 428                 default:
 429                         /* Make sure we dont leak kernel information to the
 430                          * user.
 431                          */
 432                         emit_clear(r_A); /* A = 0 */
 433                 }
 434
 435                 for (i = 0; i < flen; i++) {
 436                         unsigned int K = filter[i].k;
 437                         unsigned int t_offset;
 438                         unsigned int f_offset;
 439                         u32 t_op, f_op;
 440                         int ilen;
 441
 442                         switch (filter[i].code) {
 443                         case BPF_S_ALU_ADD_X:   /* A += X; */
 444                                 emit_alu_X(ADD);
 445                                 break;
 446                         case BPF_S_ALU_ADD_K:   /* A += K; */
 447                                 emit_alu_K(ADD, K);
 448                                 break;
 449                         case BPF_S_ALU_SUB_X:   /* A -= X; */
 450                                 emit_alu_X(SUB);
 451                                 break;
 452                         case BPF_S_ALU_SUB_K:   /* A -= K */
 453                                 emit_alu_K(SUB, K);
 454                                 break;
 455                         case BPF_S_ALU_AND_X:   /* A &= X */
 456                                 emit_alu_X(AND);
 457                                 break;
 458                         case BPF_S_ALU_AND_K:   /* A &= K */
 459                                 emit_alu_K(AND, K);
 460                                 break;
 461                         case BPF_S_ALU_OR_X:    /* A |= X */
 462                                 emit_alu_X(OR);
 463                                 break;
 464                         case BPF_S_ALU_OR_K:    /* A |= K */
 465                                 emit_alu_K(OR, K);
 466                                 break;
 467                         case BPF_S_ALU_LSH_X:   /* A <<= X */
 468                                 emit_alu_X(SLL);
 469                                 break;
 470                         case BPF_S_ALU_LSH_K:   /* A <<= K */
 471                                 emit_alu_K(SLL, K);
 472                                 break;
 473                         case BPF_S_ALU_RSH_X:   /* A >>= X */
 474                                 emit_alu_X(SRL);
 475                                 break;
 476                         case BPF_S_ALU_RSH_K:   /* A >>= K */
 477                                 emit_alu_K(SRL, K);
 478                                 break;
 479                         case BPF_S_ALU_MUL_X:   /* A *= X; */
 480                                 emit_alu_X(MUL);
 481                                 break;
 482                         case BPF_S_ALU_MUL_K:   /* A *= K */
 483                                 emit_alu_K(MUL, K);
 484                                 break;
 485                         case BPF_S_ALU_DIV_K:   /* A /= K */
 486                                 emit_alu_K(MUL, K);
 487                                 emit_read_y(r_A);
 488                                 break;
 489                         case BPF_S_ALU_DIV_X:   /* A /= X; */
 490                                 emit_cmpi(r_X, 0);
 491                                 if (pc_ret0 > 0) {
 492                                         t_offset = addrs[pc_ret0 - 1];
 493 #ifdef CONFIG_SPARC32
 494                                         emit_branch(BE, t_offset + 20);
 495 #else
 496                                         emit_branch(BE, t_offset + 8);
 497 #endif
 498                                         emit_nop(); /* delay slot */
 499                                 } else {
 500                                         emit_branch_off(BNE, 16);
 501                                         emit_nop();
 502 #ifdef CONFIG_SPARC32
 503                                         emit_jump(cleanup_addr + 20);
 504 #else
 505                                         emit_jump(cleanup_addr + 8);
 506 #endif
 507                                         emit_clear(r_A);
 508                                 }
 509                                 emit_write_y(G0);
 510 #ifdef CONFIG_SPARC32
 511                                 /* The Sparc v8 architecture requires
 512                                  * three instructions between a %y
 513                                  * register write and the first use.
 514                                  */
 515                                 emit_nop();
 516                                 emit_nop();
 517                                 emit_nop();
 518 #endif
 519                                 emit_alu_X(DIV);
 520                                 break;
 521                         case BPF_S_ALU_NEG:
 522                                 emit_neg();
 523                                 break;
 524                         case BPF_S_RET_K:
 525                                 if (!K) {
 526                                         if (pc_ret0 == -1)
 527                                                 pc_ret0 = i;
 528                                         emit_clear(r_A);
 529                                 } else {
 530                                         emit_loadimm(K, r_A);
 531                                 }
 532                                 /* Fallthrough */
 533                         case BPF_S_RET_A:
 534                                 if (seen_or_pass0) {
 535                                         if (i != flen - 1) {
 536                                                 emit_jump(cleanup_addr);
 537                                                 emit_nop();
 538                                                 break;
 539                                         }
 540                                         if (seen_or_pass0 & SEEN_MEM) {
 541                                                 unsigned int sz = BASE_STACKFRAME;
 542                                                 sz += BPF_MEMWORDS * sizeof(u32);
 543                                                 emit_release_stack(sz);
 544                                         }
 545                                 }
 546                                 /* jmpl %r_saved_O7 + 8, %g0 */
 547                                 emit_jmpl(r_saved_O7, 8, G0);
 548                                 emit_reg_move(r_A, O0); /* delay slot */
 549                                 break;
 550                         case BPF_S_MISC_TAX:
 551                                 seen |= SEEN_XREG;
 552                                 emit_reg_move(r_A, r_X);
 553                                 break;
 554                         case BPF_S_MISC_TXA:
 555                                 seen |= SEEN_XREG;
 556                                 emit_reg_move(r_X, r_A);
 557                                 break;
 558                         case BPF_S_ANC_CPU:
 559                                 emit_load_cpu(r_A);
 560                                 break;
 561                         case BPF_S_ANC_PROTOCOL:
 562                                 emit_skb_load16(protocol, r_A);
 563                                 break;
 564 #if 0
 565                                 /* GCC won't let us take the address of
 566                                  * a bit field even though we very much
 567                                  * know what we are doing here.
 568                                  */
 569                         case BPF_S_ANC_PKTTYPE:
 570                                 __emit_skb_load8(pkt_type, r_A);
 571                                 emit_alu_K(SRL, 5);
 572                                 break;
 573 #endif
 574                         case BPF_S_ANC_IFINDEX:
 575                                 emit_skb_loadptr(dev, r_A);
 576                                 emit_cmpi(r_A, 0);
 577                                 emit_branch(BNE_PTR, cleanup_addr + 4);
 578                                 emit_nop();
 579                                 emit_load32(r_A, struct net_device, ifindex, r_A);
 580                                 break;
 581                         case BPF_S_ANC_MARK:
 582                                 emit_skb_load32(mark, r_A);
 583                                 break;
 584                         case BPF_S_ANC_QUEUE:
 585                                 emit_skb_load16(queue_mapping, r_A);
 586                                 break;
 587                         case BPF_S_ANC_HATYPE:
 588                                 emit_skb_loadptr(dev, r_A);
 589                                 emit_cmpi(r_A, 0);
 590                                 emit_branch(BNE_PTR, cleanup_addr + 4);
 591                                 emit_nop();
 592                                 emit_load16(r_A, struct net_device, type, r_A);
 593                                 break;
 594                         case BPF_S_ANC_RXHASH:
 595                                 emit_skb_load32(rxhash, r_A);
 596                                 break;
 597
 598                         case BPF_S_LD_IMM:
 599                                 emit_loadimm(K, r_A);
 600                                 break;
 601                         case BPF_S_LDX_IMM:
 602                                 emit_loadimm(K, r_X);
 603                                 break;
 604                         case BPF_S_LD_MEM:
 605                                 emit_ldmem(K * 4, r_A);
 606                                 break;
 607                         case BPF_S_LDX_MEM:
 608                                 emit_ldmem(K * 4, r_X);
 609                                 break;
 610                         case BPF_S_ST:
 611                                 emit_stmem(K * 4, r_A);
 612                                 break;
 613                         case BPF_S_STX:
 614                                 emit_stmem(K * 4, r_X);
 615                                 break;
 616
 617 #define CHOOSE_LOAD_FUNC(K, func) \
 618         ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
 619
 620                         case BPF_S_LD_W_ABS:
 621                                 func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_word);
 622 common_load:                    seen |= SEEN_DATAREF;
 623                                 emit_loadimm(K, r_OFF);
 624                                 emit_call(func);
 625                                 break;
 626                         case BPF_S_LD_H_ABS:
 627                                 func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_half);
 628                                 goto common_load;
 629                         case BPF_S_LD_B_ABS:
 630                                 func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_byte);
 631                                 goto common_load;
 632                         case BPF_S_LDX_B_MSH:
 633                                 func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_byte_msh);
 634                                 goto common_load;
 635                         case BPF_S_LD_W_IND:
 636                                 func = bpf_jit_load_word;
 637 common_load_ind:                seen |= SEEN_DATAREF | SEEN_XREG;
 638                                 if (K) {
 639                                         if (is_simm13(K)) {
 640                                                 emit_addi(r_X, K, r_OFF);
 641                                         } else {
 642                                                 emit_loadimm(K, r_TMP);
 643                                                 emit_add(r_X, r_TMP, r_OFF);
 644                                         }
 645                                 } else {
 646                                         emit_reg_move(r_X, r_OFF);
 647                                 }
 648                                 emit_call(func);
 649                                 break;
 650                         case BPF_S_LD_H_IND:
 651                                 func = bpf_jit_load_half;
 652                                 goto common_load_ind;
 653                         case BPF_S_LD_B_IND:
 654                                 func = bpf_jit_load_byte;
 655                                 goto common_load_ind;
 656                         case BPF_S_JMP_JA:
 657                                 emit_jump(addrs[i + K]);
 658                                 emit_nop();
 659                                 break;
 660
 661 #define COND_SEL(CODE, TOP, FOP)        \
 662         case CODE:                      \
 663                 t_op = TOP;             \
 664                 f_op = FOP;             \
 665                 goto cond_branch
 666
 667                         COND_SEL(BPF_S_JMP_JGT_K, BGU, BLEU);
 668                         COND_SEL(BPF_S_JMP_JGE_K, BGEU, BLU);
 669                         COND_SEL(BPF_S_JMP_JEQ_K, BE, BNE);
 670                         COND_SEL(BPF_S_JMP_JSET_K, BNE, BE);
 671                         COND_SEL(BPF_S_JMP_JGT_X, BGU, BLEU);
 672                         COND_SEL(BPF_S_JMP_JGE_X, BGEU, BLU);
 673                         COND_SEL(BPF_S_JMP_JEQ_X, BE, BNE);
 674                         COND_SEL(BPF_S_JMP_JSET_X, BNE, BE);
 675
 676 cond_branch:                    f_offset = addrs[i + filter[i].jf];
 677                                 t_offset = addrs[i + filter[i].jt];
 678
 679                                 /* same targets, can avoid doing the test :) */
 680                                 if (filter[i].jt == filter[i].jf) {
 681                                         emit_jump(t_offset);
 682                                         emit_nop();
 683                                         break;
 684                                 }
 685
 686                                 switch (filter[i].code) {
 687                                 case BPF_S_JMP_JGT_X:
 688                                 case BPF_S_JMP_JGE_X:
 689                                 case BPF_S_JMP_JEQ_X:
 690                                         seen |= SEEN_XREG;
 691                                         emit_cmp(r_A, r_X);
 692                                         break;
 693                                 case BPF_S_JMP_JSET_X:
 694                                         seen |= SEEN_XREG;
 695                                         emit_btst(r_A, r_X);
 696                                         break;
 697                                 case BPF_S_JMP_JEQ_K:
 698                                 case BPF_S_JMP_JGT_K:
 699                                 case BPF_S_JMP_JGE_K:
 700                                         if (is_simm13(K)) {
 701                                                 emit_cmpi(r_A, K);
 702                                         } else {
 703                                                 emit_loadimm(K, r_TMP);
 704                                                 emit_cmp(r_A, r_TMP);
 705                                         }
 706                                         break;
 707                                 case BPF_S_JMP_JSET_K:
 708                                         if (is_simm13(K)) {
 709                                                 emit_btsti(r_A, K);
 710                                         } else {
 711                                                 emit_loadimm(K, r_TMP);
 712                                                 emit_btst(r_A, r_TMP);
 713                                         }
 714                                         break;
 715                                 }
 716                                 if (filter[i].jt != 0) {
 717                                         if (filter[i].jf)
 718                                                 t_offset += 8;
 719                                         emit_branch(t_op, t_offset);
 720                                         emit_nop(); /* delay slot */
 721                                         if (filter[i].jf) {
 722                                                 emit_jump(f_offset);
 723                                                 emit_nop();
 724                                         }
 725                                         break;
 726                                 }
 727                                 emit_branch(f_op, f_offset);
 728                                 emit_nop(); /* delay slot */
 729                                 break;
 730
 731                         default:
 732                                 /* hmm, too complex filter, give up with jit compiler */
 733                                 goto out;
 734                         }
 735                         ilen = (void *) prog - (void *) temp;
 736                         if (image) {
 737                                 if (unlikely(proglen + ilen > oldproglen)) {
 738                                         pr_err("bpb_jit_compile fatal error\n");
 739                                         kfree(addrs);
 740                                         module_free(NULL, image);
 741                                         return;
 742                                 }
 743                                 memcpy(image + proglen, temp, ilen);
 744                         }
 745                         proglen += ilen;
 746                         addrs[i] = proglen;
 747                         prog = temp;
 748                 }
 749                 /* last bpf instruction is always a RET :
 750                  * use it to give the cleanup instruction(s) addr
 751                  */
 752                 cleanup_addr = proglen - 8; /* jmpl; mov r_A,%o0; */
 753                 if (seen_or_pass0 & SEEN_MEM)
 754                         cleanup_addr -= 4; /* add %sp, X, %sp; */
 755
 756                 if (image) {
 757                         if (proglen != oldproglen)
 758                                 pr_err("bpb_jit_compile proglen=%u != oldproglen=%u\n",
 759                                        proglen, oldproglen);
 760                         break;
 761                 }
 762                 if (proglen == oldproglen) {
 763                         image = module_alloc(max_t(unsigned int,
 764                                                    proglen,
 765                                                    sizeof(struct work_struct)));
 766                         if (!image)
 767                                 goto out;
 768                 }
 769                 oldproglen = proglen;
 770         }
 771
 772         if (bpf_jit_enable > 1)
 773                 pr_err("flen=%d proglen=%u pass=%d image=%p\n",
 774                        flen, proglen, pass, image);
 775
 776         if (image) {
 777                 if (bpf_jit_enable > 1)
 778                         print_hex_dump(KERN_ERR, "JIT code: ", DUMP_PREFIX_ADDRESS,
 779                                        16, 1, image, proglen, false);
 780                 bpf_flush_icache(image, image + proglen);
 781                 fp->bpf_func = (void *)image;
 782         }
 783 out:
 784         kfree(addrs);
 785         return;
 786 }
 787
 788 static void jit_free_defer(struct work_struct *arg)
 789 {
 790         module_free(NULL, arg);
 791 }
 792
 793 /* run from softirq, we must use a work_struct to call
 794  * module_free() from process context
 795  */
 796 void bpf_jit_free(struct sk_filter *fp)
 797 {
 798         if (fp->bpf_func != sk_run_filter) {
 799                 struct work_struct *work = (struct work_struct *)fp->bpf_func;
 800
 801                 INIT_WORK(work, jit_free_defer);
 802                 schedule_work(work);
 803         }
 804 }