1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/config.h>
13 #include <linux/errno.h>
14 #include <linux/module.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/param.h>
18 #include <linux/string.h>
20 #include <linux/interrupt.h>
21 #include <linux/time.h>
22 #include <linux/timex.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/mc146818rtc.h>
26 #include <linux/delay.h>
27 #include <linux/profile.h>
28 #include <linux/bcd.h>
29 #include <linux/jiffies.h>
30 #include <linux/cpufreq.h>
31 #include <linux/percpu.h>
32 #include <linux/profile.h>
33 #include <linux/miscdevice.h>
34 #include <linux/rtc.h>
36 #include <asm/oplib.h>
37 #include <asm/mostek.h>
38 #include <asm/timer.h>
46 #include <asm/starfire.h>
48 #include <asm/sections.h>
49 #include <asm/cpudata.h>
50 #include <asm/uaccess.h>
52 DEFINE_SPINLOCK(mostek_lock);
53 DEFINE_SPINLOCK(rtc_lock);
54 void __iomem *mstk48t02_regs = NULL;
56 unsigned long ds1287_regs = 0UL;
59 extern unsigned long wall_jiffies;
61 static void __iomem *mstk48t08_regs;
62 static void __iomem *mstk48t59_regs;
64 static int set_rtc_mmss(unsigned long);
66 #define TICK_PRIV_BIT (1UL << 63)
69 unsigned long profile_pc(struct pt_regs *regs)
71 unsigned long pc = instruction_pointer(regs);
73 if (in_lock_functions(pc))
74 return regs->u_regs[UREG_RETPC];
77 EXPORT_SYMBOL(profile_pc);
80 static void tick_disable_protection(void)
82 /* Set things up so user can access tick register for profiling
83 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
84 * read back of %tick after writing it.
90 "1: rd %%tick, %%g2\n"
91 " add %%g2, 6, %%g2\n"
92 " andn %%g2, %0, %%g2\n"
93 " wrpr %%g2, 0, %%tick\n"
100 static void tick_init_tick(unsigned long offset)
102 tick_disable_protection();
104 __asm__ __volatile__(
106 " andn %%g1, %1, %%g1\n"
108 " add %%g1, %0, %%g1\n"
110 "1: wr %%g1, 0x0, %%tick_cmpr\n"
111 " rd %%tick_cmpr, %%g0"
113 : "r" (offset), "r" (TICK_PRIV_BIT)
117 static unsigned long tick_get_tick(void)
121 __asm__ __volatile__("rd %%tick, %0\n\t"
125 return ret & ~TICK_PRIV_BIT;
128 static unsigned long tick_get_compare(void)
132 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
139 static unsigned long tick_add_compare(unsigned long adj)
141 unsigned long new_compare;
143 /* Workaround for Spitfire Errata (#54 I think??), I discovered
144 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
147 * On Blackbird writes to %tick_cmpr can fail, the
148 * workaround seems to be to execute the wr instruction
149 * at the start of an I-cache line, and perform a dummy
150 * read back from %tick_cmpr right after writing to it. -DaveM
152 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
153 "ba,pt %%xcc, 1f\n\t"
154 " add %0, %1, %0\n\t"
157 "wr %0, 0, %%tick_cmpr\n\t"
158 "rd %%tick_cmpr, %%g0"
159 : "=&r" (new_compare)
165 static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
167 unsigned long new_tick, tmp;
169 /* Also need to handle Blackbird bug here too. */
170 __asm__ __volatile__("rd %%tick, %0\n\t"
172 "wrpr %0, 0, %%tick\n\t"
173 "andn %0, %4, %1\n\t"
174 "ba,pt %%xcc, 1f\n\t"
175 " add %1, %3, %1\n\t"
178 "wr %1, 0, %%tick_cmpr\n\t"
179 "rd %%tick_cmpr, %%g0"
180 : "=&r" (new_tick), "=&r" (tmp)
181 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
186 static struct sparc64_tick_ops tick_operations __read_mostly = {
187 .init_tick = tick_init_tick,
188 .get_tick = tick_get_tick,
189 .get_compare = tick_get_compare,
190 .add_tick = tick_add_tick,
191 .add_compare = tick_add_compare,
192 .softint_mask = 1UL << 0,
195 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
197 static void stick_init_tick(unsigned long offset)
199 /* Writes to the %tick and %stick register are not
200 * allowed on sun4v. The Hypervisor controls that
203 if (tlb_type != hypervisor) {
204 tick_disable_protection();
206 /* Let the user get at STICK too. */
207 __asm__ __volatile__(
208 " rd %%asr24, %%g2\n"
209 " andn %%g2, %0, %%g2\n"
210 " wr %%g2, 0, %%asr24"
212 : "r" (TICK_PRIV_BIT)
216 __asm__ __volatile__(
217 " rd %%asr24, %%g1\n"
218 " andn %%g1, %1, %%g1\n"
219 " add %%g1, %0, %%g1\n"
220 " wr %%g1, 0x0, %%asr25"
222 : "r" (offset), "r" (TICK_PRIV_BIT)
226 static unsigned long stick_get_tick(void)
230 __asm__ __volatile__("rd %%asr24, %0"
233 return ret & ~TICK_PRIV_BIT;
236 static unsigned long stick_get_compare(void)
240 __asm__ __volatile__("rd %%asr25, %0"
246 static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
248 unsigned long new_tick, tmp;
250 __asm__ __volatile__("rd %%asr24, %0\n\t"
252 "wr %0, 0, %%asr24\n\t"
253 "andn %0, %4, %1\n\t"
256 : "=&r" (new_tick), "=&r" (tmp)
257 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
262 static unsigned long stick_add_compare(unsigned long adj)
264 unsigned long new_compare;
266 __asm__ __volatile__("rd %%asr25, %0\n\t"
269 : "=&r" (new_compare)
275 static struct sparc64_tick_ops stick_operations __read_mostly = {
276 .init_tick = stick_init_tick,
277 .get_tick = stick_get_tick,
278 .get_compare = stick_get_compare,
279 .add_tick = stick_add_tick,
280 .add_compare = stick_add_compare,
281 .softint_mask = 1UL << 16,
284 /* On Hummingbird the STICK/STICK_CMPR register is implemented
285 * in I/O space. There are two 64-bit registers each, the
286 * first holds the low 32-bits of the value and the second holds
289 * Since STICK is constantly updating, we have to access it carefully.
291 * The sequence we use to read is:
294 * 3) read high again, if it rolled re-read both low and high again.
296 * Writing STICK safely is also tricky:
297 * 1) write low to zero
301 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
302 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
304 static unsigned long __hbird_read_stick(void)
306 unsigned long ret, tmp1, tmp2, tmp3;
307 unsigned long addr = HBIRD_STICK_ADDR+8;
309 __asm__ __volatile__("ldxa [%1] %5, %2\n"
311 "sub %1, 0x8, %1\n\t"
312 "ldxa [%1] %5, %3\n\t"
313 "add %1, 0x8, %1\n\t"
314 "ldxa [%1] %5, %4\n\t"
316 "bne,a,pn %%xcc, 1b\n\t"
318 "sllx %4, 32, %4\n\t"
320 : "=&r" (ret), "=&r" (addr),
321 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
322 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
327 static unsigned long __hbird_read_compare(void)
329 unsigned long low, high;
330 unsigned long addr = HBIRD_STICKCMP_ADDR;
332 __asm__ __volatile__("ldxa [%2] %3, %0\n\t"
333 "add %2, 0x8, %2\n\t"
335 : "=&r" (low), "=&r" (high), "=&r" (addr)
336 : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
338 return (high << 32UL) | low;
341 static void __hbird_write_stick(unsigned long val)
343 unsigned long low = (val & 0xffffffffUL);
344 unsigned long high = (val >> 32UL);
345 unsigned long addr = HBIRD_STICK_ADDR;
347 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
348 "add %0, 0x8, %0\n\t"
349 "stxa %3, [%0] %4\n\t"
350 "sub %0, 0x8, %0\n\t"
353 : "0" (addr), "r" (low), "r" (high),
354 "i" (ASI_PHYS_BYPASS_EC_E));
357 static void __hbird_write_compare(unsigned long val)
359 unsigned long low = (val & 0xffffffffUL);
360 unsigned long high = (val >> 32UL);
361 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
363 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
364 "sub %0, 0x8, %0\n\t"
367 : "0" (addr), "r" (low), "r" (high),
368 "i" (ASI_PHYS_BYPASS_EC_E));
371 static void hbtick_init_tick(unsigned long offset)
375 tick_disable_protection();
377 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
378 * XXX into actually sending STICK interrupts. I think because
379 * XXX of how we store %tick_cmpr in head.S this somehow resets the
380 * XXX {TICK + STICK} interrupt mux. -DaveM
382 __hbird_write_stick(__hbird_read_stick());
384 val = __hbird_read_stick() & ~TICK_PRIV_BIT;
385 __hbird_write_compare(val + offset);
388 static unsigned long hbtick_get_tick(void)
390 return __hbird_read_stick() & ~TICK_PRIV_BIT;
393 static unsigned long hbtick_get_compare(void)
395 return __hbird_read_compare();
398 static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
402 val = __hbird_read_stick() + adj;
403 __hbird_write_stick(val);
405 val &= ~TICK_PRIV_BIT;
406 __hbird_write_compare(val + offset);
411 static unsigned long hbtick_add_compare(unsigned long adj)
413 unsigned long val = __hbird_read_compare() + adj;
415 val &= ~TICK_PRIV_BIT;
416 __hbird_write_compare(val);
421 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
422 .init_tick = hbtick_init_tick,
423 .get_tick = hbtick_get_tick,
424 .get_compare = hbtick_get_compare,
425 .add_tick = hbtick_add_tick,
426 .add_compare = hbtick_add_compare,
427 .softint_mask = 1UL << 0,
430 /* timer_interrupt() needs to keep up the real-time clock,
431 * as well as call the "do_timer()" routine every clocktick
433 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
434 * interrupts, one at level14 and one with softint bit 0.
436 unsigned long timer_tick_offset __read_mostly;
438 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
440 #define TICK_SIZE (tick_nsec / 1000)
442 static inline void timer_check_rtc(void)
444 /* last time the cmos clock got updated */
445 static long last_rtc_update;
447 /* Determine when to update the Mostek clock. */
449 xtime.tv_sec > last_rtc_update + 660 &&
450 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
451 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
452 if (set_rtc_mmss(xtime.tv_sec) == 0)
453 last_rtc_update = xtime.tv_sec;
455 last_rtc_update = xtime.tv_sec - 600;
456 /* do it again in 60 s */
460 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
462 unsigned long ticks, compare, pstate;
464 write_seqlock(&xtime_lock);
468 profile_tick(CPU_PROFILING, regs);
469 update_process_times(user_mode(regs));
473 /* Guarantee that the following sequences execute
476 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
477 "wrpr %0, %1, %%pstate"
481 compare = tick_ops->add_compare(timer_tick_offset);
482 ticks = tick_ops->get_tick();
484 /* Restore PSTATE_IE. */
485 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
488 } while (time_after_eq(ticks, compare));
492 write_sequnlock(&xtime_lock);
498 void timer_tick_interrupt(struct pt_regs *regs)
500 write_seqlock(&xtime_lock);
506 write_sequnlock(&xtime_lock);
510 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
511 static void __init kick_start_clock(void)
513 void __iomem *regs = mstk48t02_regs;
517 prom_printf("CLOCK: Clock was stopped. Kick start ");
519 spin_lock_irq(&mostek_lock);
521 /* Turn on the kick start bit to start the oscillator. */
522 tmp = mostek_read(regs + MOSTEK_CREG);
523 tmp |= MSTK_CREG_WRITE;
524 mostek_write(regs + MOSTEK_CREG, tmp);
525 tmp = mostek_read(regs + MOSTEK_SEC);
527 mostek_write(regs + MOSTEK_SEC, tmp);
528 tmp = mostek_read(regs + MOSTEK_HOUR);
529 tmp |= MSTK_KICK_START;
530 mostek_write(regs + MOSTEK_HOUR, tmp);
531 tmp = mostek_read(regs + MOSTEK_CREG);
532 tmp &= ~MSTK_CREG_WRITE;
533 mostek_write(regs + MOSTEK_CREG, tmp);
535 spin_unlock_irq(&mostek_lock);
537 /* Delay to allow the clock oscillator to start. */
538 sec = MSTK_REG_SEC(regs);
539 for (i = 0; i < 3; i++) {
540 while (sec == MSTK_REG_SEC(regs))
541 for (count = 0; count < 100000; count++)
544 sec = MSTK_REG_SEC(regs);
548 spin_lock_irq(&mostek_lock);
550 /* Turn off kick start and set a "valid" time and date. */
551 tmp = mostek_read(regs + MOSTEK_CREG);
552 tmp |= MSTK_CREG_WRITE;
553 mostek_write(regs + MOSTEK_CREG, tmp);
554 tmp = mostek_read(regs + MOSTEK_HOUR);
555 tmp &= ~MSTK_KICK_START;
556 mostek_write(regs + MOSTEK_HOUR, tmp);
557 MSTK_SET_REG_SEC(regs,0);
558 MSTK_SET_REG_MIN(regs,0);
559 MSTK_SET_REG_HOUR(regs,0);
560 MSTK_SET_REG_DOW(regs,5);
561 MSTK_SET_REG_DOM(regs,1);
562 MSTK_SET_REG_MONTH(regs,8);
563 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
564 tmp = mostek_read(regs + MOSTEK_CREG);
565 tmp &= ~MSTK_CREG_WRITE;
566 mostek_write(regs + MOSTEK_CREG, tmp);
568 spin_unlock_irq(&mostek_lock);
570 /* Ensure the kick start bit is off. If it isn't, turn it off. */
571 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
572 prom_printf("CLOCK: Kick start still on!\n");
574 spin_lock_irq(&mostek_lock);
576 tmp = mostek_read(regs + MOSTEK_CREG);
577 tmp |= MSTK_CREG_WRITE;
578 mostek_write(regs + MOSTEK_CREG, tmp);
580 tmp = mostek_read(regs + MOSTEK_HOUR);
581 tmp &= ~MSTK_KICK_START;
582 mostek_write(regs + MOSTEK_HOUR, tmp);
584 tmp = mostek_read(regs + MOSTEK_CREG);
585 tmp &= ~MSTK_CREG_WRITE;
586 mostek_write(regs + MOSTEK_CREG, tmp);
588 spin_unlock_irq(&mostek_lock);
591 prom_printf("CLOCK: Kick start procedure successful.\n");
594 /* Return nonzero if the clock chip battery is low. */
595 static int __init has_low_battery(void)
597 void __iomem *regs = mstk48t02_regs;
600 spin_lock_irq(&mostek_lock);
602 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
603 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
604 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
605 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
607 spin_unlock_irq(&mostek_lock);
609 return (data1 == data2); /* Was the write blocked? */
612 /* Probe for the real time clock chip. */
613 static void __init set_system_time(void)
615 unsigned int year, mon, day, hour, min, sec;
616 void __iomem *mregs = mstk48t02_regs;
618 unsigned long dregs = ds1287_regs;
620 unsigned long dregs = 0UL;
624 if (!mregs && !dregs) {
625 prom_printf("Something wrong, clock regs not mapped yet.\n");
630 spin_lock_irq(&mostek_lock);
632 /* Traditional Mostek chip. */
633 tmp = mostek_read(mregs + MOSTEK_CREG);
634 tmp |= MSTK_CREG_READ;
635 mostek_write(mregs + MOSTEK_CREG, tmp);
637 sec = MSTK_REG_SEC(mregs);
638 min = MSTK_REG_MIN(mregs);
639 hour = MSTK_REG_HOUR(mregs);
640 day = MSTK_REG_DOM(mregs);
641 mon = MSTK_REG_MONTH(mregs);
642 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
644 /* Dallas 12887 RTC chip. */
647 sec = CMOS_READ(RTC_SECONDS);
648 min = CMOS_READ(RTC_MINUTES);
649 hour = CMOS_READ(RTC_HOURS);
650 day = CMOS_READ(RTC_DAY_OF_MONTH);
651 mon = CMOS_READ(RTC_MONTH);
652 year = CMOS_READ(RTC_YEAR);
653 } while (sec != CMOS_READ(RTC_SECONDS));
655 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
663 if ((year += 1900) < 1970)
667 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
668 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
669 set_normalized_timespec(&wall_to_monotonic,
670 -xtime.tv_sec, -xtime.tv_nsec);
673 tmp = mostek_read(mregs + MOSTEK_CREG);
674 tmp &= ~MSTK_CREG_READ;
675 mostek_write(mregs + MOSTEK_CREG, tmp);
677 spin_unlock_irq(&mostek_lock);
681 /* davem suggests we keep this within the 4M locked kernel image */
682 static u32 starfire_get_time(void)
684 static char obp_gettod[32];
687 sprintf(obp_gettod, "h# %08x unix-gettod",
688 (unsigned int) (long) &unix_tod);
689 prom_feval(obp_gettod);
694 static int starfire_set_time(u32 val)
696 /* Do nothing, time is set using the service processor
697 * console on this platform.
702 static u32 hypervisor_get_time(void)
704 register unsigned long func asm("%o5");
705 register unsigned long arg0 asm("%o0");
706 register unsigned long arg1 asm("%o1");
710 func = HV_FAST_TOD_GET;
713 __asm__ __volatile__("ta %6"
714 : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
715 : "0" (func), "1" (arg0), "2" (arg1),
719 if (arg0 == HV_EWOULDBLOCK) {
724 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
727 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
731 static int hypervisor_set_time(u32 secs)
733 register unsigned long func asm("%o5");
734 register unsigned long arg0 asm("%o0");
738 func = HV_FAST_TOD_SET;
740 __asm__ __volatile__("ta %4"
741 : "=&r" (func), "=&r" (arg0)
742 : "0" (func), "1" (arg0),
746 if (arg0 == HV_EWOULDBLOCK) {
751 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
754 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
758 void __init clock_probe(void)
760 struct linux_prom_registers clk_reg[2];
762 int node, busnd = -1, err;
764 struct linux_central *cbus;
766 struct linux_ebus *ebus = NULL;
767 struct sparc_isa_bridge *isa_br = NULL;
776 if (this_is_starfire) {
777 xtime.tv_sec = starfire_get_time();
778 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
779 set_normalized_timespec(&wall_to_monotonic,
780 -xtime.tv_sec, -xtime.tv_nsec);
783 if (tlb_type == hypervisor) {
784 xtime.tv_sec = hypervisor_get_time();
785 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
786 set_normalized_timespec(&wall_to_monotonic,
787 -xtime.tv_sec, -xtime.tv_nsec);
791 local_irq_save(flags);
795 busnd = central_bus->child->prom_node;
797 /* Check FHC Central then EBUSs then ISA bridges then SBUSs.
798 * That way we handle the presence of multiple properly.
800 * As a special case, machines with Central must provide the
804 if (ebus_chain != NULL) {
807 busnd = ebus->prom_node;
809 if (isa_chain != NULL) {
812 busnd = isa_br->prom_node;
815 if (sbus_root != NULL && busnd == -1)
816 busnd = sbus_root->prom_node;
819 prom_printf("clock_probe: problem, cannot find bus to search.\n");
823 node = prom_getchild(busnd);
829 prom_getstring(node, "model", model, sizeof(model));
830 if (strcmp(model, "mk48t02") &&
831 strcmp(model, "mk48t08") &&
832 strcmp(model, "mk48t59") &&
833 strcmp(model, "m5819") &&
834 strcmp(model, "m5819p") &&
835 strcmp(model, "m5823") &&
836 strcmp(model, "ds1287")) {
838 prom_printf("clock_probe: Central bus lacks timer chip.\n");
843 node = prom_getsibling(node);
845 while ((node == 0) && ebus != NULL) {
848 busnd = ebus->prom_node;
849 node = prom_getchild(busnd);
852 while ((node == 0) && isa_br != NULL) {
853 isa_br = isa_br->next;
854 if (isa_br != NULL) {
855 busnd = isa_br->prom_node;
856 node = prom_getchild(busnd);
861 prom_printf("clock_probe: Cannot find timer chip\n");
867 err = prom_getproperty(node, "reg", (char *)clk_reg,
870 prom_printf("clock_probe: Cannot get Mostek reg property\n");
875 apply_fhc_ranges(central_bus->child, clk_reg, 1);
876 apply_central_ranges(central_bus, clk_reg, 1);
879 else if (ebus != NULL) {
880 struct linux_ebus_device *edev;
882 for_each_ebusdev(edev, ebus)
883 if (edev->prom_node == node)
886 if (isa_chain != NULL)
888 prom_printf("%s: Mostek not probed by EBUS\n",
893 if (!strcmp(model, "ds1287") ||
894 !strcmp(model, "m5819") ||
895 !strcmp(model, "m5819p") ||
896 !strcmp(model, "m5823")) {
897 ds1287_regs = edev->resource[0].start;
899 mstk48t59_regs = (void __iomem *)
900 edev->resource[0].start;
901 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
905 else if (isa_br != NULL) {
906 struct sparc_isa_device *isadev;
909 for_each_isadev(isadev, isa_br)
910 if (isadev->prom_node == node)
912 if (isadev == NULL) {
913 prom_printf("%s: Mostek not probed by ISA\n");
916 if (!strcmp(model, "ds1287") ||
917 !strcmp(model, "m5819") ||
918 !strcmp(model, "m5819p") ||
919 !strcmp(model, "m5823")) {
920 ds1287_regs = isadev->resource.start;
922 mstk48t59_regs = (void __iomem *)
923 isadev->resource.start;
924 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
930 if (sbus_root->num_sbus_ranges) {
931 int nranges = sbus_root->num_sbus_ranges;
934 for (rngc = 0; rngc < nranges; rngc++)
935 if (clk_reg[0].which_io ==
936 sbus_root->sbus_ranges[rngc].ot_child_space)
938 if (rngc == nranges) {
939 prom_printf("clock_probe: Cannot find ranges for "
943 clk_reg[0].which_io =
944 sbus_root->sbus_ranges[rngc].ot_parent_space;
945 clk_reg[0].phys_addr +=
946 sbus_root->sbus_ranges[rngc].ot_parent_base;
950 if(model[5] == '0' && model[6] == '2') {
951 mstk48t02_regs = (void __iomem *)
952 (((u64)clk_reg[0].phys_addr) |
953 (((u64)clk_reg[0].which_io)<<32UL));
954 } else if(model[5] == '0' && model[6] == '8') {
955 mstk48t08_regs = (void __iomem *)
956 (((u64)clk_reg[0].phys_addr) |
957 (((u64)clk_reg[0].which_io)<<32UL));
958 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
960 mstk48t59_regs = (void __iomem *)
961 (((u64)clk_reg[0].phys_addr) |
962 (((u64)clk_reg[0].which_io)<<32UL));
963 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
968 if (mstk48t02_regs != NULL) {
969 /* Report a low battery voltage condition. */
970 if (has_low_battery())
971 prom_printf("NVRAM: Low battery voltage!\n");
973 /* Kick start the clock if it is completely stopped. */
974 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
980 local_irq_restore(flags);
983 /* This is gets the master TICK_INT timer going. */
984 static unsigned long sparc64_init_timers(void)
989 extern void smp_tick_init(void);
992 if (tlb_type == spitfire) {
993 unsigned long ver, manuf, impl;
995 __asm__ __volatile__ ("rdpr %%ver, %0"
997 manuf = ((ver >> 48) & 0xffff);
998 impl = ((ver >> 32) & 0xffff);
999 if (manuf == 0x17 && impl == 0x13) {
1000 /* Hummingbird, aka Ultra-IIe */
1001 tick_ops = &hbtick_operations;
1002 node = prom_root_node;
1003 clock = prom_getint(node, "stick-frequency");
1005 tick_ops = &tick_operations;
1006 cpu_find_by_instance(0, &node, NULL);
1007 clock = prom_getint(node, "clock-frequency");
1010 tick_ops = &stick_operations;
1011 node = prom_root_node;
1012 clock = prom_getint(node, "stick-frequency");
1014 timer_tick_offset = clock / HZ;
1023 static void sparc64_start_timers(irqreturn_t (*cfunc)(int, void *, struct pt_regs *))
1025 unsigned long pstate;
1028 /* Register IRQ handler. */
1029 err = request_irq(build_irq(0, 0, 0UL, 0UL), cfunc, 0,
1033 prom_printf("Serious problem, cannot register TICK_INT\n");
1037 /* Guarantee that the following sequences execute
1040 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
1041 "wrpr %0, %1, %%pstate"
1045 tick_ops->init_tick(timer_tick_offset);
1047 /* Restore PSTATE_IE. */
1048 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
1056 unsigned long clock_tick_ref;
1057 unsigned int ref_freq;
1059 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
1061 unsigned long sparc64_get_clock_tick(unsigned int cpu)
1063 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
1065 if (ft->clock_tick_ref)
1066 return ft->clock_tick_ref;
1067 return cpu_data(cpu).clock_tick;
1070 #ifdef CONFIG_CPU_FREQ
1072 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
1075 struct cpufreq_freqs *freq = data;
1076 unsigned int cpu = freq->cpu;
1077 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
1079 if (!ft->ref_freq) {
1080 ft->ref_freq = freq->old;
1081 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
1083 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
1084 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
1085 (val == CPUFREQ_RESUMECHANGE)) {
1086 cpu_data(cpu).clock_tick =
1087 cpufreq_scale(ft->clock_tick_ref,
1095 static struct notifier_block sparc64_cpufreq_notifier_block = {
1096 .notifier_call = sparc64_cpufreq_notifier
1099 #endif /* CONFIG_CPU_FREQ */
1101 static struct time_interpolator sparc64_cpu_interpolator = {
1102 .source = TIME_SOURCE_CPU,
1104 .mask = 0xffffffffffffffffLL
1107 /* The quotient formula is taken from the IA64 port. */
1108 #define SPARC64_NSEC_PER_CYC_SHIFT 30UL
1109 void __init time_init(void)
1111 unsigned long clock = sparc64_init_timers();
1113 sparc64_cpu_interpolator.frequency = clock;
1114 register_time_interpolator(&sparc64_cpu_interpolator);
1116 /* Now that the interpolator is registered, it is
1117 * safe to start the timer ticking.
1119 sparc64_start_timers(timer_interrupt);
1121 timer_ticks_per_nsec_quotient =
1122 (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
1123 (clock / 2)) / clock);
1125 #ifdef CONFIG_CPU_FREQ
1126 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1127 CPUFREQ_TRANSITION_NOTIFIER);
1131 unsigned long long sched_clock(void)
1133 unsigned long ticks = tick_ops->get_tick();
1135 return (ticks * timer_ticks_per_nsec_quotient)
1136 >> SPARC64_NSEC_PER_CYC_SHIFT;
1139 static int set_rtc_mmss(unsigned long nowtime)
1141 int real_seconds, real_minutes, chip_minutes;
1142 void __iomem *mregs = mstk48t02_regs;
1144 unsigned long dregs = ds1287_regs;
1146 unsigned long dregs = 0UL;
1148 unsigned long flags;
1152 * Not having a register set can lead to trouble.
1153 * Also starfire doesn't have a tod clock.
1155 if (!mregs && !dregs)
1159 spin_lock_irqsave(&mostek_lock, flags);
1161 /* Read the current RTC minutes. */
1162 tmp = mostek_read(mregs + MOSTEK_CREG);
1163 tmp |= MSTK_CREG_READ;
1164 mostek_write(mregs + MOSTEK_CREG, tmp);
1166 chip_minutes = MSTK_REG_MIN(mregs);
1168 tmp = mostek_read(mregs + MOSTEK_CREG);
1169 tmp &= ~MSTK_CREG_READ;
1170 mostek_write(mregs + MOSTEK_CREG, tmp);
1173 * since we're only adjusting minutes and seconds,
1174 * don't interfere with hour overflow. This avoids
1175 * messing with unknown time zones but requires your
1176 * RTC not to be off by more than 15 minutes
1178 real_seconds = nowtime % 60;
1179 real_minutes = nowtime / 60;
1180 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1181 real_minutes += 30; /* correct for half hour time zone */
1184 if (abs(real_minutes - chip_minutes) < 30) {
1185 tmp = mostek_read(mregs + MOSTEK_CREG);
1186 tmp |= MSTK_CREG_WRITE;
1187 mostek_write(mregs + MOSTEK_CREG, tmp);
1189 MSTK_SET_REG_SEC(mregs,real_seconds);
1190 MSTK_SET_REG_MIN(mregs,real_minutes);
1192 tmp = mostek_read(mregs + MOSTEK_CREG);
1193 tmp &= ~MSTK_CREG_WRITE;
1194 mostek_write(mregs + MOSTEK_CREG, tmp);
1196 spin_unlock_irqrestore(&mostek_lock, flags);
1200 spin_unlock_irqrestore(&mostek_lock, flags);
1206 unsigned char save_control, save_freq_select;
1208 /* Stolen from arch/i386/kernel/time.c, see there for
1209 * credits and descriptive comments.
1211 spin_lock_irqsave(&rtc_lock, flags);
1212 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1213 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1215 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1216 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1218 chip_minutes = CMOS_READ(RTC_MINUTES);
1219 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1220 BCD_TO_BIN(chip_minutes);
1221 real_seconds = nowtime % 60;
1222 real_minutes = nowtime / 60;
1223 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1227 if (abs(real_minutes - chip_minutes) < 30) {
1228 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1229 BIN_TO_BCD(real_seconds);
1230 BIN_TO_BCD(real_minutes);
1232 CMOS_WRITE(real_seconds,RTC_SECONDS);
1233 CMOS_WRITE(real_minutes,RTC_MINUTES);
1236 "set_rtc_mmss: can't update from %d to %d\n",
1237 chip_minutes, real_minutes);
1241 CMOS_WRITE(save_control, RTC_CONTROL);
1242 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1243 spin_unlock_irqrestore(&rtc_lock, flags);
1249 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1250 static unsigned char mini_rtc_status; /* bitmapped status byte. */
1252 /* months start at 0 now */
1253 static unsigned char days_in_mo[] =
1254 {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
1257 #define STARTOFTIME 1970
1258 #define SECDAY 86400L
1259 #define SECYR (SECDAY * 365)
1260 #define leapyear(year) ((year) % 4 == 0 && \
1261 ((year) % 100 != 0 || (year) % 400 == 0))
1262 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1263 #define days_in_month(a) (month_days[(a) - 1])
1265 static int month_days[12] = {
1266 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1270 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1272 static void GregorianDay(struct rtc_time * tm)
1277 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1279 lastYear = tm->tm_year - 1;
1282 * Number of leap corrections to apply up to end of last year
1284 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1287 * This year is a leap year if it is divisible by 4 except when it is
1288 * divisible by 100 unless it is divisible by 400
1290 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1292 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1294 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1297 tm->tm_wday = day % 7;
1300 static void to_tm(int tim, struct rtc_time *tm)
1303 register long hms, day;
1308 /* Hours, minutes, seconds are easy */
1309 tm->tm_hour = hms / 3600;
1310 tm->tm_min = (hms % 3600) / 60;
1311 tm->tm_sec = (hms % 3600) % 60;
1313 /* Number of years in days */
1314 for (i = STARTOFTIME; day >= days_in_year(i); i++)
1315 day -= days_in_year(i);
1318 /* Number of months in days left */
1319 if (leapyear(tm->tm_year))
1320 days_in_month(FEBRUARY) = 29;
1321 for (i = 1; day >= days_in_month(i); i++)
1322 day -= days_in_month(i);
1323 days_in_month(FEBRUARY) = 28;
1326 /* Days are what is left over (+1) from all that. */
1327 tm->tm_mday = day + 1;
1330 * Determine the day of week
1335 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1336 * aka Unix time. So we have to convert to/from rtc_time.
1338 static inline void mini_get_rtc_time(struct rtc_time *time)
1340 unsigned long flags;
1343 spin_lock_irqsave(&rtc_lock, flags);
1345 if (this_is_starfire)
1346 seconds = starfire_get_time();
1347 else if (tlb_type == hypervisor)
1348 seconds = hypervisor_get_time();
1349 spin_unlock_irqrestore(&rtc_lock, flags);
1351 to_tm(seconds, time);
1352 time->tm_year -= 1900;
1356 static inline int mini_set_rtc_time(struct rtc_time *time)
1358 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1359 time->tm_mday, time->tm_hour,
1360 time->tm_min, time->tm_sec);
1361 unsigned long flags;
1364 spin_lock_irqsave(&rtc_lock, flags);
1366 if (this_is_starfire)
1367 err = starfire_set_time(seconds);
1368 else if (tlb_type == hypervisor)
1369 err = hypervisor_set_time(seconds);
1370 spin_unlock_irqrestore(&rtc_lock, flags);
1375 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1376 unsigned int cmd, unsigned long arg)
1378 struct rtc_time wtime;
1379 void __user *argp = (void __user *)arg;
1389 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1392 case RTC_UIE_ON: /* enable ints for RTC updates. */
1395 case RTC_RD_TIME: /* Read the time/date from RTC */
1396 /* this doesn't get week-day, who cares */
1397 memset(&wtime, 0, sizeof(wtime));
1398 mini_get_rtc_time(&wtime);
1400 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1402 case RTC_SET_TIME: /* Set the RTC */
1405 unsigned char leap_yr;
1407 if (!capable(CAP_SYS_TIME))
1410 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1413 year = wtime.tm_year + 1900;
1414 leap_yr = ((!(year % 4) && (year % 100)) ||
1417 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || (wtime.tm_mday < 1))
1420 if (wtime.tm_mday < 0 || wtime.tm_mday >
1421 (days_in_mo[wtime.tm_mon] + ((wtime.tm_mon == 1) && leap_yr)))
1424 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1425 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1426 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1429 return mini_set_rtc_time(&wtime);
1436 static int mini_rtc_open(struct inode *inode, struct file *file)
1438 if (mini_rtc_status & RTC_IS_OPEN)
1441 mini_rtc_status |= RTC_IS_OPEN;
1446 static int mini_rtc_release(struct inode *inode, struct file *file)
1448 mini_rtc_status &= ~RTC_IS_OPEN;
1453 static struct file_operations mini_rtc_fops = {
1454 .owner = THIS_MODULE,
1455 .ioctl = mini_rtc_ioctl,
1456 .open = mini_rtc_open,
1457 .release = mini_rtc_release,
1460 static struct miscdevice rtc_mini_dev =
1464 .fops = &mini_rtc_fops,
1467 static int __init rtc_mini_init(void)
1471 if (tlb_type != hypervisor && !this_is_starfire)
1474 printk(KERN_INFO "Mini RTC Driver\n");
1476 retval = misc_register(&rtc_mini_dev);
1483 static void __exit rtc_mini_exit(void)
1485 misc_deregister(&rtc_mini_dev);
1489 module_init(rtc_mini_init);
1490 module_exit(rtc_mini_exit);