2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
14 * Do not include directly; use <linux/atomic.h>.
17 #ifndef _ASM_TILE_ATOMIC_32_H
18 #define _ASM_TILE_ATOMIC_32_H
20 #include <asm/barrier.h>
21 #include <arch/chip.h>
26 * atomic_add - add integer to atomic variable
27 * @i: integer value to add
28 * @v: pointer of type atomic_t
30 * Atomically adds @i to @v.
32 static inline void atomic_add(int i, atomic_t *v)
34 _atomic_xchg_add(&v->counter, i);
38 * atomic_add_return - add integer and return
39 * @v: pointer of type atomic_t
40 * @i: integer value to add
42 * Atomically adds @i to @v and returns @i + @v
44 static inline int atomic_add_return(int i, atomic_t *v)
46 smp_mb(); /* barrier for proper semantics */
47 return _atomic_xchg_add(&v->counter, i) + i;
51 * __atomic_add_unless - add unless the number is already a given value
52 * @v: pointer of type atomic_t
53 * @a: the amount to add to v...
54 * @u: ...unless v is equal to u.
56 * Atomically adds @a to @v, so long as @v was not already @u.
57 * Returns the old value of @v.
59 static inline int __atomic_add_unless(atomic_t *v, int a, int u)
61 smp_mb(); /* barrier for proper semantics */
62 return _atomic_xchg_add_unless(&v->counter, a, u);
66 * atomic_set - set atomic variable
67 * @v: pointer of type atomic_t
70 * Atomically sets the value of @v to @i.
72 * atomic_set() can't be just a raw store, since it would be lost if it
73 * fell between the load and store of one of the other atomic ops.
75 static inline void atomic_set(atomic_t *v, int n)
77 _atomic_xchg(&v->counter, n);
80 /* A 64bit atomic type */
83 u64 __aligned(8) counter;
86 #define ATOMIC64_INIT(val) { (val) }
89 * atomic64_read - read atomic variable
90 * @v: pointer of type atomic64_t
92 * Atomically reads the value of @v.
94 static inline u64 atomic64_read(const atomic64_t *v)
97 * Requires an atomic op to read both 32-bit parts consistently.
98 * Casting away const is safe since the atomic support routines
99 * do not write to memory if the value has not been modified.
101 return _atomic64_xchg_add((u64 *)&v->counter, 0);
105 * atomic64_add - add integer to atomic variable
106 * @i: integer value to add
107 * @v: pointer of type atomic64_t
109 * Atomically adds @i to @v.
111 static inline void atomic64_add(u64 i, atomic64_t *v)
113 _atomic64_xchg_add(&v->counter, i);
117 * atomic64_add_return - add integer and return
118 * @v: pointer of type atomic64_t
119 * @i: integer value to add
121 * Atomically adds @i to @v and returns @i + @v
123 static inline u64 atomic64_add_return(u64 i, atomic64_t *v)
125 smp_mb(); /* barrier for proper semantics */
126 return _atomic64_xchg_add(&v->counter, i) + i;
130 * atomic64_add_unless - add unless the number is already a given value
131 * @v: pointer of type atomic64_t
132 * @a: the amount to add to v...
133 * @u: ...unless v is equal to u.
135 * Atomically adds @a to @v, so long as @v was not already @u.
136 * Returns non-zero if @v was not @u, and zero otherwise.
138 static inline u64 atomic64_add_unless(atomic64_t *v, u64 a, u64 u)
140 smp_mb(); /* barrier for proper semantics */
141 return _atomic64_xchg_add_unless(&v->counter, a, u) != u;
145 * atomic64_set - set atomic variable
146 * @v: pointer of type atomic64_t
149 * Atomically sets the value of @v to @i.
151 * atomic64_set() can't be just a raw store, since it would be lost if it
152 * fell between the load and store of one of the other atomic ops.
154 static inline void atomic64_set(atomic64_t *v, u64 n)
156 _atomic64_xchg(&v->counter, n);
159 #define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
160 #define atomic64_inc(v) atomic64_add(1LL, (v))
161 #define atomic64_inc_return(v) atomic64_add_return(1LL, (v))
162 #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
163 #define atomic64_sub_return(i, v) atomic64_add_return(-(i), (v))
164 #define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0)
165 #define atomic64_sub(i, v) atomic64_add(-(i), (v))
166 #define atomic64_dec(v) atomic64_sub(1LL, (v))
167 #define atomic64_dec_return(v) atomic64_sub_return(1LL, (v))
168 #define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0)
169 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL)
172 * We need to barrier before modifying the word, since the _atomic_xxx()
173 * routines just tns the lock and then read/modify/write of the word.
174 * But after the word is updated, the routine issues an "mf" before returning,
175 * and since it's a function call, we don't even need a compiler barrier.
177 #define smp_mb__before_atomic_dec() smp_mb()
178 #define smp_mb__before_atomic_inc() smp_mb()
179 #define smp_mb__after_atomic_dec() do { } while (0)
180 #define smp_mb__after_atomic_inc() do { } while (0)
182 #endif /* !__ASSEMBLY__ */
185 * Internal definitions only beyond this point.
189 * Number of atomic locks in atomic_locks[]. Must be a power of two.
190 * There is no reason for more than PAGE_SIZE / 8 entries, since that
191 * is the maximum number of pointer bits we can use to index this.
192 * And we cannot have more than PAGE_SIZE / 4, since this has to
193 * fit on a single page and each entry takes 4 bytes.
195 #define ATOMIC_HASH_SHIFT (PAGE_SHIFT - 3)
196 #define ATOMIC_HASH_SIZE (1 << ATOMIC_HASH_SHIFT)
199 extern int atomic_locks[];
203 * All the code that may fault while holding an atomic lock must
204 * place the pointer to the lock in ATOMIC_LOCK_REG so the fault code
205 * can correctly release and reacquire the lock. Note that we
206 * mention the register number in a comment in "lib/atomic_asm.S" to help
207 * assembly coders from using this register by mistake, so if it
208 * is changed here, change that comment as well.
210 #define ATOMIC_LOCK_REG 20
211 #define ATOMIC_LOCK_REG_NAME r20
214 /* Called from setup to initialize a hash table to point to per_cpu locks. */
215 void __init_atomic_per_cpu(void);
218 /* Support releasing the atomic lock in do_page_fault_ics(). */
219 void __atomic_fault_unlock(int *lock_ptr);
222 /* Return a pointer to the lock for the given address. */
223 int *__atomic_hashed_lock(volatile void *v);
225 /* Private helper routines in lib/atomic_asm_32.S */
230 extern struct __get_user __atomic_cmpxchg(volatile int *p,
231 int *lock, int o, int n);
232 extern struct __get_user __atomic_xchg(volatile int *p, int *lock, int n);
233 extern struct __get_user __atomic_xchg_add(volatile int *p, int *lock, int n);
234 extern struct __get_user __atomic_xchg_add_unless(volatile int *p,
235 int *lock, int o, int n);
236 extern struct __get_user __atomic_or(volatile int *p, int *lock, int n);
237 extern struct __get_user __atomic_andn(volatile int *p, int *lock, int n);
238 extern struct __get_user __atomic_xor(volatile int *p, int *lock, int n);
239 extern u64 __atomic64_cmpxchg(volatile u64 *p, int *lock, u64 o, u64 n);
240 extern u64 __atomic64_xchg(volatile u64 *p, int *lock, u64 n);
241 extern u64 __atomic64_xchg_add(volatile u64 *p, int *lock, u64 n);
242 extern u64 __atomic64_xchg_add_unless(volatile u64 *p,
243 int *lock, u64 o, u64 n);
245 /* Return failure from the atomic wrappers. */
246 struct __get_user __atomic_bad_address(int __user *addr);
248 #endif /* !__ASSEMBLY__ */
250 #endif /* _ASM_TILE_ATOMIC_32_H */