2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
15 #ifndef _ASM_TILE_PROCESSOR_H
16 #define _ASM_TILE_PROCESSOR_H
21 * NOTE: we don't include <linux/ptrace.h> or <linux/percpu.h> as one
22 * normally would, due to #include dependencies.
24 #include <linux/types.h>
25 #include <asm/ptrace.h>
26 #include <asm/percpu.h>
28 #include <arch/chip.h>
29 #include <arch/spr_def.h>
39 * Default implementation of macro that returns current
40 * instruction pointer ("program counter").
42 void *current_text_addr(void);
44 #if CHIP_HAS_TILE_DMA()
45 /* Capture the state of a suspended DMA. */
46 struct tile_dma_state {
50 unsigned long strides;
51 unsigned long chunk_size;
52 unsigned long src_chunk;
53 unsigned long dest_chunk;
59 * A mask of the DMA status register for selecting only the 'running'
62 #define DMA_STATUS_MASK \
63 (SPR_DMA_STATUS__RUNNING_MASK | SPR_DMA_STATUS__DONE_MASK)
67 * Track asynchronous TLB events (faults and access violations)
68 * that occur while we are in kernel mode from DMA or the SN processor.
71 short fault_num; /* original fault number; 0 if none */
72 char is_fault; /* was it a fault (vs an access violation) */
73 char is_write; /* for fault: was it caused by a write? */
74 unsigned long address; /* what address faulted? */
77 #ifdef CONFIG_HARDWALL
81 struct thread_struct {
82 /* kernel stack pointer */
86 /* starting user stack pointer (for page migration) */
88 /* pid of process that created this one */
90 #if CHIP_HAS_TILE_DMA()
91 /* DMA info for suspended threads (byte == 0 means no DMA state) */
92 struct tile_dma_state tile_dma_state;
94 /* User EX_CONTEXT registers */
95 unsigned long ex_context[2];
96 /* User SYSTEM_SAVE registers */
97 unsigned long system_save[4];
98 /* User interrupt mask */
99 unsigned long long interrupt_mask;
100 /* User interrupt-control 0 state */
101 unsigned long intctrl_0;
102 #if CHIP_HAS_PROC_STATUS_SPR()
103 /* Any other miscellaneous processor state bits */
104 unsigned long proc_status;
106 #ifdef CONFIG_HARDWALL
107 /* Is this task tied to an activated hardwall? */
108 struct hardwall_info *hardwall;
109 /* Chains this task into the list at hardwall->list. */
110 struct list_head hardwall_list;
112 #if CHIP_HAS_TILE_DMA()
113 /* Async DMA TLB fault information */
114 struct async_tlb dma_async_tlb;
116 #if CHIP_HAS_SN_PROC()
117 /* Was static network processor when we were switched out? */
119 /* Async SNI TLB fault information */
120 struct async_tlb sn_async_tlb;
124 #endif /* !__ASSEMBLY__ */
127 * Start with "sp" this many bytes below the top of the kernel stack.
128 * This preserves the invariant that a called function may write to *sp.
130 #define STACK_TOP_DELTA 8
133 * When entering the kernel via a fault, start with the top of the
134 * pt_regs structure this many bytes below the top of the page.
135 * This aligns the pt_regs structure optimally for cache-line access.
138 #define KSTK_PTREGS_GAP 48
140 #define KSTK_PTREGS_GAP 56
146 #define TASK_SIZE_MAX (MEM_LOW_END + 1)
148 #define TASK_SIZE_MAX PAGE_OFFSET
151 /* TASK_SIZE and related variables are always checked in "current" context. */
153 #define COMPAT_TASK_SIZE (1UL << 31)
154 #define TASK_SIZE ((current_thread_info()->status & TS_COMPAT) ?\
155 COMPAT_TASK_SIZE : TASK_SIZE_MAX)
157 #define TASK_SIZE TASK_SIZE_MAX
160 /* We provide a minimal "vdso" a la x86; just the sigreturn code for now. */
161 #define VDSO_BASE (TASK_SIZE - PAGE_SIZE)
163 #define STACK_TOP VDSO_BASE
165 /* STACK_TOP_MAX is used temporarily in execve and should not check COMPAT. */
166 #define STACK_TOP_MAX TASK_SIZE_MAX
169 * This decides where the kernel will search for a free chunk of vm
170 * space during mmap's, if it is using bottom-up mapping.
172 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
174 #define HAVE_ARCH_PICK_MMAP_LAYOUT
176 #define INIT_THREAD { \
177 .ksp = (unsigned long)init_stack + THREAD_SIZE - STACK_TOP_DELTA, \
178 .interrupt_mask = -1ULL \
181 /* Kernel stack top for the task that first boots on this cpu. */
182 DECLARE_PER_CPU(unsigned long, boot_sp);
184 /* PC to boot from on this cpu. */
185 DECLARE_PER_CPU(unsigned long, boot_pc);
187 /* Do necessary setup to start up a newly executed thread. */
188 static inline void start_thread(struct pt_regs *regs,
189 unsigned long pc, unsigned long usp)
195 /* Free all resources held by a thread. */
196 static inline void release_thread(struct task_struct *dead_task)
198 /* Nothing for now */
201 /* Prepare to copy thread state - unlazy all lazy status. */
202 #define prepare_to_copy(tsk) do { } while (0)
204 extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
208 * Return saved (kernel) PC of a blocked thread.
209 * Only used in a printk() in kernel/sched.c, so don't work too hard.
211 #define thread_saved_pc(t) ((t)->thread.pc)
213 unsigned long get_wchan(struct task_struct *p);
215 /* Return initial ksp value for given task. */
216 #define task_ksp0(task) ((unsigned long)(task)->stack + THREAD_SIZE)
218 /* Return some info about the user process TASK. */
219 #define KSTK_TOP(task) (task_ksp0(task) - STACK_TOP_DELTA)
220 #define task_pt_regs(task) \
221 ((struct pt_regs *)(task_ksp0(task) - KSTK_PTREGS_GAP) - 1)
222 #define task_sp(task) (task_pt_regs(task)->sp)
223 #define task_pc(task) (task_pt_regs(task)->pc)
224 /* Aliases for pc and sp (used in fs/proc/array.c) */
225 #define KSTK_EIP(task) task_pc(task)
226 #define KSTK_ESP(task) task_sp(task)
228 /* Standard format for printing registers and other word-size data. */
230 # define REGFMT "0x%016lx"
232 # define REGFMT "0x%08lx"
236 * Do some slow action (e.g. read a slow SPR).
237 * Note that this must also have compiler-barrier semantics since
238 * it may be used in a busy loop reading memory.
240 static inline void cpu_relax(void)
242 __insn_mfspr(SPR_PASS);
247 extern void arch_coredump_signal(struct siginfo *, struct pt_regs *);
248 #define arch_coredump_signal arch_coredump_signal
250 /* Info on this processor (see fs/proc/cpuinfo.c) */
251 struct seq_operations;
252 extern const struct seq_operations cpuinfo_op;
254 /* Provide information about the chip model. */
255 extern char chip_model[64];
257 /* Data on which physical memory controller corresponds to which NUMA node. */
258 extern int node_controller[];
261 /* Do we dump information to the console when a user application crashes? */
262 extern int show_crashinfo;
264 #if CHIP_HAS_CBOX_HOME_MAP()
265 /* Does the heap allocator return hash-for-home pages by default? */
266 extern int hash_default;
268 /* Should kernel stack pages be hash-for-home? */
269 extern int kstack_hash;
271 /* Does MAP_ANONYMOUS return hash-for-home pages by default? */
272 #define uheap_hash hash_default
275 #define hash_default 0
276 #define kstack_hash 0
280 /* Are we using huge pages in the TLB for kernel data? */
281 extern int kdata_huge;
283 #define PREFETCH_STRIDE CHIP_L2_LINE_SIZE()
285 #else /* __ASSEMBLY__ */
287 /* Do some slow action (e.g. read a slow SPR). */
288 #define CPU_RELAX mfspr zero, SPR_PASS
290 #endif /* !__ASSEMBLY__ */
292 /* Assembly code assumes that the PL is in the low bits. */
293 #if SPR_EX_CONTEXT_1_1__PL_SHIFT != 0
294 # error Fix assembly assumptions about PL
297 /* We sometimes use these macros for EX_CONTEXT_0_1 as well. */
298 #if SPR_EX_CONTEXT_1_1__PL_SHIFT != SPR_EX_CONTEXT_0_1__PL_SHIFT || \
299 SPR_EX_CONTEXT_1_1__PL_RMASK != SPR_EX_CONTEXT_0_1__PL_RMASK || \
300 SPR_EX_CONTEXT_1_1__ICS_SHIFT != SPR_EX_CONTEXT_0_1__ICS_SHIFT || \
301 SPR_EX_CONTEXT_1_1__ICS_RMASK != SPR_EX_CONTEXT_0_1__ICS_RMASK
302 # error Fix assumptions that EX1 macros work for both PL0 and PL1
305 /* Allow pulling apart and recombining the PL and ICS bits in EX_CONTEXT. */
306 #define EX1_PL(ex1) \
307 (((ex1) >> SPR_EX_CONTEXT_1_1__PL_SHIFT) & SPR_EX_CONTEXT_1_1__PL_RMASK)
308 #define EX1_ICS(ex1) \
309 (((ex1) >> SPR_EX_CONTEXT_1_1__ICS_SHIFT) & SPR_EX_CONTEXT_1_1__ICS_RMASK)
310 #define PL_ICS_EX1(pl, ics) \
311 (((pl) << SPR_EX_CONTEXT_1_1__PL_SHIFT) | \
312 ((ics) << SPR_EX_CONTEXT_1_1__ICS_SHIFT))
315 * Provide symbolic constants for PLs.
316 * Note that assembly code assumes that USER_PL is zero.
321 /* SYSTEM_SAVE_1_0 holds the current cpu number ORed with ksp0. */
322 #define CPU_LOG_MASK_VALUE 12
323 #define CPU_MASK_VALUE ((1 << CPU_LOG_MASK_VALUE) - 1)
324 #if CONFIG_NR_CPUS > CPU_MASK_VALUE
325 # error Too many cpus!
327 #define raw_smp_processor_id() \
328 ((int)__insn_mfspr(SPR_SYSTEM_SAVE_1_0) & CPU_MASK_VALUE)
329 #define get_current_ksp0() \
330 (__insn_mfspr(SPR_SYSTEM_SAVE_1_0) & ~CPU_MASK_VALUE)
331 #define next_current_ksp0(task) ({ \
332 unsigned long __ksp0 = task_ksp0(task); \
333 int __cpu = raw_smp_processor_id(); \
334 BUG_ON(__ksp0 & CPU_MASK_VALUE); \
338 #endif /* _ASM_TILE_PROCESSOR_H */