2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
15 #ifndef _ASM_TILE_PTRACE_H
16 #define _ASM_TILE_PTRACE_H
18 #include <arch/chip.h>
21 /* These must match struct pt_regs, below. */
22 #if CHIP_WORD_SIZE() == 32
23 #define PTREGS_OFFSET_REG(n) ((n)*4)
25 #define PTREGS_OFFSET_REG(n) ((n)*8)
27 #define PTREGS_OFFSET_BASE 0
28 #define PTREGS_OFFSET_TP PTREGS_OFFSET_REG(53)
29 #define PTREGS_OFFSET_SP PTREGS_OFFSET_REG(54)
30 #define PTREGS_OFFSET_LR PTREGS_OFFSET_REG(55)
31 #define PTREGS_NR_GPRS 56
32 #define PTREGS_OFFSET_PC PTREGS_OFFSET_REG(56)
33 #define PTREGS_OFFSET_EX1 PTREGS_OFFSET_REG(57)
34 #define PTREGS_OFFSET_FAULTNUM PTREGS_OFFSET_REG(58)
35 #define PTREGS_OFFSET_ORIG_R0 PTREGS_OFFSET_REG(59)
36 #define PTREGS_OFFSET_FLAGS PTREGS_OFFSET_REG(60)
37 #if CHIP_HAS_CMPEXCH()
38 #define PTREGS_OFFSET_CMPEXCH PTREGS_OFFSET_REG(61)
40 #define PTREGS_SIZE PTREGS_OFFSET_REG(64)
45 /* Benefit from consistent use of "long" on all chips. */
46 typedef unsigned long pt_reg_t;
48 /* Provide appropriate length type to userspace regardless of -m32/-m64. */
49 typedef uint_reg_t pt_reg_t;
53 * This struct defines the way the registers are stored on the stack during a
54 * system call/exception. It should be a multiple of 8 bytes to preserve
55 * normal stack alignment rules.
57 * Must track <sys/ucontext.h> and <sys/procfs.h>
60 /* Saved main processor registers; 56..63 are special. */
61 /* tp, sp, and lr must immediately follow regs[] for aliasing. */
63 pt_reg_t tp; /* aliases regs[TREG_TP] */
64 pt_reg_t sp; /* aliases regs[TREG_SP] */
65 pt_reg_t lr; /* aliases regs[TREG_LR] */
67 /* Saved special registers. */
68 pt_reg_t pc; /* stored in EX_CONTEXT_1_0 */
69 pt_reg_t ex1; /* stored in EX_CONTEXT_1_1 (PL and ICS bit) */
70 pt_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */
71 pt_reg_t orig_r0; /* r0 at syscall entry, else zero */
72 pt_reg_t flags; /* flags (see below) */
73 #if !CHIP_HAS_CMPEXCH()
76 pt_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */
81 #endif /* __ASSEMBLY__ */
83 /* Flag bits in pt_regs.flags */
84 #define PT_FLAGS_DISABLE_IRQ 1 /* on return to kernel, disable irqs */
85 #define PT_FLAGS_CALLER_SAVES 2 /* caller-save registers are valid */
86 #define PT_FLAGS_RESTORE_REGS 4 /* restore callee-save regs on return */
88 #define PTRACE_GETREGS 12
89 #define PTRACE_SETREGS 13
90 #define PTRACE_GETFPREGS 14
91 #define PTRACE_SETFPREGS 15
93 /* Support TILE-specific ptrace options, with events starting at 16. */
94 #define PTRACE_O_TRACEMIGRATE 0x00010000
95 #define PTRACE_EVENT_MIGRATE 16
97 #define PTRACE_O_MASK_TILE (PTRACE_O_TRACEMIGRATE)
98 #define PT_TRACE_MIGRATE 0x00080000
99 #define PT_TRACE_MASK_TILE (PT_TRACE_MIGRATE)
106 #define instruction_pointer(regs) ((regs)->pc)
107 #define profile_pc(regs) instruction_pointer(regs)
109 /* Does the process account for user or for system time? */
110 #define user_mode(regs) (EX1_PL((regs)->ex1) == USER_PL)
112 /* Fill in a struct pt_regs with the current kernel registers. */
113 struct pt_regs *get_pt_regs(struct pt_regs *);
115 /* Trace the current syscall. */
116 extern void do_syscall_trace(void);
118 extern void show_regs(struct pt_regs *);
120 #define arch_has_single_step() (1)
123 * A structure for all single-stepper state.
125 * Also update defines in assembler section if it changes
127 struct single_step_state {
128 /* the page to which we will write hacked-up bundles */
134 unsigned long is_enabled:1, update:1, update_reg:6;
138 unsigned long orig_pc; /* the original PC */
139 unsigned long next_pc; /* return PC if no branch (PC + 1) */
140 unsigned long branch_next_pc; /* return PC if we did branch/jump */
141 unsigned long update_value; /* value to restore to update_target */
144 /* Single-step the instruction at regs->pc */
145 extern void single_step_once(struct pt_regs *regs);
149 extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
153 /* We need this since sigval_t has a user pointer in it, for GETSIGINFO etc. */
154 #define __ARCH_WANT_COMPAT_SYS_PTRACE
157 #endif /* !__ASSEMBLY__ */
159 #define SINGLESTEP_STATE_MASK_IS_ENABLED 0x1
160 #define SINGLESTEP_STATE_MASK_UPDATE 0x2
161 #define SINGLESTEP_STATE_TARGET_LB 2
162 #define SINGLESTEP_STATE_TARGET_UB 7
164 #endif /* !__KERNEL__ */
166 #endif /* _ASM_TILE_PTRACE_H */