arch/x86/dts/crownbay.dts

   1 /*
   2  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /dts-v1/;
   8
   9 /include/ "skeleton.dtsi"
  10 /include/ "serial.dtsi"
  11
  12 / {
  13         model = "Intel Crown Bay";
  14         compatible = "intel,crownbay", "intel,queensbay";
  15
  16         config {
  17                 silent_console = <0>;
  18         };
  19
  20         gpioa {
  21                 compatible = "intel,ich6-gpio";
  22                 u-boot,dm-pre-reloc;
  23                 reg = <0 0x20>;
  24                 bank-name = "A";
  25         };
  26
  27         gpiob {
  28                 compatible = "intel,ich6-gpio";
  29                 u-boot,dm-pre-reloc;
  30                 reg = <0x20 0x20>;
  31                 bank-name = "B";
  32         };
  33
  34         chosen {
  35                 stdout-path = "/serial";
  36         };
  37
  38         spi {
  39                 #address-cells = <1>;
  40                 #size-cells = <0>;
  41                 compatible = "intel,ich7";
  42                 spi-flash@0 {
  43                         reg = <0>;
  44                         compatible = "sst,25vf016b", "spi-flash";
  45                         memory-map = <0xffe00000 0x00200000>;
  46                 };
  47         };
  48
  49         microcode {
  50                 update@0 {
  51 #include "microcode/m0220661105_cv.dtsi"
  52                 };
  53         };
  54
  55 };