arch/x86/dts/link.dts

   1 /dts-v1/;
   2
   3 /include/ "coreboot.dtsi"
   4
   5 / {
   6         #address-cells = <1>;
   7         #size-cells = <1>;
   8         model = "Google Link";
   9         compatible = "google,link", "intel,celeron-ivybridge";
  10
  11         config {
  12                silent_console = <0>;
  13         };
  14
  15         gpioa {
  16                 compatible = "intel,ich6-gpio";
  17                 reg = <0 0x10>;
  18                 bank-name = "A";
  19         };
  20
  21         gpiob {
  22                 compatible = "intel,ich6-gpio";
  23                 reg = <0x30 0x10>;
  24                 bank-name = "B";
  25         };
  26
  27         gpioc {
  28                 compatible = "intel,ich6-gpio";
  29                 reg = <0x40 0x10>;
  30                 bank-name = "C";
  31         };
  32
  33         serial {
  34                 reg = <0x3f8 8>;
  35                 clock-frequency = <115200>;
  36         };
  37
  38         chosen { };
  39         memory { device_type = "memory"; reg = <0 0>; };
  40
  41         spi {
  42                 #address-cells = <1>;
  43                 #size-cells = <0>;
  44                 compatible = "intel,ich9";
  45                 spi-flash@0 {
  46                         reg = <0>;
  47                         compatible = "winbond,w25q64", "spi-flash";
  48                         memory-map = <0xff800000 0x00800000>;
  49                 };
  50         };
  51
  52         lpc {
  53                 compatible = "intel,lpc";
  54                 #address-cells = <1>;
  55                 #size-cells = <1>;
  56                 gen-dec = <0x800 0xfc 0x900 0xfc>;
  57                 cros-ec@200 {
  58                         compatible = "google,cros-ec";
  59                         reg = <0x204 1 0x200 1 0x880 0x80>;
  60
  61                         /* This describes the flash memory within the EC */
  62                         #address-cells = <1>;
  63                         #size-cells = <1>;
  64                         flash@8000000 {
  65                                 reg = <0x08000000 0x20000>;
  66                                 erase-value = <0xff>;
  67                         };
  68                 };
  69         };
  70
  71         microcode {
  72                 update@0 {
  73 #include "m12206a7_00000028.dtsi"
  74                 };
  75                 update@1 {
  76 #include "m12306a9_00000017.dtsi"
  77                 };
  78         };
  79
  80 };