arch/x86/dts/minnowmax.dts

   1 /*
   2  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /dts-v1/;
   8
   9 #include <dt-bindings/gpio/x86-gpio.h>
  10
  11 /include/ "skeleton.dtsi"
  12 /include/ "serial.dtsi"
  13 /include/ "rtc.dtsi"
  14
  15 / {
  16         model = "Intel Minnowboard Max";
  17         compatible = "intel,minnowmax", "intel,baytrail";
  18
  19         aliases {
  20                 serial0 = &serial;
  21                 spi0 = "/spi";
  22         };
  23
  24         config {
  25                 silent_console = <0>;
  26         };
  27
  28         pch_pinctrl {
  29                 compatible = "intel,x86-pinctrl";
  30                 io-base = <0x4c>;
  31
  32                 pin_usb_host_en0@0 {
  33                         gpio-offset = <0x80 8>;
  34                         pad-offset = <0x260>;
  35                         mode-gpio;
  36                         output-value = <1>;
  37                         direction = <PIN_OUTPUT>;
  38                 };
  39
  40                 pin_usb_host_en1@0 {
  41                         gpio-offset = <0x80 9>;
  42                         pad-offset = <0x258>;
  43                         mode-gpio;
  44                         output-value = <1>;
  45                         direction = <PIN_OUTPUT>;
  46                 };
  47         };
  48
  49         gpioa {
  50                 compatible = "intel,ich6-gpio";
  51                 u-boot,dm-pre-reloc;
  52                 reg = <0 0x20>;
  53                 bank-name = "A";
  54         };
  55
  56         gpiob {
  57                 compatible = "intel,ich6-gpio";
  58                 u-boot,dm-pre-reloc;
  59                 reg = <0x20 0x20>;
  60                 bank-name = "B";
  61         };
  62
  63         gpioc {
  64                 compatible = "intel,ich6-gpio";
  65                 u-boot,dm-pre-reloc;
  66                 reg = <0x40 0x20>;
  67                 bank-name = "C";
  68         };
  69
  70         gpiod {
  71                 compatible = "intel,ich6-gpio";
  72                 u-boot,dm-pre-reloc;
  73                 reg = <0x60 0x20>;
  74                 bank-name = "D";
  75         };
  76
  77         gpioe {
  78                 compatible = "intel,ich6-gpio";
  79                 u-boot,dm-pre-reloc;
  80                 reg = <0x80 0x20>;
  81                 bank-name = "E";
  82         };
  83
  84         gpiof {
  85                 compatible = "intel,ich6-gpio";
  86                 u-boot,dm-pre-reloc;
  87                 reg = <0xA0 0x20>;
  88                 bank-name = "F";
  89         };
  90
  91         chosen {
  92                 stdout-path = "/serial";
  93         };
  94
  95         cpus {
  96                 #address-cells = <1>;
  97                 #size-cells = <0>;
  98
  99                 cpu@0 {
 100                         device_type = "cpu";
 101                         compatible = "intel,baytrail-cpu";
 102                         reg = <0>;
 103                         intel,apic-id = <0>;
 104                 };
 105
 106                 cpu@1 {
 107                         device_type = "cpu";
 108                         compatible = "intel,baytrail-cpu";
 109                         reg = <1>;
 110                         intel,apic-id = <4>;
 111                 };
 112
 113         };
 114
 115         pci {
 116                 compatible = "intel,pci-baytrail", "pci-x86";
 117                 #address-cells = <3>;
 118                 #size-cells = <2>;
 119                 u-boot,dm-pre-reloc;
 120                 ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0 0x10000000
 121                         0x42000000 0x0 0xc0000000 0xc0000000 0 0x10000000
 122                         0x01000000 0x0 0x2000 0x2000 0 0xe000>;
 123         };
 124
 125         fsp {
 126                 compatible = "intel,baytrail-fsp";
 127                 fsp,mrc-init-tseg-size = <0>;
 128                 fsp,mrc-init-mmio-size = <0x800>;
 129                 fsp,mrc-init-spd-addr1 = <0xa0>;
 130                 fsp,mrc-init-spd-addr2 = <0xa2>;
 131                 fsp,emmc-boot-mode = <2>;
 132                 fsp,enable-sdio;
 133                 fsp,enable-sdcard;
 134                 fsp,enable-hsuart1;
 135                 fsp,enable-spi;
 136                 fsp,enable-sata;
 137                 fsp,sata-mode = <1>;
 138                 fsp,enable-lpe;
 139                 fsp,lpss-sio-enable-pci-mode;
 140                 fsp,enable-dma0;
 141                 fsp,enable-dma1;
 142                 fsp,enable-i2c0;
 143                 fsp,enable-i2c1;
 144                 fsp,enable-i2c2;
 145                 fsp,enable-i2c3;
 146                 fsp,enable-i2c4;
 147                 fsp,enable-i2c5;
 148                 fsp,enable-i2c6;
 149                 fsp,enable-pwm0;
 150                 fsp,enable-pwm1;
 151                 fsp,igd-dvmt50-pre-alloc = <2>;
 152                 fsp,aperture-size = <2>;
 153                 fsp,gtt-size = <2>;
 154                 fsp,serial-debug-port-address = <0x3f8>;
 155                 fsp,serial-debug-port-type = <1>;
 156                 fsp,scc-enable-pci-mode;
 157                 fsp,os-selection = <4>;
 158                 fsp,emmc45-ddr50-enabled;
 159                 fsp,emmc45-retune-timer-value = <8>;
 160                 fsp,enable-igd;
 161                 fsp,enable-memory-down;
 162                 fsp,memory-down-params {
 163                         compatible = "intel,baytrail-fsp-mdp";
 164                         fsp,dram-speed = <1>;
 165                         fsp,dram-type = <1>;
 166                         fsp,dimm-0-enable;
 167                         fsp,dimm-width = <1>;
 168                         fsp,dimm-density = <2>;
 169                         fsp,dimm-bus-width = <3>;
 170                         fsp,dimm-sides = <0>;
 171                         fsp,dimm-tcl = <0xb>;
 172                         fsp,dimm-trpt-rcd = <0xb>;
 173                         fsp,dimm-twr = <0xc>;
 174                         fsp,dimm-twtr = <6>;
 175                         fsp,dimm-trrd = <6>;
 176                         fsp,dimm-trtp = <6>;
 177                         fsp,dimm-tfaw = <0x14>;
 178                 };
 179         };
 180
 181         spi {
 182                 #address-cells = <1>;
 183                 #size-cells = <0>;
 184                 compatible = "intel,ich-spi";
 185                 spi-flash@0 {
 186                         reg = <0>;
 187                         compatible = "stmicro,n25q064a", "spi-flash";
 188                         memory-map = <0xff800000 0x00800000>;
 189                 };
 190         };
 191
 192         microcode {
 193                 update@0 {
 194 #include "microcode/m0130673322.dtsi"
 195                 };
 196         };
 197
 198 };