1 #ifndef _ASM_X86_ACPI_H
2 #define _ASM_X86_ACPI_H
5 * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 #include <acpi/pdc_intel.h>
29 #include <asm/fixmap.h>
30 #include <asm/processor.h>
32 #include <asm/mpspec.h>
33 #include <asm/realmode.h>
36 extern int acpi_lapic;
37 extern int acpi_ioapic;
38 extern int acpi_noirq;
39 extern int acpi_strict;
40 extern int acpi_disabled;
41 extern int acpi_pci_disabled;
42 extern int acpi_skip_timer_override;
43 extern int acpi_use_timer_override;
44 extern int acpi_fix_pin2_polarity;
45 extern int acpi_disable_cmcff;
47 extern u8 acpi_sci_flags;
48 extern int acpi_sci_override_gsi;
49 void acpi_pic_sci_set_trigger(unsigned int, u16);
51 extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
52 int trigger, int polarity);
54 static inline void disable_acpi(void)
57 acpi_pci_disabled = 1;
61 extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
63 static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
64 static inline void acpi_disable_pci(void)
66 acpi_pci_disabled = 1;
70 /* Low-level suspend routine. */
71 extern int (*acpi_suspend_lowlevel)(void);
73 /* Physical address to resume after wakeup */
74 #define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start))
77 * Check if the CPU can handle C2 and deeper
79 static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
82 * Early models (<=5) of AMD Opterons are not supposed to go into
85 * Steppings 0x0A and later are good
87 if (boot_cpu_data.x86 == 0x0F &&
88 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
89 boot_cpu_data.x86_model <= 0x05 &&
90 boot_cpu_data.x86_mask < 0x0A)
92 else if (amd_e400_c1e_detected)
98 static inline bool arch_has_acpi_pdc(void)
100 struct cpuinfo_x86 *c = &cpu_data(0);
101 return (c->x86_vendor == X86_VENDOR_INTEL ||
102 c->x86_vendor == X86_VENDOR_CENTAUR);
105 static inline void arch_acpi_set_pdc_bits(u32 *buf)
107 struct cpuinfo_x86 *c = &cpu_data(0);
109 buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;
111 if (cpu_has(c, X86_FEATURE_EST))
112 buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
114 if (cpu_has(c, X86_FEATURE_ACPI))
115 buf[2] |= ACPI_PDC_T_FFH;
118 * If mwait/monitor is unsupported, C2/C3_FFH will be disabled
120 if (!cpu_has(c, X86_FEATURE_MWAIT))
121 buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);
124 static inline bool acpi_has_cpu_in_madt(void)
129 #else /* !CONFIG_ACPI */
132 #define acpi_ioapic 0
133 #define acpi_disable_cmcff 0
134 static inline void acpi_noirq_set(void) { }
135 static inline void acpi_disable_pci(void) { }
136 static inline void disable_acpi(void) { }
138 #endif /* !CONFIG_ACPI */
140 #define ARCH_HAS_POWER_INIT 1
142 #ifdef CONFIG_ACPI_NUMA
143 extern int acpi_numa;
144 extern int x86_acpi_numa_init(void);
145 #endif /* CONFIG_ACPI_NUMA */
147 #define acpi_unlazy_tlb(x) leave_mm(x)
149 #endif /* _ASM_X86_ACPI_H */