1 #ifndef _ASM_X86_AMD_NB_H
2 #define _ASM_X86_AMD_NB_H
6 struct amd_nb_bus_dev_range {
12 extern const struct pci_device_id amd_nb_misc_ids[];
13 extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
16 extern int early_is_amd_nb(u32 value);
17 extern int amd_cache_northbridges(void);
18 extern void amd_flush_garts(void);
19 extern int amd_numa_init(unsigned long start_pfn, unsigned long end_pfn);
20 extern int amd_scan_nodes(void);
21 extern int amd_get_subcaches(int);
22 extern int amd_set_subcaches(int, int);
24 #ifdef CONFIG_NUMA_EMU
25 extern void amd_fake_nodes(const struct bootnode *nodes, int nr_nodes);
26 extern void amd_get_nodes(struct bootnode *nodes);
29 struct amd_northbridge {
34 struct amd_northbridge_info {
37 struct amd_northbridge *nb;
39 extern struct amd_northbridge_info amd_northbridges;
41 #define AMD_NB_GART 0x1
42 #define AMD_NB_L3_INDEX_DISABLE 0x2
43 #define AMD_NB_L3_PARTITIONING 0x4
47 static inline int amd_nb_num(void)
49 return amd_northbridges.num;
52 static inline int amd_nb_has_feature(int feature)
54 return ((amd_northbridges.flags & feature) == feature);
57 static inline struct amd_northbridge *node_to_amd_nb(int node)
59 return (node < amd_northbridges.num) ? &amd_northbridges.nb[node] : NULL;
64 #define amd_nb_num(x) 0
65 #define amd_nb_has_feature(x) false
66 #define node_to_amd_nb(x) NULL
71 #endif /* _ASM_X86_AMD_NB_H */