1 #ifndef _ASM_X86_IO_APIC_H
2 #define _ASM_X86_IO_APIC_H
4 #include <linux/types.h>
5 #include <asm/mpspec.h>
6 #include <asm/apicdef.h>
7 #include <asm/irq_vectors.h>
8 #include <asm/x86_init.h>
10 * Intel IO-APIC support for SMP and UP systems.
12 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
15 /* I/O Unit Redirection Table */
16 #define IO_APIC_REDIR_VECTOR_MASK 0x000FF
17 #define IO_APIC_REDIR_DEST_LOGICAL 0x00800
18 #define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
19 #define IO_APIC_REDIR_SEND_PENDING (1 << 12)
20 #define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
21 #define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
22 #define IO_APIC_REDIR_MASKED (1 << 16)
25 * The structure of the IO-APIC:
27 union IO_APIC_reg_00 {
30 u32 __reserved_2 : 14,
35 } __attribute__ ((packed)) bits;
38 union IO_APIC_reg_01 {
46 } __attribute__ ((packed)) bits;
49 union IO_APIC_reg_02 {
52 u32 __reserved_2 : 24,
55 } __attribute__ ((packed)) bits;
58 union IO_APIC_reg_03 {
63 } __attribute__ ((packed)) bits;
66 struct IO_APIC_route_entry {
68 delivery_mode : 3, /* 000: FIXED
72 dest_mode : 1, /* 0: physical, 1: logical */
76 trigger : 1, /* 0: edge, 1: level */
77 mask : 1, /* 0: enabled, 1: disabled */
80 __u32 __reserved_3 : 24,
82 } __attribute__ ((packed));
84 struct IR_IO_APIC_route_entry {
96 } __attribute__ ((packed));
98 #define IOAPIC_AUTO -1
100 #define IOAPIC_LEVEL 1
101 #define IOAPIC_MAP_ALLOC 0x1
102 #define IOAPIC_MAP_CHECK 0x2
104 #ifdef CONFIG_X86_IO_APIC
107 * # of IO-APICs and # of IRQ routing registers
109 extern int nr_ioapics;
111 extern int mpc_ioapic_id(int ioapic);
112 extern unsigned int mpc_ioapic_addr(int ioapic);
113 extern struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic);
115 #define MP_MAX_IOAPIC_PIN 127
117 /* # of MP IRQ source entries */
118 extern int mp_irq_entries;
120 /* MP IRQ source entries */
121 extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
123 /* Older SiS APIC requires we rewrite the index register */
124 extern int sis_apic_bug;
126 /* 1 if "noapic" boot option passed */
127 extern int skip_ioapic_setup;
129 /* 1 if "noapic" boot option passed */
130 extern int noioapicquirk;
132 /* -1 if "noapic" boot option passed */
133 extern int noioapicreroute;
135 extern unsigned long io_apic_irqs;
137 #define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs))
140 * If we use the IO-APIC for IRQ routing, disable automatic
141 * assignment of PCI IRQ's.
143 #define io_apic_assign_pci_irqs \
144 (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
147 extern void ioapic_insert_resources(void);
148 extern int arch_early_ioapic_init(void);
150 extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
152 struct io_apic_irq_attr *);
153 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
155 extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
157 extern int save_ioapic_entries(void);
158 extern void mask_ioapic_entries(void);
159 extern int restore_ioapic_entries(void);
161 extern void setup_ioapic_ids_from_mpc(void);
162 extern void setup_ioapic_ids_from_mpc_nocheck(void);
164 struct io_apic_irq_attr {
171 enum ioapic_domain_type {
172 IOAPIC_DOMAIN_INVALID,
173 IOAPIC_DOMAIN_LEGACY,
174 IOAPIC_DOMAIN_STRICT,
175 IOAPIC_DOMAIN_DYNAMIC,
180 struct irq_domain_ops;
182 struct ioapic_domain_cfg {
183 enum ioapic_domain_type type;
184 const struct irq_domain_ops *ops;
185 struct device_node *dev;
188 struct mp_ioapic_gsi{
194 extern int mp_find_ioapic(u32 gsi);
195 extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
196 extern u32 mp_pin_to_gsi(int ioapic, int pin);
197 extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags);
198 extern void mp_unmap_irq(int irq);
199 extern int mp_register_ioapic(int id, u32 address, u32 gsi_base,
200 struct ioapic_domain_cfg *cfg);
201 extern int mp_unregister_ioapic(u32 gsi_base);
202 extern int mp_ioapic_registered(u32 gsi_base);
203 extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
204 irq_hw_number_t hwirq);
205 extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);
206 extern int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node);
207 extern void __init pre_init_apic_IRQ0(void);
209 extern void mp_save_irq(struct mpc_intsrc *m);
211 extern void disable_ioapic_support(void);
213 extern void __init native_io_apic_init_mappings(void);
214 extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
215 extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);
216 extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
217 extern void native_disable_io_apic(void);
218 extern void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
219 extern void intel_ir_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
220 extern int native_ioapic_set_affinity(struct irq_data *,
221 const struct cpumask *,
224 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
226 return x86_io_apic_ops.read(apic, reg);
229 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
231 x86_io_apic_ops.write(apic, reg, value);
233 static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
235 x86_io_apic_ops.modify(apic, reg, value);
238 extern void io_apic_eoi(unsigned int apic, unsigned int vector);
240 extern void setup_IO_APIC(void);
241 extern void enable_IO_APIC(void);
242 extern void disable_IO_APIC(void);
243 extern void setup_ioapic_dest(void);
244 extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin);
245 extern void print_IO_APICs(void);
246 #else /* !CONFIG_X86_IO_APIC */
248 #define IO_APIC_IRQ(x) 0
249 #define io_apic_assign_pci_irqs 0
250 #define setup_ioapic_ids_from_mpc x86_init_noop
251 static inline void ioapic_insert_resources(void) { }
252 static inline int arch_early_ioapic_init(void) { return 0; }
253 static inline void print_IO_APICs(void) {}
254 #define gsi_top (NR_IRQS_LEGACY)
255 static inline int mp_find_ioapic(u32 gsi) { return 0; }
256 static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }
257 static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags) { return gsi; }
258 static inline void mp_unmap_irq(int irq) { }
260 static inline int save_ioapic_entries(void)
265 static inline void mask_ioapic_entries(void) { }
266 static inline int restore_ioapic_entries(void)
271 static inline void mp_save_irq(struct mpc_intsrc *m) { };
272 static inline void disable_ioapic_support(void) { }
273 #define native_io_apic_init_mappings NULL
274 #define native_io_apic_read NULL
275 #define native_io_apic_write NULL
276 #define native_io_apic_modify NULL
277 #define native_disable_io_apic NULL
278 #define native_io_apic_print_entries NULL
279 #define native_ioapic_set_affinity NULL
280 #define native_setup_ioapic_entry NULL
281 #define native_eoi_ioapic_pin NULL
283 static inline void setup_IO_APIC(void) { }
284 static inline void enable_IO_APIC(void) { }
285 static inline void setup_ioapic_dest(void) { }
289 #endif /* _ASM_X86_IO_APIC_H */