1 #ifndef _ASM_X86_IO_APIC_H
2 #define _ASM_X86_IO_APIC_H
4 #include <linux/types.h>
5 #include <asm/mpspec.h>
6 #include <asm/apicdef.h>
7 #include <asm/irq_vectors.h>
8 #include <asm/x86_init.h>
10 * Intel IO-APIC support for SMP and UP systems.
12 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
15 /* I/O Unit Redirection Table */
16 #define IO_APIC_REDIR_VECTOR_MASK 0x000FF
17 #define IO_APIC_REDIR_DEST_LOGICAL 0x00800
18 #define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
19 #define IO_APIC_REDIR_SEND_PENDING (1 << 12)
20 #define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
21 #define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
22 #define IO_APIC_REDIR_MASKED (1 << 16)
25 * The structure of the IO-APIC:
27 union IO_APIC_reg_00 {
30 u32 __reserved_2 : 14,
35 } __attribute__ ((packed)) bits;
38 union IO_APIC_reg_01 {
46 } __attribute__ ((packed)) bits;
49 union IO_APIC_reg_02 {
52 u32 __reserved_2 : 24,
55 } __attribute__ ((packed)) bits;
58 union IO_APIC_reg_03 {
63 } __attribute__ ((packed)) bits;
66 struct IO_APIC_route_entry {
68 delivery_mode : 3, /* 000: FIXED
72 dest_mode : 1, /* 0: physical, 1: logical */
76 trigger : 1, /* 0: edge, 1: level */
77 mask : 1, /* 0: enabled, 1: disabled */
80 __u32 __reserved_3 : 24,
82 } __attribute__ ((packed));
84 struct IR_IO_APIC_route_entry {
96 } __attribute__ ((packed));
98 #define IOAPIC_AUTO -1
100 #define IOAPIC_LEVEL 1
102 #ifdef CONFIG_X86_IO_APIC
105 * # of IO-APICs and # of IRQ routing registers
107 extern int nr_ioapics;
109 extern int mpc_ioapic_id(int ioapic);
110 extern unsigned int mpc_ioapic_addr(int ioapic);
111 extern struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic);
113 #define MP_MAX_IOAPIC_PIN 127
115 /* # of MP IRQ source entries */
116 extern int mp_irq_entries;
118 /* MP IRQ source entries */
119 extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
121 /* Older SiS APIC requires we rewrite the index register */
122 extern int sis_apic_bug;
124 /* 1 if "noapic" boot option passed */
125 extern int skip_ioapic_setup;
127 /* 1 if "noapic" boot option passed */
128 extern int noioapicquirk;
130 /* -1 if "noapic" boot option passed */
131 extern int noioapicreroute;
134 * If we use the IO-APIC for IRQ routing, disable automatic
135 * assignment of PCI IRQ's.
137 #define io_apic_assign_pci_irqs \
138 (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
140 struct io_apic_irq_attr;
142 extern int io_apic_set_pci_routing(struct device *dev, int irq,
143 struct io_apic_irq_attr *irq_attr);
144 extern void setup_IO_APIC_irq_extra(u32 gsi);
145 extern void ioapic_insert_resources(void);
147 extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
149 struct io_apic_irq_attr *);
150 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
152 extern void native_compose_msi_msg(struct pci_dev *pdev,
153 unsigned int irq, unsigned int dest,
154 struct msi_msg *msg, u8 hpet_id);
155 extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
156 extern int io_apic_setup_irq_pin_once(unsigned int irq, int node,
157 struct io_apic_irq_attr *attr);
159 extern int save_ioapic_entries(void);
160 extern void mask_ioapic_entries(void);
161 extern int restore_ioapic_entries(void);
163 extern void setup_ioapic_ids_from_mpc(void);
164 extern void setup_ioapic_ids_from_mpc_nocheck(void);
166 struct mp_ioapic_gsi{
172 extern int mp_find_ioapic(u32 gsi);
173 extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
174 extern u32 mp_pin_to_gsi(int ioapic, int pin);
175 extern void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
176 extern void __init pre_init_apic_IRQ0(void);
178 extern void mp_save_irq(struct mpc_intsrc *m);
180 extern void disable_ioapic_support(void);
182 extern void __init native_io_apic_init_mappings(void);
183 extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
184 extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);
185 extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
186 extern void native_disable_io_apic(void);
187 extern void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
188 extern void intel_ir_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
189 extern int native_ioapic_set_affinity(struct irq_data *,
190 const struct cpumask *,
193 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
195 return x86_io_apic_ops.read(apic, reg);
198 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
200 x86_io_apic_ops.write(apic, reg, value);
202 static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
204 x86_io_apic_ops.modify(apic, reg, value);
207 extern void io_apic_eoi(unsigned int apic, unsigned int vector);
209 #else /* !CONFIG_X86_IO_APIC */
211 #define io_apic_assign_pci_irqs 0
212 #define setup_ioapic_ids_from_mpc x86_init_noop
213 static inline void ioapic_insert_resources(void) { }
214 #define gsi_top (NR_IRQS_LEGACY)
215 static inline int mp_find_ioapic(u32 gsi) { return 0; }
216 static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }
218 struct io_apic_irq_attr;
219 static inline int io_apic_set_pci_routing(struct device *dev, int irq,
220 struct io_apic_irq_attr *irq_attr) { return 0; }
222 static inline int save_ioapic_entries(void)
227 static inline void mask_ioapic_entries(void) { }
228 static inline int restore_ioapic_entries(void)
233 static inline void mp_save_irq(struct mpc_intsrc *m) { };
234 static inline void disable_ioapic_support(void) { }
235 #define native_io_apic_init_mappings NULL
236 #define native_io_apic_read NULL
237 #define native_io_apic_write NULL
238 #define native_io_apic_modify NULL
239 #define native_disable_io_apic NULL
240 #define native_io_apic_print_entries NULL
241 #define native_ioapic_set_affinity NULL
242 #define native_setup_ioapic_entry NULL
243 #define native_compose_msi_msg NULL
244 #define native_eoi_ioapic_pin NULL
247 #endif /* _ASM_X86_IO_APIC_H */