1 #ifndef _ASM_X86_MPSPEC_H
2 #define _ASM_X86_MPSPEC_H
5 #include <asm/mpspec_def.h>
6 #include <asm/x86_init.h>
7 #include <asm/apicdef.h>
9 extern int apic_version[];
15 * Summit or generic (i.e. installer) kernels need lots of bus entries.
16 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
18 #if CONFIG_BASE_SMALL == 0
19 # define MAX_MP_BUSSES 260
21 # define MAX_MP_BUSSES 32
24 #define MAX_IRQ_SOURCES 256
26 extern unsigned int def_to_bigsmp;
28 #else /* CONFIG_X86_64: */
30 #define MAX_MP_BUSSES 256
31 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
32 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
34 #endif /* CONFIG_X86_64 */
37 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
40 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
42 extern unsigned int boot_cpu_physical_apicid;
43 extern unsigned int max_physical_apicid;
44 extern int mpc_default_type;
45 extern unsigned long mp_lapic_addr;
47 #ifdef CONFIG_X86_LOCAL_APIC
48 extern int smp_found_config;
50 # define smp_found_config 0
53 static inline void get_smp_config(void)
55 x86_init.mpparse.get_smp_config(0);
58 static inline void early_get_smp_config(void)
60 x86_init.mpparse.get_smp_config(1);
63 static inline void find_smp_config(void)
65 x86_init.mpparse.find_smp_config();
68 #ifdef CONFIG_X86_MPPARSE
69 extern void early_reserve_e820_mpc_new(void);
70 extern int enable_update_mptable;
71 extern int default_mpc_apic_id(struct mpc_cpu *m);
72 extern void default_smp_read_mpc_oem(struct mpc_table *mpc);
73 # ifdef CONFIG_X86_IO_APIC
74 extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str);
76 # define default_mpc_oem_bus_info NULL
78 extern void default_find_smp_config(void);
79 extern void default_get_smp_config(unsigned int early);
81 static inline void early_reserve_e820_mpc_new(void) { }
82 #define enable_update_mptable 0
83 #define default_mpc_apic_id NULL
84 #define default_smp_read_mpc_oem NULL
85 #define default_mpc_oem_bus_info NULL
86 #define default_find_smp_config x86_init_noop
87 #define default_get_smp_config x86_init_uint_noop
90 int generic_processor_info(int apicid, int version);
92 extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
93 extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
95 extern void mp_config_acpi_legacy_irqs(void);
97 extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level,
99 #endif /* CONFIG_ACPI */
101 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC)
104 unsigned long mask[PHYSID_ARRAY_SIZE];
107 typedef struct physid_mask physid_mask_t;
109 #define physid_set(physid, map) set_bit(physid, (map).mask)
110 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
111 #define physid_isset(physid, map) test_bit(physid, (map).mask)
112 #define physid_test_and_set(physid, map) \
113 test_and_set_bit(physid, (map).mask)
115 #define physids_and(dst, src1, src2) \
116 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
118 #define physids_or(dst, src1, src2) \
119 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
121 #define physids_clear(map) \
122 bitmap_zero((map).mask, MAX_LOCAL_APIC)
124 #define physids_complement(dst, src) \
125 bitmap_complement((dst).mask, (src).mask, MAX_LOCAL_APIC)
127 #define physids_empty(map) \
128 bitmap_empty((map).mask, MAX_LOCAL_APIC)
130 #define physids_equal(map1, map2) \
131 bitmap_equal((map1).mask, (map2).mask, MAX_LOCAL_APIC)
133 #define physids_weight(map) \
134 bitmap_weight((map).mask, MAX_LOCAL_APIC)
136 #define physids_shift_right(d, s, n) \
137 bitmap_shift_right((d).mask, (s).mask, n, MAX_LOCAL_APIC)
139 #define physids_shift_left(d, s, n) \
140 bitmap_shift_left((d).mask, (s).mask, n, MAX_LOCAL_APIC)
142 static inline unsigned long physids_coerce(physid_mask_t *map)
147 static inline void physids_promote(unsigned long physids, physid_mask_t *map)
150 map->mask[0] = physids;
153 static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
156 physid_set(physid, *map);
159 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
160 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
162 extern physid_mask_t phys_cpu_present_map;
164 extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
166 extern int default_acpi_madt_oem_check(char *, char *);
168 #endif /* _ASM_X86_MPSPEC_H */