1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
7 #include <asm/pgtable_types.h>
10 #include <asm/paravirt_types.h>
13 #include <linux/bug.h>
14 #include <linux/types.h>
15 #include <linux/cpumask.h>
16 #include <asm/frame.h>
18 static inline void load_sp0(struct tss_struct *tss,
19 struct thread_struct *thread)
21 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
24 /* The paravirtualized CPUID instruction. */
25 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
26 unsigned int *ecx, unsigned int *edx)
28 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
32 * These special macros can be used to get or set a debugging register
34 static inline unsigned long paravirt_get_debugreg(int reg)
36 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
38 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
39 static inline void set_debugreg(unsigned long val, int reg)
41 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
44 static inline unsigned long read_cr0(void)
46 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
49 static inline void write_cr0(unsigned long x)
51 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
54 static inline unsigned long read_cr2(void)
56 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
59 static inline void write_cr2(unsigned long x)
61 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
64 static inline unsigned long read_cr3(void)
66 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
69 static inline void write_cr3(unsigned long x)
71 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
74 static inline unsigned long __read_cr4(void)
76 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
79 static inline void __write_cr4(unsigned long x)
81 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
85 static inline unsigned long read_cr8(void)
87 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
90 static inline void write_cr8(unsigned long x)
92 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
96 static inline void arch_safe_halt(void)
98 PVOP_VCALL0(pv_irq_ops.safe_halt);
101 static inline void halt(void)
103 PVOP_VCALL0(pv_irq_ops.halt);
106 static inline void wbinvd(void)
108 PVOP_VCALL0(pv_cpu_ops.wbinvd);
111 #define get_kernel_rpl() (pv_info.kernel_rpl)
113 static inline u64 paravirt_read_msr(unsigned msr)
115 return PVOP_CALL1(u64, pv_cpu_ops.read_msr, msr);
118 static inline void paravirt_write_msr(unsigned msr,
119 unsigned low, unsigned high)
121 return PVOP_VCALL3(pv_cpu_ops.write_msr, msr, low, high);
124 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
126 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_safe, msr, err);
129 static inline int paravirt_write_msr_safe(unsigned msr,
130 unsigned low, unsigned high)
132 return PVOP_CALL3(int, pv_cpu_ops.write_msr_safe, msr, low, high);
135 #define rdmsr(msr, val1, val2) \
137 u64 _l = paravirt_read_msr(msr); \
142 #define wrmsr(msr, val1, val2) \
144 paravirt_write_msr(msr, val1, val2); \
147 #define rdmsrl(msr, val) \
149 val = paravirt_read_msr(msr); \
152 static inline void wrmsrl(unsigned msr, u64 val)
154 wrmsr(msr, (u32)val, (u32)(val>>32));
157 #define wrmsr_safe(msr, a, b) paravirt_write_msr_safe(msr, a, b)
159 /* rdmsr with exception handling */
160 #define rdmsr_safe(msr, a, b) \
163 u64 _l = paravirt_read_msr_safe(msr, &_err); \
169 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
173 *p = paravirt_read_msr_safe(msr, &err);
177 static inline unsigned long long paravirt_sched_clock(void)
179 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
183 extern struct static_key paravirt_steal_enabled;
184 extern struct static_key paravirt_steal_rq_enabled;
186 static inline u64 paravirt_steal_clock(int cpu)
188 return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
191 static inline unsigned long long paravirt_read_pmc(int counter)
193 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
196 #define rdpmc(counter, low, high) \
198 u64 _l = paravirt_read_pmc(counter); \
203 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
205 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
207 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
210 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
212 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
215 static inline void load_TR_desc(void)
217 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
219 static inline void load_gdt(const struct desc_ptr *dtr)
221 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
223 static inline void load_idt(const struct desc_ptr *dtr)
225 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
227 static inline void set_ldt(const void *addr, unsigned entries)
229 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
231 static inline void store_idt(struct desc_ptr *dtr)
233 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
235 static inline unsigned long paravirt_store_tr(void)
237 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
239 #define store_tr(tr) ((tr) = paravirt_store_tr())
240 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
242 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
246 static inline void load_gs_index(unsigned int gs)
248 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
252 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
255 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
258 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
259 void *desc, int type)
261 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
264 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
266 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
268 static inline void set_iopl_mask(unsigned mask)
270 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
273 /* The paravirtualized I/O functions */
274 static inline void slow_down_io(void)
276 pv_cpu_ops.io_delay();
277 #ifdef REALLY_SLOW_IO
278 pv_cpu_ops.io_delay();
279 pv_cpu_ops.io_delay();
280 pv_cpu_ops.io_delay();
284 static inline void paravirt_activate_mm(struct mm_struct *prev,
285 struct mm_struct *next)
287 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
290 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
291 struct mm_struct *mm)
293 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
296 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
298 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
301 static inline void __flush_tlb(void)
303 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
305 static inline void __flush_tlb_global(void)
307 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
309 static inline void __flush_tlb_single(unsigned long addr)
311 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
314 static inline void flush_tlb_others(const struct cpumask *cpumask,
315 struct mm_struct *mm,
319 PVOP_VCALL4(pv_mmu_ops.flush_tlb_others, cpumask, mm, start, end);
322 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
324 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
327 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
329 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
332 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
334 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
336 static inline void paravirt_release_pte(unsigned long pfn)
338 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
341 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
343 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
346 static inline void paravirt_release_pmd(unsigned long pfn)
348 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
351 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
353 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
355 static inline void paravirt_release_pud(unsigned long pfn)
357 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
360 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
363 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
366 static inline pte_t __pte(pteval_t val)
370 if (sizeof(pteval_t) > sizeof(long))
371 ret = PVOP_CALLEE2(pteval_t,
373 val, (u64)val >> 32);
375 ret = PVOP_CALLEE1(pteval_t,
379 return (pte_t) { .pte = ret };
382 static inline pteval_t pte_val(pte_t pte)
386 if (sizeof(pteval_t) > sizeof(long))
387 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
388 pte.pte, (u64)pte.pte >> 32);
390 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
396 static inline pgd_t __pgd(pgdval_t val)
400 if (sizeof(pgdval_t) > sizeof(long))
401 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
402 val, (u64)val >> 32);
404 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
407 return (pgd_t) { ret };
410 static inline pgdval_t pgd_val(pgd_t pgd)
414 if (sizeof(pgdval_t) > sizeof(long))
415 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
416 pgd.pgd, (u64)pgd.pgd >> 32);
418 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
424 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
425 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
430 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
433 return (pte_t) { .pte = ret };
436 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
437 pte_t *ptep, pte_t pte)
439 if (sizeof(pteval_t) > sizeof(long))
441 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
443 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
444 mm, addr, ptep, pte.pte);
447 static inline void set_pte(pte_t *ptep, pte_t pte)
449 if (sizeof(pteval_t) > sizeof(long))
450 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
451 pte.pte, (u64)pte.pte >> 32);
453 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
457 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
458 pte_t *ptep, pte_t pte)
460 if (sizeof(pteval_t) > sizeof(long))
462 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
464 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
467 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
468 pmd_t *pmdp, pmd_t pmd)
470 if (sizeof(pmdval_t) > sizeof(long))
472 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
474 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
475 native_pmd_val(pmd));
478 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
479 pud_t *pudp, pud_t pud)
481 if (sizeof(pudval_t) > sizeof(long))
483 pv_mmu_ops.set_pud_at(mm, addr, pudp, pud);
485 PVOP_VCALL4(pv_mmu_ops.set_pud_at, mm, addr, pudp,
486 native_pud_val(pud));
489 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
491 pmdval_t val = native_pmd_val(pmd);
493 if (sizeof(pmdval_t) > sizeof(long))
494 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
496 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
499 #if CONFIG_PGTABLE_LEVELS >= 3
500 static inline pmd_t __pmd(pmdval_t val)
504 if (sizeof(pmdval_t) > sizeof(long))
505 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
506 val, (u64)val >> 32);
508 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
511 return (pmd_t) { ret };
514 static inline pmdval_t pmd_val(pmd_t pmd)
518 if (sizeof(pmdval_t) > sizeof(long))
519 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
520 pmd.pmd, (u64)pmd.pmd >> 32);
522 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
528 static inline void set_pud(pud_t *pudp, pud_t pud)
530 pudval_t val = native_pud_val(pud);
532 if (sizeof(pudval_t) > sizeof(long))
533 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
534 val, (u64)val >> 32);
536 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
539 #if CONFIG_PGTABLE_LEVELS == 4
540 static inline pud_t __pud(pudval_t val)
544 if (sizeof(pudval_t) > sizeof(long))
545 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
546 val, (u64)val >> 32);
548 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
551 return (pud_t) { ret };
554 static inline pudval_t pud_val(pud_t pud)
558 if (sizeof(pudval_t) > sizeof(long))
559 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
560 pud.pud, (u64)pud.pud >> 32);
562 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
568 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
570 pgdval_t val = native_pgd_val(pgd);
572 if (sizeof(pgdval_t) > sizeof(long))
573 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
574 val, (u64)val >> 32);
576 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
580 static inline void pgd_clear(pgd_t *pgdp)
582 set_pgd(pgdp, __pgd(0));
585 static inline void pud_clear(pud_t *pudp)
587 set_pud(pudp, __pud(0));
590 #endif /* CONFIG_PGTABLE_LEVELS == 4 */
592 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */
594 #ifdef CONFIG_X86_PAE
595 /* Special-case pte-setting operations for PAE, which can't update a
596 64-bit pte atomically */
597 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
599 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
600 pte.pte, pte.pte >> 32);
603 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
606 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
609 static inline void pmd_clear(pmd_t *pmdp)
611 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
613 #else /* !CONFIG_X86_PAE */
614 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
619 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
622 set_pte_at(mm, addr, ptep, __pte(0));
625 static inline void pmd_clear(pmd_t *pmdp)
627 set_pmd(pmdp, __pmd(0));
629 #endif /* CONFIG_X86_PAE */
631 #define __HAVE_ARCH_START_CONTEXT_SWITCH
632 static inline void arch_start_context_switch(struct task_struct *prev)
634 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
637 static inline void arch_end_context_switch(struct task_struct *next)
639 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
642 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
643 static inline void arch_enter_lazy_mmu_mode(void)
645 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
648 static inline void arch_leave_lazy_mmu_mode(void)
650 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
653 static inline void arch_flush_lazy_mmu_mode(void)
655 PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
658 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
659 phys_addr_t phys, pgprot_t flags)
661 pv_mmu_ops.set_fixmap(idx, phys, flags);
664 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
666 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
669 PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
672 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
674 PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
677 static __always_inline void pv_wait(u8 *ptr, u8 val)
679 PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
682 static __always_inline void pv_kick(int cpu)
684 PVOP_VCALL1(pv_lock_ops.kick, cpu);
687 static __always_inline bool pv_vcpu_is_preempted(long cpu)
689 return PVOP_CALLEE1(bool, pv_lock_ops.vcpu_is_preempted, cpu);
692 #endif /* SMP && PARAVIRT_SPINLOCKS */
695 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
696 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
698 /* save and restore all caller-save registers, except return value */
699 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
700 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
702 #define PV_FLAGS_ARG "0"
703 #define PV_EXTRA_CLOBBERS
704 #define PV_VEXTRA_CLOBBERS
706 /* save and restore all caller-save registers, except return value */
707 #define PV_SAVE_ALL_CALLER_REGS \
716 #define PV_RESTORE_ALL_CALLER_REGS \
726 /* We save some registers, but all of them, that's too much. We clobber all
727 * caller saved registers but the argument parameter */
728 #define PV_SAVE_REGS "pushq %%rdi;"
729 #define PV_RESTORE_REGS "popq %%rdi;"
730 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
731 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
732 #define PV_FLAGS_ARG "D"
736 * Generate a thunk around a function which saves all caller-save
737 * registers except for the return value. This allows C functions to
738 * be called from assembler code where fewer than normal registers are
739 * available. It may also help code generation around calls from C
740 * code if the common case doesn't use many registers.
742 * When a callee is wrapped in a thunk, the caller can assume that all
743 * arg regs and all scratch registers are preserved across the
744 * call. The return value in rax/eax will not be saved, even for void
747 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
748 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
749 extern typeof(func) __raw_callee_save_##func; \
751 asm(".pushsection .text;" \
752 ".globl " PV_THUNK_NAME(func) ";" \
753 ".type " PV_THUNK_NAME(func) ", @function;" \
754 PV_THUNK_NAME(func) ":" \
756 PV_SAVE_ALL_CALLER_REGS \
758 PV_RESTORE_ALL_CALLER_REGS \
763 /* Get a reference to a callee-save function */
764 #define PV_CALLEE_SAVE(func) \
765 ((struct paravirt_callee_save) { __raw_callee_save_##func })
767 /* Promise that "func" already uses the right calling convention */
768 #define __PV_IS_CALLEE_SAVE(func) \
769 ((struct paravirt_callee_save) { func })
771 static inline notrace unsigned long arch_local_save_flags(void)
773 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
776 static inline notrace void arch_local_irq_restore(unsigned long f)
778 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
781 static inline notrace void arch_local_irq_disable(void)
783 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
786 static inline notrace void arch_local_irq_enable(void)
788 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
791 static inline notrace unsigned long arch_local_irq_save(void)
795 f = arch_local_save_flags();
796 arch_local_irq_disable();
801 /* Make sure as little as possible of this mess escapes. */
816 extern void default_banner(void);
818 #else /* __ASSEMBLY__ */
820 #define _PVSITE(ptype, clobbers, ops, word, algn) \
824 .pushsection .parainstructions,"a"; \
833 #define COND_PUSH(set, mask, reg) \
834 .if ((~(set)) & mask); push %reg; .endif
835 #define COND_POP(set, mask, reg) \
836 .if ((~(set)) & mask); pop %reg; .endif
840 #define PV_SAVE_REGS(set) \
841 COND_PUSH(set, CLBR_RAX, rax); \
842 COND_PUSH(set, CLBR_RCX, rcx); \
843 COND_PUSH(set, CLBR_RDX, rdx); \
844 COND_PUSH(set, CLBR_RSI, rsi); \
845 COND_PUSH(set, CLBR_RDI, rdi); \
846 COND_PUSH(set, CLBR_R8, r8); \
847 COND_PUSH(set, CLBR_R9, r9); \
848 COND_PUSH(set, CLBR_R10, r10); \
849 COND_PUSH(set, CLBR_R11, r11)
850 #define PV_RESTORE_REGS(set) \
851 COND_POP(set, CLBR_R11, r11); \
852 COND_POP(set, CLBR_R10, r10); \
853 COND_POP(set, CLBR_R9, r9); \
854 COND_POP(set, CLBR_R8, r8); \
855 COND_POP(set, CLBR_RDI, rdi); \
856 COND_POP(set, CLBR_RSI, rsi); \
857 COND_POP(set, CLBR_RDX, rdx); \
858 COND_POP(set, CLBR_RCX, rcx); \
859 COND_POP(set, CLBR_RAX, rax)
861 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
862 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
863 #define PARA_INDIRECT(addr) *addr(%rip)
865 #define PV_SAVE_REGS(set) \
866 COND_PUSH(set, CLBR_EAX, eax); \
867 COND_PUSH(set, CLBR_EDI, edi); \
868 COND_PUSH(set, CLBR_ECX, ecx); \
869 COND_PUSH(set, CLBR_EDX, edx)
870 #define PV_RESTORE_REGS(set) \
871 COND_POP(set, CLBR_EDX, edx); \
872 COND_POP(set, CLBR_ECX, ecx); \
873 COND_POP(set, CLBR_EDI, edi); \
874 COND_POP(set, CLBR_EAX, eax)
876 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
877 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
878 #define PARA_INDIRECT(addr) *%cs:addr
881 #define INTERRUPT_RETURN \
882 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
883 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
885 #define DISABLE_INTERRUPTS(clobbers) \
886 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
887 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
888 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
889 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
891 #define ENABLE_INTERRUPTS(clobbers) \
892 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
893 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
894 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
895 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
898 #define GET_CR0_INTO_EAX \
899 push %ecx; push %edx; \
900 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
902 #else /* !CONFIG_X86_32 */
905 * If swapgs is used while the userspace stack is still current,
906 * there's no way to call a pvop. The PV replacement *must* be
907 * inlined, or the swapgs instruction must be trapped and emulated.
909 #define SWAPGS_UNSAFE_STACK \
910 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
914 * Note: swapgs is very special, and in practise is either going to be
915 * implemented with a single "swapgs" instruction or something very
916 * special. Either way, we don't need to save any registers for
920 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
921 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
924 #define GET_CR2_INTO_RAX \
925 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
927 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
928 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
930 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
932 #define USERGS_SYSRET64 \
933 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
935 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
936 #endif /* CONFIG_X86_32 */
938 #endif /* __ASSEMBLY__ */
939 #else /* CONFIG_PARAVIRT */
940 # define default_banner x86_init_noop
942 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
943 struct mm_struct *mm)
947 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
950 #endif /* __ASSEMBLY__ */
951 #endif /* !CONFIG_PARAVIRT */
952 #endif /* _ASM_X86_PARAVIRT_H */