2 * Architecture specific OF callbacks.
4 #include <linux/bootmem.h>
5 #include <linux/export.h>
7 #include <linux/interrupt.h>
8 #include <linux/list.h>
10 #include <linux/of_fdt.h>
11 #include <linux/of_address.h>
12 #include <linux/of_platform.h>
13 #include <linux/of_irq.h>
14 #include <linux/slab.h>
15 #include <linux/pci.h>
16 #include <linux/of_pci.h>
17 #include <linux/initrd.h>
20 #include <asm/irq_controller.h>
22 #include <asm/pci_x86.h>
24 __initdata u64 initial_dtb;
25 char __initdata cmd_line[COMMAND_LINE_SIZE];
26 static LIST_HEAD(irq_domains);
27 static DEFINE_RAW_SPINLOCK(big_irq_lock);
29 int __initdata of_ioapic;
31 #ifdef CONFIG_X86_IO_APIC
32 static void add_interrupt_host(struct irq_domain *ih)
36 raw_spin_lock_irqsave(&big_irq_lock, flags);
37 list_add(&ih->l, &irq_domains);
38 raw_spin_unlock_irqrestore(&big_irq_lock, flags);
42 static struct irq_domain *get_ih_from_node(struct device_node *controller)
44 struct irq_domain *ih, *found = NULL;
47 raw_spin_lock_irqsave(&big_irq_lock, flags);
48 list_for_each_entry(ih, &irq_domains, l) {
49 if (ih->controller == controller) {
54 raw_spin_unlock_irqrestore(&big_irq_lock, flags);
58 unsigned int irq_create_of_mapping(struct device_node *controller,
59 const u32 *intspec, unsigned int intsize)
61 struct irq_domain *ih;
65 ih = get_ih_from_node(controller);
68 ret = ih->xlate(ih, intspec, intsize, &virq, &type);
71 if (type == IRQ_TYPE_NONE)
73 irq_set_irq_type(virq, type);
76 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
78 unsigned long pci_address_to_pio(phys_addr_t address)
81 * The ioport address can be directly used by inX / outX
83 BUG_ON(address >= (1 << 16));
84 return (unsigned long)address;
86 EXPORT_SYMBOL_GPL(pci_address_to_pio);
88 void __init early_init_dt_scan_chosen_arch(unsigned long node)
93 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
98 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
100 return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
103 #ifdef CONFIG_BLK_DEV_INITRD
104 void __init early_init_dt_setup_initrd_arch(unsigned long start,
107 initrd_start = (unsigned long)__va(start);
108 initrd_end = (unsigned long)__va(end);
109 initrd_below_start_ok = 1;
113 void __init add_dtb(u64 data)
115 initial_dtb = data + offsetof(struct setup_data, data);
119 * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
121 static struct of_device_id __initdata ce4100_ids[] = {
122 { .compatible = "intel,ce4100-cp", },
123 { .compatible = "isa", },
124 { .compatible = "pci", },
128 static int __init add_bus_probe(void)
130 if (!of_have_populated_dt())
133 return of_platform_bus_probe(NULL, ce4100_ids, NULL);
135 module_init(add_bus_probe);
138 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
140 struct device_node *np;
142 for_each_node_by_type(np, "pci") {
144 unsigned int bus_min;
146 prop = of_get_property(np, "bus-range", NULL);
149 bus_min = be32_to_cpup(prop);
150 if (bus->number == bus_min)
156 static int x86_of_pci_irq_enable(struct pci_dev *dev)
163 ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
169 ret = of_irq_map_pci(dev, &oirq);
173 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
181 static void x86_of_pci_irq_disable(struct pci_dev *dev)
185 void __cpuinit x86_of_pci_init(void)
187 pcibios_enable_irq = x86_of_pci_irq_enable;
188 pcibios_disable_irq = x86_of_pci_irq_disable;
192 static void __init dtb_setup_hpet(void)
194 #ifdef CONFIG_HPET_TIMER
195 struct device_node *dn;
199 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
202 ret = of_address_to_resource(dn, 0, &r);
207 hpet_address = r.start;
211 static void __init dtb_lapic_setup(void)
213 #ifdef CONFIG_X86_LOCAL_APIC
214 struct device_node *dn;
218 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
222 ret = of_address_to_resource(dn, 0, &r);
226 /* Did the boot loader setup the local APIC ? */
228 if (apic_force_enable(r.start))
231 smp_found_config = 1;
233 register_lapic_address(r.start);
234 generic_processor_info(boot_cpu_physical_apicid,
235 GET_APIC_VERSION(apic_read(APIC_LVR)));
239 #ifdef CONFIG_X86_IO_APIC
240 static unsigned int ioapic_id;
242 static void __init dtb_add_ioapic(struct device_node *dn)
247 ret = of_address_to_resource(dn, 0, &r);
249 printk(KERN_ERR "Can't obtain address from node %s.\n",
253 mp_register_ioapic(++ioapic_id, r.start, gsi_top);
256 static void __init dtb_ioapic_setup(void)
258 struct device_node *dn;
260 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
267 printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
270 static void __init dtb_ioapic_setup(void) {}
273 static void __init dtb_apic_setup(void)
279 #ifdef CONFIG_OF_FLATTREE
280 static void __init x86_flattree_get_config(void)
288 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
289 (u64)sizeof(struct boot_param_header));
291 initial_boot_params = early_memremap(initial_dtb, map_len);
292 size = be32_to_cpu(initial_boot_params->totalsize);
293 if (map_len < size) {
294 early_iounmap(initial_boot_params, map_len);
295 initial_boot_params = early_memremap(initial_dtb, size);
299 new_dtb = alloc_bootmem(size);
300 memcpy(new_dtb, initial_boot_params, size);
301 early_iounmap(initial_boot_params, map_len);
303 initial_boot_params = new_dtb;
305 /* root level address cells */
306 of_scan_flat_dt(early_init_dt_scan_root, NULL);
308 unflatten_device_tree();
311 static inline void x86_flattree_get_config(void) { }
314 void __init x86_dtb_init(void)
316 x86_flattree_get_config();
318 if (!of_have_populated_dt())
325 #ifdef CONFIG_X86_IO_APIC
327 struct of_ioapic_type {
333 static struct of_ioapic_type of_ioapic_type[] =
336 .out_type = IRQ_TYPE_EDGE_RISING,
337 .trigger = IOAPIC_EDGE,
341 .out_type = IRQ_TYPE_LEVEL_LOW,
342 .trigger = IOAPIC_LEVEL,
346 .out_type = IRQ_TYPE_LEVEL_HIGH,
347 .trigger = IOAPIC_LEVEL,
351 .out_type = IRQ_TYPE_EDGE_FALLING,
352 .trigger = IOAPIC_EDGE,
357 static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
358 u32 *out_hwirq, u32 *out_type)
360 struct mp_ioapic_gsi *gsi_cfg;
361 struct io_apic_irq_attr attr;
362 struct of_ioapic_type *it;
369 idx = (u32) id->priv;
370 gsi_cfg = mp_ioapic_gsi_routing(idx);
371 *out_hwirq = line + gsi_cfg->gsi_base;
376 if (type >= ARRAY_SIZE(of_ioapic_type))
379 it = of_ioapic_type + type;
380 *out_type = it->out_type;
382 set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
384 return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr);
387 static void __init ioapic_add_ofnode(struct device_node *np)
392 ret = of_address_to_resource(np, 0, &r);
394 printk(KERN_ERR "Failed to obtain address for %s\n",
399 for (i = 0; i < nr_ioapics; i++) {
400 if (r.start == mpc_ioapic_addr(i)) {
401 struct irq_domain *id;
403 id = kzalloc(sizeof(*id), GFP_KERNEL);
406 id->xlate = ioapic_xlate;
407 id->priv = (void *)i;
408 add_interrupt_host(id);
412 printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
415 void __init x86_add_irq_domains(void)
417 struct device_node *dp;
419 if (!of_have_populated_dt())
422 for_each_node_with_property(dp, "interrupt-controller") {
423 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
424 ioapic_add_ofnode(dp);
428 void __init x86_add_irq_domains(void) { }