arch/x86/kernel/devicetree.c

   1 /*
   2  * Architecture specific OF callbacks.
   3  */
   4 #include <linux/bootmem.h>
   5 #include <linux/export.h>
   6 #include <linux/io.h>
   7 #include <linux/irqdomain.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/list.h>
  10 #include <linux/of.h>
  11 #include <linux/of_fdt.h>
  12 #include <linux/of_address.h>
  13 #include <linux/of_platform.h>
  14 #include <linux/of_irq.h>
  15 #include <linux/slab.h>
  16 #include <linux/pci.h>
  17 #include <linux/of_pci.h>
  18 #include <linux/initrd.h>
  19
  20 #include <asm/hpet.h>
  21 #include <asm/apic.h>
  22 #include <asm/pci_x86.h>
  23
  24 __initdata u64 initial_dtb;
  25 char __initdata cmd_line[COMMAND_LINE_SIZE];
  26
  27 int __initdata of_ioapic;
  28
  29 unsigned long pci_address_to_pio(phys_addr_t address)
  30 {
  31         /*
  32          * The ioport address can be directly used by inX / outX
  33          */
  34         BUG_ON(address >= (1 << 16));
  35         return (unsigned long)address;
  36 }
  37 EXPORT_SYMBOL_GPL(pci_address_to_pio);
  38
  39 void __init early_init_dt_scan_chosen_arch(unsigned long node)
  40 {
  41         BUG();
  42 }
  43
  44 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
  45 {
  46         BUG();
  47 }
  48
  49 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
  50 {
  51         return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
  52 }
  53
  54 #ifdef CONFIG_BLK_DEV_INITRD
  55 void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
  56 {
  57         initrd_start = (unsigned long)__va(start);
  58         initrd_end = (unsigned long)__va(end);
  59         initrd_below_start_ok = 1;
  60 }
  61 #endif
  62
  63 void __init add_dtb(u64 data)
  64 {
  65         initial_dtb = data + offsetof(struct setup_data, data);
  66 }
  67
  68 /*
  69  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
  70  */
  71 static struct of_device_id __initdata ce4100_ids[] = {
  72         { .compatible = "intel,ce4100-cp", },
  73         { .compatible = "isa", },
  74         { .compatible = "pci", },
  75         {},
  76 };
  77
  78 static int __init add_bus_probe(void)
  79 {
  80         if (!of_have_populated_dt())
  81                 return 0;
  82
  83         return of_platform_bus_probe(NULL, ce4100_ids, NULL);
  84 }
  85 module_init(add_bus_probe);
  86
  87 #ifdef CONFIG_PCI
  88 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
  89 {
  90         struct device_node *np;
  91
  92         for_each_node_by_type(np, "pci") {
  93                 const void *prop;
  94                 unsigned int bus_min;
  95
  96                 prop = of_get_property(np, "bus-range", NULL);
  97                 if (!prop)
  98                         continue;
  99                 bus_min = be32_to_cpup(prop);
 100                 if (bus->number == bus_min)
 101                         return np;
 102         }
 103         return NULL;
 104 }
 105
 106 static int x86_of_pci_irq_enable(struct pci_dev *dev)
 107 {
 108         u32 virq;
 109         int ret;
 110         u8 pin;
 111
 112         ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 113         if (ret)
 114                 return ret;
 115         if (!pin)
 116                 return 0;
 117
 118         virq = of_irq_parse_and_map_pci(dev, 0, 0);
 119         if (virq == 0)
 120                 return -EINVAL;
 121         dev->irq = virq;
 122         return 0;
 123 }
 124
 125 static void x86_of_pci_irq_disable(struct pci_dev *dev)
 126 {
 127 }
 128
 129 void x86_of_pci_init(void)
 130 {
 131         pcibios_enable_irq = x86_of_pci_irq_enable;
 132         pcibios_disable_irq = x86_of_pci_irq_disable;
 133 }
 134 #endif
 135
 136 static void __init dtb_setup_hpet(void)
 137 {
 138 #ifdef CONFIG_HPET_TIMER
 139         struct device_node *dn;
 140         struct resource r;
 141         int ret;
 142
 143         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
 144         if (!dn)
 145                 return;
 146         ret = of_address_to_resource(dn, 0, &r);
 147         if (ret) {
 148                 WARN_ON(1);
 149                 return;
 150         }
 151         hpet_address = r.start;
 152 #endif
 153 }
 154
 155 static void __init dtb_lapic_setup(void)
 156 {
 157 #ifdef CONFIG_X86_LOCAL_APIC
 158         struct device_node *dn;
 159         struct resource r;
 160         int ret;
 161
 162         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
 163         if (!dn)
 164                 return;
 165
 166         ret = of_address_to_resource(dn, 0, &r);
 167         if (WARN_ON(ret))
 168                 return;
 169
 170         /* Did the boot loader setup the local APIC ? */
 171         if (!cpu_has_apic) {
 172                 if (apic_force_enable(r.start))
 173                         return;
 174         }
 175         smp_found_config = 1;
 176         pic_mode = 1;
 177         register_lapic_address(r.start);
 178         generic_processor_info(boot_cpu_physical_apicid,
 179                                GET_APIC_VERSION(apic_read(APIC_LVR)));
 180 #endif
 181 }
 182
 183 #ifdef CONFIG_X86_IO_APIC
 184 static unsigned int ioapic_id;
 185
 186 static void __init dtb_add_ioapic(struct device_node *dn)
 187 {
 188         struct resource r;
 189         int ret;
 190
 191         ret = of_address_to_resource(dn, 0, &r);
 192         if (ret) {
 193                 printk(KERN_ERR "Can't obtain address from node %s.\n",
 194                                 dn->full_name);
 195                 return;
 196         }
 197         mp_register_ioapic(++ioapic_id, r.start, gsi_top);
 198 }
 199
 200 static void __init dtb_ioapic_setup(void)
 201 {
 202         struct device_node *dn;
 203
 204         for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
 205                 dtb_add_ioapic(dn);
 206
 207         if (nr_ioapics) {
 208                 of_ioapic = 1;
 209                 return;
 210         }
 211         printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
 212 }
 213 #else
 214 static void __init dtb_ioapic_setup(void) {}
 215 #endif
 216
 217 static void __init dtb_apic_setup(void)
 218 {
 219         dtb_lapic_setup();
 220         dtb_ioapic_setup();
 221 }
 222
 223 #ifdef CONFIG_OF_FLATTREE
 224 static void __init x86_flattree_get_config(void)
 225 {
 226         u32 size, map_len;
 227         void *new_dtb;
 228
 229         if (!initial_dtb)
 230                 return;
 231
 232         map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
 233                         (u64)sizeof(struct boot_param_header));
 234
 235         initial_boot_params = early_memremap(initial_dtb, map_len);
 236         size = be32_to_cpu(initial_boot_params->totalsize);
 237         if (map_len < size) {
 238                 early_iounmap(initial_boot_params, map_len);
 239                 initial_boot_params = early_memremap(initial_dtb, size);
 240                 map_len = size;
 241         }
 242
 243         new_dtb = alloc_bootmem(size);
 244         memcpy(new_dtb, initial_boot_params, size);
 245         early_iounmap(initial_boot_params, map_len);
 246
 247         initial_boot_params = new_dtb;
 248
 249         /* root level address cells */
 250         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 251
 252         unflatten_device_tree();
 253 }
 254 #else
 255 static inline void x86_flattree_get_config(void) { }
 256 #endif
 257
 258 void __init x86_dtb_init(void)
 259 {
 260         x86_flattree_get_config();
 261
 262         if (!of_have_populated_dt())
 263                 return;
 264
 265         dtb_setup_hpet();
 266         dtb_apic_setup();
 267 }
 268
 269 #ifdef CONFIG_X86_IO_APIC
 270
 271 struct of_ioapic_type {
 272         u32 out_type;
 273         u32 trigger;
 274         u32 polarity;
 275 };
 276
 277 static struct of_ioapic_type of_ioapic_type[] =
 278 {
 279         {
 280                 .out_type       = IRQ_TYPE_EDGE_RISING,
 281                 .trigger        = IOAPIC_EDGE,
 282                 .polarity       = 1,
 283         },
 284         {
 285                 .out_type       = IRQ_TYPE_LEVEL_LOW,
 286                 .trigger        = IOAPIC_LEVEL,
 287                 .polarity       = 0,
 288         },
 289         {
 290                 .out_type       = IRQ_TYPE_LEVEL_HIGH,
 291                 .trigger        = IOAPIC_LEVEL,
 292                 .polarity       = 1,
 293         },
 294         {
 295                 .out_type       = IRQ_TYPE_EDGE_FALLING,
 296                 .trigger        = IOAPIC_EDGE,
 297                 .polarity       = 0,
 298         },
 299 };
 300
 301 static int ioapic_xlate(struct irq_domain *domain,
 302                         struct device_node *controller,
 303                         const u32 *intspec, u32 intsize,
 304                         irq_hw_number_t *out_hwirq, u32 *out_type)
 305 {
 306         struct io_apic_irq_attr attr;
 307         struct of_ioapic_type *it;
 308         u32 line, idx;
 309         int rc;
 310
 311         if (WARN_ON(intsize < 2))
 312                 return -EINVAL;
 313
 314         line = intspec[0];
 315
 316         if (intspec[1] >= ARRAY_SIZE(of_ioapic_type))
 317                 return -EINVAL;
 318
 319         it = &of_ioapic_type[intspec[1]];
 320
 321         idx = (u32) domain->host_data;
 322         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
 323
 324         rc = io_apic_setup_irq_pin_once(irq_find_mapping(domain, line),
 325                                         cpu_to_node(0), &attr);
 326         if (rc)
 327                 return rc;
 328
 329         *out_hwirq = line;
 330         *out_type = it->out_type;
 331         return 0;
 332 }
 333
 334 const struct irq_domain_ops ioapic_irq_domain_ops = {
 335         .xlate = ioapic_xlate,
 336 };
 337
 338 static void dt_add_ioapic_domain(unsigned int ioapic_num,
 339                 struct device_node *np)
 340 {
 341         struct irq_domain *id;
 342         struct mp_ioapic_gsi *gsi_cfg;
 343         int ret;
 344         int num;
 345
 346         gsi_cfg = mp_ioapic_gsi_routing(ioapic_num);
 347         num = gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1;
 348
 349         id = irq_domain_add_linear(np, num, &ioapic_irq_domain_ops,
 350                         (void *)ioapic_num);
 351         BUG_ON(!id);
 352         if (gsi_cfg->gsi_base == 0) {
 353                 /*
 354                  * The first NR_IRQS_LEGACY irq descs are allocated in
 355                  * early_irq_init() and need just a mapping. The
 356                  * remaining irqs need both. All of them are preallocated
 357                  * and assigned so we can keep the 1:1 mapping which the ioapic
 358                  * is having.
 359                  */
 360                 irq_domain_associate_many(id, 0, 0, NR_IRQS_LEGACY);
 361
 362                 if (num > NR_IRQS_LEGACY) {
 363                         ret = irq_create_strict_mappings(id, NR_IRQS_LEGACY,
 364                                         NR_IRQS_LEGACY, num - NR_IRQS_LEGACY);
 365                         if (ret)
 366                                 pr_err("Error creating mapping for the "
 367                                                 "remaining IRQs: %d\n", ret);
 368                 }
 369                 irq_set_default_host(id);
 370         } else {
 371                 ret = irq_create_strict_mappings(id, gsi_cfg->gsi_base, 0, num);
 372                 if (ret)
 373                         pr_err("Error creating IRQ mapping: %d\n", ret);
 374         }
 375 }
 376
 377 static void __init ioapic_add_ofnode(struct device_node *np)
 378 {
 379         struct resource r;
 380         int i, ret;
 381
 382         ret = of_address_to_resource(np, 0, &r);
 383         if (ret) {
 384                 printk(KERN_ERR "Failed to obtain address for %s\n",
 385                                 np->full_name);
 386                 return;
 387         }
 388
 389         for (i = 0; i < nr_ioapics; i++) {
 390                 if (r.start == mpc_ioapic_addr(i)) {
 391                         dt_add_ioapic_domain(i, np);
 392                         return;
 393                 }
 394         }
 395         printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
 396 }
 397
 398 void __init x86_add_irq_domains(void)
 399 {
 400         struct device_node *dp;
 401
 402         if (!of_have_populated_dt())
 403                 return;
 404
 405         for_each_node_with_property(dp, "interrupt-controller") {
 406                 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
 407                         ioapic_add_ofnode(dp);
 408         }
 409 }
 410 #else
 411 void __init x86_add_irq_domains(void) { }
 412 #endif