arch/x86/kernel/devicetree.c

   1 /*
   2  * Architecture specific OF callbacks.
   3  */
   4 #include <linux/bootmem.h>
   5 #include <linux/export.h>
   6 #include <linux/io.h>
   7 #include <linux/irqdomain.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/list.h>
  10 #include <linux/of.h>
  11 #include <linux/of_fdt.h>
  12 #include <linux/of_address.h>
  13 #include <linux/of_platform.h>
  14 #include <linux/of_irq.h>
  15 #include <linux/slab.h>
  16 #include <linux/pci.h>
  17 #include <linux/of_pci.h>
  18 #include <linux/initrd.h>
  19
  20 #include <asm/hpet.h>
  21 #include <asm/apic.h>
  22 #include <asm/pci_x86.h>
  23
  24 __initdata u64 initial_dtb;
  25 char __initdata cmd_line[COMMAND_LINE_SIZE];
  26
  27 int __initdata of_ioapic;
  28
  29 unsigned long pci_address_to_pio(phys_addr_t address)
  30 {
  31         /*
  32          * The ioport address can be directly used by inX / outX
  33          */
  34         BUG_ON(address >= (1 << 16));
  35         return (unsigned long)address;
  36 }
  37 EXPORT_SYMBOL_GPL(pci_address_to_pio);
  38
  39 void __init early_init_dt_scan_chosen_arch(unsigned long node)
  40 {
  41         BUG();
  42 }
  43
  44 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
  45 {
  46         BUG();
  47 }
  48
  49 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
  50 {
  51         return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
  52 }
  53
  54 #ifdef CONFIG_BLK_DEV_INITRD
  55 void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
  56 {
  57         initrd_start = (unsigned long)__va(start);
  58         initrd_end = (unsigned long)__va(end);
  59         initrd_below_start_ok = 1;
  60 }
  61 #endif
  62
  63 void __init add_dtb(u64 data)
  64 {
  65         initial_dtb = data + offsetof(struct setup_data, data);
  66 }
  67
  68 /*
  69  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
  70  */
  71 static struct of_device_id __initdata ce4100_ids[] = {
  72         { .compatible = "intel,ce4100-cp", },
  73         { .compatible = "isa", },
  74         { .compatible = "pci", },
  75         {},
  76 };
  77
  78 static int __init add_bus_probe(void)
  79 {
  80         if (!of_have_populated_dt())
  81                 return 0;
  82
  83         return of_platform_bus_probe(NULL, ce4100_ids, NULL);
  84 }
  85 module_init(add_bus_probe);
  86
  87 #ifdef CONFIG_PCI
  88 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
  89 {
  90         struct device_node *np;
  91
  92         for_each_node_by_type(np, "pci") {
  93                 const void *prop;
  94                 unsigned int bus_min;
  95
  96                 prop = of_get_property(np, "bus-range", NULL);
  97                 if (!prop)
  98                         continue;
  99                 bus_min = be32_to_cpup(prop);
 100                 if (bus->number == bus_min)
 101                         return np;
 102         }
 103         return NULL;
 104 }
 105
 106 static int x86_of_pci_irq_enable(struct pci_dev *dev)
 107 {
 108         struct of_phandle_args oirq;
 109         u32 virq;
 110         int ret;
 111         u8 pin;
 112
 113         ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 114         if (ret)
 115                 return ret;
 116         if (!pin)
 117                 return 0;
 118
 119         ret = of_irq_parse_pci(dev, &oirq);
 120         if (ret)
 121                 return ret;
 122
 123         virq = irq_create_of_mapping(&oirq);
 124         if (virq == 0)
 125                 return -EINVAL;
 126         dev->irq = virq;
 127         return 0;
 128 }
 129
 130 static void x86_of_pci_irq_disable(struct pci_dev *dev)
 131 {
 132 }
 133
 134 void x86_of_pci_init(void)
 135 {
 136         pcibios_enable_irq = x86_of_pci_irq_enable;
 137         pcibios_disable_irq = x86_of_pci_irq_disable;
 138 }
 139 #endif
 140
 141 static void __init dtb_setup_hpet(void)
 142 {
 143 #ifdef CONFIG_HPET_TIMER
 144         struct device_node *dn;
 145         struct resource r;
 146         int ret;
 147
 148         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
 149         if (!dn)
 150                 return;
 151         ret = of_address_to_resource(dn, 0, &r);
 152         if (ret) {
 153                 WARN_ON(1);
 154                 return;
 155         }
 156         hpet_address = r.start;
 157 #endif
 158 }
 159
 160 static void __init dtb_lapic_setup(void)
 161 {
 162 #ifdef CONFIG_X86_LOCAL_APIC
 163         struct device_node *dn;
 164         struct resource r;
 165         int ret;
 166
 167         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
 168         if (!dn)
 169                 return;
 170
 171         ret = of_address_to_resource(dn, 0, &r);
 172         if (WARN_ON(ret))
 173                 return;
 174
 175         /* Did the boot loader setup the local APIC ? */
 176         if (!cpu_has_apic) {
 177                 if (apic_force_enable(r.start))
 178                         return;
 179         }
 180         smp_found_config = 1;
 181         pic_mode = 1;
 182         register_lapic_address(r.start);
 183         generic_processor_info(boot_cpu_physical_apicid,
 184                                GET_APIC_VERSION(apic_read(APIC_LVR)));
 185 #endif
 186 }
 187
 188 #ifdef CONFIG_X86_IO_APIC
 189 static unsigned int ioapic_id;
 190
 191 static void __init dtb_add_ioapic(struct device_node *dn)
 192 {
 193         struct resource r;
 194         int ret;
 195
 196         ret = of_address_to_resource(dn, 0, &r);
 197         if (ret) {
 198                 printk(KERN_ERR "Can't obtain address from node %s.\n",
 199                                 dn->full_name);
 200                 return;
 201         }
 202         mp_register_ioapic(++ioapic_id, r.start, gsi_top);
 203 }
 204
 205 static void __init dtb_ioapic_setup(void)
 206 {
 207         struct device_node *dn;
 208
 209         for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
 210                 dtb_add_ioapic(dn);
 211
 212         if (nr_ioapics) {
 213                 of_ioapic = 1;
 214                 return;
 215         }
 216         printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
 217 }
 218 #else
 219 static void __init dtb_ioapic_setup(void) {}
 220 #endif
 221
 222 static void __init dtb_apic_setup(void)
 223 {
 224         dtb_lapic_setup();
 225         dtb_ioapic_setup();
 226 }
 227
 228 #ifdef CONFIG_OF_FLATTREE
 229 static void __init x86_flattree_get_config(void)
 230 {
 231         u32 size, map_len;
 232         void *new_dtb;
 233
 234         if (!initial_dtb)
 235                 return;
 236
 237         map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
 238                         (u64)sizeof(struct boot_param_header));
 239
 240         initial_boot_params = early_memremap(initial_dtb, map_len);
 241         size = be32_to_cpu(initial_boot_params->totalsize);
 242         if (map_len < size) {
 243                 early_iounmap(initial_boot_params, map_len);
 244                 initial_boot_params = early_memremap(initial_dtb, size);
 245                 map_len = size;
 246         }
 247
 248         new_dtb = alloc_bootmem(size);
 249         memcpy(new_dtb, initial_boot_params, size);
 250         early_iounmap(initial_boot_params, map_len);
 251
 252         initial_boot_params = new_dtb;
 253
 254         /* root level address cells */
 255         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 256
 257         unflatten_device_tree();
 258 }
 259 #else
 260 static inline void x86_flattree_get_config(void) { }
 261 #endif
 262
 263 void __init x86_dtb_init(void)
 264 {
 265         x86_flattree_get_config();
 266
 267         if (!of_have_populated_dt())
 268                 return;
 269
 270         dtb_setup_hpet();
 271         dtb_apic_setup();
 272 }
 273
 274 #ifdef CONFIG_X86_IO_APIC
 275
 276 struct of_ioapic_type {
 277         u32 out_type;
 278         u32 trigger;
 279         u32 polarity;
 280 };
 281
 282 static struct of_ioapic_type of_ioapic_type[] =
 283 {
 284         {
 285                 .out_type       = IRQ_TYPE_EDGE_RISING,
 286                 .trigger        = IOAPIC_EDGE,
 287                 .polarity       = 1,
 288         },
 289         {
 290                 .out_type       = IRQ_TYPE_LEVEL_LOW,
 291                 .trigger        = IOAPIC_LEVEL,
 292                 .polarity       = 0,
 293         },
 294         {
 295                 .out_type       = IRQ_TYPE_LEVEL_HIGH,
 296                 .trigger        = IOAPIC_LEVEL,
 297                 .polarity       = 1,
 298         },
 299         {
 300                 .out_type       = IRQ_TYPE_EDGE_FALLING,
 301                 .trigger        = IOAPIC_EDGE,
 302                 .polarity       = 0,
 303         },
 304 };
 305
 306 static int ioapic_xlate(struct irq_domain *domain,
 307                         struct device_node *controller,
 308                         const u32 *intspec, u32 intsize,
 309                         irq_hw_number_t *out_hwirq, u32 *out_type)
 310 {
 311         struct io_apic_irq_attr attr;
 312         struct of_ioapic_type *it;
 313         u32 line, idx;
 314         int rc;
 315
 316         if (WARN_ON(intsize < 2))
 317                 return -EINVAL;
 318
 319         line = intspec[0];
 320
 321         if (intspec[1] >= ARRAY_SIZE(of_ioapic_type))
 322                 return -EINVAL;
 323
 324         it = &of_ioapic_type[intspec[1]];
 325
 326         idx = (u32) domain->host_data;
 327         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
 328
 329         rc = io_apic_setup_irq_pin_once(irq_find_mapping(domain, line),
 330                                         cpu_to_node(0), &attr);
 331         if (rc)
 332                 return rc;
 333
 334         *out_hwirq = line;
 335         *out_type = it->out_type;
 336         return 0;
 337 }
 338
 339 const struct irq_domain_ops ioapic_irq_domain_ops = {
 340         .xlate = ioapic_xlate,
 341 };
 342
 343 static void dt_add_ioapic_domain(unsigned int ioapic_num,
 344                 struct device_node *np)
 345 {
 346         struct irq_domain *id;
 347         struct mp_ioapic_gsi *gsi_cfg;
 348         int ret;
 349         int num;
 350
 351         gsi_cfg = mp_ioapic_gsi_routing(ioapic_num);
 352         num = gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1;
 353
 354         id = irq_domain_add_linear(np, num, &ioapic_irq_domain_ops,
 355                         (void *)ioapic_num);
 356         BUG_ON(!id);
 357         if (gsi_cfg->gsi_base == 0) {
 358                 /*
 359                  * The first NR_IRQS_LEGACY irq descs are allocated in
 360                  * early_irq_init() and need just a mapping. The
 361                  * remaining irqs need both. All of them are preallocated
 362                  * and assigned so we can keep the 1:1 mapping which the ioapic
 363                  * is having.
 364                  */
 365                 irq_domain_associate_many(id, 0, 0, NR_IRQS_LEGACY);
 366
 367                 if (num > NR_IRQS_LEGACY) {
 368                         ret = irq_create_strict_mappings(id, NR_IRQS_LEGACY,
 369                                         NR_IRQS_LEGACY, num - NR_IRQS_LEGACY);
 370                         if (ret)
 371                                 pr_err("Error creating mapping for the "
 372                                                 "remaining IRQs: %d\n", ret);
 373                 }
 374                 irq_set_default_host(id);
 375         } else {
 376                 ret = irq_create_strict_mappings(id, gsi_cfg->gsi_base, 0, num);
 377                 if (ret)
 378                         pr_err("Error creating IRQ mapping: %d\n", ret);
 379         }
 380 }
 381
 382 static void __init ioapic_add_ofnode(struct device_node *np)
 383 {
 384         struct resource r;
 385         int i, ret;
 386
 387         ret = of_address_to_resource(np, 0, &r);
 388         if (ret) {
 389                 printk(KERN_ERR "Failed to obtain address for %s\n",
 390                                 np->full_name);
 391                 return;
 392         }
 393
 394         for (i = 0; i < nr_ioapics; i++) {
 395                 if (r.start == mpc_ioapic_addr(i)) {
 396                         dt_add_ioapic_domain(i, np);
 397                         return;
 398                 }
 399         }
 400         printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
 401 }
 402
 403 void __init x86_add_irq_domains(void)
 404 {
 405         struct device_node *dp;
 406
 407         if (!of_have_populated_dt())
 408                 return;
 409
 410         for_each_node_with_property(dp, "interrupt-controller") {
 411                 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
 412                         ioapic_add_ofnode(dp);
 413         }
 414 }
 415 #else
 416 void __init x86_add_irq_domains(void) { }
 417 #endif