4 * This provides a low-level interface to the hardware's Debug Store
5 * feature that is used for last branch recording (LBR) and
6 * precise-event based sampling (PEBS).
8 * Different architectures use a different DS layout/pointer size.
9 * The below functions therefore work on a void*.
12 * Since there is no user for PEBS, yet, only LBR (or branch
13 * trace store, BTS) is supported.
16 * Copyright (C) 2007 Intel Corporation.
17 * Markus Metzger <markus.t.metzger@intel.com>, Dec 2007
22 #include <linux/errno.h>
23 #include <linux/string.h>
24 #include <linux/slab.h>
28 * Debug Store (DS) save area configuration (see Intel64 and IA32
29 * Architectures Software Developer's Manual, section 18.5)
31 * The DS configuration consists of the following fields; different
32 * architetures vary in the size of those fields.
33 * - double-word aligned base linear address of the BTS buffer
34 * - write pointer into the BTS buffer
35 * - end linear address of the BTS buffer (one byte beyond the end of
37 * - interrupt pointer into BTS buffer
38 * (interrupt occurs when write pointer passes interrupt pointer)
39 * - double-word aligned base linear address of the PEBS buffer
40 * - write pointer into the PEBS buffer
41 * - end linear address of the PEBS buffer (one byte beyond the end of
43 * - interrupt pointer into PEBS buffer
44 * (interrupt occurs when write pointer passes interrupt pointer)
45 * - value to which counter is reset following counter overflow
47 * On later architectures, the last branch recording hardware uses
48 * 64bit pointers even in 32bit mode.
51 * Branch Trace Store (BTS) records store information about control
52 * flow changes. They at least provide the following information:
53 * - source linear address
54 * - destination linear address
56 * Netburst supported a predicated bit that had been dropped in later
57 * architectures. We do not suppor it.
60 * In order to abstract from the actual DS and BTS layout, we describe
61 * the access to the relevant fields.
62 * Thanks to Andi Kleen for proposing this design.
64 * The implementation, however, is not as general as it might seem. In
65 * order to stay somewhat simple and efficient, we assume an
66 * underlying unsigned type (mostly a pointer type) and we expect the
67 * field to be at least as big as that type.
71 * A special from_ip address to indicate that the BTS record is an
72 * info record that needs to be interpreted or skipped.
74 #define BTS_ESCAPE_ADDRESS (-1)
77 * A field access descriptor
85 * The configuration for a particular DS/BTS hardware implementation.
87 struct ds_configuration {
88 /* the DS configuration */
89 unsigned char sizeof_ds;
90 struct access_desc bts_buffer_base;
91 struct access_desc bts_index;
92 struct access_desc bts_absolute_maximum;
93 struct access_desc bts_interrupt_threshold;
94 /* the BTS configuration */
95 unsigned char sizeof_bts;
96 struct access_desc from_ip;
97 struct access_desc to_ip;
98 /* BTS variants used to store additional information like
100 struct access_desc info_type;
101 struct access_desc info_data;
102 unsigned long debugctl_mask;
106 * The global configuration used by the below accessor functions
108 static struct ds_configuration ds_cfg;
111 * Accessor functions for some DS and BTS fields using the above
112 * global ptrace_bts_cfg.
114 static inline void *get_bts_buffer_base(char *base)
116 return *(void **)(base + ds_cfg.bts_buffer_base.offset);
118 static inline void set_bts_buffer_base(char *base, void *value)
120 (*(void **)(base + ds_cfg.bts_buffer_base.offset)) = value;
122 static inline void *get_bts_index(char *base)
124 return *(void **)(base + ds_cfg.bts_index.offset);
126 static inline void set_bts_index(char *base, void *value)
128 (*(void **)(base + ds_cfg.bts_index.offset)) = value;
130 static inline void *get_bts_absolute_maximum(char *base)
132 return *(void **)(base + ds_cfg.bts_absolute_maximum.offset);
134 static inline void set_bts_absolute_maximum(char *base, void *value)
136 (*(void **)(base + ds_cfg.bts_absolute_maximum.offset)) = value;
138 static inline void *get_bts_interrupt_threshold(char *base)
140 return *(void **)(base + ds_cfg.bts_interrupt_threshold.offset);
142 static inline void set_bts_interrupt_threshold(char *base, void *value)
144 (*(void **)(base + ds_cfg.bts_interrupt_threshold.offset)) = value;
146 static inline long get_from_ip(char *base)
148 return *(long *)(base + ds_cfg.from_ip.offset);
150 static inline void set_from_ip(char *base, long value)
152 (*(long *)(base + ds_cfg.from_ip.offset)) = value;
154 static inline long get_to_ip(char *base)
156 return *(long *)(base + ds_cfg.to_ip.offset);
158 static inline void set_to_ip(char *base, long value)
160 (*(long *)(base + ds_cfg.to_ip.offset)) = value;
162 static inline unsigned char get_info_type(char *base)
164 return *(unsigned char *)(base + ds_cfg.info_type.offset);
166 static inline void set_info_type(char *base, unsigned char value)
168 (*(unsigned char *)(base + ds_cfg.info_type.offset)) = value;
170 static inline unsigned long get_info_data(char *base)
172 return *(unsigned long *)(base + ds_cfg.info_data.offset);
174 static inline void set_info_data(char *base, unsigned long value)
176 (*(unsigned long *)(base + ds_cfg.info_data.offset)) = value;
180 int ds_allocate(void **dsp, size_t bts_size_in_records)
182 size_t bts_size_in_bytes = 0;
186 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
189 if (bts_size_in_records < 0)
193 bts_size_in_records * ds_cfg.sizeof_bts;
195 if (bts_size_in_bytes <= 0)
198 bts = kzalloc(bts_size_in_bytes, GFP_KERNEL);
203 ds = kzalloc(ds_cfg.sizeof_ds, GFP_KERNEL);
210 set_bts_buffer_base(ds, bts);
211 set_bts_index(ds, bts);
212 set_bts_absolute_maximum(ds, bts + bts_size_in_bytes);
213 set_bts_interrupt_threshold(ds, bts + bts_size_in_bytes + 1);
219 int ds_free(void **dsp)
222 kfree(get_bts_buffer_base(*dsp));
229 int ds_get_bts_size(void *ds)
231 size_t size_in_bytes;
233 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
237 get_bts_absolute_maximum(ds) -
238 get_bts_buffer_base(ds);
240 return size_in_bytes / ds_cfg.sizeof_bts;
243 int ds_get_bts_index(void *ds)
245 size_t index_offset_in_bytes;
247 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
250 index_offset_in_bytes =
252 get_bts_buffer_base(ds);
254 return index_offset_in_bytes / ds_cfg.sizeof_bts;
257 int ds_read_bts(void *ds, size_t index, struct bts_struct *out)
261 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
267 if (index >= ds_get_bts_size(ds))
270 bts = get_bts_buffer_base(ds);
271 bts = (char *)bts + (index * ds_cfg.sizeof_bts);
273 memset(out, 0, sizeof(*out));
274 if (get_from_ip(bts) == BTS_ESCAPE_ADDRESS) {
275 out->qualifier = get_info_type(bts);
276 out->variant.jiffies = get_info_data(bts);
278 out->qualifier = BTS_BRANCH;
279 out->variant.lbr.from_ip = get_from_ip(bts);
280 out->variant.lbr.to_ip = get_to_ip(bts);
286 int ds_write_bts(void *ds, const struct bts_struct *in)
290 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
293 if (ds_get_bts_size(ds) <= 0)
296 bts = get_bts_index(ds);
298 memset(bts, 0, ds_cfg.sizeof_bts);
299 switch (in->qualifier) {
304 set_from_ip(bts, in->variant.lbr.from_ip);
305 set_to_ip(bts, in->variant.lbr.to_ip);
308 case BTS_TASK_ARRIVES:
309 case BTS_TASK_DEPARTS:
310 set_from_ip(bts, BTS_ESCAPE_ADDRESS);
311 set_info_type(bts, in->qualifier);
312 set_info_data(bts, in->variant.jiffies);
319 bts = (char *)bts + ds_cfg.sizeof_bts;
320 if (bts >= get_bts_absolute_maximum(ds))
321 bts = get_bts_buffer_base(ds);
322 set_bts_index(ds, bts);
327 unsigned long ds_debugctl_mask(void)
329 return ds_cfg.debugctl_mask;
333 static const struct ds_configuration ds_cfg_netburst = {
335 .bts_buffer_base = { 0, 4 },
336 .bts_index = { 4, 4 },
337 .bts_absolute_maximum = { 8, 4 },
338 .bts_interrupt_threshold = { 12, 4 },
342 .info_type = { 4, 1 },
343 .info_data = { 8, 4 },
344 .debugctl_mask = (1<<2)|(1<<3)
347 static const struct ds_configuration ds_cfg_pentium_m = {
349 .bts_buffer_base = { 0, 4 },
350 .bts_index = { 4, 4 },
351 .bts_absolute_maximum = { 8, 4 },
352 .bts_interrupt_threshold = { 12, 4 },
356 .info_type = { 4, 1 },
357 .info_data = { 8, 4 },
358 .debugctl_mask = (1<<6)|(1<<7)
362 static const struct ds_configuration ds_cfg_core2 = {
364 .bts_buffer_base = { 0, 8 },
365 .bts_index = { 8, 8 },
366 .bts_absolute_maximum = { 16, 8 },
367 .bts_interrupt_threshold = { 24, 8 },
371 .info_type = { 8, 1 },
372 .info_data = { 16, 8 },
373 .debugctl_mask = (1<<6)|(1<<7)|(1<<9)
377 ds_configure(const struct ds_configuration *cfg)
382 void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
386 switch (c->x86_model) {
389 case 0xE: /* Pentium M */
390 ds_configure(&ds_cfg_pentium_m);
393 case 0xF: /* Core2 */
394 ds_configure(&ds_cfg_core2);
397 /* sorry, don't know about them */
402 switch (c->x86_model) {
406 case 0x2: /* Netburst */
407 ds_configure(&ds_cfg_netburst);
411 /* sorry, don't know about them */
416 /* sorry, don't know about them */