2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
10 * entry.S contains the system-call and fault low-level handling routines.
12 * Some of this is documented in Documentation/x86/entry_64.txt
14 * NOTE: This code handles signal-recognition, which happens every time
15 * after an interrupt and after each system call.
17 * A note on terminology:
18 * - iret frame: Architecture defined interrupt frame from SS to RIP
19 * at the top of the kernel process stack.
22 * - CFI macros are used to generate dwarf2 unwind information for better
23 * backtraces. They don't change any code.
24 * - ENTRY/END Define functions in the symbol table.
25 * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
26 * - idtentry - Define exception entry points.
29 #include <linux/linkage.h>
30 #include <asm/segment.h>
31 #include <asm/cache.h>
32 #include <asm/errno.h>
33 #include <asm/dwarf2.h>
34 #include <asm/calling.h>
35 #include <asm/asm-offsets.h>
37 #include <asm/unistd.h>
38 #include <asm/thread_info.h>
39 #include <asm/hw_irq.h>
40 #include <asm/page_types.h>
41 #include <asm/irqflags.h>
42 #include <asm/paravirt.h>
43 #include <asm/percpu.h>
45 #include <asm/context_tracking.h>
47 #include <asm/pgtable_types.h>
48 #include <linux/err.h>
50 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
51 #include <linux/elf-em.h>
52 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
53 #define __AUDIT_ARCH_64BIT 0x80000000
54 #define __AUDIT_ARCH_LE 0x40000000
57 .section .entry.text, "ax"
60 #ifndef CONFIG_PREEMPT
61 #define retint_kernel retint_restore_args
64 #ifdef CONFIG_PARAVIRT
65 ENTRY(native_usergs_sysret64)
68 ENDPROC(native_usergs_sysret64)
69 #endif /* CONFIG_PARAVIRT */
72 .macro TRACE_IRQS_IRETQ
73 #ifdef CONFIG_TRACE_IRQFLAGS
74 bt $9,EFLAGS(%rsp) /* interrupts off? */
82 * When dynamic function tracer is enabled it will add a breakpoint
83 * to all locations that it is about to modify, sync CPUs, update
84 * all the code, sync CPUs, then remove the breakpoints. In this time
85 * if lockdep is enabled, it might jump back into the debug handler
86 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
88 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
89 * make sure the stack pointer does not get reset back to the top
90 * of the debug stack, and instead just reuses the current stack.
92 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
94 .macro TRACE_IRQS_OFF_DEBUG
95 call debug_stack_set_zero
97 call debug_stack_reset
100 .macro TRACE_IRQS_ON_DEBUG
101 call debug_stack_set_zero
103 call debug_stack_reset
106 .macro TRACE_IRQS_IRETQ_DEBUG
107 bt $9,EFLAGS(%rsp) /* interrupts off? */
114 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
115 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
116 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
122 .macro EMPTY_FRAME start=1 offset=0
126 CFI_DEF_CFA rsp,8+\offset
128 CFI_DEF_CFA_OFFSET 8+\offset
133 * initial frame state for interrupts (and exceptions without error code)
135 .macro INTR_FRAME start=1 offset=0
136 EMPTY_FRAME \start, 5*8+\offset
137 /*CFI_REL_OFFSET ss, 4*8+\offset*/
138 CFI_REL_OFFSET rsp, 3*8+\offset
139 /*CFI_REL_OFFSET rflags, 2*8+\offset*/
140 /*CFI_REL_OFFSET cs, 1*8+\offset*/
141 CFI_REL_OFFSET rip, 0*8+\offset
145 * initial frame state for exceptions with error code (and interrupts
146 * with vector already pushed)
148 .macro XCPT_FRAME start=1 offset=0
149 INTR_FRAME \start, 1*8+\offset
153 * frame that enables passing a complete pt_regs to a C function.
155 .macro DEFAULT_FRAME start=1 offset=0
156 XCPT_FRAME \start, ORIG_RAX+\offset
157 CFI_REL_OFFSET rdi, RDI+\offset
158 CFI_REL_OFFSET rsi, RSI+\offset
159 CFI_REL_OFFSET rdx, RDX+\offset
160 CFI_REL_OFFSET rcx, RCX+\offset
161 CFI_REL_OFFSET rax, RAX+\offset
162 CFI_REL_OFFSET r8, R8+\offset
163 CFI_REL_OFFSET r9, R9+\offset
164 CFI_REL_OFFSET r10, R10+\offset
165 CFI_REL_OFFSET r11, R11+\offset
166 CFI_REL_OFFSET rbx, RBX+\offset
167 CFI_REL_OFFSET rbp, RBP+\offset
168 CFI_REL_OFFSET r12, R12+\offset
169 CFI_REL_OFFSET r13, R13+\offset
170 CFI_REL_OFFSET r14, R14+\offset
171 CFI_REL_OFFSET r15, R15+\offset
175 * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.
177 * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
178 * then loads new ss, cs, and rip from previously programmed MSRs.
179 * rflags gets masked by a value from another MSR (so CLD and CLAC
180 * are not needed). SYSCALL does not save anything on the stack
181 * and does not change rsp.
183 * Registers on entry:
184 * rax system call number
186 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
190 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
193 * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)
195 * Only called from user space.
197 * When user can change pt_regs->foo always force IRET. That is because
198 * it deals with uncanonical addresses better. SYSRET has trouble
199 * with them due to bugs in both AMD and Intel CPUs.
207 /*CFI_REGISTER rflags,r11*/
210 * Interrupts are off on entry.
211 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
212 * it is too small to ever cause noticeable irq latency.
216 * A hypervisor implementation might want to use a label
217 * after the swapgs, so that it can do the swapgs
218 * for the guest and jump here on syscall.
220 GLOBAL(system_call_after_swapgs)
222 movq %rsp,PER_CPU_VAR(rsp_scratch)
223 movq PER_CPU_VAR(kernel_stack),%rsp
225 /* Construct struct pt_regs on stack */
226 pushq_cfi $__USER_DS /* pt_regs->ss */
227 pushq_cfi PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
229 * Re-enable interrupts.
230 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
231 * must execute atomically in the face of possible interrupt-driven
232 * task preemption. We must enable interrupts only after we're done
233 * with using rsp_scratch:
235 ENABLE_INTERRUPTS(CLBR_NONE)
236 pushq_cfi %r11 /* pt_regs->flags */
237 pushq_cfi $__USER_CS /* pt_regs->cs */
238 pushq_cfi %rcx /* pt_regs->ip */
240 pushq_cfi_reg rax /* pt_regs->orig_ax */
241 pushq_cfi_reg rdi /* pt_regs->di */
242 pushq_cfi_reg rsi /* pt_regs->si */
243 pushq_cfi_reg rdx /* pt_regs->dx */
244 pushq_cfi_reg rcx /* pt_regs->cx */
245 pushq_cfi $-ENOSYS /* pt_regs->ax */
246 pushq_cfi_reg r8 /* pt_regs->r8 */
247 pushq_cfi_reg r9 /* pt_regs->r9 */
248 pushq_cfi_reg r10 /* pt_regs->r10 */
249 pushq_cfi_reg r11 /* pt_regs->r11 */
250 sub $(6*8),%rsp /* pt_regs->bp,bx,r12-15 not saved */
251 CFI_ADJUST_CFA_OFFSET 6*8
253 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
255 system_call_fastpath:
256 #if __SYSCALL_MASK == ~0
257 cmpq $__NR_syscall_max,%rax
259 andl $__SYSCALL_MASK,%eax
260 cmpl $__NR_syscall_max,%eax
262 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
264 call *sys_call_table(,%rax,8)
268 * Syscall return path ending with SYSRET (fast path).
269 * Has incompletely filled pt_regs.
272 DISABLE_INTERRUPTS(CLBR_NONE)
276 * We must check ti flags with interrupts (or at least preemption)
277 * off because we must *never* return to userspace without
278 * processing exit work that is enqueued if we're preempted here.
279 * In particular, returning to userspace with any of the one-shot
280 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
283 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
284 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
288 * sysretq will re-enable interrupts:
291 RESTORE_C_REGS_EXCEPT_RCX_R11
294 movq EFLAGS(%rsp),%r11
295 /*CFI_REGISTER rflags,r11*/
298 * 64bit SYSRET restores rip from rcx,
299 * rflags from r11 (but RF and VM bits are forced to 0),
300 * cs and ss are loaded from MSRs.
306 /* Do syscall entry tracing */
309 movl $AUDIT_ARCH_X86_64, %esi
310 call syscall_trace_enter_phase1
312 jnz tracesys_phase2 /* if needed, run the slow path */
313 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
314 movq ORIG_RAX(%rsp), %rax
315 jmp system_call_fastpath /* and return to the fast path */
320 movl $AUDIT_ARCH_X86_64, %esi
322 call syscall_trace_enter_phase2
325 * Reload registers from stack in case ptrace changed them.
326 * We don't reload %rax because syscall_trace_entry_phase2() returned
327 * the value it wants us to use in the table lookup.
329 RESTORE_C_REGS_EXCEPT_RAX
331 #if __SYSCALL_MASK == ~0
332 cmpq $__NR_syscall_max,%rax
334 andl $__SYSCALL_MASK,%eax
335 cmpl $__NR_syscall_max,%eax
337 ja int_ret_from_sys_call /* RAX(%rsp) is already set */
338 movq %r10,%rcx /* fixup for C */
339 call *sys_call_table(,%rax,8)
341 /* Use IRET because user could have changed pt_regs->foo */
344 * Syscall return path ending with IRET.
345 * Has correct iret frame.
347 GLOBAL(int_ret_from_sys_call)
348 DISABLE_INTERRUPTS(CLBR_NONE)
350 int_ret_from_sys_call_irqs_off:
351 movl $_TIF_ALLWORK_MASK,%edi
352 /* edi: mask to check */
353 GLOBAL(int_with_check)
355 GET_THREAD_INFO(%rcx)
356 movl TI_flags(%rcx),%edx
359 andl $~TS_COMPAT,TI_status(%rcx)
362 /* Either reschedule or signal or syscall exit tracking needed. */
363 /* First do a reschedule test. */
364 /* edx: work, edi: workmask */
366 bt $TIF_NEED_RESCHED,%edx
369 ENABLE_INTERRUPTS(CLBR_NONE)
373 DISABLE_INTERRUPTS(CLBR_NONE)
377 /* handle signals and tracing -- both require a full pt_regs */
380 ENABLE_INTERRUPTS(CLBR_NONE)
382 /* Check for syscall exit trace */
383 testl $_TIF_WORK_SYSCALL_EXIT,%edx
386 leaq 8(%rsp),%rdi # &ptregs -> arg1
387 call syscall_trace_leave
389 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
393 testl $_TIF_DO_NOTIFY_MASK,%edx
395 movq %rsp,%rdi # &ptregs -> arg1
396 xorl %esi,%esi # oldset -> arg2
397 call do_notify_resume
398 1: movl $_TIF_WORK_MASK,%edi
401 DISABLE_INTERRUPTS(CLBR_NONE)
407 .macro FORK_LIKE func
410 DEFAULT_FRAME 0, 8 /* offset 8: return address */
430 jmp int_ret_from_sys_call
442 jmp int_ret_from_sys_call
447 * sigreturn is special because it needs to restore all registers on return.
448 * This cannot be done with SYSRET, so use the IRET return path instead.
450 ENTRY(stub_rt_sigreturn)
455 call sys_rt_sigreturn
456 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
458 jmp int_ret_from_sys_call
460 END(stub_rt_sigreturn)
462 #ifdef CONFIG_X86_X32_ABI
463 ENTRY(stub_x32_rt_sigreturn)
468 call sys32_x32_rt_sigreturn
469 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
471 jmp int_ret_from_sys_call
473 END(stub_x32_rt_sigreturn)
475 ENTRY(stub_x32_execve)
480 call compat_sys_execve
483 jmp int_ret_from_sys_call
487 ENTRY(stub_x32_execveat)
492 call compat_sys_execveat
495 jmp int_ret_from_sys_call
497 END(stub_x32_execveat)
502 * A newly forked process directly context switches into this address.
504 * rdi: prev task we switched from
509 LOCK ; btr $TIF_FORK,TI_flags(%r8)
512 popfq_cfi # reset kernel eflags
514 call schedule_tail # rdi: 'prev' task parameter
516 GET_THREAD_INFO(%rcx)
520 testl $3,CS(%rsp) # from kernel_thread?
524 * By the time we get here, we have no idea whether our pt_regs,
525 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
526 * the slow path, or one of the ia32entry paths.
527 * Use int_ret_from_sys_call to return, since it can safely handle
530 jmp int_ret_from_sys_call
537 jmp int_ret_from_sys_call
542 * Build the entry stubs and pointer table with some assembler magic.
543 * We pack 7 stubs into a single 32-byte chunk, which will fit in a
544 * single cache line on all modern x86 implementations.
546 .section .init.rodata,"a"
550 .p2align CONFIG_X86_L1_CACHE_SHIFT
551 ENTRY(irq_entries_start)
553 vector=FIRST_EXTERNAL_VECTOR
554 .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7
557 .if vector < FIRST_SYSTEM_VECTOR
558 .if vector <> FIRST_EXTERNAL_VECTOR
559 CFI_ADJUST_CFA_OFFSET -8
561 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
562 .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
571 2: jmp common_interrupt
574 END(irq_entries_start)
581 * Interrupt entry/exit.
583 * Interrupt entry points save only callee clobbered registers in fast path.
585 * Entry runs with interrupts off.
588 /* 0(%rsp): ~(interrupt number) */
589 .macro interrupt func
592 * Since nothing in interrupt handling code touches r12...r15 members
593 * of "struct pt_regs", and since interrupts can nest, we can save
594 * four stack slots and simultaneously provide
595 * an unwind-friendly stack layout by saving "truncated" pt_regs
596 * exactly up to rbp slot, without these members.
598 ALLOC_PT_GPREGS_ON_STACK -RBP
600 /* this goes to 0(%rsp) for unwinder, not for saving the value: */
601 SAVE_EXTRA_REGS_RBP -RBP
603 leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
605 testl $3, CS-RBP(%rsp)
610 * Save previous stack pointer, optionally switch to interrupt stack.
611 * irq_count is used to check if a CPU is already on an interrupt stack
612 * or not. While this is essentially redundant with preempt_count it is
613 * a little cheaper to use a separate counter in the PDA (short of
614 * moving irq_enter into assembly, which would be too much work)
617 incl PER_CPU_VAR(irq_count)
618 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
619 CFI_DEF_CFA_REGISTER rsi
623 * "CFA (Current Frame Address) is the value on stack + offset"
625 CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
626 0x77 /* DW_OP_breg7 (rsp) */, 0, \
627 0x06 /* DW_OP_deref */, \
628 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \
629 0x22 /* DW_OP_plus */
630 /* We entered an interrupt context - irqs are off: */
637 * The interrupt stubs push (~vector+0x80) onto the stack and
638 * then jump to common_interrupt.
640 .p2align CONFIG_X86_L1_CACHE_SHIFT
644 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
646 /* 0(%rsp): old RSP */
648 DISABLE_INTERRUPTS(CLBR_NONE)
650 decl PER_CPU_VAR(irq_count)
652 /* Restore saved previous stack */
654 CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */
655 /* return code expects complete pt_regs - adjust rsp accordingly: */
657 CFI_DEF_CFA_REGISTER rsp
658 CFI_ADJUST_CFA_OFFSET RBP
661 GET_THREAD_INFO(%rcx)
665 /* Interrupt came from user space */
667 * Has a correct top of stack.
668 * %rcx: thread info. Interrupts off.
670 retint_with_reschedule:
671 movl $_TIF_WORK_MASK,%edi
674 movl TI_flags(%rcx),%edx
679 retint_swapgs: /* return to user-space */
681 * The iretq could re-enable interrupts:
683 DISABLE_INTERRUPTS(CLBR_ANY)
687 * Try to use SYSRET instead of IRET if we're returning to
688 * a completely clean 64-bit userspace context.
691 cmpq %rcx,RIP(%rsp) /* RCX == RIP */
692 jne opportunistic_sysret_failed
695 * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP
696 * in kernel space. This essentially lets the user take over
697 * the kernel, since userspace controls RSP. It's not worth
698 * testing for canonicalness exactly -- this check detects any
699 * of the 17 high bits set, which is true for non-canonical
700 * or kernel addresses. (This will pessimize vsyscall=native.
703 * If virtual addresses ever become wider, this will need
704 * to be updated to remain correct on both old and new CPUs.
706 .ifne __VIRTUAL_MASK_SHIFT - 47
707 .error "virtual address width changed -- sysret checks need update"
709 shr $__VIRTUAL_MASK_SHIFT, %rcx
710 jnz opportunistic_sysret_failed
712 cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
713 jne opportunistic_sysret_failed
716 cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
717 jne opportunistic_sysret_failed
719 testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */
720 jnz opportunistic_sysret_failed
722 /* nothing to check for RSP */
724 cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
725 jne opportunistic_sysret_failed
728 * We win! This label is here just for ease of understanding
729 * perf profiles. Nothing jumps here.
731 irq_return_via_sysret:
733 /* r11 is already restored (see code above) */
734 RESTORE_C_REGS_EXCEPT_R11
739 opportunistic_sysret_failed:
743 /* Returning to kernel space */
744 #ifdef CONFIG_PREEMPT
745 /* Interrupts are off */
746 /* Check if we need preemption */
748 cmpl $0,PER_CPU_VAR(__preempt_count)
749 jnz retint_restore_args
750 bt $9,EFLAGS(%rsp) /* interrupts were off? */
751 jnc retint_restore_args
752 call preempt_schedule_irq
756 DISABLE_INTERRUPTS(CLBR_ANY)
758 * The iretq could re-enable interrupts:
763 REMOVE_PT_GPREGS_FROM_STACK 8
770 * Are we returning to a stack segment from the LDT? Note: in
771 * 64-bit mode SS:RSP on the exception stack is always valid.
773 #ifdef CONFIG_X86_ESPFIX64
774 testb $4,(SS-RIP)(%rsp)
775 jnz native_irq_return_ldt
778 .global native_irq_return_iret
779 native_irq_return_iret:
781 * This may fault. Non-paranoid faults on return to userspace are
782 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
783 * Double-faults due to espfix64 are handled in do_double_fault.
784 * Other faults here are fatal.
788 #ifdef CONFIG_X86_ESPFIX64
789 native_irq_return_ldt:
793 movq PER_CPU_VAR(espfix_waddr),%rdi
794 movq %rax,(0*8)(%rdi) /* RAX */
795 movq (2*8)(%rsp),%rax /* RIP */
796 movq %rax,(1*8)(%rdi)
797 movq (3*8)(%rsp),%rax /* CS */
798 movq %rax,(2*8)(%rdi)
799 movq (4*8)(%rsp),%rax /* RFLAGS */
800 movq %rax,(3*8)(%rdi)
801 movq (6*8)(%rsp),%rax /* SS */
802 movq %rax,(5*8)(%rdi)
803 movq (5*8)(%rsp),%rax /* RSP */
804 movq %rax,(4*8)(%rdi)
805 andl $0xffff0000,%eax
807 orq PER_CPU_VAR(espfix_stack),%rax
811 jmp native_irq_return_iret
814 /* edi: workmask, edx: work */
817 bt $TIF_NEED_RESCHED,%edx
820 ENABLE_INTERRUPTS(CLBR_NONE)
824 GET_THREAD_INFO(%rcx)
825 DISABLE_INTERRUPTS(CLBR_NONE)
830 testl $_TIF_DO_NOTIFY_MASK,%edx
833 ENABLE_INTERRUPTS(CLBR_NONE)
835 movq $-1,ORIG_RAX(%rsp)
836 xorl %esi,%esi # oldset
837 movq %rsp,%rdi # &pt_regs
838 call do_notify_resume
840 DISABLE_INTERRUPTS(CLBR_NONE)
842 GET_THREAD_INFO(%rcx)
843 jmp retint_with_reschedule
846 END(common_interrupt)
851 .macro apicinterrupt3 num sym do_sym
863 #ifdef CONFIG_TRACING
864 #define trace(sym) trace_##sym
865 #define smp_trace(sym) smp_trace_##sym
867 .macro trace_apicinterrupt num sym
868 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
871 .macro trace_apicinterrupt num sym do_sym
875 .macro apicinterrupt num sym do_sym
876 apicinterrupt3 \num \sym \do_sym
877 trace_apicinterrupt \num \sym
881 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \
882 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
883 apicinterrupt3 REBOOT_VECTOR \
884 reboot_interrupt smp_reboot_interrupt
888 apicinterrupt3 UV_BAU_MESSAGE \
889 uv_bau_message_intr1 uv_bau_message_interrupt
891 apicinterrupt LOCAL_TIMER_VECTOR \
892 apic_timer_interrupt smp_apic_timer_interrupt
893 apicinterrupt X86_PLATFORM_IPI_VECTOR \
894 x86_platform_ipi smp_x86_platform_ipi
896 #ifdef CONFIG_HAVE_KVM
897 apicinterrupt3 POSTED_INTR_VECTOR \
898 kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
901 #ifdef CONFIG_X86_MCE_THRESHOLD
902 apicinterrupt THRESHOLD_APIC_VECTOR \
903 threshold_interrupt smp_threshold_interrupt
906 #ifdef CONFIG_X86_THERMAL_VECTOR
907 apicinterrupt THERMAL_APIC_VECTOR \
908 thermal_interrupt smp_thermal_interrupt
912 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
913 call_function_single_interrupt smp_call_function_single_interrupt
914 apicinterrupt CALL_FUNCTION_VECTOR \
915 call_function_interrupt smp_call_function_interrupt
916 apicinterrupt RESCHEDULE_VECTOR \
917 reschedule_interrupt smp_reschedule_interrupt
920 apicinterrupt ERROR_APIC_VECTOR \
921 error_interrupt smp_error_interrupt
922 apicinterrupt SPURIOUS_APIC_VECTOR \
923 spurious_interrupt smp_spurious_interrupt
925 #ifdef CONFIG_IRQ_WORK
926 apicinterrupt IRQ_WORK_VECTOR \
927 irq_work_interrupt smp_irq_work_interrupt
931 * Exception entry points.
933 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
935 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
938 .if \shift_ist != -1 && \paranoid == 0
939 .error "using shift_ist requires paranoid=1"
949 PARAVIRT_ADJUST_EXCEPTION_FRAME
951 .ifeq \has_error_code
952 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
955 ALLOC_PT_GPREGS_ON_STACK
960 testl $3, CS(%rsp) /* If coming from userspace, switch */
967 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
973 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
979 movq %rsp,%rdi /* pt_regs pointer */
982 movq ORIG_RAX(%rsp),%rsi /* get error code */
983 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
985 xorl %esi,%esi /* no error code */
989 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
995 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
998 /* these procedures expect "no swapgs" flag in ebx */
1008 * Paranoid entry from userspace. Switch stacks and treat it
1009 * as a normal entry. This means that paranoid handlers
1010 * run in real process context if user_mode(regs).
1017 movq %rsp,%rdi /* pt_regs pointer */
1019 movq %rax,%rsp /* switch stack */
1021 movq %rsp,%rdi /* pt_regs pointer */
1024 movq ORIG_RAX(%rsp),%rsi /* get error code */
1025 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1027 xorl %esi,%esi /* no error code */
1032 jmp error_exit /* %ebx: no swapgs flag */
1039 #ifdef CONFIG_TRACING
1040 .macro trace_idtentry sym do_sym has_error_code:req
1041 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
1042 idtentry \sym \do_sym has_error_code=\has_error_code
1045 .macro trace_idtentry sym do_sym has_error_code:req
1046 idtentry \sym \do_sym has_error_code=\has_error_code
1050 idtentry divide_error do_divide_error has_error_code=0
1051 idtentry overflow do_overflow has_error_code=0
1052 idtentry bounds do_bounds has_error_code=0
1053 idtentry invalid_op do_invalid_op has_error_code=0
1054 idtentry device_not_available do_device_not_available has_error_code=0
1055 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1056 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1057 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1058 idtentry segment_not_present do_segment_not_present has_error_code=1
1059 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1060 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1061 idtentry alignment_check do_alignment_check has_error_code=1
1062 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1065 /* Reload gs selector with exception handling */
1066 /* edi: new selector */
1067 ENTRY(native_load_gs_index)
1070 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1074 2: mfence /* workaround */
1079 END(native_load_gs_index)
1081 _ASM_EXTABLE(gs_change,bad_gs)
1082 .section .fixup,"ax"
1083 /* running with kernelgs */
1085 SWAPGS /* switch back to user gs */
1091 /* Call softirq on interrupt stack. Interrupts are off. */
1092 ENTRY(do_softirq_own_stack)
1095 CFI_REL_OFFSET rbp,0
1097 CFI_DEF_CFA_REGISTER rbp
1098 incl PER_CPU_VAR(irq_count)
1099 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
1100 push %rbp # backlink for old unwinder
1104 CFI_DEF_CFA_REGISTER rsp
1105 CFI_ADJUST_CFA_OFFSET -8
1106 decl PER_CPU_VAR(irq_count)
1109 END(do_softirq_own_stack)
1112 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1115 * A note on the "critical region" in our callback handler.
1116 * We want to avoid stacking callback handlers due to events occurring
1117 * during handling of the last event. To do this, we keep events disabled
1118 * until we've done all processing. HOWEVER, we must enable events before
1119 * popping the stack frame (can't be done atomically) and so it would still
1120 * be possible to get enough handler activations to overflow the stack.
1121 * Although unlikely, bugs of that kind are hard to track down, so we'd
1122 * like to avoid the possibility.
1123 * So, on entry to the handler we detect whether we interrupted an
1124 * existing activation in its critical region -- if so, we pop the current
1125 * activation and restart the handler using the previous one.
1127 ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1130 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1131 * see the correct pointer to the pt_regs
1133 movq %rdi, %rsp # we don't return, adjust the stack frame
1136 11: incl PER_CPU_VAR(irq_count)
1138 CFI_DEF_CFA_REGISTER rbp
1139 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
1140 pushq %rbp # backlink for old unwinder
1141 call xen_evtchn_do_upcall
1143 CFI_DEF_CFA_REGISTER rsp
1144 decl PER_CPU_VAR(irq_count)
1145 #ifndef CONFIG_PREEMPT
1146 call xen_maybe_preempt_hcall
1150 END(xen_do_hypervisor_callback)
1153 * Hypervisor uses this for application faults while it executes.
1154 * We get here for two reasons:
1155 * 1. Fault while reloading DS, ES, FS or GS
1156 * 2. Fault while executing IRET
1157 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1158 * registers that could be reloaded and zeroed the others.
1159 * Category 2 we fix up by killing the current process. We cannot use the
1160 * normal Linux return path in this case because if we use the IRET hypercall
1161 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1162 * We distinguish between categories by comparing each saved segment register
1163 * with its current contents: any discrepancy means we in category 1.
1165 ENTRY(xen_failsafe_callback)
1167 /*CFI_REL_OFFSET gs,GS*/
1168 /*CFI_REL_OFFSET fs,FS*/
1169 /*CFI_REL_OFFSET es,ES*/
1170 /*CFI_REL_OFFSET ds,DS*/
1171 CFI_REL_OFFSET r11,8
1172 CFI_REL_OFFSET rcx,0
1186 /* All segments match their saved values => Category 2 (Bad IRET). */
1192 CFI_ADJUST_CFA_OFFSET -0x30
1193 pushq_cfi $0 /* RIP */
1196 jmp general_protection
1198 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1204 CFI_ADJUST_CFA_OFFSET -0x30
1205 pushq_cfi $-1 /* orig_ax = -1 => not a system call */
1206 ALLOC_PT_GPREGS_ON_STACK
1211 END(xen_failsafe_callback)
1213 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1214 xen_hvm_callback_vector xen_evtchn_do_upcall
1216 #endif /* CONFIG_XEN */
1218 #if IS_ENABLED(CONFIG_HYPERV)
1219 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1220 hyperv_callback_vector hyperv_vector_handler
1221 #endif /* CONFIG_HYPERV */
1223 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1224 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1225 idtentry stack_segment do_stack_segment has_error_code=1
1227 idtentry xen_debug do_debug has_error_code=0
1228 idtentry xen_int3 do_int3 has_error_code=0
1229 idtentry xen_stack_segment do_stack_segment has_error_code=1
1231 idtentry general_protection do_general_protection has_error_code=1
1232 trace_idtentry page_fault do_page_fault has_error_code=1
1233 #ifdef CONFIG_KVM_GUEST
1234 idtentry async_page_fault do_async_page_fault has_error_code=1
1236 #ifdef CONFIG_X86_MCE
1237 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1241 * Save all registers in pt_regs, and switch gs if needed.
1242 * Use slow, but surefire "are we in kernel?" check.
1243 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1245 ENTRY(paranoid_entry)
1251 movl $MSR_GS_BASE,%ecx
1254 js 1f /* negative -> in kernel */
1262 * "Paranoid" exit path from exception stack. This is invoked
1263 * only on return from non-NMI IST interrupts that came
1264 * from kernel space.
1266 * We may be returning to very strange contexts (e.g. very early
1267 * in syscall entry), so checking for preemption here would
1268 * be complicated. Fortunately, we there's no good reason
1269 * to try to handle preemption here.
1271 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1272 ENTRY(paranoid_exit)
1274 DISABLE_INTERRUPTS(CLBR_NONE)
1275 TRACE_IRQS_OFF_DEBUG
1276 testl %ebx,%ebx /* swapgs needed? */
1277 jnz paranoid_exit_no_swapgs
1280 jmp paranoid_exit_restore
1281 paranoid_exit_no_swapgs:
1282 TRACE_IRQS_IRETQ_DEBUG
1283 paranoid_exit_restore:
1286 REMOVE_PT_GPREGS_FROM_STACK 8
1292 * Save all registers in pt_regs, and switch gs if needed.
1293 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1302 je error_kernelspace
1310 * There are two places in the kernel that can potentially fault with
1311 * usergs. Handle them here. B stepping K8s sometimes report a
1312 * truncated RIP for IRET exceptions returning to compat mode. Check
1313 * for these here too.
1316 CFI_REL_OFFSET rcx, RCX+8
1318 leaq native_irq_return_iret(%rip),%rcx
1319 cmpq %rcx,RIP+8(%rsp)
1321 movl %ecx,%eax /* zero extend */
1322 cmpq %rax,RIP+8(%rsp)
1324 cmpq $gs_change,RIP+8(%rsp)
1329 /* Fix truncated RIP */
1330 movq %rcx,RIP+8(%rsp)
1338 decl %ebx /* Return to usergs */
1344 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1349 DISABLE_INTERRUPTS(CLBR_NONE)
1351 GET_THREAD_INFO(%rcx)
1354 LOCKDEP_SYS_EXIT_IRQ
1355 movl TI_flags(%rcx),%edx
1356 movl $_TIF_WORK_MASK,%edi
1364 * Test if a given stack is an NMI stack or not.
1366 .macro test_in_nmi reg stack nmi_ret normal_ret
1369 subq $EXCEPTION_STKSZ, %\reg
1375 /* runs on exception stack */
1378 PARAVIRT_ADJUST_EXCEPTION_FRAME
1380 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1381 * the iretq it performs will take us out of NMI context.
1382 * This means that we can have nested NMIs where the next
1383 * NMI is using the top of the stack of the previous NMI. We
1384 * can't let it execute because the nested NMI will corrupt the
1385 * stack of the previous NMI. NMI handlers are not re-entrant
1388 * To handle this case we do the following:
1389 * Check the a special location on the stack that contains
1390 * a variable that is set when NMIs are executing.
1391 * The interrupted task's stack is also checked to see if it
1393 * If the variable is not set and the stack is not the NMI
1395 * o Set the special variable on the stack
1396 * o Copy the interrupt frame into a "saved" location on the stack
1397 * o Copy the interrupt frame into a "copy" location on the stack
1398 * o Continue processing the NMI
1399 * If the variable is set or the previous stack is the NMI stack:
1400 * o Modify the "copy" location to jump to the repeate_nmi
1401 * o return back to the first NMI
1403 * Now on exit of the first NMI, we first clear the stack variable
1404 * The NMI stack will tell any nested NMIs at that point that it is
1405 * nested. Then we pop the stack normally with iret, and if there was
1406 * a nested NMI that updated the copy interrupt stack frame, a
1407 * jump will be made to the repeat_nmi code that will handle the second
1411 /* Use %rdx as our temp variable throughout */
1413 CFI_REL_OFFSET rdx, 0
1416 * If %cs was not the kernel segment, then the NMI triggered in user
1417 * space, which means it is definitely not nested.
1419 cmpl $__KERNEL_CS, 16(%rsp)
1423 * Check the special variable on the stack to see if NMIs are
1430 * Now test if the previous stack was an NMI stack.
1431 * We need the double check. We check the NMI stack to satisfy the
1432 * race when the first NMI clears the variable before returning.
1433 * We check the variable because the first NMI could be in a
1434 * breakpoint routine using a breakpoint stack.
1437 test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi
1442 * Do nothing if we interrupted the fixup in repeat_nmi.
1443 * It's about to repeat the NMI handler, so we are fine
1444 * with ignoring this one.
1446 movq $repeat_nmi, %rdx
1449 movq $end_repeat_nmi, %rdx
1454 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
1455 leaq -1*8(%rsp), %rdx
1457 CFI_ADJUST_CFA_OFFSET 1*8
1458 leaq -10*8(%rsp), %rdx
1459 pushq_cfi $__KERNEL_DS
1462 pushq_cfi $__KERNEL_CS
1463 pushq_cfi $repeat_nmi
1465 /* Put stack back */
1467 CFI_ADJUST_CFA_OFFSET -6*8
1473 /* No need to check faults here */
1479 * Because nested NMIs will use the pushed location that we
1480 * stored in rdx, we must keep that space available.
1481 * Here's what our stack frame will look like:
1482 * +-------------------------+
1484 * | original Return RSP |
1485 * | original RFLAGS |
1488 * +-------------------------+
1489 * | temp storage for rdx |
1490 * +-------------------------+
1491 * | NMI executing variable |
1492 * +-------------------------+
1494 * | copied Return RSP |
1498 * +-------------------------+
1500 * | Saved Return RSP |
1504 * +-------------------------+
1506 * +-------------------------+
1508 * The saved stack frame is used to fix up the copied stack frame
1509 * that a nested NMI may change to make the interrupted NMI iret jump
1510 * to the repeat_nmi. The original stack frame and the temp storage
1511 * is also used by nested NMIs and can not be trusted on exit.
1513 /* Do not pop rdx, nested NMIs will corrupt that part of the stack */
1517 /* Set the NMI executing variable on the stack. */
1521 * Leave room for the "copied" frame
1524 CFI_ADJUST_CFA_OFFSET 5*8
1526 /* Copy the stack frame to the Saved frame */
1528 pushq_cfi 11*8(%rsp)
1530 CFI_DEF_CFA_OFFSET 5*8
1532 /* Everything up to here is safe from nested NMIs */
1535 * If there was a nested NMI, the first NMI's iret will return
1536 * here. But NMIs are still enabled and we can take another
1537 * nested NMI. The nested NMI checks the interrupted RIP to see
1538 * if it is between repeat_nmi and end_repeat_nmi, and if so
1539 * it will just return, as we are about to repeat an NMI anyway.
1540 * This makes it safe to copy to the stack frame that a nested
1545 * Update the stack variable to say we are still in NMI (the update
1546 * is benign for the non-repeat case, where 1 was pushed just above
1547 * to this very stack slot).
1551 /* Make another copy, this one may be modified by nested NMIs */
1553 CFI_ADJUST_CFA_OFFSET -10*8
1555 pushq_cfi -6*8(%rsp)
1558 CFI_DEF_CFA_OFFSET 5*8
1562 * Everything below this point can be preempted by a nested
1563 * NMI if the first NMI took an exception and reset our iret stack
1564 * so that we repeat another NMI.
1566 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1567 ALLOC_PT_GPREGS_ON_STACK
1570 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1571 * as we should not be calling schedule in NMI context.
1572 * Even with normal interrupts enabled. An NMI should not be
1573 * setting NEED_RESCHED or anything that normal interrupts and
1574 * exceptions might do.
1580 * Save off the CR2 register. If we take a page fault in the NMI then
1581 * it could corrupt the CR2 value. If the NMI preempts a page fault
1582 * handler before it was able to read the CR2 register, and then the
1583 * NMI itself takes a page fault, the page fault that was preempted
1584 * will read the information from the NMI page fault and not the
1585 * origin fault. Save it off and restore it if it changes.
1586 * Use the r12 callee-saved register.
1590 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1595 /* Did the NMI take a page fault? Restore cr2 if it did */
1602 testl %ebx,%ebx /* swapgs needed? */
1609 /* Pop the extra iret frame at once */
1610 REMOVE_PT_GPREGS_FROM_STACK 6*8
1612 /* Clear the NMI executing stack variable */
1618 ENTRY(ignore_sysret)