3 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/cache.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/setup.h>
20 #include <asm/processor-flags.h>
21 #include <asm/msr-index.h>
22 #include <asm/cpufeature.h>
23 #include <asm/percpu.h>
26 /* Physical address */
27 #define pa(X) ((X) - __PAGE_OFFSET)
30 * References to members of the new_cpu_data structure.
33 #define X86 new_cpu_data+CPUINFO_x86
34 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
35 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
36 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
37 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
38 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
39 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
40 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
43 * This is how much memory in addition to the memory covered up to
44 * and including _end we need mapped initially.
46 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
47 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
49 * Modulo rounding, each megabyte assigned here requires a kilobyte of
50 * memory, which is currently unreclaimed.
52 * This should be a multiple of a page.
54 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
55 * and small than max_low_pfn, otherwise will waste some page table entries
59 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
61 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
64 /* Number of possible pages in the lowmem region */
65 LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT)
67 /* Enough space to fit pagetables for the low memory linear map */
68 MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
71 * Worst-case size of the kernel mapping we need to make:
72 * a relocatable kernel can live anywhere in lowmem, so we need to be able
73 * to map all of lowmem.
75 KERNEL_PAGES = LOWMEM_PAGES
77 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
78 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
81 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
82 * %esi points to the real-mode code as a 32-bit pointer.
83 * CS and DS must be 4 GB flat segments, but we don't depend on
84 * any particular GDT layout, because we load our own as soon as we
89 movl pa(stack_start),%ecx
91 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
92 us to not reload segments */
93 testb $(1<<6), BP_loadflags(%esi)
97 * Set segments to known values.
99 lgdt pa(boot_gdt_descr)
100 movl $(__BOOT_DS),%eax
107 leal -__PAGE_OFFSET(%ecx),%esp
110 * Clear BSS first so that there are no surprises...
114 movl $pa(__bss_start),%edi
115 movl $pa(__bss_stop),%ecx
120 * Copy bootup parameters out of the way.
121 * Note: %esi still has the pointer to the real-mode data.
122 * With the kexec as boot loader, parameter segment might be loaded beyond
123 * kernel image and might not even be addressable by early boot page tables.
124 * (kexec on panic case). Hence copy out the parameters before initializing
127 movl $pa(boot_params),%edi
128 movl $(PARAM_SIZE/4),%ecx
132 movl pa(boot_params) + NEW_CL_POINTER,%esi
134 jz 1f # No command line
135 movl $pa(boot_command_line),%edi
136 movl $(COMMAND_LINE_SIZE/4),%ecx
142 /* save OFW's pgdir table for later use when calling into OFW */
144 movl %eax, pa(olpc_ofw_pgd)
148 * Initialize page tables. This creates a PDE and a set of page
149 * tables, which are located immediately beyond __brk_base. The variable
150 * _brk_end is set up to point to the first "safe" location.
151 * Mappings are created both at virtual address 0 (identity mapping)
152 * and PAGE_OFFSET for up to _end.
154 #ifdef CONFIG_X86_PAE
157 * In PAE mode initial_page_table is statically defined to contain
158 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
159 * entries). The identity mapping is handled by pointing two PGD entries
160 * to the first kernel PMD.
162 * Note the upper half of each PMD or PTE are always zero at this stage.
165 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
167 xorl %ebx,%ebx /* %ebx is kept at zero */
169 movl $pa(__brk_base), %edi
170 movl $pa(initial_pg_pmd), %edx
171 movl $PTE_IDENT_ATTR, %eax
173 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
174 movl %ecx,(%edx) /* Store PMD entry */
175 /* Upper half already zero */
187 * End condition: we must map up to the end + MAPPING_BEYOND_END.
189 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
193 addl $__PAGE_OFFSET, %edi
194 movl %edi, pa(_brk_end)
196 movl %eax, pa(max_pfn_mapped)
198 /* Do early initialization of the fixmap area */
199 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
200 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
203 page_pde_offset = (__PAGE_OFFSET >> 20);
205 movl $pa(__brk_base), %edi
206 movl $pa(initial_page_table), %edx
207 movl $PTE_IDENT_ATTR, %eax
209 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
210 movl %ecx,(%edx) /* Store identity PDE entry */
211 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
219 * End condition: we must map up to the end + MAPPING_BEYOND_END.
221 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
224 addl $__PAGE_OFFSET, %edi
225 movl %edi, pa(_brk_end)
227 movl %eax, pa(max_pfn_mapped)
229 /* Do early initialization of the fixmap area */
230 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
231 movl %eax,pa(initial_page_table+0xffc)
234 #ifdef CONFIG_PARAVIRT
235 /* This is can only trip for a broken bootloader... */
236 cmpw $0x207, pa(boot_params + BP_version)
239 /* Paravirt-compatible boot parameters. Look to see what architecture
240 we're booting under. */
241 movl pa(boot_params + BP_hardware_subarch), %eax
242 cmpl $num_subarch_entries, %eax
245 movl pa(subarch_entries)(,%eax,4), %eax
246 subl $__PAGE_OFFSET, %eax
252 /* Unknown implementation; there's really
253 nothing we can do at this point. */
259 .long default_entry /* normal x86/PC */
260 .long lguest_entry /* lguest hypervisor */
261 .long xen_entry /* Xen hypervisor */
262 .long default_entry /* Moorestown MID */
263 num_subarch_entries = (. - subarch_entries) / 4
267 #endif /* CONFIG_PARAVIRT */
269 #ifdef CONFIG_HOTPLUG_CPU
271 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
272 * up already except stack. We just set up stack here. Then call
276 movl stack_start, %ecx
283 * Non-boot CPU entry point; entered from trampoline.S
284 * We can't lgdt here, because lgdt itself uses a data segment, but
285 * we know the trampoline has already loaded the boot_gdt for us.
287 * If cpu hotplug is not supported then this code can go in init section
288 * which will be freed later
291 ENTRY(startup_32_smp)
293 movl $(__BOOT_DS),%eax
298 movl pa(stack_start),%ecx
300 leal -__PAGE_OFFSET(%ecx),%esp
304 * New page tables may be in 4Mbyte page mode and may
305 * be using the global pages.
307 * NOTE! If we are on a 486 we may have no cr4 at all!
308 * Specifically, cr4 exists if and only if CPUID exists,
309 * which in turn exists if and only if EFLAGS.ID exists.
311 movl $X86_EFLAGS_ID,%ecx
322 jz 6f # No ID flag = no CPUID = no CR4
324 movl pa(mmu_cr4_features),%eax
327 testb $X86_CR4_PAE, %al # check if PAE is enabled
330 /* Check if extended functions are implemented */
331 movl $0x80000000, %eax
333 /* Value must be in the range 0x80000001 to 0x8000ffff */
334 subl $0x80000001, %eax
335 cmpl $(0x8000ffff-0x80000001), %eax
338 /* Clear bogus XD_DISABLE bits */
341 mov $0x80000001, %eax
343 /* Execute Disable bit supported? */
344 btl $(X86_FEATURE_NX & 31), %edx
347 /* Setup EFER (Extended Feature Enable Register) */
352 /* Make changes effective */
360 movl $pa(initial_page_table), %eax
361 movl %eax,%cr3 /* set the page table pointer.. */
364 movl %eax,%cr0 /* ..and set paging (PG) bit */
365 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
367 /* Shift the stack pointer to a virtual address */
368 addl $__PAGE_OFFSET, %esp
371 * Initialize eflags. Some BIOS's leave bits like NT set. This would
372 * confuse the debugger if this code is traced.
373 * XXX - best to initialize before switching to protected mode.
379 * start system 32-bit setup. We need to re-do some of the things done
380 * in 16-bit mode for the "real" operations.
382 movl setup_once_ref,%eax
384 jz 1f # Did we do this already?
388 /* check if it is 486 or 386. */
390 * XXX - this does a lot of unnecessary setup. Alignment checks don't
391 * apply at our cpl of 0 and the stack ought to be aligned already, and
392 * we don't need to preserve eflags.
394 movl $-1,X86_CPUID # -1 for no CPUID initially
395 movb $3,X86 # at least 386
397 popl %eax # get EFLAGS
398 movl %eax,%ecx # save original EFLAGS
399 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
400 pushl %eax # copy to EFLAGS
402 pushfl # get new EFLAGS
403 popl %eax # put it in eax
404 xorl %ecx,%eax # change in flags
405 pushl %ecx # restore original EFLAGS
407 testl $0x40000,%eax # check if AC bit changed
410 movb $4,X86 # at least 486
411 testl $0x200000,%eax # check if ID bit changed
414 /* get vendor info */
415 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
417 movl %eax,X86_CPUID # save CPUID level
418 movl %ebx,X86_VENDOR_ID # lo 4 chars
419 movl %edx,X86_VENDOR_ID+4 # next 4 chars
420 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
422 orl %eax,%eax # do we have processor info as well?
425 movl $1,%eax # Use the CPUID instruction to get CPU type
427 movb %al,%cl # save reg for future use
428 andb $0x0f,%ah # mask processor family
430 andb $0xf0,%al # mask model
433 andb $0x0f,%cl # mask mask revision
435 movl %edx,X86_CAPABILITY
437 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
440 is386: movl $2,%ecx # set MP
442 andl $0x80000011,%eax # Save PG,PE,ET
449 ljmp $(__KERNEL_CS),$1f
450 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
451 movl %eax,%ss # after changing gdt.
453 movl $(__USER_DS),%eax # DS/ES contains default USER segment
457 movl $(__KERNEL_PERCPU), %eax
458 movl %eax,%fs # set this cpu's percpu
460 movl $(__KERNEL_STACK_CANARY),%eax
463 xorl %eax,%eax # Clear LDT
466 cld # gcc2 wants the direction flag cleared at all times
467 pushl $0 # fake return address for unwinder
471 * We depend on ET to be correct. This checks for 287/387.
474 movb $0,X86_HARD_MATH
480 movl %cr0,%eax /* no coprocessor: have to set bits */
481 xorl $4,%eax /* set EM */
485 1: movb $1,X86_HARD_MATH
486 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
490 #include "verify_cpu.S"
495 * The setup work we only want to run on the BSP.
497 * Warning: %esi is live across this function.
502 * Set up a idt with 256 entries pointing to ignore_int,
503 * interrupt gates. It doesn't actually load idt - that needs
504 * to be done on each CPU. Interrupts are enabled elsewhere,
505 * when we can be relatively sure everything is ok.
509 movl $early_idt_handlers,%eax
510 movl $NUM_EXCEPTION_VECTORS,%ecx
514 /* interrupt gate, dpl=0, present */
515 movl $(0x8E000000 + __KERNEL_CS),2(%edi)
520 movl $256 - NUM_EXCEPTION_VECTORS,%ecx
521 movl $ignore_int,%edx
522 movl $(__KERNEL_CS << 16),%eax
523 movw %dx,%ax /* selector = 0x0010 = cs */
524 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
531 #ifdef CONFIG_CC_STACKPROTECTOR
533 * Configure the stack canary. The linker can't handle this by
534 * relocation. Manually set base address in stack canary
535 * segment descriptor.
538 movl $stack_canary,%ecx
539 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
541 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
542 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
545 andl $0,setup_once_ref /* Once is enough, thanks */
548 ENTRY(early_idt_handlers)
552 # 24(%rsp) error code
554 .rept NUM_EXCEPTION_VECTORS
555 .if (EXCEPTION_ERRCODE_MASK >> i) & 1
558 pushl $0 # Dummy error code, to make stack frame uniform
560 pushl $i # 20(%esp) Vector number
561 jmp early_idt_handler
564 ENDPROC(early_idt_handlers)
566 /* This is global to keep gas from relaxing the jumps */
567 ENTRY(early_idt_handler)
569 cmpl $2,%ss:early_recursion_flag
571 incl %ss:early_recursion_flag
578 movl $(__KERNEL_DS),%eax
582 cmpl $(__KERNEL_CS),32(%esp)
585 leal 28(%esp),%eax # Pointer to %eip
586 call early_fixup_exception
588 jnz ex_entry /* found an exception entry */
593 movw %ax,2(%esp) /* clean up the segment values on some cpus */
597 pushl %eax /* %esp before the exception */
604 pushl (20+6*4)(%esp) /* trapno */
619 addl $8,%esp /* drop vector number and error code */
620 decl %ss:early_recursion_flag
622 ENDPROC(early_idt_handler)
624 /* This is the default interrupt "handler" :-) */
634 movl $(__KERNEL_DS),%eax
637 cmpl $2,early_recursion_flag
639 incl early_recursion_flag
660 early_recursion_flag:
666 .long i386_start_kernel
667 ENTRY(setup_once_ref)
675 #ifdef CONFIG_X86_PAE
679 ENTRY(initial_page_table)
684 ENTRY(empty_zero_page)
686 ENTRY(swapper_pg_dir)
690 * This starts the data section.
692 #ifdef CONFIG_X86_PAE
694 /* Page-aligned for the benefit of paravirt? */
696 ENTRY(initial_page_table)
697 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
699 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
700 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
701 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
704 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
705 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
709 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
711 # error "Kernel PMDs should be 1, 2 or 3"
713 .align PAGE_SIZE /* needs to be page-sized too */
719 .long init_thread_union+THREAD_SIZE
723 .asciz "Unknown interrupt or fault at: %p %p %p\n"
727 .ascii "BUG: Int %d: CR2 %p\n"
728 /* regs pushed in early_idt_handler: */
729 .ascii " EDI %p ESI %p EBP %p EBX %p\n"
730 .ascii " ESP %p ES %p DS %p\n"
731 .ascii " EDX %p ECX %p EAX %p\n"
733 .ascii " vec %p err %p EIP %p CS %p flg %p\n"
734 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
735 .ascii " %p %p %p %p %p %p %p %p\n"
736 .asciz " %p %p %p %p %p %p %p %p\n"
738 #include "../../x86/xen/xen-head.S"
741 * The IDT and GDT 'descriptors' are a strange 48-bit object
742 * only used by the lidt and lgdt instructions. They are not
743 * like usual segment descriptors - they consist of a 16-bit
744 * segment size, and 32-bit linear address value:
748 .globl boot_gdt_descr
752 # early boot GDT descriptor (must use 1:1 address mapping)
753 .word 0 # 32 bit align gdt_desc.address
756 .long boot_gdt - __PAGE_OFFSET
758 .word 0 # 32-bit align idt_desc.address
760 .word IDT_ENTRIES*8-1 # idt contains 256 entries
763 # boot GDT descriptor (later on used by CPU#0):
764 .word 0 # 32 bit align gdt_desc.address
765 ENTRY(early_gdt_descr)
766 .word GDT_ENTRIES*8-1
767 .long gdt_page /* Overwritten for secondary CPUs */
770 * The boot_gdt must mirror the equivalent in setup.S and is
771 * used only for booting.
773 .align L1_CACHE_BYTES
775 .fill GDT_ENTRY_BOOT_CS,8,0
776 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
777 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */