]> git.karo-electronics.de Git - karo-tx-linux.git/blob - arch/x86/kernel/i387.c
Merge branch 'next' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[karo-tx-linux.git] / arch / x86 / kernel / i387.c
1 /*
2  *  Copyright (C) 1994 Linus Torvalds
3  *
4  *  Pentium III FXSR, SSE support
5  *  General FPU state handling cleanups
6  *      Gareth Hughes <gareth@valinux.com>, May 2000
7  */
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
12
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/uaccess.h>
17 #include <asm/ptrace.h>
18 #include <asm/i387.h>
19 #include <asm/fpu-internal.h>
20 #include <asm/user.h>
21
22 #ifdef CONFIG_X86_64
23 # include <asm/sigcontext32.h>
24 # include <asm/user32.h>
25 #else
26 # define save_i387_xstate_ia32          save_i387_xstate
27 # define restore_i387_xstate_ia32       restore_i387_xstate
28 # define _fpstate_ia32          _fpstate
29 # define _xstate_ia32           _xstate
30 # define sig_xstate_ia32_size   sig_xstate_size
31 # define fx_sw_reserved_ia32    fx_sw_reserved
32 # define user_i387_ia32_struct  user_i387_struct
33 # define user32_fxsr_struct     user_fxsr_struct
34 #endif
35
36 /*
37  * Were we in an interrupt that interrupted kernel mode?
38  *
39  * We can do a kernel_fpu_begin/end() pair *ONLY* if that
40  * pair does nothing at all: the thread must not have fpu (so
41  * that we don't try to save the FPU state), and TS must
42  * be set (so that the clts/stts pair does nothing that is
43  * visible in the interrupted kernel thread).
44  */
45 static inline bool interrupted_kernel_fpu_idle(void)
46 {
47         return !__thread_has_fpu(current) &&
48                 (read_cr0() & X86_CR0_TS);
49 }
50
51 /*
52  * Were we in user mode (or vm86 mode) when we were
53  * interrupted?
54  *
55  * Doing kernel_fpu_begin/end() is ok if we are running
56  * in an interrupt context from user mode - we'll just
57  * save the FPU state as required.
58  */
59 static inline bool interrupted_user_mode(void)
60 {
61         struct pt_regs *regs = get_irq_regs();
62         return regs && user_mode_vm(regs);
63 }
64
65 /*
66  * Can we use the FPU in kernel mode with the
67  * whole "kernel_fpu_begin/end()" sequence?
68  *
69  * It's always ok in process context (ie "not interrupt")
70  * but it is sometimes ok even from an irq.
71  */
72 bool irq_fpu_usable(void)
73 {
74         return !in_interrupt() ||
75                 interrupted_user_mode() ||
76                 interrupted_kernel_fpu_idle();
77 }
78 EXPORT_SYMBOL(irq_fpu_usable);
79
80 void kernel_fpu_begin(void)
81 {
82         struct task_struct *me = current;
83
84         WARN_ON_ONCE(!irq_fpu_usable());
85         preempt_disable();
86         if (__thread_has_fpu(me)) {
87                 __save_init_fpu(me);
88                 __thread_clear_has_fpu(me);
89                 /* We do 'stts()' in kernel_fpu_end() */
90         } else {
91                 this_cpu_write(fpu_owner_task, NULL);
92                 clts();
93         }
94 }
95 EXPORT_SYMBOL(kernel_fpu_begin);
96
97 void kernel_fpu_end(void)
98 {
99         stts();
100         preempt_enable();
101 }
102 EXPORT_SYMBOL(kernel_fpu_end);
103
104 void unlazy_fpu(struct task_struct *tsk)
105 {
106         preempt_disable();
107         if (__thread_has_fpu(tsk)) {
108                 __save_init_fpu(tsk);
109                 __thread_fpu_end(tsk);
110         } else
111                 tsk->fpu_counter = 0;
112         preempt_enable();
113 }
114 EXPORT_SYMBOL(unlazy_fpu);
115
116 #ifdef CONFIG_MATH_EMULATION
117 # define HAVE_HWFP              (boot_cpu_data.hard_math)
118 #else
119 # define HAVE_HWFP              1
120 #endif
121
122 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
123 unsigned int xstate_size;
124 EXPORT_SYMBOL_GPL(xstate_size);
125 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
126 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
127
128 static void __cpuinit mxcsr_feature_mask_init(void)
129 {
130         unsigned long mask = 0;
131
132         clts();
133         if (cpu_has_fxsr) {
134                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
135                 asm volatile("fxsave %0" : : "m" (fx_scratch));
136                 mask = fx_scratch.mxcsr_mask;
137                 if (mask == 0)
138                         mask = 0x0000ffbf;
139         }
140         mxcsr_feature_mask &= mask;
141         stts();
142 }
143
144 static void __cpuinit init_thread_xstate(void)
145 {
146         /*
147          * Note that xstate_size might be overwriten later during
148          * xsave_init().
149          */
150
151         if (!HAVE_HWFP) {
152                 /*
153                  * Disable xsave as we do not support it if i387
154                  * emulation is enabled.
155                  */
156                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
157                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
158                 xstate_size = sizeof(struct i387_soft_struct);
159                 return;
160         }
161
162         if (cpu_has_fxsr)
163                 xstate_size = sizeof(struct i387_fxsave_struct);
164         else
165                 xstate_size = sizeof(struct i387_fsave_struct);
166 }
167
168 /*
169  * Called at bootup to set up the initial FPU state that is later cloned
170  * into all processes.
171  */
172
173 void __cpuinit fpu_init(void)
174 {
175         unsigned long cr0;
176         unsigned long cr4_mask = 0;
177
178         if (cpu_has_fxsr)
179                 cr4_mask |= X86_CR4_OSFXSR;
180         if (cpu_has_xmm)
181                 cr4_mask |= X86_CR4_OSXMMEXCPT;
182         if (cr4_mask)
183                 set_in_cr4(cr4_mask);
184
185         cr0 = read_cr0();
186         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
187         if (!HAVE_HWFP)
188                 cr0 |= X86_CR0_EM;
189         write_cr0(cr0);
190
191         if (!smp_processor_id())
192                 init_thread_xstate();
193
194         mxcsr_feature_mask_init();
195         /* clean state in init */
196         current_thread_info()->status = 0;
197         clear_used_math();
198 }
199
200 void fpu_finit(struct fpu *fpu)
201 {
202         if (!HAVE_HWFP) {
203                 finit_soft_fpu(&fpu->state->soft);
204                 return;
205         }
206
207         if (cpu_has_fxsr) {
208                 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
209
210                 memset(fx, 0, xstate_size);
211                 fx->cwd = 0x37f;
212                 if (cpu_has_xmm)
213                         fx->mxcsr = MXCSR_DEFAULT;
214         } else {
215                 struct i387_fsave_struct *fp = &fpu->state->fsave;
216                 memset(fp, 0, xstate_size);
217                 fp->cwd = 0xffff037fu;
218                 fp->swd = 0xffff0000u;
219                 fp->twd = 0xffffffffu;
220                 fp->fos = 0xffff0000u;
221         }
222 }
223 EXPORT_SYMBOL_GPL(fpu_finit);
224
225 /*
226  * The _current_ task is using the FPU for the first time
227  * so initialize it and set the mxcsr to its default
228  * value at reset if we support XMM instructions and then
229  * remember the current task has used the FPU.
230  */
231 int init_fpu(struct task_struct *tsk)
232 {
233         int ret;
234
235         if (tsk_used_math(tsk)) {
236                 if (HAVE_HWFP && tsk == current)
237                         unlazy_fpu(tsk);
238                 tsk->thread.fpu.last_cpu = ~0;
239                 return 0;
240         }
241
242         /*
243          * Memory allocation at the first usage of the FPU and other state.
244          */
245         ret = fpu_alloc(&tsk->thread.fpu);
246         if (ret)
247                 return ret;
248
249         fpu_finit(&tsk->thread.fpu);
250
251         set_stopped_child_used_math(tsk);
252         return 0;
253 }
254 EXPORT_SYMBOL_GPL(init_fpu);
255
256 /*
257  * The xstateregs_active() routine is the same as the fpregs_active() routine,
258  * as the "regset->n" for the xstate regset will be updated based on the feature
259  * capabilites supported by the xsave.
260  */
261 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
262 {
263         return tsk_used_math(target) ? regset->n : 0;
264 }
265
266 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
267 {
268         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
269 }
270
271 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
272                 unsigned int pos, unsigned int count,
273                 void *kbuf, void __user *ubuf)
274 {
275         int ret;
276
277         if (!cpu_has_fxsr)
278                 return -ENODEV;
279
280         ret = init_fpu(target);
281         if (ret)
282                 return ret;
283
284         sanitize_i387_state(target);
285
286         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
287                                    &target->thread.fpu.state->fxsave, 0, -1);
288 }
289
290 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
291                 unsigned int pos, unsigned int count,
292                 const void *kbuf, const void __user *ubuf)
293 {
294         int ret;
295
296         if (!cpu_has_fxsr)
297                 return -ENODEV;
298
299         ret = init_fpu(target);
300         if (ret)
301                 return ret;
302
303         sanitize_i387_state(target);
304
305         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
306                                  &target->thread.fpu.state->fxsave, 0, -1);
307
308         /*
309          * mxcsr reserved bits must be masked to zero for security reasons.
310          */
311         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
312
313         /*
314          * update the header bits in the xsave header, indicating the
315          * presence of FP and SSE state.
316          */
317         if (cpu_has_xsave)
318                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
319
320         return ret;
321 }
322
323 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
324                 unsigned int pos, unsigned int count,
325                 void *kbuf, void __user *ubuf)
326 {
327         int ret;
328
329         if (!cpu_has_xsave)
330                 return -ENODEV;
331
332         ret = init_fpu(target);
333         if (ret)
334                 return ret;
335
336         /*
337          * Copy the 48bytes defined by the software first into the xstate
338          * memory layout in the thread struct, so that we can copy the entire
339          * xstateregs to the user using one user_regset_copyout().
340          */
341         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
342                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
343
344         /*
345          * Copy the xstate memory layout.
346          */
347         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
348                                   &target->thread.fpu.state->xsave, 0, -1);
349         return ret;
350 }
351
352 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
353                   unsigned int pos, unsigned int count,
354                   const void *kbuf, const void __user *ubuf)
355 {
356         int ret;
357         struct xsave_hdr_struct *xsave_hdr;
358
359         if (!cpu_has_xsave)
360                 return -ENODEV;
361
362         ret = init_fpu(target);
363         if (ret)
364                 return ret;
365
366         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
367                                  &target->thread.fpu.state->xsave, 0, -1);
368
369         /*
370          * mxcsr reserved bits must be masked to zero for security reasons.
371          */
372         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
373
374         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
375
376         xsave_hdr->xstate_bv &= pcntxt_mask;
377         /*
378          * These bits must be zero.
379          */
380         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
381
382         return ret;
383 }
384
385 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
386
387 /*
388  * FPU tag word conversions.
389  */
390
391 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
392 {
393         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
394
395         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
396         tmp = ~twd;
397         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
398         /* and move the valid bits to the lower byte. */
399         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
400         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
401         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
402
403         return tmp;
404 }
405
406 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
407 #define FP_EXP_TAG_VALID        0
408 #define FP_EXP_TAG_ZERO         1
409 #define FP_EXP_TAG_SPECIAL      2
410 #define FP_EXP_TAG_EMPTY        3
411
412 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
413 {
414         struct _fpxreg *st;
415         u32 tos = (fxsave->swd >> 11) & 7;
416         u32 twd = (unsigned long) fxsave->twd;
417         u32 tag;
418         u32 ret = 0xffff0000u;
419         int i;
420
421         for (i = 0; i < 8; i++, twd >>= 1) {
422                 if (twd & 0x1) {
423                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
424
425                         switch (st->exponent & 0x7fff) {
426                         case 0x7fff:
427                                 tag = FP_EXP_TAG_SPECIAL;
428                                 break;
429                         case 0x0000:
430                                 if (!st->significand[0] &&
431                                     !st->significand[1] &&
432                                     !st->significand[2] &&
433                                     !st->significand[3])
434                                         tag = FP_EXP_TAG_ZERO;
435                                 else
436                                         tag = FP_EXP_TAG_SPECIAL;
437                                 break;
438                         default:
439                                 if (st->significand[3] & 0x8000)
440                                         tag = FP_EXP_TAG_VALID;
441                                 else
442                                         tag = FP_EXP_TAG_SPECIAL;
443                                 break;
444                         }
445                 } else {
446                         tag = FP_EXP_TAG_EMPTY;
447                 }
448                 ret |= tag << (2 * i);
449         }
450         return ret;
451 }
452
453 /*
454  * FXSR floating point environment conversions.
455  */
456
457 static void
458 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
459 {
460         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
461         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
462         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
463         int i;
464
465         env->cwd = fxsave->cwd | 0xffff0000u;
466         env->swd = fxsave->swd | 0xffff0000u;
467         env->twd = twd_fxsr_to_i387(fxsave);
468
469 #ifdef CONFIG_X86_64
470         env->fip = fxsave->rip;
471         env->foo = fxsave->rdp;
472         /*
473          * should be actually ds/cs at fpu exception time, but
474          * that information is not available in 64bit mode.
475          */
476         env->fcs = task_pt_regs(tsk)->cs;
477         if (tsk == current) {
478                 savesegment(ds, env->fos);
479         } else {
480                 env->fos = tsk->thread.ds;
481         }
482         env->fos |= 0xffff0000;
483 #else
484         env->fip = fxsave->fip;
485         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
486         env->foo = fxsave->foo;
487         env->fos = fxsave->fos;
488 #endif
489
490         for (i = 0; i < 8; ++i)
491                 memcpy(&to[i], &from[i], sizeof(to[0]));
492 }
493
494 static void convert_to_fxsr(struct task_struct *tsk,
495                             const struct user_i387_ia32_struct *env)
496
497 {
498         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
499         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
500         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
501         int i;
502
503         fxsave->cwd = env->cwd;
504         fxsave->swd = env->swd;
505         fxsave->twd = twd_i387_to_fxsr(env->twd);
506         fxsave->fop = (u16) ((u32) env->fcs >> 16);
507 #ifdef CONFIG_X86_64
508         fxsave->rip = env->fip;
509         fxsave->rdp = env->foo;
510         /* cs and ds ignored */
511 #else
512         fxsave->fip = env->fip;
513         fxsave->fcs = (env->fcs & 0xffff);
514         fxsave->foo = env->foo;
515         fxsave->fos = env->fos;
516 #endif
517
518         for (i = 0; i < 8; ++i)
519                 memcpy(&to[i], &from[i], sizeof(from[0]));
520 }
521
522 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
523                unsigned int pos, unsigned int count,
524                void *kbuf, void __user *ubuf)
525 {
526         struct user_i387_ia32_struct env;
527         int ret;
528
529         ret = init_fpu(target);
530         if (ret)
531                 return ret;
532
533         if (!HAVE_HWFP)
534                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
535
536         if (!cpu_has_fxsr) {
537                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
538                                            &target->thread.fpu.state->fsave, 0,
539                                            -1);
540         }
541
542         sanitize_i387_state(target);
543
544         if (kbuf && pos == 0 && count == sizeof(env)) {
545                 convert_from_fxsr(kbuf, target);
546                 return 0;
547         }
548
549         convert_from_fxsr(&env, target);
550
551         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
552 }
553
554 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
555                unsigned int pos, unsigned int count,
556                const void *kbuf, const void __user *ubuf)
557 {
558         struct user_i387_ia32_struct env;
559         int ret;
560
561         ret = init_fpu(target);
562         if (ret)
563                 return ret;
564
565         sanitize_i387_state(target);
566
567         if (!HAVE_HWFP)
568                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
569
570         if (!cpu_has_fxsr) {
571                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
572                                           &target->thread.fpu.state->fsave, 0, -1);
573         }
574
575         if (pos > 0 || count < sizeof(env))
576                 convert_from_fxsr(&env, target);
577
578         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
579         if (!ret)
580                 convert_to_fxsr(target, &env);
581
582         /*
583          * update the header bit in the xsave header, indicating the
584          * presence of FP.
585          */
586         if (cpu_has_xsave)
587                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
588         return ret;
589 }
590
591 /*
592  * Signal frame handlers.
593  */
594
595 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
596 {
597         struct task_struct *tsk = current;
598         struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
599
600         fp->status = fp->swd;
601         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
602                 return -1;
603         return 1;
604 }
605
606 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
607 {
608         struct task_struct *tsk = current;
609         struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
610         struct user_i387_ia32_struct env;
611         int err = 0;
612
613         convert_from_fxsr(&env, tsk);
614         if (__copy_to_user(buf, &env, sizeof(env)))
615                 return -1;
616
617         err |= __put_user(fx->swd, &buf->status);
618         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
619         if (err)
620                 return -1;
621
622         if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
623                 return -1;
624         return 1;
625 }
626
627 static int save_i387_xsave(void __user *buf)
628 {
629         struct task_struct *tsk = current;
630         struct _fpstate_ia32 __user *fx = buf;
631         int err = 0;
632
633
634         sanitize_i387_state(tsk);
635
636         /*
637          * For legacy compatible, we always set FP/SSE bits in the bit
638          * vector while saving the state to the user context.
639          * This will enable us capturing any changes(during sigreturn) to
640          * the FP/SSE bits by the legacy applications which don't touch
641          * xstate_bv in the xsave header.
642          *
643          * xsave aware applications can change the xstate_bv in the xsave
644          * header as well as change any contents in the memory layout.
645          * xrestore as part of sigreturn will capture all the changes.
646          */
647         tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
648
649         if (save_i387_fxsave(fx) < 0)
650                 return -1;
651
652         err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
653                              sizeof(struct _fpx_sw_bytes));
654         err |= __put_user(FP_XSTATE_MAGIC2,
655                           (__u32 __user *) (buf + sig_xstate_ia32_size
656                                             - FP_XSTATE_MAGIC2_SIZE));
657         if (err)
658                 return -1;
659
660         return 1;
661 }
662
663 int save_i387_xstate_ia32(void __user *buf)
664 {
665         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
666         struct task_struct *tsk = current;
667
668         if (!used_math())
669                 return 0;
670
671         if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
672                 return -EACCES;
673         /*
674          * This will cause a "finit" to be triggered by the next
675          * attempted FPU operation by the 'current' process.
676          */
677         clear_used_math();
678
679         if (!HAVE_HWFP) {
680                 return fpregs_soft_get(current, NULL,
681                                        0, sizeof(struct user_i387_ia32_struct),
682                                        NULL, fp) ? -1 : 1;
683         }
684
685         unlazy_fpu(tsk);
686
687         if (cpu_has_xsave)
688                 return save_i387_xsave(fp);
689         if (cpu_has_fxsr)
690                 return save_i387_fxsave(fp);
691         else
692                 return save_i387_fsave(fp);
693 }
694
695 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
696 {
697         struct task_struct *tsk = current;
698
699         return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
700                                 sizeof(struct i387_fsave_struct));
701 }
702
703 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
704                                unsigned int size)
705 {
706         struct task_struct *tsk = current;
707         struct user_i387_ia32_struct env;
708         int err;
709
710         err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
711                                size);
712         /* mxcsr reserved bits must be masked to zero for security reasons */
713         tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
714         if (err || __copy_from_user(&env, buf, sizeof(env)))
715                 return 1;
716         convert_to_fxsr(tsk, &env);
717
718         return 0;
719 }
720
721 static int restore_i387_xsave(void __user *buf)
722 {
723         struct _fpx_sw_bytes fx_sw_user;
724         struct _fpstate_ia32 __user *fx_user =
725                         ((struct _fpstate_ia32 __user *) buf);
726         struct i387_fxsave_struct __user *fx =
727                 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
728         struct xsave_hdr_struct *xsave_hdr =
729                                 &current->thread.fpu.state->xsave.xsave_hdr;
730         u64 mask;
731         int err;
732
733         if (check_for_xstate(fx, buf, &fx_sw_user))
734                 goto fx_only;
735
736         mask = fx_sw_user.xstate_bv;
737
738         err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
739
740         xsave_hdr->xstate_bv &= pcntxt_mask;
741         /*
742          * These bits must be zero.
743          */
744         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
745
746         /*
747          * Init the state that is not present in the memory layout
748          * and enabled by the OS.
749          */
750         mask = ~(pcntxt_mask & ~mask);
751         xsave_hdr->xstate_bv &= mask;
752
753         return err;
754 fx_only:
755         /*
756          * Couldn't find the extended state information in the memory
757          * layout. Restore the FP/SSE and init the other extended state
758          * enabled by the OS.
759          */
760         xsave_hdr->xstate_bv = XSTATE_FPSSE;
761         return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
762 }
763
764 int restore_i387_xstate_ia32(void __user *buf)
765 {
766         int err;
767         struct task_struct *tsk = current;
768         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
769
770         if (HAVE_HWFP)
771                 clear_fpu(tsk);
772
773         if (!buf) {
774                 if (used_math()) {
775                         clear_fpu(tsk);
776                         clear_used_math();
777                 }
778
779                 return 0;
780         } else
781                 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
782                         return -EACCES;
783
784         if (!used_math()) {
785                 err = init_fpu(tsk);
786                 if (err)
787                         return err;
788         }
789
790         if (HAVE_HWFP) {
791                 if (cpu_has_xsave)
792                         err = restore_i387_xsave(buf);
793                 else if (cpu_has_fxsr)
794                         err = restore_i387_fxsave(fp, sizeof(struct
795                                                            i387_fxsave_struct));
796                 else
797                         err = restore_i387_fsave(fp);
798         } else {
799                 err = fpregs_soft_set(current, NULL,
800                                       0, sizeof(struct user_i387_ia32_struct),
801                                       NULL, fp) != 0;
802         }
803         set_used_math();
804
805         return err;
806 }
807
808 /*
809  * FPU state for core dumps.
810  * This is only used for a.out dumps now.
811  * It is declared generically using elf_fpregset_t (which is
812  * struct user_i387_struct) but is in fact only used for 32-bit
813  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
814  */
815 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
816 {
817         struct task_struct *tsk = current;
818         int fpvalid;
819
820         fpvalid = !!used_math();
821         if (fpvalid)
822                 fpvalid = !fpregs_get(tsk, NULL,
823                                       0, sizeof(struct user_i387_ia32_struct),
824                                       fpu, NULL);
825
826         return fpvalid;
827 }
828 EXPORT_SYMBOL(dump_fpu);
829
830 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */