2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/uaccess.h>
17 #include <asm/ptrace.h>
22 # include <asm/sigcontext32.h>
23 # include <asm/user32.h>
25 # define save_i387_xstate_ia32 save_i387_xstate
26 # define restore_i387_xstate_ia32 restore_i387_xstate
27 # define _fpstate_ia32 _fpstate
28 # define _xstate_ia32 _xstate
29 # define sig_xstate_ia32_size sig_xstate_size
30 # define fx_sw_reserved_ia32 fx_sw_reserved
31 # define user_i387_ia32_struct user_i387_struct
32 # define user32_fxsr_struct user_fxsr_struct
35 #ifdef CONFIG_MATH_EMULATION
36 # define HAVE_HWFP (boot_cpu_data.hard_math)
41 static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
42 unsigned int xstate_size;
43 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
44 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
46 void __cpuinit mxcsr_feature_mask_init(void)
48 unsigned long mask = 0;
52 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
53 asm volatile("fxsave %0" : : "m" (fx_scratch));
54 mask = fx_scratch.mxcsr_mask;
58 mxcsr_feature_mask &= mask;
62 void __cpuinit init_thread_xstate(void)
65 xstate_size = sizeof(struct i387_soft_struct);
75 xstate_size = sizeof(struct i387_fxsave_struct);
78 xstate_size = sizeof(struct i387_fsave_struct);
84 * Called at bootup to set up the initial FPU state that is later cloned
87 void __cpuinit fpu_init(void)
89 unsigned long oldcr0 = read_cr0();
91 set_in_cr4(X86_CR4_OSFXSR);
92 set_in_cr4(X86_CR4_OSXMMEXCPT);
94 write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
97 * Boot processor to setup the FP and extended state context info.
99 if (!smp_processor_id())
100 init_thread_xstate();
103 mxcsr_feature_mask_init();
104 /* clean state in init */
105 current_thread_info()->status = 0;
108 #endif /* CONFIG_X86_64 */
110 void fpu_finit(struct fpu *fpu)
114 finit_soft_fpu(&fpu->state->soft);
120 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
122 memset(fx, 0, xstate_size);
125 fx->mxcsr = MXCSR_DEFAULT;
127 struct i387_fsave_struct *fp = &fpu->state->fsave;
128 memset(fp, 0, xstate_size);
129 fp->cwd = 0xffff037fu;
130 fp->swd = 0xffff0000u;
131 fp->twd = 0xffffffffu;
132 fp->fos = 0xffff0000u;
135 EXPORT_SYMBOL_GPL(fpu_finit);
138 * The _current_ task is using the FPU for the first time
139 * so initialize it and set the mxcsr to its default
140 * value at reset if we support XMM instructions and then
141 * remeber the current task has used the FPU.
143 int init_fpu(struct task_struct *tsk)
147 if (tsk_used_math(tsk)) {
148 if (HAVE_HWFP && tsk == current)
154 * Memory allocation at the first usage of the FPU and other state.
156 ret = fpu_alloc(&tsk->thread.fpu);
160 fpu_finit(&tsk->thread.fpu);
162 set_stopped_child_used_math(tsk);
167 * The xstateregs_active() routine is the same as the fpregs_active() routine,
168 * as the "regset->n" for the xstate regset will be updated based on the feature
169 * capabilites supported by the xsave.
171 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
173 return tsk_used_math(target) ? regset->n : 0;
176 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
178 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
181 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
182 unsigned int pos, unsigned int count,
183 void *kbuf, void __user *ubuf)
190 ret = init_fpu(target);
194 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
195 &target->thread.fpu.state->fxsave, 0, -1);
198 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
199 unsigned int pos, unsigned int count,
200 const void *kbuf, const void __user *ubuf)
207 ret = init_fpu(target);
211 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
212 &target->thread.fpu.state->fxsave, 0, -1);
215 * mxcsr reserved bits must be masked to zero for security reasons.
217 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
220 * update the header bits in the xsave header, indicating the
221 * presence of FP and SSE state.
224 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
229 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
230 unsigned int pos, unsigned int count,
231 void *kbuf, void __user *ubuf)
238 ret = init_fpu(target);
243 * Copy the 48bytes defined by the software first into the xstate
244 * memory layout in the thread struct, so that we can copy the entire
245 * xstateregs to the user using one user_regset_copyout().
247 memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
248 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
251 * Copy the xstate memory layout.
253 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
254 &target->thread.fpu.state->xsave, 0, -1);
258 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
259 unsigned int pos, unsigned int count,
260 const void *kbuf, const void __user *ubuf)
263 struct xsave_hdr_struct *xsave_hdr;
268 ret = init_fpu(target);
272 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
273 &target->thread.fpu.state->xsave, 0, -1);
276 * mxcsr reserved bits must be masked to zero for security reasons.
278 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
280 xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
282 xsave_hdr->xstate_bv &= pcntxt_mask;
284 * These bits must be zero.
286 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
291 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
294 * FPU tag word conversions.
297 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
299 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
301 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
303 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
304 /* and move the valid bits to the lower byte. */
305 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
306 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
307 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
312 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
313 #define FP_EXP_TAG_VALID 0
314 #define FP_EXP_TAG_ZERO 1
315 #define FP_EXP_TAG_SPECIAL 2
316 #define FP_EXP_TAG_EMPTY 3
318 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
321 u32 tos = (fxsave->swd >> 11) & 7;
322 u32 twd = (unsigned long) fxsave->twd;
324 u32 ret = 0xffff0000u;
327 for (i = 0; i < 8; i++, twd >>= 1) {
329 st = FPREG_ADDR(fxsave, (i - tos) & 7);
331 switch (st->exponent & 0x7fff) {
333 tag = FP_EXP_TAG_SPECIAL;
336 if (!st->significand[0] &&
337 !st->significand[1] &&
338 !st->significand[2] &&
340 tag = FP_EXP_TAG_ZERO;
342 tag = FP_EXP_TAG_SPECIAL;
345 if (st->significand[3] & 0x8000)
346 tag = FP_EXP_TAG_VALID;
348 tag = FP_EXP_TAG_SPECIAL;
352 tag = FP_EXP_TAG_EMPTY;
354 ret |= tag << (2 * i);
360 * FXSR floating point environment conversions.
364 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
366 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
367 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
368 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
371 env->cwd = fxsave->cwd | 0xffff0000u;
372 env->swd = fxsave->swd | 0xffff0000u;
373 env->twd = twd_fxsr_to_i387(fxsave);
376 env->fip = fxsave->rip;
377 env->foo = fxsave->rdp;
378 if (tsk == current) {
380 * should be actually ds/cs at fpu exception time, but
381 * that information is not available in 64bit mode.
383 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
384 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
386 struct pt_regs *regs = task_pt_regs(tsk);
388 env->fos = 0xffff0000 | tsk->thread.ds;
392 env->fip = fxsave->fip;
393 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
394 env->foo = fxsave->foo;
395 env->fos = fxsave->fos;
398 for (i = 0; i < 8; ++i)
399 memcpy(&to[i], &from[i], sizeof(to[0]));
402 static void convert_to_fxsr(struct task_struct *tsk,
403 const struct user_i387_ia32_struct *env)
406 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
407 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
408 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
411 fxsave->cwd = env->cwd;
412 fxsave->swd = env->swd;
413 fxsave->twd = twd_i387_to_fxsr(env->twd);
414 fxsave->fop = (u16) ((u32) env->fcs >> 16);
416 fxsave->rip = env->fip;
417 fxsave->rdp = env->foo;
418 /* cs and ds ignored */
420 fxsave->fip = env->fip;
421 fxsave->fcs = (env->fcs & 0xffff);
422 fxsave->foo = env->foo;
423 fxsave->fos = env->fos;
426 for (i = 0; i < 8; ++i)
427 memcpy(&to[i], &from[i], sizeof(from[0]));
430 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
431 unsigned int pos, unsigned int count,
432 void *kbuf, void __user *ubuf)
434 struct user_i387_ia32_struct env;
437 ret = init_fpu(target);
442 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
445 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
446 &target->thread.fpu.state->fsave, 0,
450 if (kbuf && pos == 0 && count == sizeof(env)) {
451 convert_from_fxsr(kbuf, target);
455 convert_from_fxsr(&env, target);
457 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
460 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
461 unsigned int pos, unsigned int count,
462 const void *kbuf, const void __user *ubuf)
464 struct user_i387_ia32_struct env;
467 ret = init_fpu(target);
472 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
475 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
476 &target->thread.fpu.state->fsave, 0, -1);
479 if (pos > 0 || count < sizeof(env))
480 convert_from_fxsr(&env, target);
482 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
484 convert_to_fxsr(target, &env);
487 * update the header bit in the xsave header, indicating the
491 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
496 * Signal frame handlers.
499 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
501 struct task_struct *tsk = current;
502 struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
504 fp->status = fp->swd;
505 if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
510 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
512 struct task_struct *tsk = current;
513 struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
514 struct user_i387_ia32_struct env;
517 convert_from_fxsr(&env, tsk);
518 if (__copy_to_user(buf, &env, sizeof(env)))
521 err |= __put_user(fx->swd, &buf->status);
522 err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
526 if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
531 static int save_i387_xsave(void __user *buf)
533 struct task_struct *tsk = current;
534 struct _fpstate_ia32 __user *fx = buf;
538 * For legacy compatible, we always set FP/SSE bits in the bit
539 * vector while saving the state to the user context.
540 * This will enable us capturing any changes(during sigreturn) to
541 * the FP/SSE bits by the legacy applications which don't touch
542 * xstate_bv in the xsave header.
544 * xsave aware applications can change the xstate_bv in the xsave
545 * header as well as change any contents in the memory layout.
546 * xrestore as part of sigreturn will capture all the changes.
548 tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
550 if (save_i387_fxsave(fx) < 0)
553 err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
554 sizeof(struct _fpx_sw_bytes));
555 err |= __put_user(FP_XSTATE_MAGIC2,
556 (__u32 __user *) (buf + sig_xstate_ia32_size
557 - FP_XSTATE_MAGIC2_SIZE));
564 int save_i387_xstate_ia32(void __user *buf)
566 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
567 struct task_struct *tsk = current;
572 if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
575 * This will cause a "finit" to be triggered by the next
576 * attempted FPU operation by the 'current' process.
581 return fpregs_soft_get(current, NULL,
582 0, sizeof(struct user_i387_ia32_struct),
589 return save_i387_xsave(fp);
591 return save_i387_fxsave(fp);
593 return save_i387_fsave(fp);
596 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
598 struct task_struct *tsk = current;
600 return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
601 sizeof(struct i387_fsave_struct));
604 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
607 struct task_struct *tsk = current;
608 struct user_i387_ia32_struct env;
611 err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
613 /* mxcsr reserved bits must be masked to zero for security reasons */
614 tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
615 if (err || __copy_from_user(&env, buf, sizeof(env)))
617 convert_to_fxsr(tsk, &env);
622 static int restore_i387_xsave(void __user *buf)
624 struct _fpx_sw_bytes fx_sw_user;
625 struct _fpstate_ia32 __user *fx_user =
626 ((struct _fpstate_ia32 __user *) buf);
627 struct i387_fxsave_struct __user *fx =
628 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
629 struct xsave_hdr_struct *xsave_hdr =
630 ¤t->thread.fpu.state->xsave.xsave_hdr;
634 if (check_for_xstate(fx, buf, &fx_sw_user))
637 mask = fx_sw_user.xstate_bv;
639 err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
641 xsave_hdr->xstate_bv &= pcntxt_mask;
643 * These bits must be zero.
645 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
648 * Init the state that is not present in the memory layout
649 * and enabled by the OS.
651 mask = ~(pcntxt_mask & ~mask);
652 xsave_hdr->xstate_bv &= mask;
657 * Couldn't find the extended state information in the memory
658 * layout. Restore the FP/SSE and init the other extended state
661 xsave_hdr->xstate_bv = XSTATE_FPSSE;
662 return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
665 int restore_i387_xstate_ia32(void __user *buf)
668 struct task_struct *tsk = current;
669 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
682 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
693 err = restore_i387_xsave(buf);
694 else if (cpu_has_fxsr)
695 err = restore_i387_fxsave(fp, sizeof(struct
696 i387_fxsave_struct));
698 err = restore_i387_fsave(fp);
700 err = fpregs_soft_set(current, NULL,
701 0, sizeof(struct user_i387_ia32_struct),
710 * FPU state for core dumps.
711 * This is only used for a.out dumps now.
712 * It is declared generically using elf_fpregset_t (which is
713 * struct user_i387_struct) but is in fact only used for 32-bit
714 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
716 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
718 struct task_struct *tsk = current;
721 fpvalid = !!used_math();
723 fpvalid = !fpregs_get(tsk, NULL,
724 0, sizeof(struct user_i387_ia32_struct),
729 EXPORT_SYMBOL(dump_fpu);
731 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */