2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/uaccess.h>
17 #include <asm/ptrace.h>
19 #include <asm/fpu-internal.h>
22 static DEFINE_PER_CPU(bool, in_kernel_fpu);
24 void kernel_fpu_disable(void)
26 WARN_ON(this_cpu_read(in_kernel_fpu));
27 this_cpu_write(in_kernel_fpu, true);
30 void kernel_fpu_enable(void)
32 this_cpu_write(in_kernel_fpu, false);
36 * Were we in an interrupt that interrupted kernel mode?
38 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
39 * pair does nothing at all: the thread must not have fpu (so
40 * that we don't try to save the FPU state), and TS must
41 * be set (so that the clts/stts pair does nothing that is
42 * visible in the interrupted kernel thread).
44 * Except for the eagerfpu case when we return 1 unless we've already
45 * been eager and saved the state in kernel_fpu_begin().
47 static inline bool interrupted_kernel_fpu_idle(void)
49 if (this_cpu_read(in_kernel_fpu))
53 return __thread_has_fpu(current);
55 return !__thread_has_fpu(current) &&
56 (read_cr0() & X86_CR0_TS);
60 * Were we in user mode (or vm86 mode) when we were
63 * Doing kernel_fpu_begin/end() is ok if we are running
64 * in an interrupt context from user mode - we'll just
65 * save the FPU state as required.
67 static inline bool interrupted_user_mode(void)
69 struct pt_regs *regs = get_irq_regs();
70 return regs && user_mode_vm(regs);
74 * Can we use the FPU in kernel mode with the
75 * whole "kernel_fpu_begin/end()" sequence?
77 * It's always ok in process context (ie "not interrupt")
78 * but it is sometimes ok even from an irq.
80 bool irq_fpu_usable(void)
82 return !in_interrupt() ||
83 interrupted_user_mode() ||
84 interrupted_kernel_fpu_idle();
86 EXPORT_SYMBOL(irq_fpu_usable);
88 void __kernel_fpu_begin(void)
90 struct task_struct *me = current;
92 this_cpu_write(in_kernel_fpu, true);
94 if (__thread_has_fpu(me)) {
96 } else if (!use_eager_fpu()) {
97 this_cpu_write(fpu_owner_task, NULL);
101 EXPORT_SYMBOL(__kernel_fpu_begin);
103 void __kernel_fpu_end(void)
105 struct task_struct *me = current;
107 if (__thread_has_fpu(me)) {
108 if (WARN_ON(restore_fpu_checking(me)))
110 } else if (!use_eager_fpu()) {
114 this_cpu_write(in_kernel_fpu, false);
116 EXPORT_SYMBOL(__kernel_fpu_end);
118 void unlazy_fpu(struct task_struct *tsk)
121 if (__thread_has_fpu(tsk)) {
122 __save_init_fpu(tsk);
123 __thread_fpu_end(tsk);
125 tsk->thread.fpu_counter = 0;
128 EXPORT_SYMBOL(unlazy_fpu);
130 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
131 unsigned int xstate_size;
132 EXPORT_SYMBOL_GPL(xstate_size);
133 static struct i387_fxsave_struct fx_scratch;
135 static void mxcsr_feature_mask_init(void)
137 unsigned long mask = 0;
140 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
141 asm volatile("fxsave %0" : "+m" (fx_scratch));
142 mask = fx_scratch.mxcsr_mask;
146 mxcsr_feature_mask &= mask;
149 static void init_thread_xstate(void)
152 * Note that xstate_size might be overwriten later during
158 * Disable xsave as we do not support it if i387
159 * emulation is enabled.
161 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
162 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
163 xstate_size = sizeof(struct i387_soft_struct);
168 xstate_size = sizeof(struct i387_fxsave_struct);
170 xstate_size = sizeof(struct i387_fsave_struct);
174 * Called at bootup to set up the initial FPU state that is later cloned
175 * into all processes.
181 unsigned long cr4_mask = 0;
183 #ifndef CONFIG_MATH_EMULATION
185 pr_emerg("No FPU found and no math emulation present\n");
186 pr_emerg("Giving up\n");
192 cr4_mask |= X86_CR4_OSFXSR;
194 cr4_mask |= X86_CR4_OSXMMEXCPT;
196 set_in_cr4(cr4_mask);
199 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
205 * init_thread_xstate is only called once to avoid overriding
206 * xstate_size during boot time or during CPU hotplug.
208 if (xstate_size == 0)
209 init_thread_xstate();
211 mxcsr_feature_mask_init();
216 void fpu_finit(struct fpu *fpu)
219 finit_soft_fpu(&fpu->state->soft);
224 fx_finit(&fpu->state->fxsave);
226 struct i387_fsave_struct *fp = &fpu->state->fsave;
227 memset(fp, 0, xstate_size);
228 fp->cwd = 0xffff037fu;
229 fp->swd = 0xffff0000u;
230 fp->twd = 0xffffffffu;
231 fp->fos = 0xffff0000u;
234 EXPORT_SYMBOL_GPL(fpu_finit);
237 * The _current_ task is using the FPU for the first time
238 * so initialize it and set the mxcsr to its default
239 * value at reset if we support XMM instructions and then
240 * remember the current task has used the FPU.
242 int init_fpu(struct task_struct *tsk)
246 if (tsk_used_math(tsk)) {
247 if (cpu_has_fpu && tsk == current)
249 tsk->thread.fpu.last_cpu = ~0;
254 * Memory allocation at the first usage of the FPU and other state.
256 ret = fpu_alloc(&tsk->thread.fpu);
260 fpu_finit(&tsk->thread.fpu);
262 set_stopped_child_used_math(tsk);
265 EXPORT_SYMBOL_GPL(init_fpu);
268 * The xstateregs_active() routine is the same as the fpregs_active() routine,
269 * as the "regset->n" for the xstate regset will be updated based on the feature
270 * capabilites supported by the xsave.
272 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
274 return tsk_used_math(target) ? regset->n : 0;
277 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
279 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
282 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
283 unsigned int pos, unsigned int count,
284 void *kbuf, void __user *ubuf)
291 ret = init_fpu(target);
295 sanitize_i387_state(target);
297 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
298 &target->thread.fpu.state->fxsave, 0, -1);
301 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
302 unsigned int pos, unsigned int count,
303 const void *kbuf, const void __user *ubuf)
310 ret = init_fpu(target);
314 sanitize_i387_state(target);
316 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
317 &target->thread.fpu.state->fxsave, 0, -1);
320 * mxcsr reserved bits must be masked to zero for security reasons.
322 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
325 * update the header bits in the xsave header, indicating the
326 * presence of FP and SSE state.
329 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
334 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
335 unsigned int pos, unsigned int count,
336 void *kbuf, void __user *ubuf)
343 ret = init_fpu(target);
348 * Copy the 48bytes defined by the software first into the xstate
349 * memory layout in the thread struct, so that we can copy the entire
350 * xstateregs to the user using one user_regset_copyout().
352 memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
353 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
356 * Copy the xstate memory layout.
358 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
359 &target->thread.fpu.state->xsave, 0, -1);
363 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
364 unsigned int pos, unsigned int count,
365 const void *kbuf, const void __user *ubuf)
368 struct xsave_hdr_struct *xsave_hdr;
373 ret = init_fpu(target);
377 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
378 &target->thread.fpu.state->xsave, 0, -1);
381 * mxcsr reserved bits must be masked to zero for security reasons.
383 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
385 xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
387 xsave_hdr->xstate_bv &= pcntxt_mask;
389 * These bits must be zero.
391 memset(xsave_hdr->reserved, 0, 48);
396 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
399 * FPU tag word conversions.
402 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
404 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
406 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
408 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
409 /* and move the valid bits to the lower byte. */
410 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
411 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
412 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
417 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
418 #define FP_EXP_TAG_VALID 0
419 #define FP_EXP_TAG_ZERO 1
420 #define FP_EXP_TAG_SPECIAL 2
421 #define FP_EXP_TAG_EMPTY 3
423 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
426 u32 tos = (fxsave->swd >> 11) & 7;
427 u32 twd = (unsigned long) fxsave->twd;
429 u32 ret = 0xffff0000u;
432 for (i = 0; i < 8; i++, twd >>= 1) {
434 st = FPREG_ADDR(fxsave, (i - tos) & 7);
436 switch (st->exponent & 0x7fff) {
438 tag = FP_EXP_TAG_SPECIAL;
441 if (!st->significand[0] &&
442 !st->significand[1] &&
443 !st->significand[2] &&
445 tag = FP_EXP_TAG_ZERO;
447 tag = FP_EXP_TAG_SPECIAL;
450 if (st->significand[3] & 0x8000)
451 tag = FP_EXP_TAG_VALID;
453 tag = FP_EXP_TAG_SPECIAL;
457 tag = FP_EXP_TAG_EMPTY;
459 ret |= tag << (2 * i);
465 * FXSR floating point environment conversions.
469 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
471 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
472 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
473 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
476 env->cwd = fxsave->cwd | 0xffff0000u;
477 env->swd = fxsave->swd | 0xffff0000u;
478 env->twd = twd_fxsr_to_i387(fxsave);
481 env->fip = fxsave->rip;
482 env->foo = fxsave->rdp;
484 * should be actually ds/cs at fpu exception time, but
485 * that information is not available in 64bit mode.
487 env->fcs = task_pt_regs(tsk)->cs;
488 if (tsk == current) {
489 savesegment(ds, env->fos);
491 env->fos = tsk->thread.ds;
493 env->fos |= 0xffff0000;
495 env->fip = fxsave->fip;
496 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
497 env->foo = fxsave->foo;
498 env->fos = fxsave->fos;
501 for (i = 0; i < 8; ++i)
502 memcpy(&to[i], &from[i], sizeof(to[0]));
505 void convert_to_fxsr(struct task_struct *tsk,
506 const struct user_i387_ia32_struct *env)
509 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
510 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
511 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
514 fxsave->cwd = env->cwd;
515 fxsave->swd = env->swd;
516 fxsave->twd = twd_i387_to_fxsr(env->twd);
517 fxsave->fop = (u16) ((u32) env->fcs >> 16);
519 fxsave->rip = env->fip;
520 fxsave->rdp = env->foo;
521 /* cs and ds ignored */
523 fxsave->fip = env->fip;
524 fxsave->fcs = (env->fcs & 0xffff);
525 fxsave->foo = env->foo;
526 fxsave->fos = env->fos;
529 for (i = 0; i < 8; ++i)
530 memcpy(&to[i], &from[i], sizeof(from[0]));
533 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
534 unsigned int pos, unsigned int count,
535 void *kbuf, void __user *ubuf)
537 struct user_i387_ia32_struct env;
540 ret = init_fpu(target);
544 if (!static_cpu_has(X86_FEATURE_FPU))
545 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
548 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
549 &target->thread.fpu.state->fsave, 0,
552 sanitize_i387_state(target);
554 if (kbuf && pos == 0 && count == sizeof(env)) {
555 convert_from_fxsr(kbuf, target);
559 convert_from_fxsr(&env, target);
561 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
564 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
565 unsigned int pos, unsigned int count,
566 const void *kbuf, const void __user *ubuf)
568 struct user_i387_ia32_struct env;
571 ret = init_fpu(target);
575 sanitize_i387_state(target);
577 if (!static_cpu_has(X86_FEATURE_FPU))
578 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
581 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
582 &target->thread.fpu.state->fsave, 0,
585 if (pos > 0 || count < sizeof(env))
586 convert_from_fxsr(&env, target);
588 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
590 convert_to_fxsr(target, &env);
593 * update the header bit in the xsave header, indicating the
597 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
602 * FPU state for core dumps.
603 * This is only used for a.out dumps now.
604 * It is declared generically using elf_fpregset_t (which is
605 * struct user_i387_struct) but is in fact only used for 32-bit
606 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
608 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
610 struct task_struct *tsk = current;
613 fpvalid = !!used_math();
615 fpvalid = !fpregs_get(tsk, NULL,
616 0, sizeof(struct user_i387_ia32_struct),
621 EXPORT_SYMBOL(dump_fpu);
623 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
625 static int __init no_387(char *s)
627 setup_clear_cpu_cap(X86_FEATURE_FPU);
631 __setup("no387", no_387);
633 void fpu_detect(struct cpuinfo_x86 *c)
641 cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
644 asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
645 : "+m" (fsw), "+m" (fcw));
647 if (fsw == 0 && (fcw & 0x103f) == 0x003f)
648 set_cpu_cap(c, X86_FEATURE_FPU);
650 clear_cpu_cap(c, X86_FEATURE_FPU);
652 /* The final cr0 value is set in fpu_init() */