2 * Common interrupt code for 32 and 64 bit
5 #include <linux/interrupt.h>
6 #include <linux/kernel_stat.h>
8 #include <linux/seq_file.h>
10 #include <linux/ftrace.h>
11 #include <linux/delay.h>
12 #include <linux/export.h>
15 #include <asm/io_apic.h>
18 #include <asm/hw_irq.h>
21 #define CREATE_TRACE_POINTS
22 #include <asm/trace/irq_vectors.h>
24 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
25 EXPORT_PER_CPU_SYMBOL(irq_stat);
27 DEFINE_PER_CPU(struct pt_regs *, irq_regs);
28 EXPORT_PER_CPU_SYMBOL(irq_regs);
30 atomic_t irq_err_count;
32 /* Function pointer for generic interrupt vector handling */
33 void (*x86_platform_ipi_callback)(void) = NULL;
36 * 'what should we do if we get a hw irq event on an illegal vector'.
37 * each architecture has to answer this themselves.
39 void ack_bad_irq(unsigned int irq)
41 if (printk_ratelimit())
42 pr_err("unexpected IRQ trap at vector %02x\n", irq);
45 * Currently unexpected vectors happen only on SMP and APIC.
46 * We _must_ ack these because every local APIC has only N
47 * irq slots per priority level, and a 'hanging, unacked' IRQ
48 * holds up an irq slot - in excessive cases (when multiple
49 * unexpected vectors occur) that might lock up the APIC
51 * But only ack when the APIC is enabled -AK
56 #define irq_stats(x) (&per_cpu(irq_stat, x))
58 * /proc/interrupts printing for arch specific interrupts
60 int arch_show_interrupts(struct seq_file *p, int prec)
64 seq_printf(p, "%*s: ", prec, "NMI");
65 for_each_online_cpu(j)
66 seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
67 seq_puts(p, " Non-maskable interrupts\n");
68 #ifdef CONFIG_X86_LOCAL_APIC
69 seq_printf(p, "%*s: ", prec, "LOC");
70 for_each_online_cpu(j)
71 seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
72 seq_puts(p, " Local timer interrupts\n");
74 seq_printf(p, "%*s: ", prec, "SPU");
75 for_each_online_cpu(j)
76 seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
77 seq_puts(p, " Spurious interrupts\n");
78 seq_printf(p, "%*s: ", prec, "PMI");
79 for_each_online_cpu(j)
80 seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs);
81 seq_puts(p, " Performance monitoring interrupts\n");
82 seq_printf(p, "%*s: ", prec, "IWI");
83 for_each_online_cpu(j)
84 seq_printf(p, "%10u ", irq_stats(j)->apic_irq_work_irqs);
85 seq_puts(p, " IRQ work interrupts\n");
86 seq_printf(p, "%*s: ", prec, "RTR");
87 for_each_online_cpu(j)
88 seq_printf(p, "%10u ", irq_stats(j)->icr_read_retry_count);
89 seq_puts(p, " APIC ICR read retries\n");
91 if (x86_platform_ipi_callback) {
92 seq_printf(p, "%*s: ", prec, "PLT");
93 for_each_online_cpu(j)
94 seq_printf(p, "%10u ", irq_stats(j)->x86_platform_ipis);
95 seq_puts(p, " Platform interrupts\n");
98 seq_printf(p, "%*s: ", prec, "RES");
99 for_each_online_cpu(j)
100 seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
101 seq_puts(p, " Rescheduling interrupts\n");
102 seq_printf(p, "%*s: ", prec, "CAL");
103 for_each_online_cpu(j)
104 seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
105 seq_puts(p, " Function call interrupts\n");
106 seq_printf(p, "%*s: ", prec, "TLB");
107 for_each_online_cpu(j)
108 seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
109 seq_puts(p, " TLB shootdowns\n");
111 #ifdef CONFIG_X86_THERMAL_VECTOR
112 seq_printf(p, "%*s: ", prec, "TRM");
113 for_each_online_cpu(j)
114 seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
115 seq_puts(p, " Thermal event interrupts\n");
117 #ifdef CONFIG_X86_MCE_THRESHOLD
118 seq_printf(p, "%*s: ", prec, "THR");
119 for_each_online_cpu(j)
120 seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
121 seq_puts(p, " Threshold APIC interrupts\n");
123 #ifdef CONFIG_X86_MCE_AMD
124 seq_printf(p, "%*s: ", prec, "DFR");
125 for_each_online_cpu(j)
126 seq_printf(p, "%10u ", irq_stats(j)->irq_deferred_error_count);
127 seq_puts(p, " Deferred Error APIC interrupts\n");
129 #ifdef CONFIG_X86_MCE
130 seq_printf(p, "%*s: ", prec, "MCE");
131 for_each_online_cpu(j)
132 seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
133 seq_puts(p, " Machine check exceptions\n");
134 seq_printf(p, "%*s: ", prec, "MCP");
135 for_each_online_cpu(j)
136 seq_printf(p, "%10u ", per_cpu(mce_poll_count, j));
137 seq_puts(p, " Machine check polls\n");
139 #if IS_ENABLED(CONFIG_HYPERV) || defined(CONFIG_XEN)
140 if (test_bit(HYPERVISOR_CALLBACK_VECTOR, used_vectors)) {
141 seq_printf(p, "%*s: ", prec, "HYP");
142 for_each_online_cpu(j)
143 seq_printf(p, "%10u ",
144 irq_stats(j)->irq_hv_callback_count);
145 seq_puts(p, " Hypervisor callback interrupts\n");
148 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
149 #if defined(CONFIG_X86_IO_APIC)
150 seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
152 #ifdef CONFIG_HAVE_KVM
153 seq_printf(p, "%*s: ", prec, "PIN");
154 for_each_online_cpu(j)
155 seq_printf(p, "%10u ", irq_stats(j)->kvm_posted_intr_ipis);
156 seq_puts(p, " Posted-interrupt notification event\n");
158 seq_printf(p, "%*s: ", prec, "PIW");
159 for_each_online_cpu(j)
160 seq_printf(p, "%10u ",
161 irq_stats(j)->kvm_posted_intr_wakeup_ipis);
162 seq_puts(p, " Posted-interrupt wakeup event\n");
170 u64 arch_irq_stat_cpu(unsigned int cpu)
172 u64 sum = irq_stats(cpu)->__nmi_count;
174 #ifdef CONFIG_X86_LOCAL_APIC
175 sum += irq_stats(cpu)->apic_timer_irqs;
176 sum += irq_stats(cpu)->irq_spurious_count;
177 sum += irq_stats(cpu)->apic_perf_irqs;
178 sum += irq_stats(cpu)->apic_irq_work_irqs;
179 sum += irq_stats(cpu)->icr_read_retry_count;
181 if (x86_platform_ipi_callback)
182 sum += irq_stats(cpu)->x86_platform_ipis;
184 sum += irq_stats(cpu)->irq_resched_count;
185 sum += irq_stats(cpu)->irq_call_count;
187 #ifdef CONFIG_X86_THERMAL_VECTOR
188 sum += irq_stats(cpu)->irq_thermal_count;
190 #ifdef CONFIG_X86_MCE_THRESHOLD
191 sum += irq_stats(cpu)->irq_threshold_count;
193 #ifdef CONFIG_X86_MCE
194 sum += per_cpu(mce_exception_count, cpu);
195 sum += per_cpu(mce_poll_count, cpu);
200 u64 arch_irq_stat(void)
202 u64 sum = atomic_read(&irq_err_count);
208 * do_IRQ handles all normal device IRQ's (the special
209 * SMP cross-CPU interrupts have their own specific
212 __visible unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
214 struct pt_regs *old_regs = set_irq_regs(regs);
215 struct irq_desc * desc;
216 /* high bit used in ret_from_ code */
217 unsigned vector = ~regs->orig_ax;
220 * NB: Unlike exception entries, IRQ entries do not reliably
221 * handle context tracking in the low-level entry code. This is
222 * because syscall entries execute briefly with IRQs on before
223 * updating context tracking state, so we can take an IRQ from
224 * kernel mode with CONTEXT_USER. The low-level entry code only
225 * updates the context if we came from user mode, so we won't
226 * switch to CONTEXT_KERNEL. We'll fix that once the syscall
227 * code is cleaned up enough that we can cleanly defer enabling
233 /* entering_irq() tells RCU that we're not quiescent. Check it. */
234 RCU_LOCKDEP_WARN(!rcu_is_watching(), "IRQ failed to wake up RCU");
236 desc = __this_cpu_read(vector_irq[vector]);
238 if (!handle_irq(desc, regs)) {
241 if (desc != VECTOR_RETRIGGERED) {
242 pr_emerg_ratelimited("%s: %d.%d No irq handler for vector\n",
243 __func__, smp_processor_id(),
246 __this_cpu_write(vector_irq[vector], VECTOR_UNUSED);
252 set_irq_regs(old_regs);
257 * Handler for X86_PLATFORM_IPI_VECTOR.
259 void __smp_x86_platform_ipi(void)
261 inc_irq_stat(x86_platform_ipis);
263 if (x86_platform_ipi_callback)
264 x86_platform_ipi_callback();
267 __visible void smp_x86_platform_ipi(struct pt_regs *regs)
269 struct pt_regs *old_regs = set_irq_regs(regs);
272 __smp_x86_platform_ipi();
274 set_irq_regs(old_regs);
277 #ifdef CONFIG_HAVE_KVM
278 static void dummy_handler(void) {}
279 static void (*kvm_posted_intr_wakeup_handler)(void) = dummy_handler;
281 void kvm_set_posted_intr_wakeup_handler(void (*handler)(void))
284 kvm_posted_intr_wakeup_handler = handler;
286 kvm_posted_intr_wakeup_handler = dummy_handler;
288 EXPORT_SYMBOL_GPL(kvm_set_posted_intr_wakeup_handler);
291 * Handler for POSTED_INTERRUPT_VECTOR.
293 __visible void smp_kvm_posted_intr_ipi(struct pt_regs *regs)
295 struct pt_regs *old_regs = set_irq_regs(regs);
298 inc_irq_stat(kvm_posted_intr_ipis);
300 set_irq_regs(old_regs);
304 * Handler for POSTED_INTERRUPT_WAKEUP_VECTOR.
306 __visible void smp_kvm_posted_intr_wakeup_ipi(struct pt_regs *regs)
308 struct pt_regs *old_regs = set_irq_regs(regs);
311 inc_irq_stat(kvm_posted_intr_wakeup_ipis);
312 kvm_posted_intr_wakeup_handler();
314 set_irq_regs(old_regs);
318 __visible void smp_trace_x86_platform_ipi(struct pt_regs *regs)
320 struct pt_regs *old_regs = set_irq_regs(regs);
323 trace_x86_platform_ipi_entry(X86_PLATFORM_IPI_VECTOR);
324 __smp_x86_platform_ipi();
325 trace_x86_platform_ipi_exit(X86_PLATFORM_IPI_VECTOR);
327 set_irq_regs(old_regs);
330 EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
332 #ifdef CONFIG_HOTPLUG_CPU
334 /* These two declarations are only used in check_irq_vectors_for_cpu_disable()
335 * below, which is protected by stop_machine(). Putting them on the stack
336 * results in a stack frame overflow. Dynamically allocating could result in a
337 * failure so declare these two cpumasks as global.
339 static struct cpumask affinity_new, online_new;
342 * This cpu is going to be removed and its vectors migrated to the remaining
343 * online cpus. Check to see if there are enough vectors in the remaining cpus.
344 * This function is protected by stop_machine().
346 int check_irq_vectors_for_cpu_disable(void)
348 unsigned int this_cpu, vector, this_count, count;
349 struct irq_desc *desc;
350 struct irq_data *data;
353 this_cpu = smp_processor_id();
354 cpumask_copy(&online_new, cpu_online_mask);
355 cpumask_clear_cpu(this_cpu, &online_new);
358 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
359 desc = __this_cpu_read(vector_irq[vector]);
360 if (IS_ERR_OR_NULL(desc))
363 * Protect against concurrent action removal, affinity
366 raw_spin_lock(&desc->lock);
367 data = irq_desc_get_irq_data(desc);
368 cpumask_copy(&affinity_new,
369 irq_data_get_affinity_mask(data));
370 cpumask_clear_cpu(this_cpu, &affinity_new);
372 /* Do not count inactive or per-cpu irqs. */
373 if (!irq_desc_has_action(desc) || irqd_is_per_cpu(data)) {
374 raw_spin_unlock(&desc->lock);
378 raw_spin_unlock(&desc->lock);
380 * A single irq may be mapped to multiple cpu's
381 * vector_irq[] (for example IOAPIC cluster mode). In
382 * this case we have two possibilities:
384 * 1) the resulting affinity mask is empty; that is
385 * this the down'd cpu is the last cpu in the irq's
388 * 2) the resulting affinity mask is no longer a
389 * subset of the online cpus but the affinity mask is
390 * not zero; that is the down'd cpu is the last online
391 * cpu in a user set affinity mask.
393 if (cpumask_empty(&affinity_new) ||
394 !cpumask_subset(&affinity_new, &online_new))
399 for_each_online_cpu(cpu) {
403 * We scan from FIRST_EXTERNAL_VECTOR to first system
404 * vector. If the vector is marked in the used vectors
405 * bitmap or an irq is assigned to it, we don't count
408 * As this is an inaccurate snapshot anyway, we can do
409 * this w/o holding vector_lock.
411 for (vector = FIRST_EXTERNAL_VECTOR;
412 vector < first_system_vector; vector++) {
413 if (!test_bit(vector, used_vectors) &&
414 IS_ERR_OR_NULL(per_cpu(vector_irq, cpu)[vector]))
419 if (count < this_count) {
420 pr_warn("CPU %d disable failed: CPU has %u vectors assigned and there are only %u available.\n",
421 this_cpu, this_count, count);
427 /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */
428 void fixup_irqs(void)
430 unsigned int irq, vector;
432 struct irq_desc *desc;
433 struct irq_data *data;
434 struct irq_chip *chip;
437 for_each_irq_desc(irq, desc) {
438 int break_affinity = 0;
439 int set_affinity = 1;
440 const struct cpumask *affinity;
447 /* interrupt's are disabled at this point */
448 raw_spin_lock(&desc->lock);
450 data = irq_desc_get_irq_data(desc);
451 affinity = irq_data_get_affinity_mask(data);
452 if (!irq_has_action(irq) || irqd_is_per_cpu(data) ||
453 cpumask_subset(affinity, cpu_online_mask)) {
454 raw_spin_unlock(&desc->lock);
459 * Complete the irq move. This cpu is going down and for
460 * non intr-remapping case, we can't wait till this interrupt
461 * arrives at this cpu before completing the irq move.
463 irq_force_complete_move(desc);
465 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
467 affinity = cpu_online_mask;
470 chip = irq_data_get_irq_chip(data);
472 * The interrupt descriptor might have been cleaned up
473 * already, but it is not yet removed from the radix tree
476 raw_spin_unlock(&desc->lock);
480 if (!irqd_can_move_in_process_context(data) && chip->irq_mask)
481 chip->irq_mask(data);
483 if (chip->irq_set_affinity) {
484 ret = chip->irq_set_affinity(data, affinity, true);
486 pr_crit("IRQ %d set affinity failed because there are no available vectors. The device assigned to this IRQ is unstable.\n", irq);
493 * We unmask if the irq was not marked masked by the
494 * core code. That respects the lazy irq disable
497 if (!irqd_can_move_in_process_context(data) &&
498 !irqd_irq_masked(data) && chip->irq_unmask)
499 chip->irq_unmask(data);
501 raw_spin_unlock(&desc->lock);
503 if (break_affinity && set_affinity)
504 pr_notice("Broke affinity for irq %i\n", irq);
505 else if (!set_affinity)
506 pr_notice("Cannot set affinity for irq %i\n", irq);
510 * We can remove mdelay() and then send spuriuous interrupts to
511 * new cpu targets for all the irqs that were handled previously by
512 * this cpu. While it works, I have seen spurious interrupt messages
513 * (nothing wrong but still...).
515 * So for now, retain mdelay(1) and check the IRR and then send those
516 * interrupts to new targets as this cpu is already offlined...
521 * We can walk the vector array of this cpu without holding
522 * vector_lock because the cpu is already marked !online, so
523 * nothing else will touch it.
525 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
528 if (IS_ERR_OR_NULL(__this_cpu_read(vector_irq[vector])))
531 irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
532 if (irr & (1 << (vector % 32))) {
533 desc = __this_cpu_read(vector_irq[vector]);
535 raw_spin_lock(&desc->lock);
536 data = irq_desc_get_irq_data(desc);
537 chip = irq_data_get_irq_chip(data);
538 if (chip->irq_retrigger) {
539 chip->irq_retrigger(data);
540 __this_cpu_write(vector_irq[vector], VECTOR_RETRIGGERED);
542 raw_spin_unlock(&desc->lock);
544 if (__this_cpu_read(vector_irq[vector]) != VECTOR_RETRIGGERED)
545 __this_cpu_write(vector_irq[vector], VECTOR_UNUSED);