1 #include <linux/linkage.h>
2 #include <linux/errno.h>
3 #include <linux/signal.h>
4 #include <linux/sched.h>
5 #include <linux/ioport.h>
6 #include <linux/interrupt.h>
7 #include <linux/timex.h>
8 #include <linux/random.h>
9 #include <linux/kprobes.h>
10 #include <linux/init.h>
11 #include <linux/kernel_stat.h>
12 #include <linux/device.h>
13 #include <linux/bitops.h>
14 #include <linux/acpi.h>
16 #include <linux/delay.h>
18 #include <linux/atomic.h>
19 #include <asm/system.h>
20 #include <asm/timer.h>
21 #include <asm/hw_irq.h>
22 #include <asm/pgtable.h>
25 #include <asm/setup.h>
26 #include <asm/i8259.h>
27 #include <asm/traps.h>
31 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
32 * (these are usually mapped to vectors 0x30-0x3f)
36 * The IO-APIC gives us many more interrupt sources. Most of these
37 * are unused but an SMP system is supposed to have enough memory ...
38 * sometimes (mostly wrt. hw bugs) we get corrupted vectors all
39 * across the spectrum, so we really want to be prepared to get all
40 * of these. Plus, more powerful systems might have more than 64
43 * (these are usually mapped into the 0x30-0xff vector range)
48 * Note that on a 486, we don't want to do a SIGFPE on an irq13
49 * as the irq is unreliable, and exception 16 works correctly
50 * (ie as explained in the intel literature). On a 386, you
51 * can't use exception 16 due to bad IBM design, so we have to
52 * rely on the less exact irq13.
54 * Careful.. Not only is IRQ13 unreliable, but it is also
55 * leads to races. IBM designers who came up with it should
59 static irqreturn_t math_error_irq(int cpl, void *dev_id)
62 if (ignore_fpu_irq || !boot_cpu_data.hard_math)
64 math_error(get_irq_regs(), 0, 16);
69 * New motherboards sometimes make IRQ 13 be a PCI interrupt,
70 * so allow interrupt sharing.
72 static struct irqaction fpu_irq = {
73 .handler = math_error_irq,
75 .flags = IRQF_NO_THREAD,
80 * IRQ2 is cascade interrupt to second interrupt controller
82 static struct irqaction irq2 = {
85 .flags = IRQF_NO_THREAD,
88 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
89 [0 ... NR_VECTORS - 1] = -1,
92 int vector_used_by_percpu_irq(unsigned int vector)
96 for_each_online_cpu(cpu) {
97 if (per_cpu(vector_irq, cpu)[vector] != -1)
104 void __init init_ISA_irqs(void)
106 struct irq_chip *chip = legacy_pic->chip;
107 const char *name = chip->name;
110 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
115 for (i = 0; i < legacy_pic->nr_legacy_irqs; i++)
116 irq_set_chip_and_handler_name(i, chip, handle_level_irq, name);
119 void __init init_IRQ(void)
124 * We probably need a better place for this, but it works for
127 x86_add_irq_domains();
130 * On cpu 0, Assign IRQ0_VECTOR..IRQ15_VECTOR's to IRQ 0..15.
131 * If these IRQ's are handled by legacy interrupt-controllers like PIC,
132 * then this configuration will likely be static after the boot. If
133 * these IRQ's are handled by more mordern controllers like IO-APIC,
134 * then this vector space can be freed and re-used dynamically as the
137 for (i = 0; i < legacy_pic->nr_legacy_irqs; i++)
138 per_cpu(vector_irq, 0)[IRQ0_VECTOR + i] = i;
140 x86_init.irqs.intr_init();
144 * Setup the vector to irq mappings.
146 void setup_vector_irq(int cpu)
148 #ifndef CONFIG_X86_IO_APIC
152 * On most of the platforms, legacy PIC delivers the interrupts on the
153 * boot cpu. But there are certain platforms where PIC interrupts are
154 * delivered to multiple cpu's. If the legacy IRQ is handled by the
155 * legacy PIC, for the new cpu that is coming online, setup the static
156 * legacy vector to irq mapping:
158 for (irq = 0; irq < legacy_pic->nr_legacy_irqs; irq++)
159 per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq;
162 __setup_vector_irq(cpu);
165 static void __init smp_intr_init(void)
168 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
170 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
171 * IPI, driven by wakeup.
173 alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
175 /* IPIs for invalidation */
176 #define ALLOC_INVTLB_VEC(NR) \
177 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+NR, \
178 invalidate_interrupt##NR)
180 switch (NUM_INVALIDATE_TLB_VECTORS) {
182 ALLOC_INVTLB_VEC(31);
184 ALLOC_INVTLB_VEC(30);
186 ALLOC_INVTLB_VEC(29);
188 ALLOC_INVTLB_VEC(28);
190 ALLOC_INVTLB_VEC(27);
192 ALLOC_INVTLB_VEC(26);
194 ALLOC_INVTLB_VEC(25);
196 ALLOC_INVTLB_VEC(24);
198 ALLOC_INVTLB_VEC(23);
200 ALLOC_INVTLB_VEC(22);
202 ALLOC_INVTLB_VEC(21);
204 ALLOC_INVTLB_VEC(20);
206 ALLOC_INVTLB_VEC(19);
208 ALLOC_INVTLB_VEC(18);
210 ALLOC_INVTLB_VEC(17);
212 ALLOC_INVTLB_VEC(16);
214 ALLOC_INVTLB_VEC(15);
216 ALLOC_INVTLB_VEC(14);
218 ALLOC_INVTLB_VEC(13);
220 ALLOC_INVTLB_VEC(12);
222 ALLOC_INVTLB_VEC(11);
224 ALLOC_INVTLB_VEC(10);
248 /* IPI for generic function call */
249 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
251 /* IPI for generic single function call */
252 alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR,
253 call_function_single_interrupt);
255 /* Low priority IPI to cleanup after moving an irq */
256 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
257 set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors);
259 /* IPI used for rebooting/stopping */
260 alloc_intr_gate(REBOOT_VECTOR, reboot_interrupt);
262 #endif /* CONFIG_SMP */
265 static void __init apic_intr_init(void)
269 #ifdef CONFIG_X86_THERMAL_VECTOR
270 alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
272 #ifdef CONFIG_X86_MCE_THRESHOLD
273 alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
276 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
277 /* self generated IPI for local APIC timer */
278 alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
280 /* IPI for X86 platform specific use */
281 alloc_intr_gate(X86_PLATFORM_IPI_VECTOR, x86_platform_ipi);
283 /* IPI vectors for APIC spurious and error interrupts */
284 alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
285 alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
287 /* IRQ work interrupts: */
288 # ifdef CONFIG_IRQ_WORK
289 alloc_intr_gate(IRQ_WORK_VECTOR, irq_work_interrupt);
295 void __init native_init_IRQ(void)
299 /* Execute any quirks before the call gates are initialised: */
300 x86_init.irqs.pre_vector_init();
305 * Cover the whole vector space, no vector can escape
306 * us. (some of these will be overridden and become
307 * 'special' SMP interrupts)
309 for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
310 /* IA32_SYSCALL_VECTOR could be used in trap_init already. */
311 if (!test_bit(i, used_vectors))
312 set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
315 if (!acpi_ioapic && !of_ioapic)
320 * External FPU? Set up irq13 if so, for
321 * original braindamaged IBM FERR coupling.
323 if (boot_cpu_data.hard_math && !cpu_has_fpu)
324 setup_irq(FPU_IRQ, &fpu_irq);
326 irq_ctx_init(smp_processor_id());