1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/prctl.h>
6 #include <linux/slab.h>
7 #include <linux/sched.h>
8 #include <linux/module.h>
10 #include <linux/clockchips.h>
11 #include <linux/random.h>
12 #include <linux/user-return-notifier.h>
13 #include <linux/dmi.h>
14 #include <linux/utsname.h>
15 #include <trace/events/power.h>
16 #include <linux/hw_breakpoint.h>
17 #include <asm/system.h>
19 #include <asm/syscalls.h>
21 #include <asm/uaccess.h>
24 #include <asm/debugreg.h>
26 unsigned long idle_halt;
27 EXPORT_SYMBOL(idle_halt);
28 unsigned long idle_nomwait;
29 EXPORT_SYMBOL(idle_nomwait);
31 struct kmem_cache *task_xstate_cachep;
33 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
36 if (src->thread.xstate) {
37 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
39 if (!dst->thread.xstate)
41 WARN_ON((unsigned long)dst->thread.xstate & 15);
42 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
47 void free_thread_xstate(struct task_struct *tsk)
49 if (tsk->thread.xstate) {
50 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
51 tsk->thread.xstate = NULL;
54 WARN(tsk->thread.ds_ctx, "leaking DS context\n");
57 void free_thread_info(struct thread_info *ti)
59 free_thread_xstate(ti->task);
60 free_pages((unsigned long)ti, get_order(THREAD_SIZE));
63 void arch_task_cache_init(void)
66 kmem_cache_create("task_xstate", xstate_size,
67 __alignof__(union thread_xstate),
68 SLAB_PANIC | SLAB_NOTRACK, NULL);
72 * Free current thread data structures etc..
74 void exit_thread(void)
76 struct task_struct *me = current;
77 struct thread_struct *t = &me->thread;
78 unsigned long *bp = t->io_bitmap_ptr;
81 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
83 t->io_bitmap_ptr = NULL;
84 clear_thread_flag(TIF_IO_BITMAP);
86 * Careful, clear this in the TSS too:
88 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
95 void show_regs_common(void)
97 const char *board, *product;
99 board = dmi_get_system_info(DMI_BOARD_NAME);
102 product = dmi_get_system_info(DMI_PRODUCT_NAME);
106 printk(KERN_CONT "\n");
107 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n",
108 current->pid, current->comm, print_tainted(),
109 init_utsname()->release,
110 (int)strcspn(init_utsname()->version, " "),
111 init_utsname()->version, board, product);
114 void flush_thread(void)
116 struct task_struct *tsk = current;
118 flush_ptrace_hw_breakpoint(tsk);
119 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
121 * Forget coprocessor state..
123 tsk->fpu_counter = 0;
128 static void hard_disable_TSC(void)
130 write_cr4(read_cr4() | X86_CR4_TSD);
133 void disable_TSC(void)
136 if (!test_and_set_thread_flag(TIF_NOTSC))
138 * Must flip the CPU state synchronously with
139 * TIF_NOTSC in the current running context.
145 static void hard_enable_TSC(void)
147 write_cr4(read_cr4() & ~X86_CR4_TSD);
150 static void enable_TSC(void)
153 if (test_and_clear_thread_flag(TIF_NOTSC))
155 * Must flip the CPU state synchronously with
156 * TIF_NOTSC in the current running context.
162 int get_tsc_mode(unsigned long adr)
166 if (test_thread_flag(TIF_NOTSC))
167 val = PR_TSC_SIGSEGV;
171 return put_user(val, (unsigned int __user *)adr);
174 int set_tsc_mode(unsigned int val)
176 if (val == PR_TSC_SIGSEGV)
178 else if (val == PR_TSC_ENABLE)
186 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
187 struct tss_struct *tss)
189 struct thread_struct *prev, *next;
191 prev = &prev_p->thread;
192 next = &next_p->thread;
194 if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
195 test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
196 ds_switch_to(prev_p, next_p);
197 else if (next->debugctlmsr != prev->debugctlmsr)
198 update_debugctlmsr(next->debugctlmsr);
200 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
201 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
202 /* prev and next are different */
203 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
209 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
211 * Copy the relevant range of the IO bitmap.
212 * Normally this is 128 bytes or less:
214 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
215 max(prev->io_bitmap_max, next->io_bitmap_max));
216 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
218 * Clear any possible leftover bits:
220 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
222 propagate_user_return_notify(prev_p, next_p);
225 int sys_fork(struct pt_regs *regs)
227 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
231 * This is trivial, and on the face of it looks like it
232 * could equally well be done in user mode.
234 * Not so, for quite unobvious reasons - register pressure.
235 * In user mode vfork() cannot have a stack frame, and if
236 * done by calling the "clone()" system call directly, you
237 * do not have enough call-clobbered registers to hold all
238 * the information you need.
240 int sys_vfork(struct pt_regs *regs)
242 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
247 sys_clone(unsigned long clone_flags, unsigned long newsp,
248 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
252 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
256 * This gets run with %si containing the
257 * function to call, and %di containing
260 extern void kernel_thread_helper(void);
263 * Create a kernel thread
265 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
269 memset(®s, 0, sizeof(regs));
271 regs.si = (unsigned long) fn;
272 regs.di = (unsigned long) arg;
277 regs.fs = __KERNEL_PERCPU;
278 regs.gs = __KERNEL_STACK_CANARY;
280 regs.ss = __KERNEL_DS;
284 regs.ip = (unsigned long) kernel_thread_helper;
285 regs.cs = __KERNEL_CS | get_kernel_rpl();
286 regs.flags = X86_EFLAGS_IF | 0x2;
288 /* Ok, create the new process.. */
289 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
291 EXPORT_SYMBOL(kernel_thread);
294 * sys_execve() executes a new program.
296 long sys_execve(char __user *name, char __user * __user *argv,
297 char __user * __user *envp, struct pt_regs *regs)
302 filename = getname(name);
303 error = PTR_ERR(filename);
304 if (IS_ERR(filename))
306 error = do_execve(filename, argv, envp, regs);
310 /* Make sure we don't return using sysenter.. */
311 set_thread_flag(TIF_IRET);
320 * Idle related variables and functions
322 unsigned long boot_option_idle_override = 0;
323 EXPORT_SYMBOL(boot_option_idle_override);
326 * Powermanagement idle function, if any..
328 void (*pm_idle)(void);
329 EXPORT_SYMBOL(pm_idle);
333 * This halt magic was a workaround for ancient floppy DMA
334 * wreckage. It should be safe to remove.
336 static int hlt_counter;
337 void disable_hlt(void)
341 EXPORT_SYMBOL(disable_hlt);
343 void enable_hlt(void)
347 EXPORT_SYMBOL(enable_hlt);
349 static inline int hlt_use_halt(void)
351 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
354 static inline int hlt_use_halt(void)
361 * We use this if we don't have any better
364 void default_idle(void)
366 if (hlt_use_halt()) {
367 trace_power_start(POWER_CSTATE, 1);
368 current_thread_info()->status &= ~TS_POLLING;
370 * TS_POLLING-cleared state must be visible before we
376 safe_halt(); /* enables interrupts racelessly */
379 current_thread_info()->status |= TS_POLLING;
382 /* loop is done by the caller */
386 #ifdef CONFIG_APM_MODULE
387 EXPORT_SYMBOL(default_idle);
390 void stop_this_cpu(void *dummy)
396 set_cpu_online(smp_processor_id(), false);
397 disable_local_APIC();
400 if (hlt_works(smp_processor_id()))
405 static void do_nothing(void *unused)
410 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
411 * pm_idle and update to new pm_idle value. Required while changing pm_idle
412 * handler on SMP systems.
414 * Caller must have changed pm_idle to the new value before the call. Old
415 * pm_idle value will not be used by any CPU after the return of this function.
417 void cpu_idle_wait(void)
420 /* kick all the CPUs so that they exit out of pm_idle */
421 smp_call_function(do_nothing, NULL, 1);
423 EXPORT_SYMBOL_GPL(cpu_idle_wait);
426 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
427 * which can obviate IPI to trigger checking of need_resched.
428 * We execute MONITOR against need_resched and enter optimized wait state
429 * through MWAIT. Whenever someone changes need_resched, we would be woken
430 * up from MWAIT (without an IPI).
432 * New with Core Duo processors, MWAIT can take some hints based on CPU
435 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
437 trace_power_start(POWER_CSTATE, (ax>>4)+1);
438 if (!need_resched()) {
439 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
440 clflush((void *)¤t_thread_info()->flags);
442 __monitor((void *)¤t_thread_info()->flags, 0, 0);
449 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
450 static void mwait_idle(void)
452 if (!need_resched()) {
453 trace_power_start(POWER_CSTATE, 1);
454 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
455 clflush((void *)¤t_thread_info()->flags);
457 __monitor((void *)¤t_thread_info()->flags, 0, 0);
468 * On SMP it's slightly faster (but much more power-consuming!)
469 * to poll the ->work.need_resched flag instead of waiting for the
470 * cross-CPU IPI to arrive. Use this option with caution.
472 static void poll_idle(void)
474 trace_power_start(POWER_CSTATE, 0);
476 while (!need_resched())
482 * mwait selection logic:
484 * It depends on the CPU. For AMD CPUs that support MWAIT this is
485 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
486 * then depend on a clock divisor and current Pstate of the core. If
487 * all cores of a processor are in halt state (C1) the processor can
488 * enter the C1E (C1 enhanced) state. If mwait is used this will never
491 * idle=mwait overrides this decision and forces the usage of mwait.
493 static int __cpuinitdata force_mwait;
495 #define MWAIT_INFO 0x05
496 #define MWAIT_ECX_EXTENDED_INFO 0x01
497 #define MWAIT_EDX_C1 0xf0
499 static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
501 u32 eax, ebx, ecx, edx;
506 if (c->cpuid_level < MWAIT_INFO)
509 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
510 /* Check, whether EDX has extended info about MWAIT */
511 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
515 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
518 return (edx & MWAIT_EDX_C1);
522 * Check for AMD CPUs, which have potentially C1E support
524 static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
526 if (c->x86_vendor != X86_VENDOR_AMD)
532 /* Family 0x0f models < rev F do not have C1E */
533 if (c->x86 == 0x0f && c->x86_model < 0x40)
539 static cpumask_var_t c1e_mask;
540 static int c1e_detected;
542 void c1e_remove_cpu(int cpu)
544 if (c1e_mask != NULL)
545 cpumask_clear_cpu(cpu, c1e_mask);
549 * C1E aware idle routine. We check for C1E active in the interrupt
550 * pending message MSR. If we detect C1E, then we handle it the same
551 * way as C3 power states (local apic timer and TSC stop)
553 static void c1e_idle(void)
561 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
562 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
564 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
565 mark_tsc_unstable("TSC halt in AMD C1E");
566 printk(KERN_INFO "System has AMD C1E enabled\n");
567 set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
572 int cpu = smp_processor_id();
574 if (!cpumask_test_cpu(cpu, c1e_mask)) {
575 cpumask_set_cpu(cpu, c1e_mask);
577 * Force broadcast so ACPI can not interfere.
579 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
581 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
584 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
589 * The switch back from broadcast mode needs to be
590 * called with interrupts disabled.
593 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
599 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
602 if (pm_idle == poll_idle && smp_num_siblings > 1) {
603 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
604 " performance may degrade.\n");
610 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
612 * One CPU supports mwait => All CPUs supports mwait
614 printk(KERN_INFO "using mwait in idle threads.\n");
615 pm_idle = mwait_idle;
616 } else if (check_c1e_idle(c)) {
617 printk(KERN_INFO "using C1E aware idle routine\n");
620 pm_idle = default_idle;
623 void __init init_c1e_mask(void)
625 /* If we're using c1e_idle, we need to allocate c1e_mask. */
626 if (pm_idle == c1e_idle)
627 zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
630 static int __init idle_setup(char *str)
635 if (!strcmp(str, "poll")) {
636 printk("using polling idle threads.\n");
638 } else if (!strcmp(str, "mwait"))
640 else if (!strcmp(str, "halt")) {
642 * When the boot option of idle=halt is added, halt is
643 * forced to be used for CPU idle. In such case CPU C2/C3
644 * won't be used again.
645 * To continue to load the CPU idle driver, don't touch
646 * the boot_option_idle_override.
648 pm_idle = default_idle;
651 } else if (!strcmp(str, "nomwait")) {
653 * If the boot option of "idle=nomwait" is added,
654 * it means that mwait will be disabled for CPU C2/C3
655 * states. In such case it won't touch the variable
656 * of boot_option_idle_override.
663 boot_option_idle_override = 1;
666 early_param("idle", idle_setup);
668 unsigned long arch_align_stack(unsigned long sp)
670 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
671 sp -= get_random_int() % 8192;
675 unsigned long arch_randomize_brk(struct mm_struct *mm)
677 unsigned long range_end = mm->brk + 0x02000000;
678 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;