2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
50 #include <linux/tboot.h>
57 #include <asm/trampoline.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
65 #include <asm/setup.h>
66 #include <asm/uv/uv.h>
67 #include <asm/debugreg.h>
68 #include <linux/mc146818rtc.h>
70 #include <asm/smpboot_hooks.h>
73 u8 apicid_2_node[MAX_APICID];
74 static int low_mappings;
77 /* State of each CPU */
78 DEFINE_PER_CPU(int, cpu_state) = { 0 };
80 /* Store all idle threads, this can be reused instead of creating
81 * a new thread. Also avoids complicated thread destroy functionality
84 #ifdef CONFIG_HOTPLUG_CPU
86 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
87 * removed after init for !CONFIG_HOTPLUG_CPU.
89 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
90 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
91 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
93 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
94 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
95 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
98 /* Number of siblings per CPU package */
99 int smp_num_siblings = 1;
100 EXPORT_SYMBOL(smp_num_siblings);
102 /* Last level cache ID of each logical CPU */
103 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
105 /* representing HT siblings of each logical CPU */
106 DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
107 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
109 /* representing HT and core siblings of each logical CPU */
110 DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
111 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
113 /* Per CPU bogomips and other parameters */
114 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
115 EXPORT_PER_CPU_SYMBOL(cpu_info);
117 atomic_t init_deasserted;
119 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
120 /* which node each logical CPU is on */
121 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
122 EXPORT_SYMBOL(cpu_to_node_map);
124 /* set up a mapping between cpu and node. */
125 static void map_cpu_to_node(int cpu, int node)
127 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
128 cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
129 cpu_to_node_map[cpu] = node;
132 /* undo a mapping between cpu and node. */
133 static void unmap_cpu_to_node(int cpu)
137 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
138 for (node = 0; node < MAX_NUMNODES; node++)
139 cpumask_clear_cpu(cpu, node_to_cpumask_map[node]);
140 cpu_to_node_map[cpu] = 0;
142 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
143 #define map_cpu_to_node(cpu, node) ({})
144 #define unmap_cpu_to_node(cpu) ({})
148 static int boot_cpu_logical_apicid;
150 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
151 { [0 ... NR_CPUS-1] = BAD_APICID };
153 static void map_cpu_to_logical_apicid(void)
155 int cpu = smp_processor_id();
156 int apicid = logical_smp_processor_id();
157 int node = apic->apicid_to_node(apicid);
159 if (!node_online(node))
160 node = first_online_node;
162 cpu_2_logical_apicid[cpu] = apicid;
163 map_cpu_to_node(cpu, node);
166 void numa_remove_cpu(int cpu)
168 cpu_2_logical_apicid[cpu] = BAD_APICID;
169 unmap_cpu_to_node(cpu);
172 #define map_cpu_to_logical_apicid() do {} while (0)
176 * Report back to the Boot Processor.
179 static void __cpuinit smp_callin(void)
182 unsigned long timeout;
185 * If waken up by an INIT in an 82489DX configuration
186 * we may get here before an INIT-deassert IPI reaches
187 * our local APIC. We have to wait for the IPI or we'll
188 * lock up on an APIC access.
190 if (apic->wait_for_init_deassert)
191 apic->wait_for_init_deassert(&init_deasserted);
194 * (This works even if the APIC is not enabled.)
196 phys_id = read_apic_id();
197 cpuid = smp_processor_id();
198 if (cpumask_test_cpu(cpuid, cpu_callin_mask)) {
199 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
202 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
205 * STARTUP IPIs are fragile beasts as they might sometimes
206 * trigger some glue motherboard logic. Complete APIC bus
207 * silence for 1 second, this overestimates the time the
208 * boot CPU is spending to send the up to 2 STARTUP IPIs
209 * by a factor of two. This should be enough.
213 * Waiting 2s total for startup (udelay is not yet working)
215 timeout = jiffies + 2*HZ;
216 while (time_before(jiffies, timeout)) {
218 * Has the boot CPU finished it's STARTUP sequence?
220 if (cpumask_test_cpu(cpuid, cpu_callout_mask))
225 if (!time_before(jiffies, timeout)) {
226 panic("%s: CPU%d started up but did not get a callout!\n",
231 * the boot CPU has finished the init stage and is spinning
232 * on callin_map until we finish. We are free to set up this
233 * CPU, first the APIC. (this is probably redundant on most
237 pr_debug("CALLIN, before setup_local_APIC().\n");
238 if (apic->smp_callin_clear_local_apic)
239 apic->smp_callin_clear_local_apic();
241 end_local_APIC_setup();
242 map_cpu_to_logical_apicid();
244 notify_cpu_starting(cpuid);
248 * Need to enable IRQs because it can take longer and then
249 * the NMI watchdog might kill us.
254 pr_debug("Stack at about %p\n", &cpuid);
257 * Save our processor parameters
259 smp_store_cpu_info(cpuid);
262 * Allow the master to continue.
264 cpumask_set_cpu(cpuid, cpu_callin_mask);
268 * Activate a secondary processor.
270 notrace static void __cpuinit start_secondary(void *unused)
273 * Don't put *anything* before cpu_init(), SMP booting is too
274 * fragile that we want to limit the things done here to the
275 * most necessary things.
282 /* otherwise gcc will move up smp_processor_id before the cpu_init */
285 * Check TSC synchronization with the BP:
287 check_tsc_sync_target();
289 if (nmi_watchdog == NMI_IO_APIC) {
290 disable_8259A_irq(0);
291 enable_NMI_through_LVT0();
301 /* This must be done before setting cpu_online_mask */
302 set_cpu_sibling_map(raw_smp_processor_id());
306 * We need to hold call_lock, so there is no inconsistency
307 * between the time smp_call_function() determines number of
308 * IPI recipients, and the time when the determination is made
309 * for which cpus receive the IPI. Holding this
310 * lock helps us to not include this cpu in a currently in progress
311 * smp_call_function().
313 * We need to hold vector_lock so there the set of online cpus
314 * does not change while we are assigning vectors to cpus. Holding
315 * this lock ensures we don't half assign or remove an irq from a cpu.
319 __setup_vector_irq(smp_processor_id());
320 set_cpu_online(smp_processor_id(), true);
321 unlock_vector_lock();
323 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
325 /* enable local interrupts */
328 x86_cpuinit.setup_percpu_clockev();
331 load_debug_registers();
335 #ifdef CONFIG_CPUMASK_OFFSTACK
336 /* In this case, llc_shared_map is a pointer to a cpumask. */
337 static inline void copy_cpuinfo_x86(struct cpuinfo_x86 *dst,
338 const struct cpuinfo_x86 *src)
340 struct cpumask *llc = dst->llc_shared_map;
342 dst->llc_shared_map = llc;
345 static inline void copy_cpuinfo_x86(struct cpuinfo_x86 *dst,
346 const struct cpuinfo_x86 *src)
350 #endif /* CONFIG_CPUMASK_OFFSTACK */
353 * The bootstrap kernel entry code has set these up. Save them for
357 void __cpuinit smp_store_cpu_info(int id)
359 struct cpuinfo_x86 *c = &cpu_data(id);
361 copy_cpuinfo_x86(c, &boot_cpu_data);
364 identify_secondary_cpu(c);
368 void __cpuinit set_cpu_sibling_map(int cpu)
371 struct cpuinfo_x86 *c = &cpu_data(cpu);
373 cpumask_set_cpu(cpu, cpu_sibling_setup_mask);
375 if (smp_num_siblings > 1) {
376 for_each_cpu(i, cpu_sibling_setup_mask) {
377 struct cpuinfo_x86 *o = &cpu_data(i);
379 if (c->phys_proc_id == o->phys_proc_id &&
380 c->cpu_core_id == o->cpu_core_id) {
381 cpumask_set_cpu(i, cpu_sibling_mask(cpu));
382 cpumask_set_cpu(cpu, cpu_sibling_mask(i));
383 cpumask_set_cpu(i, cpu_core_mask(cpu));
384 cpumask_set_cpu(cpu, cpu_core_mask(i));
385 cpumask_set_cpu(i, c->llc_shared_map);
386 cpumask_set_cpu(cpu, o->llc_shared_map);
390 cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
393 cpumask_set_cpu(cpu, c->llc_shared_map);
395 if (current_cpu_data.x86_max_cores == 1) {
396 cpumask_copy(cpu_core_mask(cpu), cpu_sibling_mask(cpu));
401 for_each_cpu(i, cpu_sibling_setup_mask) {
402 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
403 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
404 cpumask_set_cpu(i, c->llc_shared_map);
405 cpumask_set_cpu(cpu, cpu_data(i).llc_shared_map);
407 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
408 cpumask_set_cpu(i, cpu_core_mask(cpu));
409 cpumask_set_cpu(cpu, cpu_core_mask(i));
411 * Does this new cpu bringup a new core?
413 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1) {
415 * for each core in package, increment
416 * the booted_cores for this new cpu
418 if (cpumask_first(cpu_sibling_mask(i)) == i)
421 * increment the core count for all
422 * the other cpus in this package
425 cpu_data(i).booted_cores++;
426 } else if (i != cpu && !c->booted_cores)
427 c->booted_cores = cpu_data(i).booted_cores;
432 /* maps the cpu to the sched domain representing multi-core */
433 const struct cpumask *cpu_coregroup_mask(int cpu)
435 struct cpuinfo_x86 *c = &cpu_data(cpu);
437 * For perf, we return last level cache shared map.
438 * And for power savings, we return cpu_core_map
440 if ((sched_mc_power_savings || sched_smt_power_savings) &&
441 !(cpu_has(c, X86_FEATURE_AMD_DCM)))
442 return cpu_core_mask(cpu);
444 return c->llc_shared_map;
447 static void impress_friends(void)
450 unsigned long bogosum = 0;
452 * Allow the user to impress friends.
454 pr_debug("Before bogomips.\n");
455 for_each_possible_cpu(cpu)
456 if (cpumask_test_cpu(cpu, cpu_callout_mask))
457 bogosum += cpu_data(cpu).loops_per_jiffy;
459 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
462 (bogosum/(5000/HZ))%100);
464 pr_debug("Before bogocount - setting activated=1.\n");
467 void __inquire_remote_apic(int apicid)
469 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
470 char *names[] = { "ID", "VERSION", "SPIV" };
474 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid);
476 for (i = 0; i < ARRAY_SIZE(regs); i++) {
477 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]);
482 status = safe_apic_wait_icr_idle();
485 "a previous APIC delivery may have failed\n");
487 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
492 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
493 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
496 case APIC_ICR_RR_VALID:
497 status = apic_read(APIC_RRR);
498 printk(KERN_CONT "%08x\n", status);
501 printk(KERN_CONT "failed\n");
507 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
508 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
509 * won't ... remember to clear down the APIC, etc later.
512 wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
514 unsigned long send_status, accept_status = 0;
518 /* Boot on the stack */
519 /* Kick the second */
520 apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid);
522 pr_debug("Waiting for send to finish...\n");
523 send_status = safe_apic_wait_icr_idle();
526 * Give the other CPU some time to accept the IPI.
529 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
530 maxlvt = lapic_get_maxlvt();
531 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
532 apic_write(APIC_ESR, 0);
533 accept_status = (apic_read(APIC_ESR) & 0xEF);
535 pr_debug("NMI sent.\n");
538 printk(KERN_ERR "APIC never delivered???\n");
540 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
542 return (send_status | accept_status);
546 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
548 unsigned long send_status, accept_status = 0;
549 int maxlvt, num_starts, j;
551 maxlvt = lapic_get_maxlvt();
554 * Be paranoid about clearing APIC errors.
556 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
557 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
558 apic_write(APIC_ESR, 0);
562 pr_debug("Asserting INIT.\n");
565 * Turn INIT on target chip
570 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
573 pr_debug("Waiting for send to finish...\n");
574 send_status = safe_apic_wait_icr_idle();
578 pr_debug("Deasserting INIT.\n");
582 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
584 pr_debug("Waiting for send to finish...\n");
585 send_status = safe_apic_wait_icr_idle();
588 atomic_set(&init_deasserted, 1);
591 * Should we send STARTUP IPIs ?
593 * Determine this based on the APIC version.
594 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
596 if (APIC_INTEGRATED(apic_version[phys_apicid]))
602 * Paravirt / VMI wants a startup IPI hook here to set up the
603 * target processor state.
605 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
606 (unsigned long)stack_start.sp);
609 * Run STARTUP IPI loop.
611 pr_debug("#startup loops: %d.\n", num_starts);
613 for (j = 1; j <= num_starts; j++) {
614 pr_debug("Sending STARTUP #%d.\n", j);
615 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
616 apic_write(APIC_ESR, 0);
618 pr_debug("After apic_write.\n");
625 /* Boot on the stack */
626 /* Kick the second */
627 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
631 * Give the other CPU some time to accept the IPI.
635 pr_debug("Startup point 1.\n");
637 pr_debug("Waiting for send to finish...\n");
638 send_status = safe_apic_wait_icr_idle();
641 * Give the other CPU some time to accept the IPI.
644 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
645 apic_write(APIC_ESR, 0);
646 accept_status = (apic_read(APIC_ESR) & 0xEF);
647 if (send_status || accept_status)
650 pr_debug("After Startup.\n");
653 printk(KERN_ERR "APIC never delivered???\n");
655 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
657 return (send_status | accept_status);
661 struct work_struct work;
662 struct task_struct *idle;
663 struct completion done;
667 static void __cpuinit do_fork_idle(struct work_struct *work)
669 struct create_idle *c_idle =
670 container_of(work, struct create_idle, work);
672 c_idle->idle = fork_idle(c_idle->cpu);
673 complete(&c_idle->done);
677 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
678 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
679 * Returns zero if CPU booted OK, else error code from
680 * ->wakeup_secondary_cpu.
682 static int __cpuinit do_boot_cpu(int apicid, int cpu)
684 unsigned long boot_error = 0;
685 unsigned long start_ip;
687 struct create_idle c_idle = {
689 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
692 INIT_WORK(&c_idle.work, do_fork_idle);
694 alternatives_smp_switch(1);
696 c_idle.idle = get_idle_for_cpu(cpu);
699 * We can't use kernel_thread since we must avoid to
700 * reschedule the child.
703 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
704 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
705 init_idle(c_idle.idle, cpu);
709 if (!keventd_up() || current_is_keventd())
710 c_idle.work.func(&c_idle.work);
712 schedule_work(&c_idle.work);
713 wait_for_completion(&c_idle.done);
716 if (IS_ERR(c_idle.idle)) {
717 printk("failed fork for CPU %d\n", cpu);
718 return PTR_ERR(c_idle.idle);
721 set_idle_for_cpu(cpu, c_idle.idle);
723 per_cpu(current_task, cpu) = c_idle.idle;
725 /* Stack for startup_32 can be just as for start_secondary onwards */
728 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
729 initial_gs = per_cpu_offset(cpu);
730 per_cpu(kernel_stack, cpu) =
731 (unsigned long)task_stack_page(c_idle.idle) -
732 KERNEL_STACK_OFFSET + THREAD_SIZE;
734 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
735 initial_code = (unsigned long)start_secondary;
736 stack_start.sp = (void *) c_idle.idle->thread.sp;
738 /* start_ip had better be page-aligned! */
739 start_ip = setup_trampoline();
741 /* So we see what's up */
742 printk(KERN_INFO "Booting processor %d APIC 0x%x ip 0x%lx\n",
743 cpu, apicid, start_ip);
746 * This grunge runs the startup process for
747 * the targeted processor.
750 atomic_set(&init_deasserted, 0);
752 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
754 pr_debug("Setting warm reset code and vector.\n");
756 smpboot_setup_warm_reset_vector(start_ip);
758 * Be paranoid about clearing APIC errors.
760 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
761 apic_write(APIC_ESR, 0);
767 * Kick the secondary CPU. Use the method in the APIC driver
768 * if it's defined - or use an INIT boot APIC message otherwise:
770 if (apic->wakeup_secondary_cpu)
771 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
773 boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip);
777 * allow APs to start initializing.
779 pr_debug("Before Callout %d.\n", cpu);
780 cpumask_set_cpu(cpu, cpu_callout_mask);
781 pr_debug("After Callout %d.\n", cpu);
784 * Wait 5s total for a response
786 for (timeout = 0; timeout < 50000; timeout++) {
787 if (cpumask_test_cpu(cpu, cpu_callin_mask))
788 break; /* It has booted */
792 if (cpumask_test_cpu(cpu, cpu_callin_mask)) {
793 /* number CPUs logically, starting from 1 (BSP is 0) */
795 printk(KERN_INFO "CPU%d: ", cpu);
796 print_cpu_info(&cpu_data(cpu));
797 pr_debug("CPU has booted.\n");
800 if (*((volatile unsigned char *)trampoline_base)
802 /* trampoline started but...? */
803 printk(KERN_ERR "Stuck ??\n");
805 /* trampoline code not run */
806 printk(KERN_ERR "Not responding.\n");
807 if (apic->inquire_remote_apic)
808 apic->inquire_remote_apic(apicid);
813 /* Try to put things back the way they were before ... */
814 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
816 /* was set by do_boot_cpu() */
817 cpumask_clear_cpu(cpu, cpu_callout_mask);
819 /* was set by cpu_init() */
820 cpumask_clear_cpu(cpu, cpu_initialized_mask);
822 set_cpu_present(cpu, false);
823 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
826 /* mark "stuck" area as not stuck */
827 *((volatile unsigned long *)trampoline_base) = 0;
829 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
831 * Cleanup possible dangling ends...
833 smpboot_restore_warm_reset_vector();
839 int __cpuinit native_cpu_up(unsigned int cpu)
841 int apicid = apic->cpu_present_to_apicid(cpu);
845 WARN_ON(irqs_disabled());
847 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
849 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
850 !physid_isset(apicid, phys_cpu_present_map)) {
851 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
856 * Already booted CPU?
858 if (cpumask_test_cpu(cpu, cpu_callin_mask)) {
859 pr_debug("do_boot_cpu %d Already started\n", cpu);
864 * Save current MTRR state in case it was changed since early boot
865 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
869 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
872 /* init low mem mapping */
873 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
874 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
878 err = do_boot_cpu(apicid, cpu);
880 zap_low_mappings(false);
883 err = do_boot_cpu(apicid, cpu);
886 pr_debug("do_boot_cpu failed %d\n", err);
891 * Check TSC synchronization with the AP (keep irqs disabled
894 local_irq_save(flags);
895 check_tsc_sync_source(cpu);
896 local_irq_restore(flags);
898 while (!cpu_online(cpu)) {
900 touch_nmi_watchdog();
907 * Fall back to non SMP mode after errors.
909 * RED-PEN audit/test this more. I bet there is more state messed up here.
911 static __init void disable_smp(void)
913 init_cpu_present(cpumask_of(0));
914 init_cpu_possible(cpumask_of(0));
915 smpboot_clear_io_apic_irqs();
917 if (smp_found_config)
918 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
920 physid_set_mask_of_physid(0, &phys_cpu_present_map);
921 map_cpu_to_logical_apicid();
922 cpumask_set_cpu(0, cpu_sibling_mask(0));
923 cpumask_set_cpu(0, cpu_core_mask(0));
927 * Various sanity checks.
929 static int __init smp_sanity_check(unsigned max_cpus)
933 #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
934 if (def_to_bigsmp && nr_cpu_ids > 8) {
939 "More than 8 CPUs detected - skipping them.\n"
940 "Use CONFIG_X86_BIGSMP.\n");
943 for_each_present_cpu(cpu) {
945 set_cpu_present(cpu, false);
950 for_each_possible_cpu(cpu) {
952 set_cpu_possible(cpu, false);
960 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
962 "weird, boot CPU (#%d) not listed by the BIOS.\n",
963 hard_smp_processor_id());
965 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
969 * If we couldn't find an SMP configuration at boot time,
970 * get out of here now!
972 if (!smp_found_config && !acpi_lapic) {
974 printk(KERN_NOTICE "SMP motherboard not detected.\n");
976 if (APIC_init_uniprocessor())
977 printk(KERN_NOTICE "Local APIC not detected."
978 " Using dummy APIC emulation.\n");
983 * Should not be necessary because the MP table should list the boot
984 * CPU too, but we do it for the sake of robustness anyway.
986 if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
988 "weird, boot CPU (#%d) not listed by the BIOS.\n",
989 boot_cpu_physical_apicid);
990 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
995 * If we couldn't find a local APIC, then get out of here now!
997 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1000 pr_err("BIOS bug, local APIC #%d not detected!...\n",
1001 boot_cpu_physical_apicid);
1002 pr_err("... forcing use of dummy APIC emulation."
1003 "(tell your hw vendor)\n");
1005 smpboot_clear_io_apic();
1006 arch_disable_smp_support();
1010 verify_local_APIC();
1013 * If SMP should be disabled, then really disable it!
1016 printk(KERN_INFO "SMP mode deactivated.\n");
1017 smpboot_clear_io_apic();
1019 localise_nmi_watchdog();
1023 end_local_APIC_setup();
1030 static void __init smp_cpu_index_default(void)
1033 struct cpuinfo_x86 *c;
1035 for_each_possible_cpu(i) {
1037 /* mark all to hotplug */
1038 c->cpu_index = nr_cpu_ids;
1043 * Prepare for SMP bootup. The MP table or ACPI has been read
1044 * earlier. Just do some sanity checking here and enable APIC mode.
1046 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1051 smp_cpu_index_default();
1052 current_cpu_data = boot_cpu_data;
1053 cpumask_copy(cpu_callin_mask, cpumask_of(0));
1056 * Setup boot CPU information
1058 smp_store_cpu_info(0); /* Final full version of the data */
1059 #ifdef CONFIG_X86_32
1060 boot_cpu_logical_apicid = logical_smp_processor_id();
1062 current_thread_info()->cpu = 0; /* needed? */
1063 for_each_possible_cpu(i) {
1064 zalloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
1065 zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
1066 zalloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
1068 set_cpu_sibling_map(0);
1071 #ifdef CONFIG_X86_64
1072 default_setup_apic_routing();
1075 if (smp_sanity_check(max_cpus) < 0) {
1076 printk(KERN_INFO "SMP disabled\n");
1082 if (read_apic_id() != boot_cpu_physical_apicid) {
1083 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1084 read_apic_id(), boot_cpu_physical_apicid);
1085 /* Or can we switch back to PIC here? */
1092 * Switch from PIC to APIC mode.
1097 * Enable IO APIC before setting up error vector
1099 if (!skip_ioapic_setup && nr_ioapics)
1102 end_local_APIC_setup();
1104 map_cpu_to_logical_apicid();
1106 if (apic->setup_portio_remap)
1107 apic->setup_portio_remap();
1109 smpboot_setup_io_apic();
1111 * Set up local APIC timer on boot CPU.
1114 printk(KERN_INFO "CPU%d: ", 0);
1115 print_cpu_info(&cpu_data(0));
1116 x86_init.timers.setup_percpu_clockev();
1121 set_mtrr_aps_delayed_init();
1126 void arch_enable_nonboot_cpus_begin(void)
1128 set_mtrr_aps_delayed_init();
1131 void arch_enable_nonboot_cpus_end(void)
1137 * Early setup to make printk work.
1139 void __init native_smp_prepare_boot_cpu(void)
1141 int me = smp_processor_id();
1142 switch_to_new_gdt(me);
1143 /* already set me in cpu_online_mask in boot_cpu_init() */
1144 cpumask_set_cpu(me, cpu_callout_mask);
1145 per_cpu(cpu_state, me) = CPU_ONLINE;
1148 void __init native_smp_cpus_done(unsigned int max_cpus)
1150 pr_debug("Boot done.\n");
1153 #ifdef CONFIG_X86_IO_APIC
1154 setup_ioapic_dest();
1156 check_nmi_watchdog();
1160 static int __initdata setup_possible_cpus = -1;
1161 static int __init _setup_possible_cpus(char *str)
1163 get_option(&str, &setup_possible_cpus);
1166 early_param("possible_cpus", _setup_possible_cpus);
1170 * cpu_possible_mask should be static, it cannot change as cpu's
1171 * are onlined, or offlined. The reason is per-cpu data-structures
1172 * are allocated by some modules at init time, and dont expect to
1173 * do this dynamically on cpu arrival/departure.
1174 * cpu_present_mask on the other hand can change dynamically.
1175 * In case when cpu_hotplug is not compiled, then we resort to current
1176 * behaviour, which is cpu_possible == cpu_present.
1179 * Three ways to find out the number of additional hotplug CPUs:
1180 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1181 * - The user can overwrite it with possible_cpus=NUM
1182 * - Otherwise don't reserve additional CPUs.
1183 * We do this because additional CPUs waste a lot of memory.
1186 __init void prefill_possible_map(void)
1190 /* no processor from mptable or madt */
1191 if (!num_processors)
1194 if (setup_possible_cpus == -1)
1195 possible = num_processors + disabled_cpus;
1197 possible = setup_possible_cpus;
1199 total_cpus = max_t(int, possible, num_processors + disabled_cpus);
1201 if (possible > CONFIG_NR_CPUS) {
1203 "%d Processors exceeds NR_CPUS limit of %d\n",
1204 possible, CONFIG_NR_CPUS);
1205 possible = CONFIG_NR_CPUS;
1208 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1209 possible, max_t(int, possible - num_processors, 0));
1211 for (i = 0; i < possible; i++)
1212 set_cpu_possible(i, true);
1214 nr_cpu_ids = possible;
1217 #ifdef CONFIG_HOTPLUG_CPU
1219 static void remove_siblinginfo(int cpu)
1222 struct cpuinfo_x86 *c = &cpu_data(cpu);
1224 for_each_cpu(sibling, cpu_core_mask(cpu)) {
1225 cpumask_clear_cpu(cpu, cpu_core_mask(sibling));
1227 * last thread sibling in this cpu core going down
1229 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1)
1230 cpu_data(sibling).booted_cores--;
1233 for_each_cpu(sibling, cpu_sibling_mask(cpu))
1234 cpumask_clear_cpu(cpu, cpu_sibling_mask(sibling));
1235 cpumask_clear(cpu_sibling_mask(cpu));
1236 cpumask_clear(cpu_core_mask(cpu));
1237 c->phys_proc_id = 0;
1239 cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
1242 static void __ref remove_cpu_from_maps(int cpu)
1244 set_cpu_online(cpu, false);
1245 cpumask_clear_cpu(cpu, cpu_callout_mask);
1246 cpumask_clear_cpu(cpu, cpu_callin_mask);
1247 /* was set by cpu_init() */
1248 cpumask_clear_cpu(cpu, cpu_initialized_mask);
1249 numa_remove_cpu(cpu);
1252 void cpu_disable_common(void)
1254 int cpu = smp_processor_id();
1257 * Allow any queued timer interrupts to get serviced
1258 * This is only a temporary solution until we cleanup
1259 * fixup_irqs as we do for IA64.
1264 local_irq_disable();
1265 remove_siblinginfo(cpu);
1267 /* It's now safe to remove this processor from the online map */
1269 remove_cpu_from_maps(cpu);
1270 unlock_vector_lock();
1272 hw_breakpoint_disable();
1275 int native_cpu_disable(void)
1277 int cpu = smp_processor_id();
1280 * Perhaps use cpufreq to drop frequency, but that could go
1281 * into generic code.
1283 * We won't take down the boot processor on i386 due to some
1284 * interrupts only being able to be serviced by the BSP.
1285 * Especially so if we're not using an IOAPIC -zwane
1290 if (nmi_watchdog == NMI_LOCAL_APIC)
1291 stop_apic_nmi_watchdog(NULL);
1294 cpu_disable_common();
1298 void native_cpu_die(unsigned int cpu)
1300 /* We don't do anything here: idle task is faking death itself. */
1303 for (i = 0; i < 10; i++) {
1304 /* They ack this in play_dead by setting CPU_DEAD */
1305 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1306 printk(KERN_INFO "CPU %d is now offline\n", cpu);
1307 if (1 == num_online_cpus())
1308 alternatives_smp_switch(0);
1313 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1316 void play_dead_common(void)
1319 reset_lazy_tlbstate();
1320 irq_ctx_exit(raw_smp_processor_id());
1321 c1e_remove_cpu(raw_smp_processor_id());
1325 __get_cpu_var(cpu_state) = CPU_DEAD;
1328 * With physical CPU hotplug, we should halt the cpu
1330 local_irq_disable();
1333 void native_play_dead(void)
1336 tboot_shutdown(TB_SHUTDOWN_WFS);
1340 #else /* ... !CONFIG_HOTPLUG_CPU */
1341 int native_cpu_disable(void)
1346 void native_cpu_die(unsigned int cpu)
1348 /* We said "no" in __cpu_disable */
1352 void native_play_dead(void)