arch/x86/kernel/tlb_uv.c

   1 /*
   2  *      SGI UltraViolet TLB flush routines.
   3  *
   4  *      (c) 2008-2010 Cliff Wickman <cpw@sgi.com>, SGI.
   5  *
   6  *      This code is released under the GNU General Public License version 2 or
   7  *      later.
   8  */
   9 #include <linux/seq_file.h>
  10 #include <linux/proc_fs.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13
  14 #include <asm/mmu_context.h>
  15 #include <asm/uv/uv.h>
  16 #include <asm/uv/uv_mmrs.h>
  17 #include <asm/uv/uv_hub.h>
  18 #include <asm/uv/uv_bau.h>
  19 #include <asm/apic.h>
  20 #include <asm/idle.h>
  21 #include <asm/tsc.h>
  22 #include <asm/irq_vectors.h>
  23 #include <asm/timer.h>
  24
  25 struct msg_desc {
  26         struct bau_payload_queue_entry *msg;
  27         int msg_slot;
  28         int sw_ack_slot;
  29         struct bau_payload_queue_entry *va_queue_first;
  30         struct bau_payload_queue_entry *va_queue_last;
  31 };
  32
  33 /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  34 static int timeout_base_ns[] = {
  35                 20,
  36                 160,
  37                 1280,
  38                 10240,
  39                 81920,
  40                 655360,
  41                 5242880,
  42                 167772160
  43 };
  44 static int timeout_us;
  45
  46 #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x000000000bUL
  47
  48 static int uv_bau_max_concurrent __read_mostly;
  49
  50 static int nobau;
  51 static int __init setup_nobau(char *arg)
  52 {
  53         nobau = 1;
  54         return 0;
  55 }
  56 early_param("nobau", setup_nobau);
  57
  58 /* base pnode in this partition */
  59 static int uv_partition_base_pnode __read_mostly;
  60 /* position of pnode (which is nasid>>1): */
  61 static int uv_nshift __read_mostly;
  62 static unsigned long uv_mmask __read_mostly;
  63
  64 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
  65 static DEFINE_PER_CPU(struct bau_control, bau_control);
  66 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
  67
  68 struct reset_args {
  69         int sender;
  70 };
  71
  72 /*
  73  * Determine the first node on a uvhub. 'Nodes' are used for kernel
  74  * memory allocation.
  75  */
  76 static int __init uvhub_to_first_node(int uvhub)
  77 {
  78         int node, b;
  79
  80         for_each_online_node(node) {
  81                 b = uv_node_to_blade_id(node);
  82                 if (uvhub == b)
  83                         return node;
  84         }
  85         return -1;
  86 }
  87
  88 /*
  89  * Determine the apicid of the first cpu on a uvhub.
  90  */
  91 static int __init uvhub_to_first_apicid(int uvhub)
  92 {
  93         int cpu;
  94
  95         for_each_present_cpu(cpu)
  96                 if (uvhub == uv_cpu_to_blade_id(cpu))
  97                         return per_cpu(x86_cpu_to_apicid, cpu);
  98         return -1;
  99 }
 100
 101 /*
 102  * Free a software acknowledge hardware resource by clearing its Pending
 103  * bit. This will return a reply to the sender.
 104  * If the message has timed out, a reply has already been sent by the
 105  * hardware but the resource has not been released. In that case our
 106  * clear of the Timeout bit (as well) will free the resource. No reply will
 107  * be sent (the hardware will only do one reply per message).
 108  */
 109 static inline void uv_reply_to_message(struct msg_desc *mdp,
 110                                        struct bau_control *bcp)
 111 {
 112         unsigned long dw;
 113         struct bau_payload_queue_entry *msg;
 114
 115         msg = mdp->msg;
 116         if (!msg->canceled) {
 117                 dw = (msg->sw_ack_vector << UV_SW_ACK_NPENDING) |
 118                                                 msg->sw_ack_vector;
 119                 uv_write_local_mmr(
 120                                 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
 121         }
 122         msg->replied_to = 1;
 123         msg->sw_ack_vector = 0;
 124 }
 125
 126 /*
 127  * Process the receipt of a RETRY message
 128  */
 129 static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
 130                                             struct bau_control *bcp)
 131 {
 132         int i;
 133         int cancel_count = 0;
 134         int slot2;
 135         unsigned long msg_res;
 136         unsigned long mmr = 0;
 137         struct bau_payload_queue_entry *msg;
 138         struct bau_payload_queue_entry *msg2;
 139         struct ptc_stats *stat;
 140
 141         msg = mdp->msg;
 142         stat = &per_cpu(ptcstats, bcp->cpu);
 143         stat->d_retries++;
 144         /*
 145          * cancel any message from msg+1 to the retry itself
 146          */
 147         for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
 148                 if (msg2 > mdp->va_queue_last)
 149                         msg2 = mdp->va_queue_first;
 150                 if (msg2 == msg)
 151                         break;
 152
 153                 /* same conditions for cancellation as uv_do_reset */
 154                 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
 155                     (msg2->sw_ack_vector) && ((msg2->sw_ack_vector &
 156                         msg->sw_ack_vector) == 0) &&
 157                     (msg2->sending_cpu == msg->sending_cpu) &&
 158                     (msg2->msg_type != MSG_NOOP)) {
 159                         slot2 = msg2 - mdp->va_queue_first;
 160                         mmr = uv_read_local_mmr
 161                                 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
 162                         msg_res = ((msg2->sw_ack_vector << 8) |
 163                                    msg2->sw_ack_vector);
 164                         /*
 165                          * This is a message retry; clear the resources held
 166                          * by the previous message only if they timed out.
 167                          * If it has not timed out we have an unexpected
 168                          * situation to report.
 169                          */
 170                         if (mmr & (msg_res << 8)) {
 171                                 /*
 172                                  * is the resource timed out?
 173                                  * make everyone ignore the cancelled message.
 174                                  */
 175                                 msg2->canceled = 1;
 176                                 stat->d_canceled++;
 177                                 cancel_count++;
 178                                 uv_write_local_mmr(
 179                                     UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
 180                                         (msg_res << 8) | msg_res);
 181                         } else
 182                                 printk(KERN_INFO "note bau retry: no effect\n");
 183                 }
 184         }
 185         if (!cancel_count)
 186                 stat->d_nocanceled++;
 187 }
 188
 189 /*
 190  * Do all the things a cpu should do for a TLB shootdown message.
 191  * Other cpu's may come here at the same time for this message.
 192  */
 193 static void uv_bau_process_message(struct msg_desc *mdp,
 194                                    struct bau_control *bcp)
 195 {
 196         int msg_ack_count;
 197         short socket_ack_count = 0;
 198         struct ptc_stats *stat;
 199         struct bau_payload_queue_entry *msg;
 200         struct bau_control *smaster = bcp->socket_master;
 201
 202         /*
 203          * This must be a normal message, or retry of a normal message
 204          */
 205         msg = mdp->msg;
 206         stat = &per_cpu(ptcstats, bcp->cpu);
 207         if (msg->address == TLB_FLUSH_ALL) {
 208                 local_flush_tlb();
 209                 stat->d_alltlb++;
 210         } else {
 211                 __flush_tlb_one(msg->address);
 212                 stat->d_onetlb++;
 213         }
 214         stat->d_requestee++;
 215
 216         /*
 217          * One cpu on each uvhub has the additional job on a RETRY
 218          * of releasing the resource held by the message that is
 219          * being retried.  That message is identified by sending
 220          * cpu number.
 221          */
 222         if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
 223                 uv_bau_process_retry_msg(mdp, bcp);
 224
 225         /*
 226          * This is a sw_ack message, so we have to reply to it.
 227          * Count each responding cpu on the socket. This avoids
 228          * pinging the count's cache line back and forth between
 229          * the sockets.
 230          */
 231         socket_ack_count = atomic_add_short_return(1, (struct atomic_short *)
 232                         &smaster->socket_acknowledge_count[mdp->msg_slot]);
 233         if (socket_ack_count == bcp->cpus_in_socket) {
 234                 /*
 235                  * Both sockets dump their completed count total into
 236                  * the message's count.
 237                  */
 238                 smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
 239                 msg_ack_count = atomic_add_short_return(socket_ack_count,
 240                                 (struct atomic_short *)&msg->acknowledge_count);
 241
 242                 if (msg_ack_count == bcp->cpus_in_uvhub) {
 243                         /*
 244                          * All cpus in uvhub saw it; reply
 245                          */
 246                         uv_reply_to_message(mdp, bcp);
 247                 }
 248         }
 249
 250         return;
 251 }
 252
 253 /*
 254  * Determine the first cpu on a uvhub.
 255  */
 256 static int uvhub_to_first_cpu(int uvhub)
 257 {
 258         int cpu;
 259         for_each_present_cpu(cpu)
 260                 if (uvhub == uv_cpu_to_blade_id(cpu))
 261                         return cpu;
 262         return -1;
 263 }
 264
 265 /*
 266  * Last resort when we get a large number of destination timeouts is
 267  * to clear resources held by a given cpu.
 268  * Do this with IPI so that all messages in the BAU message queue
 269  * can be identified by their nonzero sw_ack_vector field.
 270  *
 271  * This is entered for a single cpu on the uvhub.
 272  * The sender want's this uvhub to free a specific message's
 273  * sw_ack resources.
 274  */
 275 static void
 276 uv_do_reset(void *ptr)
 277 {
 278         int i;
 279         int slot;
 280         int count = 0;
 281         unsigned long mmr;
 282         unsigned long msg_res;
 283         struct bau_control *bcp;
 284         struct reset_args *rap;
 285         struct bau_payload_queue_entry *msg;
 286         struct ptc_stats *stat;
 287
 288         bcp = &per_cpu(bau_control, smp_processor_id());
 289         rap = (struct reset_args *)ptr;
 290         stat = &per_cpu(ptcstats, bcp->cpu);
 291         stat->d_resets++;
 292
 293         /*
 294          * We're looking for the given sender, and
 295          * will free its sw_ack resource.
 296          * If all cpu's finally responded after the timeout, its
 297          * message 'replied_to' was set.
 298          */
 299         for (msg = bcp->va_queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
 300                 /* uv_do_reset: same conditions for cancellation as
 301                    uv_bau_process_retry_msg() */
 302                 if ((msg->replied_to == 0) &&
 303                     (msg->canceled == 0) &&
 304                     (msg->sending_cpu == rap->sender) &&
 305                     (msg->sw_ack_vector) &&
 306                     (msg->msg_type != MSG_NOOP)) {
 307                         /*
 308                          * make everyone else ignore this message
 309                          */
 310                         msg->canceled = 1;
 311                         slot = msg - bcp->va_queue_first;
 312                         count++;
 313                         /*
 314                          * only reset the resource if it is still pending
 315                          */
 316                         mmr = uv_read_local_mmr
 317                                         (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
 318                         msg_res = ((msg->sw_ack_vector << 8) |
 319                                                    msg->sw_ack_vector);
 320                         if (mmr & msg_res) {
 321                                 stat->d_rcanceled++;
 322                                 uv_write_local_mmr(
 323                                     UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
 324                                                         msg_res);
 325                         }
 326                 }
 327         }
 328         return;
 329 }
 330
 331 /*
 332  * Use IPI to get all target uvhubs to release resources held by
 333  * a given sending cpu number.
 334  */
 335 static void uv_reset_with_ipi(struct bau_target_uvhubmask *distribution,
 336                               int sender)
 337 {
 338         int uvhub;
 339         int cpu;
 340         cpumask_t mask;
 341         struct reset_args reset_args;
 342
 343         reset_args.sender = sender;
 344
 345         cpus_clear(mask);
 346         /* find a single cpu for each uvhub in this distribution mask */
 347         for (uvhub = 0;
 348                     uvhub < sizeof(struct bau_target_uvhubmask) * BITSPERBYTE;
 349                     uvhub++) {
 350                 if (!bau_uvhub_isset(uvhub, distribution))
 351                         continue;
 352                 /* find a cpu for this uvhub */
 353                 cpu = uvhub_to_first_cpu(uvhub);
 354                 cpu_set(cpu, mask);
 355         }
 356         /* IPI all cpus; Preemption is already disabled */
 357         smp_call_function_many(&mask, uv_do_reset, (void *)&reset_args, 1);
 358         return;
 359 }
 360
 361 static inline unsigned long
 362 cycles_2_us(unsigned long long cyc)
 363 {
 364         unsigned long long ns;
 365         unsigned long us;
 366         ns =  (cyc * per_cpu(cyc2ns, smp_processor_id()))
 367                                                 >> CYC2NS_SCALE_FACTOR;
 368         us = ns / 1000;
 369         return us;
 370 }
 371
 372 /*
 373  * wait for all cpus on this hub to finish their sends and go quiet
 374  * leaves uvhub_quiesce set so that no new broadcasts are started by
 375  * bau_flush_send_and_wait()
 376  */
 377 static inline void
 378 quiesce_local_uvhub(struct bau_control *hmaster)
 379 {
 380         atomic_add_short_return(1, (struct atomic_short *)
 381                  &hmaster->uvhub_quiesce);
 382 }
 383
 384 /*
 385  * mark this quiet-requestor as done
 386  */
 387 static inline void
 388 end_uvhub_quiesce(struct bau_control *hmaster)
 389 {
 390         atomic_add_short_return(-1, (struct atomic_short *)
 391                 &hmaster->uvhub_quiesce);
 392 }
 393
 394 /*
 395  * Wait for completion of a broadcast software ack message
 396  * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
 397  */
 398 static int uv_wait_completion(struct bau_desc *bau_desc,
 399         unsigned long mmr_offset, int right_shift, int this_cpu,
 400         struct bau_control *bcp, struct bau_control *smaster, long try)
 401 {
 402         int relaxes = 0;
 403         unsigned long descriptor_status;
 404         unsigned long mmr;
 405         unsigned long mask;
 406         cycles_t ttime;
 407         cycles_t timeout_time;
 408         struct ptc_stats *stat = &per_cpu(ptcstats, this_cpu);
 409         struct bau_control *hmaster;
 410
 411         hmaster = bcp->uvhub_master;
 412         timeout_time = get_cycles() + bcp->timeout_interval;
 413
 414         /* spin on the status MMR, waiting for it to go idle */
 415         while ((descriptor_status = (((unsigned long)
 416                 uv_read_local_mmr(mmr_offset) >>
 417                         right_shift) & UV_ACT_STATUS_MASK)) !=
 418                         DESC_STATUS_IDLE) {
 419                 /*
 420                  * Our software ack messages may be blocked because there are
 421                  * no swack resources available.  As long as none of them
 422                  * has timed out hardware will NACK our message and its
 423                  * state will stay IDLE.
 424                  */
 425                 if (descriptor_status == DESC_STATUS_SOURCE_TIMEOUT) {
 426                         stat->s_stimeout++;
 427                         return FLUSH_GIVEUP;
 428                 } else if (descriptor_status ==
 429                                         DESC_STATUS_DESTINATION_TIMEOUT) {
 430                         stat->s_dtimeout++;
 431                         ttime = get_cycles();
 432
 433                         /*
 434                          * Our retries may be blocked by all destination
 435                          * swack resources being consumed, and a timeout
 436                          * pending.  In that case hardware returns the
 437                          * ERROR that looks like a destination timeout.
 438                          */
 439                         if (cycles_2_us(ttime - bcp->send_message) <
 440                                                         timeout_us) {
 441                                 bcp->conseccompletes = 0;
 442                                 return FLUSH_RETRY_PLUGGED;
 443                         }
 444
 445                         bcp->conseccompletes = 0;
 446                         return FLUSH_RETRY_TIMEOUT;
 447                 } else {
 448                         /*
 449                          * descriptor_status is still BUSY
 450                          */
 451                         cpu_relax();
 452                         relaxes++;
 453                         if (relaxes >= 10000) {
 454                                 relaxes = 0;
 455                                 if (get_cycles() > timeout_time) {
 456                                         quiesce_local_uvhub(hmaster);
 457
 458                                         /* single-thread the register change */
 459                                         spin_lock(&hmaster->masks_lock);
 460                                         mmr = uv_read_local_mmr(mmr_offset);
 461                                         mask = 0UL;
 462                                         mask |= (3UL < right_shift);
 463                                         mask = ~mask;
 464                                         mmr &= mask;
 465                                         uv_write_local_mmr(mmr_offset, mmr);
 466                                         spin_unlock(&hmaster->masks_lock);
 467                                         end_uvhub_quiesce(hmaster);
 468                                         stat->s_busy++;
 469                                         return FLUSH_GIVEUP;
 470                                 }
 471                         }
 472                 }
 473         }
 474         bcp->conseccompletes++;
 475         return FLUSH_COMPLETE;
 476 }
 477
 478 static inline cycles_t
 479 sec_2_cycles(unsigned long sec)
 480 {
 481         unsigned long ns;
 482         cycles_t cyc;
 483
 484         ns = sec * 1000000000;
 485         cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
 486         return cyc;
 487 }
 488
 489 /*
 490  * conditionally add 1 to *v, unless *v is >= u
 491  * return 0 if we cannot add 1 to *v because it is >= u
 492  * return 1 if we can add 1 to *v because it is < u
 493  * the add is atomic
 494  *
 495  * This is close to atomic_add_unless(), but this allows the 'u' value
 496  * to be lowered below the current 'v'.  atomic_add_unless can only stop
 497  * on equal.
 498  */
 499 static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
 500 {
 501         spin_lock(lock);
 502         if (atomic_read(v) >= u) {
 503                 spin_unlock(lock);
 504                 return 0;
 505         }
 506         atomic_inc(v);
 507         spin_unlock(lock);
 508         return 1;
 509 }
 510
 511 /**
 512  * uv_flush_send_and_wait
 513  *
 514  * Send a broadcast and wait for it to complete.
 515  *
 516  * The flush_mask contains the cpus the broadcast is to be sent to, plus
 517  * cpus that are on the local uvhub.
 518  *
 519  * Returns NULL if all flushing represented in the mask was done. The mask
 520  * is zeroed.
 521  * Returns @flush_mask if some remote flushing remains to be done. The
 522  * mask will have some bits still set, representing any cpus on the local
 523  * uvhub (not current cpu) and any on remote uvhubs if the broadcast failed.
 524  */
 525 const struct cpumask *uv_flush_send_and_wait(struct bau_desc *bau_desc,
 526                                              struct cpumask *flush_mask,
 527                                              struct bau_control *bcp)
 528 {
 529         int right_shift;
 530         int uvhub;
 531         int bit;
 532         int completion_status = 0;
 533         int seq_number = 0;
 534         long try = 0;
 535         int cpu = bcp->uvhub_cpu;
 536         int this_cpu = bcp->cpu;
 537         int this_uvhub = bcp->uvhub;
 538         unsigned long mmr_offset;
 539         unsigned long index;
 540         cycles_t time1;
 541         cycles_t time2;
 542         struct ptc_stats *stat = &per_cpu(ptcstats, bcp->cpu);
 543         struct bau_control *smaster = bcp->socket_master;
 544         struct bau_control *hmaster = bcp->uvhub_master;
 545
 546         /*
 547          * Spin here while there are hmaster->max_concurrent or more active
 548          * descriptors. This is the per-uvhub 'throttle'.
 549          */
 550         if (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
 551                         &hmaster->active_descriptor_count,
 552                         hmaster->max_concurrent)) {
 553                 stat->s_throttles++;
 554                 do {
 555                         cpu_relax();
 556                 } while (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
 557                         &hmaster->active_descriptor_count,
 558                         hmaster->max_concurrent));
 559         }
 560
 561         while (hmaster->uvhub_quiesce)
 562                 cpu_relax();
 563
 564         if (cpu < UV_CPUS_PER_ACT_STATUS) {
 565                 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
 566                 right_shift = cpu * UV_ACT_STATUS_SIZE;
 567         } else {
 568                 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
 569                 right_shift =
 570                     ((cpu - UV_CPUS_PER_ACT_STATUS) * UV_ACT_STATUS_SIZE);
 571         }
 572         time1 = get_cycles();
 573         do {
 574                 /*
 575                  * Every message from any given cpu gets a unique message
 576                  * sequence number. But retries use that same number.
 577                  * Our message may have timed out at the destination because
 578                  * all sw-ack resources are in use and there is a timeout
 579                  * pending there.  In that case, our last send never got
 580                  * placed into the queue and we need to persist until it
 581                  * does.
 582                  *
 583                  * Make any retry a type MSG_RETRY so that the destination will
 584                  * free any resource held by a previous message from this cpu.
 585                  */
 586                 if (try == 0) {
 587                         /* use message type set by the caller the first time */
 588                         seq_number = bcp->message_number++;
 589                 } else {
 590                         /* use RETRY type on all the rest; same sequence */
 591                         bau_desc->header.msg_type = MSG_RETRY;
 592                         stat->s_retry_messages++;
 593                 }
 594                 bau_desc->header.sequence = seq_number;
 595                 index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) |
 596                         bcp->uvhub_cpu;
 597                 bcp->send_message = get_cycles();
 598
 599                 uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
 600
 601                 try++;
 602                 completion_status = uv_wait_completion(bau_desc, mmr_offset,
 603                         right_shift, this_cpu, bcp, smaster, try);
 604
 605                 if (completion_status == FLUSH_RETRY_PLUGGED) {
 606                         /*
 607                          * Our retries may be blocked by all destination swack
 608                          * resources being consumed, and a timeout pending. In
 609                          * that case hardware immediately returns the ERROR
 610                          * that looks like a destination timeout.
 611                          */
 612                         udelay(TIMEOUT_DELAY);
 613                         bcp->plugged_tries++;
 614                         if (bcp->plugged_tries >= PLUGSB4RESET) {
 615                                 bcp->plugged_tries = 0;
 616                                 quiesce_local_uvhub(hmaster);
 617                                 spin_lock(&hmaster->queue_lock);
 618                                 uv_reset_with_ipi(&bau_desc->distribution,
 619                                                         this_cpu);
 620                                 spin_unlock(&hmaster->queue_lock);
 621                                 end_uvhub_quiesce(hmaster);
 622                                 bcp->ipi_attempts++;
 623                                 stat->s_resets_plug++;
 624                         }
 625                 } else if (completion_status == FLUSH_RETRY_TIMEOUT) {
 626                         hmaster->max_concurrent = 1;
 627                         bcp->timeout_tries++;
 628                         udelay(TIMEOUT_DELAY);
 629                         if (bcp->timeout_tries >= TIMEOUTSB4RESET) {
 630                                 bcp->timeout_tries = 0;
 631                                 quiesce_local_uvhub(hmaster);
 632                                 spin_lock(&hmaster->queue_lock);
 633                                 uv_reset_with_ipi(&bau_desc->distribution,
 634                                                                 this_cpu);
 635                                 spin_unlock(&hmaster->queue_lock);
 636                                 end_uvhub_quiesce(hmaster);
 637                                 bcp->ipi_attempts++;
 638                                 stat->s_resets_timeout++;
 639                         }
 640                 }
 641                 if (bcp->ipi_attempts >= 3) {
 642                         bcp->ipi_attempts = 0;
 643                         completion_status = FLUSH_GIVEUP;
 644                         break;
 645                 }
 646                 cpu_relax();
 647         } while ((completion_status == FLUSH_RETRY_PLUGGED) ||
 648                  (completion_status == FLUSH_RETRY_TIMEOUT));
 649         time2 = get_cycles();
 650
 651         if ((completion_status == FLUSH_COMPLETE) && (bcp->conseccompletes > 5)
 652             && (hmaster->max_concurrent < hmaster->max_concurrent_constant))
 653                         hmaster->max_concurrent++;
 654
 655         /*
 656          * hold any cpu not timing out here; no other cpu currently held by
 657          * the 'throttle' should enter the activation code
 658          */
 659         while (hmaster->uvhub_quiesce)
 660                 cpu_relax();
 661         atomic_dec(&hmaster->active_descriptor_count);
 662
 663         /* guard against cycles wrap */
 664         if (time2 > time1)
 665                 stat->s_time += (time2 - time1);
 666         else
 667                 stat->s_requestor--; /* don't count this one */
 668         if (completion_status == FLUSH_COMPLETE && try > 1)
 669                 stat->s_retriesok++;
 670         else if (completion_status == FLUSH_GIVEUP) {
 671                 /*
 672                  * Cause the caller to do an IPI-style TLB shootdown on
 673                  * the target cpu's, all of which are still in the mask.
 674                  */
 675                 stat->s_giveup++;
 676                 return flush_mask;
 677         }
 678
 679         /*
 680          * Success, so clear the remote cpu's from the mask so we don't
 681          * use the IPI method of shootdown on them.
 682          */
 683         for_each_cpu(bit, flush_mask) {
 684                 uvhub = uv_cpu_to_blade_id(bit);
 685                 if (uvhub == this_uvhub)
 686                         continue;
 687                 cpumask_clear_cpu(bit, flush_mask);
 688         }
 689         if (!cpumask_empty(flush_mask))
 690                 return flush_mask;
 691
 692         return NULL;
 693 }
 694
 695 /**
 696  * uv_flush_tlb_others - globally purge translation cache of a virtual
 697  * address or all TLB's
 698  * @cpumask: mask of all cpu's in which the address is to be removed
 699  * @mm: mm_struct containing virtual address range
 700  * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
 701  * @cpu: the current cpu
 702  *
 703  * This is the entry point for initiating any UV global TLB shootdown.
 704  *
 705  * Purges the translation caches of all specified processors of the given
 706  * virtual address, or purges all TLB's on specified processors.
 707  *
 708  * The caller has derived the cpumask from the mm_struct.  This function
 709  * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
 710  *
 711  * The cpumask is converted into a uvhubmask of the uvhubs containing
 712  * those cpus.
 713  *
 714  * Note that this function should be called with preemption disabled.
 715  *
 716  * Returns NULL if all remote flushing was done.
 717  * Returns pointer to cpumask if some remote flushing remains to be
 718  * done.  The returned pointer is valid till preemption is re-enabled.
 719  */
 720 const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
 721                                           struct mm_struct *mm,
 722                                           unsigned long va, unsigned int cpu)
 723 {
 724         int remotes;
 725         int tcpu;
 726         int uvhub;
 727         int locals = 0;
 728         struct bau_desc *bau_desc;
 729         struct cpumask *flush_mask;
 730         struct ptc_stats *stat;
 731         struct bau_control *bcp;
 732
 733         if (nobau)
 734                 return cpumask;
 735
 736         bcp = &per_cpu(bau_control, cpu);
 737         /*
 738          * Each sending cpu has a per-cpu mask which it fills from the caller's
 739          * cpu mask.  Only remote cpus are converted to uvhubs and copied.
 740          */
 741         flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
 742         /*
 743          * copy cpumask to flush_mask, removing current cpu
 744          * (current cpu should already have been flushed by the caller and
 745          *  should never be returned if we return flush_mask)
 746          */
 747         cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
 748         if (cpu_isset(cpu, *cpumask))
 749                 locals++;  /* current cpu was targeted */
 750
 751         bau_desc = bcp->descriptor_base;
 752         bau_desc += UV_ITEMS_PER_DESCRIPTOR * bcp->uvhub_cpu;
 753
 754         bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
 755         remotes = 0;
 756         for_each_cpu(tcpu, flush_mask) {
 757                 uvhub = uv_cpu_to_blade_id(tcpu);
 758                 if (uvhub == bcp->uvhub) {
 759                         locals++;
 760                         continue;
 761                 }
 762                 bau_uvhub_set(uvhub, &bau_desc->distribution);
 763                 remotes++;
 764         }
 765         if (remotes == 0) {
 766                 /*
 767                  * No off_hub flushing; return status for local hub.
 768                  * Return the caller's mask if all were local (the current
 769                  * cpu may be in that mask).
 770                  */
 771                 if (locals)
 772                         return cpumask;
 773                 else
 774                         return NULL;
 775         }
 776         stat = &per_cpu(ptcstats, cpu);
 777         stat->s_requestor++;
 778         stat->s_ntargcpu += remotes;
 779         remotes = bau_uvhub_weight(&bau_desc->distribution);
 780         stat->s_ntarguvhub += remotes;
 781         if (remotes >= 16)
 782                 stat->s_ntarguvhub16++;
 783         else if (remotes >= 8)
 784                 stat->s_ntarguvhub8++;
 785         else if (remotes >= 4)
 786                 stat->s_ntarguvhub4++;
 787         else if (remotes >= 2)
 788                 stat->s_ntarguvhub2++;
 789         else
 790                 stat->s_ntarguvhub1++;
 791
 792         bau_desc->payload.address = va;
 793         bau_desc->payload.sending_cpu = cpu;
 794
 795         /*
 796          * uv_flush_send_and_wait returns null if all cpu's were messaged, or
 797          * the adjusted flush_mask if any cpu's were not messaged.
 798          */
 799         return uv_flush_send_and_wait(bau_desc, flush_mask, bcp);
 800 }
 801
 802 /*
 803  * The BAU message interrupt comes here. (registered by set_intr_gate)
 804  * See entry_64.S
 805  *
 806  * We received a broadcast assist message.
 807  *
 808  * Interrupts are disabled; this interrupt could represent
 809  * the receipt of several messages.
 810  *
 811  * All cores/threads on this hub get this interrupt.
 812  * The last one to see it does the software ack.
 813  * (the resource will not be freed until noninterruptable cpus see this
 814  *  interrupt; hardware may timeout the s/w ack and reply ERROR)
 815  */
 816 void uv_bau_message_interrupt(struct pt_regs *regs)
 817 {
 818         int count = 0;
 819         cycles_t time_start;
 820         struct bau_payload_queue_entry *msg;
 821         struct bau_control *bcp;
 822         struct ptc_stats *stat;
 823         struct msg_desc msgdesc;
 824
 825         time_start = get_cycles();
 826         bcp = &per_cpu(bau_control, smp_processor_id());
 827         stat = &per_cpu(ptcstats, smp_processor_id());
 828         msgdesc.va_queue_first = bcp->va_queue_first;
 829         msgdesc.va_queue_last = bcp->va_queue_last;
 830         msg = bcp->bau_msg_head;
 831         while (msg->sw_ack_vector) {
 832                 count++;
 833                 msgdesc.msg_slot = msg - msgdesc.va_queue_first;
 834                 msgdesc.sw_ack_slot = ffs(msg->sw_ack_vector) - 1;
 835                 msgdesc.msg = msg;
 836                 uv_bau_process_message(&msgdesc, bcp);
 837                 msg++;
 838                 if (msg > msgdesc.va_queue_last)
 839                         msg = msgdesc.va_queue_first;
 840                 bcp->bau_msg_head = msg;
 841         }
 842         stat->d_time += (get_cycles() - time_start);
 843         if (!count)
 844                 stat->d_nomsg++;
 845         else if (count > 1)
 846                 stat->d_multmsg++;
 847         ack_APIC_irq();
 848 }
 849
 850 /*
 851  * uv_enable_timeouts
 852  *
 853  * Each target uvhub (i.e. a uvhub that has no cpu's) needs to have
 854  * shootdown message timeouts enabled.  The timeout does not cause
 855  * an interrupt, but causes an error message to be returned to
 856  * the sender.
 857  */
 858 static void uv_enable_timeouts(void)
 859 {
 860         int uvhub;
 861         int nuvhubs;
 862         int pnode;
 863         unsigned long mmr_image;
 864
 865         nuvhubs = uv_num_possible_blades();
 866
 867         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
 868                 if (!uv_blade_nr_possible_cpus(uvhub))
 869                         continue;
 870
 871                 pnode = uv_blade_to_pnode(uvhub);
 872                 mmr_image =
 873                     uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL);
 874                 /*
 875                  * Set the timeout period and then lock it in, in three
 876                  * steps; captures and locks in the period.
 877                  *
 878                  * To program the period, the SOFT_ACK_MODE must be off.
 879                  */
 880                 mmr_image &= ~((unsigned long)1 <<
 881                     UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
 882                 uv_write_global_mmr64
 883                     (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
 884                 /*
 885                  * Set the 4-bit period.
 886                  */
 887                 mmr_image &= ~((unsigned long)0xf <<
 888                      UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
 889                 mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD <<
 890                      UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
 891                 uv_write_global_mmr64
 892                     (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
 893                 /*
 894                  * Subsequent reversals of the timebase bit (3) cause an
 895                  * immediate timeout of one or all INTD resources as
 896                  * indicated in bits 2:0 (7 causes all of them to timeout).
 897                  */
 898                 mmr_image |= ((unsigned long)1 <<
 899                     UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
 900                 uv_write_global_mmr64
 901                     (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
 902         }
 903 }
 904
 905 static void *uv_ptc_seq_start(struct seq_file *file, loff_t *offset)
 906 {
 907         if (*offset < num_possible_cpus())
 908                 return offset;
 909         return NULL;
 910 }
 911
 912 static void *uv_ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
 913 {
 914         (*offset)++;
 915         if (*offset < num_possible_cpus())
 916                 return offset;
 917         return NULL;
 918 }
 919
 920 static void uv_ptc_seq_stop(struct seq_file *file, void *data)
 921 {
 922 }
 923
 924 static inline unsigned long long
 925 microsec_2_cycles(unsigned long microsec)
 926 {
 927         unsigned long ns;
 928         unsigned long long cyc;
 929
 930         ns = microsec * 1000;
 931         cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
 932         return cyc;
 933 }
 934
 935 /*
 936  * Display the statistics thru /proc.
 937  * 'data' points to the cpu number
 938  */
 939 static int uv_ptc_seq_show(struct seq_file *file, void *data)
 940 {
 941         struct ptc_stats *stat;
 942         int cpu;
 943
 944         cpu = *(loff_t *)data;
 945
 946         if (!cpu) {
 947                 seq_printf(file,
 948                         "# cpu sent stime numuvhubs numuvhubs16 numuvhubs8 ");
 949                 seq_printf(file,
 950                         "numuvhubs4 numuvhubs2 numuvhubs1 numcpus dto ");
 951                 seq_printf(file,
 952                         "retries rok resetp resett giveup sto bz throt ");
 953                 seq_printf(file,
 954                         "sw_ack recv rtime all ");
 955                 seq_printf(file,
 956                         "one mult none retry canc nocan reset rcan\n");
 957         }
 958         if (cpu < num_possible_cpus() && cpu_online(cpu)) {
 959                 stat = &per_cpu(ptcstats, cpu);
 960                 /* source side statistics */
 961                 seq_printf(file,
 962                         "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
 963                            cpu, stat->s_requestor, cycles_2_us(stat->s_time),
 964                            stat->s_ntarguvhub, stat->s_ntarguvhub16,
 965                            stat->s_ntarguvhub8, stat->s_ntarguvhub4,
 966                            stat->s_ntarguvhub2, stat->s_ntarguvhub1,
 967                            stat->s_ntargcpu, stat->s_dtimeout);
 968                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
 969                            stat->s_retry_messages, stat->s_retriesok,
 970                            stat->s_resets_plug, stat->s_resets_timeout,
 971                            stat->s_giveup, stat->s_stimeout,
 972                            stat->s_busy, stat->s_throttles);
 973                 /* destination side statistics */
 974                 seq_printf(file,
 975                            "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
 976                            uv_read_global_mmr64(uv_cpu_to_pnode(cpu),
 977                                         UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
 978                            stat->d_requestee, cycles_2_us(stat->d_time),
 979                            stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
 980                            stat->d_nomsg, stat->d_retries, stat->d_canceled,
 981                            stat->d_nocanceled, stat->d_resets,
 982                            stat->d_rcanceled);
 983         }
 984
 985         return 0;
 986 }
 987
 988 /*
 989  * -1: resetf the statistics
 990  *  0: display meaning of the statistics
 991  * >0: maximum concurrent active descriptors per uvhub (throttle)
 992  */
 993 static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
 994                                  size_t count, loff_t *data)
 995 {
 996         int cpu;
 997         long input_arg;
 998         char optstr[64];
 999         struct ptc_stats *stat;
1000         struct bau_control *bcp;
1001
1002         if (count == 0 || count > sizeof(optstr))
1003                 return -EINVAL;
1004         if (copy_from_user(optstr, user, count))
1005                 return -EFAULT;
1006         optstr[count - 1] = '\0';
1007         if (strict_strtol(optstr, 10, &input_arg) < 0) {
1008                 printk(KERN_DEBUG "%s is invalid\n", optstr);
1009                 return -EINVAL;
1010         }
1011
1012         if (input_arg == 0) {
1013                 printk(KERN_DEBUG "# cpu:      cpu number\n");
1014                 printk(KERN_DEBUG "Sender statistics:\n");
1015                 printk(KERN_DEBUG
1016                 "sent:     number of shootdown messages sent\n");
1017                 printk(KERN_DEBUG
1018                 "stime:    time spent sending messages\n");
1019                 printk(KERN_DEBUG
1020                 "numuvhubs: number of hubs targeted with shootdown\n");
1021                 printk(KERN_DEBUG
1022                 "numuvhubs16: number times 16 or more hubs targeted\n");
1023                 printk(KERN_DEBUG
1024                 "numuvhubs8: number times 8 or more hubs targeted\n");
1025                 printk(KERN_DEBUG
1026                 "numuvhubs4: number times 4 or more hubs targeted\n");
1027                 printk(KERN_DEBUG
1028                 "numuvhubs2: number times 2 or more hubs targeted\n");
1029                 printk(KERN_DEBUG
1030                 "numuvhubs1: number times 1 hub targeted\n");
1031                 printk(KERN_DEBUG
1032                 "numcpus:  number of cpus targeted with shootdown\n");
1033                 printk(KERN_DEBUG
1034                 "dto:      number of destination timeouts\n");
1035                 printk(KERN_DEBUG
1036                 "retries:  destination timeout retries sent\n");
1037                 printk(KERN_DEBUG
1038                 "rok:   :  destination timeouts successfully retried\n");
1039                 printk(KERN_DEBUG
1040                 "resetp:   ipi-style resource resets for plugs\n");
1041                 printk(KERN_DEBUG
1042                 "resett:   ipi-style resource resets for timeouts\n");
1043                 printk(KERN_DEBUG
1044                 "giveup:   fall-backs to ipi-style shootdowns\n");
1045                 printk(KERN_DEBUG
1046                 "sto:      number of source timeouts\n");
1047                 printk(KERN_DEBUG
1048                 "bz:       number of stay-busy's\n");
1049                 printk(KERN_DEBUG
1050                 "throt:    number times spun in throttle\n");
1051                 printk(KERN_DEBUG "Destination side statistics:\n");
1052                 printk(KERN_DEBUG
1053                 "sw_ack:   image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n");
1054                 printk(KERN_DEBUG
1055                 "recv:     shootdown messages received\n");
1056                 printk(KERN_DEBUG
1057                 "rtime:    time spent processing messages\n");
1058                 printk(KERN_DEBUG
1059                 "all:      shootdown all-tlb messages\n");
1060                 printk(KERN_DEBUG
1061                 "one:      shootdown one-tlb messages\n");
1062                 printk(KERN_DEBUG
1063                 "mult:     interrupts that found multiple messages\n");
1064                 printk(KERN_DEBUG
1065                 "none:     interrupts that found no messages\n");
1066                 printk(KERN_DEBUG
1067                 "retry:    number of retry messages processed\n");
1068                 printk(KERN_DEBUG
1069                 "canc:     number messages canceled by retries\n");
1070                 printk(KERN_DEBUG
1071                 "nocan:    number retries that found nothing to cancel\n");
1072                 printk(KERN_DEBUG
1073                 "reset:    number of ipi-style reset requests processed\n");
1074                 printk(KERN_DEBUG
1075                 "rcan:     number messages canceled by reset requests\n");
1076         } else if (input_arg == -1) {
1077                 for_each_present_cpu(cpu) {
1078                         stat = &per_cpu(ptcstats, cpu);
1079                         memset(stat, 0, sizeof(struct ptc_stats));
1080                 }
1081         } else {
1082                 uv_bau_max_concurrent = input_arg;
1083                 bcp = &per_cpu(bau_control, smp_processor_id());
1084                 if (uv_bau_max_concurrent < 1 ||
1085                     uv_bau_max_concurrent > bcp->cpus_in_uvhub) {
1086                         printk(KERN_DEBUG
1087                                 "Error: BAU max concurrent %d; %d is invalid\n",
1088                                 bcp->max_concurrent, uv_bau_max_concurrent);
1089                         return -EINVAL;
1090                 }
1091                 printk(KERN_DEBUG "Set BAU max concurrent:%d\n",
1092                        uv_bau_max_concurrent);
1093                 for_each_present_cpu(cpu) {
1094                         bcp = &per_cpu(bau_control, cpu);
1095                         bcp->max_concurrent = uv_bau_max_concurrent;
1096                 }
1097         }
1098
1099         return count;
1100 }
1101
1102 static const struct seq_operations uv_ptc_seq_ops = {
1103         .start          = uv_ptc_seq_start,
1104         .next           = uv_ptc_seq_next,
1105         .stop           = uv_ptc_seq_stop,
1106         .show           = uv_ptc_seq_show
1107 };
1108
1109 static int uv_ptc_proc_open(struct inode *inode, struct file *file)
1110 {
1111         return seq_open(file, &uv_ptc_seq_ops);
1112 }
1113
1114 static const struct file_operations proc_uv_ptc_operations = {
1115         .open           = uv_ptc_proc_open,
1116         .read           = seq_read,
1117         .write          = uv_ptc_proc_write,
1118         .llseek         = seq_lseek,
1119         .release        = seq_release,
1120 };
1121
1122 static int __init uv_ptc_init(void)
1123 {
1124         struct proc_dir_entry *proc_uv_ptc;
1125
1126         if (!is_uv_system())
1127                 return 0;
1128
1129         proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1130                                   &proc_uv_ptc_operations);
1131         if (!proc_uv_ptc) {
1132                 printk(KERN_ERR "unable to create %s proc entry\n",
1133                        UV_PTC_BASENAME);
1134                 return -EINVAL;
1135         }
1136         return 0;
1137 }
1138
1139 /*
1140  * initialize the sending side's sending buffers
1141  */
1142 static void
1143 uv_activation_descriptor_init(int node, int pnode)
1144 {
1145         int i;
1146         int cpu;
1147         unsigned long pa;
1148         unsigned long m;
1149         unsigned long n;
1150         struct bau_desc *bau_desc;
1151         struct bau_desc *bd2;
1152         struct bau_control *bcp;
1153
1154         /*
1155          * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR)
1156          * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per uvhub
1157          */
1158         bau_desc = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)*
1159                 UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node);
1160         BUG_ON(!bau_desc);
1161
1162         pa = uv_gpa(bau_desc); /* need the real nasid*/
1163         n = pa >> uv_nshift;
1164         m = pa & uv_mmask;
1165
1166         uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE,
1167                               (n << UV_DESC_BASE_PNODE_SHIFT | m));
1168
1169         /*
1170          * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
1171          * cpu even though we only use the first one; one descriptor can
1172          * describe a broadcast to 256 uv hubs.
1173          */
1174         for (i = 0, bd2 = bau_desc; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR);
1175                 i++, bd2++) {
1176                 memset(bd2, 0, sizeof(struct bau_desc));
1177                 bd2->header.sw_ack_flag = 1;
1178                 /*
1179                  * base_dest_nodeid is the nasid (pnode<<1) of the first uvhub
1180                  * in the partition. The bit map will indicate uvhub numbers,
1181                  * which are 0-N in a partition. Pnodes are unique system-wide.
1182                  */
1183                 bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
1184                 bd2->header.dest_subnodeid = 0x10; /* the LB */
1185                 bd2->header.command = UV_NET_ENDPOINT_INTD;
1186                 bd2->header.int_both = 1;
1187                 /*
1188                  * all others need to be set to zero:
1189                  *   fairness chaining multilevel count replied_to
1190                  */
1191         }
1192         for_each_present_cpu(cpu) {
1193                 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1194                         continue;
1195                 bcp = &per_cpu(bau_control, cpu);
1196                 bcp->descriptor_base = bau_desc;
1197         }
1198 }
1199
1200 /*
1201  * initialize the destination side's receiving buffers
1202  * entered for each uvhub in the partition
1203  * - node is first node (kernel memory notion) on the uvhub
1204  * - pnode is the uvhub's physical identifier
1205  */
1206 static void
1207 uv_payload_queue_init(int node, int pnode)
1208 {
1209         int pn;
1210         int cpu;
1211         char *cp;
1212         unsigned long pa;
1213         struct bau_payload_queue_entry *pqp;
1214         struct bau_payload_queue_entry *pqp_malloc;
1215         struct bau_control *bcp;
1216
1217         pqp = (struct bau_payload_queue_entry *) kmalloc_node(
1218                 (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry),
1219                 GFP_KERNEL, node);
1220         BUG_ON(!pqp);
1221         pqp_malloc = pqp;
1222
1223         cp = (char *)pqp + 31;
1224         pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
1225
1226         for_each_present_cpu(cpu) {
1227                 if (pnode != uv_cpu_to_pnode(cpu))
1228                         continue;
1229                 /* for every cpu on this pnode: */
1230                 bcp = &per_cpu(bau_control, cpu);
1231                 bcp->va_queue_first = pqp;
1232                 bcp->bau_msg_head = pqp;
1233                 bcp->va_queue_last = pqp + (DEST_Q_SIZE - 1);
1234         }
1235         /*
1236          * need the pnode of where the memory was really allocated
1237          */
1238         pa = uv_gpa(pqp);
1239         pn = pa >> uv_nshift;
1240         uv_write_global_mmr64(pnode,
1241                               UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST,
1242                               ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) |
1243                               uv_physnodeaddr(pqp));
1244         uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
1245                               uv_physnodeaddr(pqp));
1246         uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST,
1247                               (unsigned long)
1248                               uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1)));
1249         /* in effect, all msg_type's are set to MSG_NOOP */
1250         memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE);
1251 }
1252
1253 /*
1254  * Initialization of each UV hub's structures
1255  */
1256 static void __init uv_init_uvhub(int uvhub, int vector)
1257 {
1258         int node;
1259         int pnode;
1260         unsigned long apicid;
1261
1262         node = uvhub_to_first_node(uvhub);
1263         pnode = uv_blade_to_pnode(uvhub);
1264         uv_activation_descriptor_init(node, pnode);
1265         uv_payload_queue_init(node, pnode);
1266         /*
1267          * the below initialization can't be in firmware because the
1268          * messaging IRQ will be determined by the OS
1269          */
1270         apicid = uvhub_to_first_apicid(uvhub);
1271         uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
1272                                       ((apicid << 32) | vector));
1273 }
1274
1275 /*
1276  * We will set BAU_MISC_CONTROL with a timeout period.
1277  * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1278  * So the destination timeout period has be be calculated from them.
1279  */
1280 static int
1281 calculate_destination_timeout(void)
1282 {
1283         unsigned long mmr_image;
1284         int mult1;
1285         int mult2;
1286         int index;
1287         int base;
1288         int ret;
1289         unsigned long ts_ns;
1290
1291         mult1 = UV_INTD_SOFT_ACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1292         mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1293         index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1294         mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1295         mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1296         base = timeout_base_ns[index];
1297         ts_ns = base * mult1 * mult2;
1298         ret = ts_ns / 1000;
1299         return ret;
1300 }
1301
1302 /*
1303  * initialize the bau_control structure for each cpu
1304  */
1305 static void uv_init_per_cpu(int nuvhubs)
1306 {
1307         int i, j, k;
1308         int cpu;
1309         int pnode;
1310         int uvhub;
1311         short socket = 0;
1312         struct bau_control *bcp;
1313         struct uvhub_desc *bdp;
1314         struct socket_desc *sdp;
1315         struct bau_control *hmaster = NULL;
1316         struct bau_control *smaster = NULL;
1317         struct socket_desc {
1318                 short num_cpus;
1319                 short cpu_number[16];
1320         };
1321         struct uvhub_desc {
1322                 short num_sockets;
1323                 short num_cpus;
1324                 short uvhub;
1325                 short pnode;
1326                 struct socket_desc socket[2];
1327         };
1328         struct uvhub_desc *uvhub_descs;
1329
1330         timeout_us = calculate_destination_timeout();
1331
1332         uvhub_descs = (struct uvhub_desc *)
1333                 kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
1334         memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
1335         for_each_present_cpu(cpu) {
1336                 bcp = &per_cpu(bau_control, cpu);
1337                 memset(bcp, 0, sizeof(struct bau_control));
1338                 spin_lock_init(&bcp->masks_lock);
1339                 bcp->max_concurrent = uv_bau_max_concurrent;
1340                 pnode = uv_cpu_hub_info(cpu)->pnode;
1341                 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1342                 bdp = &uvhub_descs[uvhub];
1343                 bdp->num_cpus++;
1344                 bdp->uvhub = uvhub;
1345                 bdp->pnode = pnode;
1346                 /* time interval to catch a hardware stay-busy bug */
1347                 bcp->timeout_interval = microsec_2_cycles(2*timeout_us);
1348                 /* kludge: assume uv_hub.h is constant */
1349                 socket = (cpu_physical_id(cpu)>>5)&1;
1350                 if (socket >= bdp->num_sockets)
1351                         bdp->num_sockets = socket+1;
1352                 sdp = &bdp->socket[socket];
1353                 sdp->cpu_number[sdp->num_cpus] = cpu;
1354                 sdp->num_cpus++;
1355         }
1356         socket = 0;
1357         for_each_possible_blade(uvhub) {
1358                 bdp = &uvhub_descs[uvhub];
1359                 for (i = 0; i < bdp->num_sockets; i++) {
1360                         sdp = &bdp->socket[i];
1361                         for (j = 0; j < sdp->num_cpus; j++) {
1362                                 cpu = sdp->cpu_number[j];
1363                                 bcp = &per_cpu(bau_control, cpu);
1364                                 bcp->cpu = cpu;
1365                                 if (j == 0) {
1366                                         smaster = bcp;
1367                                         if (i == 0)
1368                                                 hmaster = bcp;
1369                                 }
1370                                 bcp->cpus_in_uvhub = bdp->num_cpus;
1371                                 bcp->cpus_in_socket = sdp->num_cpus;
1372                                 bcp->socket_master = smaster;
1373                                 bcp->uvhub_master = hmaster;
1374                                 for (k = 0; k < DEST_Q_SIZE; k++)
1375                                         bcp->socket_acknowledge_count[k] = 0;
1376                                 bcp->uvhub_cpu =
1377                                   uv_cpu_hub_info(cpu)->blade_processor_id;
1378                         }
1379                         socket++;
1380                 }
1381         }
1382         kfree(uvhub_descs);
1383 }
1384
1385 /*
1386  * Initialization of BAU-related structures
1387  */
1388 static int __init uv_bau_init(void)
1389 {
1390         int uvhub;
1391         int pnode;
1392         int nuvhubs;
1393         int cur_cpu;
1394         int vector;
1395         unsigned long mmr;
1396
1397         if (!is_uv_system())
1398                 return 0;
1399
1400         if (nobau)
1401                 return 0;
1402
1403         for_each_possible_cpu(cur_cpu)
1404                 zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu),
1405                                        GFP_KERNEL, cpu_to_node(cur_cpu));
1406
1407         uv_bau_max_concurrent = MAX_BAU_CONCURRENT;
1408         uv_nshift = uv_hub_info->m_val;
1409         uv_mmask = (1UL << uv_hub_info->m_val) - 1;
1410         nuvhubs = uv_num_possible_blades();
1411
1412         uv_init_per_cpu(nuvhubs);
1413
1414         uv_partition_base_pnode = 0x7fffffff;
1415         for (uvhub = 0; uvhub < nuvhubs; uvhub++)
1416                 if (uv_blade_nr_possible_cpus(uvhub) &&
1417                         (uv_blade_to_pnode(uvhub) < uv_partition_base_pnode))
1418                         uv_partition_base_pnode = uv_blade_to_pnode(uvhub);
1419
1420         vector = UV_BAU_MESSAGE;
1421         for_each_possible_blade(uvhub)
1422                 if (uv_blade_nr_possible_cpus(uvhub))
1423                         uv_init_uvhub(uvhub, vector);
1424
1425         uv_enable_timeouts();
1426         alloc_intr_gate(vector, uv_bau_message_intr1);
1427
1428         for_each_possible_blade(uvhub) {
1429                 pnode = uv_blade_to_pnode(uvhub);
1430                 /* INIT the bau */
1431                 uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL,
1432                                       ((unsigned long)1 << 63));
1433                 mmr = 1; /* should be 1 to broadcast to both sockets */
1434                 uv_write_global_mmr64(pnode, UVH_BAU_DATA_BROADCAST, mmr);
1435         }
1436
1437         return 0;
1438 }
1439 core_initcall(uv_bau_init);
1440 core_initcall(uv_ptc_init);