2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
6 * Copyright 2009 Red Hat, Inc. and/or its affiliates.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
30 #include <linux/slab.h>
31 #include <linux/bitops.h>
34 #include <linux/kvm_host.h>
37 static void pic_irq_request(struct kvm *kvm, int level);
39 static void pic_lock(struct kvm_pic *s)
45 static void pic_unlock(struct kvm_pic *s)
48 bool wakeup = s->wakeup_needed;
49 struct kvm_vcpu *vcpu, *found = NULL;
52 s->wakeup_needed = false;
54 spin_unlock(&s->lock);
57 kvm_for_each_vcpu(i, vcpu, s->kvm) {
58 if (kvm_apic_accept_pic_intr(vcpu)) {
67 kvm_make_request(KVM_REQ_EVENT, found);
72 static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
74 s->isr &= ~(1 << irq);
75 if (s != &s->pics_state->pics[0])
78 * We are dropping lock while calling ack notifiers since ack
79 * notifier callbacks for assigned devices call into PIC recursively.
80 * Other interrupt may be delivered to PIC while lock is dropped but
81 * it should be safe since PIC state is already updated at this stage.
83 pic_unlock(s->pics_state);
84 kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq);
85 pic_lock(s->pics_state);
89 * set irq level. If an edge is detected, then the IRR is set to 1
91 static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
95 if (s->elcr & mask) /* level triggered */
97 ret = !(s->irr & mask);
102 s->last_irr &= ~mask;
104 else /* edge triggered */
106 if ((s->last_irr & mask) == 0) {
107 ret = !(s->irr & mask);
112 s->last_irr &= ~mask;
114 return (s->imr & mask) ? -1 : ret;
118 * return the highest priority found in mask (highest = smallest
119 * number). Return 8 if no irq
121 static inline int get_priority(struct kvm_kpic_state *s, int mask)
127 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
133 * return the pic wanted interrupt. return -1 if none
135 static int pic_get_irq(struct kvm_kpic_state *s)
137 int mask, cur_priority, priority;
139 mask = s->irr & ~s->imr;
140 priority = get_priority(s, mask);
144 * compute current priority. If special fully nested mode on the
145 * master, the IRQ coming from the slave is not taken into account
146 * for the priority computation.
149 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
151 cur_priority = get_priority(s, mask);
152 if (priority < cur_priority)
154 * higher priority found: an irq should be generated
156 return (priority + s->priority_add) & 7;
162 * raise irq to CPU if necessary. must be called every time the active
165 static void pic_update_irq(struct kvm_pic *s)
169 irq2 = pic_get_irq(&s->pics[1]);
172 * if irq request by slave pic, signal master PIC
174 pic_set_irq1(&s->pics[0], 2, 1);
175 pic_set_irq1(&s->pics[0], 2, 0);
177 irq = pic_get_irq(&s->pics[0]);
178 pic_irq_request(s->kvm, irq >= 0);
181 void kvm_pic_update_irq(struct kvm_pic *s)
188 int kvm_pic_set_irq(void *opaque, int irq, int level)
190 struct kvm_pic *s = opaque;
194 if (irq >= 0 && irq < PIC_NUM_PINS) {
195 ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
197 trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr,
198 s->pics[irq >> 3].imr, ret == 0);
206 * acknowledge interrupt 'irq'
208 static inline void pic_intack(struct kvm_kpic_state *s, int irq)
212 * We don't clear a level sensitive interrupt here
214 if (!(s->elcr & (1 << irq)))
215 s->irr &= ~(1 << irq);
218 if (s->rotate_on_auto_eoi)
219 s->priority_add = (irq + 1) & 7;
220 pic_clear_isr(s, irq);
225 int kvm_pic_read_irq(struct kvm *kvm)
227 int irq, irq2, intno;
228 struct kvm_pic *s = pic_irqchip(kvm);
231 irq = pic_get_irq(&s->pics[0]);
233 pic_intack(&s->pics[0], irq);
235 irq2 = pic_get_irq(&s->pics[1]);
237 pic_intack(&s->pics[1], irq2);
240 * spurious IRQ on slave controller
243 intno = s->pics[1].irq_base + irq2;
246 intno = s->pics[0].irq_base + irq;
249 * spurious IRQ on host controller
252 intno = s->pics[0].irq_base + irq;
260 void kvm_pic_reset(struct kvm_kpic_state *s)
263 struct kvm_vcpu *vcpu0 = s->pics_state->kvm->bsp_vcpu;
264 u8 irr = s->irr, isr = s->imr;
272 s->read_reg_select = 0;
277 s->rotate_on_auto_eoi = 0;
278 s->special_fully_nested_mode = 0;
281 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) {
282 if (vcpu0 && kvm_apic_accept_pic_intr(vcpu0))
283 if (irr & (1 << irq) || isr & (1 << irq)) {
284 pic_clear_isr(s, irq);
289 static void pic_ioport_write(void *opaque, u32 addr, u32 val)
291 struct kvm_kpic_state *s = opaque;
292 int priority, cmd, irq;
302 s->read_reg_select = 0;
304 s->special_fully_nested_mode = 0;
309 printk(KERN_ERR "single mode not supported");
312 "level sensitive irq not supported");
313 } else if (val & 0x08) {
317 s->read_reg_select = val & 1;
319 s->special_mask = (val >> 5) & 1;
325 s->rotate_on_auto_eoi = cmd >> 2;
327 case 1: /* end of interrupt */
329 priority = get_priority(s, s->isr);
331 irq = (priority + s->priority_add) & 7;
333 s->priority_add = (irq + 1) & 7;
334 pic_clear_isr(s, irq);
335 pic_update_irq(s->pics_state);
340 pic_clear_isr(s, irq);
341 pic_update_irq(s->pics_state);
344 s->priority_add = (val + 1) & 7;
345 pic_update_irq(s->pics_state);
349 s->priority_add = (irq + 1) & 7;
350 pic_clear_isr(s, irq);
351 pic_update_irq(s->pics_state);
354 break; /* no operation */
358 switch (s->init_state) {
359 case 0: { /* normal mode */
360 u8 imr_diff = s->imr ^ val,
361 off = (s == &s->pics_state->pics[0]) ? 0 : 8;
363 for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
364 if (imr_diff & (1 << irq))
365 kvm_fire_mask_notifiers(
367 SELECT_PIC(irq + off),
369 !!(s->imr & (1 << irq)));
370 pic_update_irq(s->pics_state);
374 s->irq_base = val & 0xf8;
384 s->special_fully_nested_mode = (val >> 4) & 1;
385 s->auto_eoi = (val >> 1) & 1;
391 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
395 ret = pic_get_irq(s);
398 s->pics_state->pics[0].isr &= ~(1 << 2);
399 s->pics_state->pics[0].irr &= ~(1 << 2);
401 s->irr &= ~(1 << ret);
402 pic_clear_isr(s, ret);
403 if (addr1 >> 7 || ret != 2)
404 pic_update_irq(s->pics_state);
407 pic_update_irq(s->pics_state);
413 static u32 pic_ioport_read(void *opaque, u32 addr1)
415 struct kvm_kpic_state *s = opaque;
422 ret = pic_poll_read(s, addr1);
426 if (s->read_reg_select)
435 static void elcr_ioport_write(void *opaque, u32 addr, u32 val)
437 struct kvm_kpic_state *s = opaque;
438 s->elcr = val & s->elcr_mask;
441 static u32 elcr_ioport_read(void *opaque, u32 addr1)
443 struct kvm_kpic_state *s = opaque;
447 static int picdev_in_range(gpa_t addr)
462 static inline struct kvm_pic *to_pic(struct kvm_io_device *dev)
464 return container_of(dev, struct kvm_pic, dev);
467 static int picdev_write(struct kvm_io_device *this,
468 gpa_t addr, int len, const void *val)
470 struct kvm_pic *s = to_pic(this);
471 unsigned char data = *(unsigned char *)val;
472 if (!picdev_in_range(addr))
476 if (printk_ratelimit())
477 printk(KERN_ERR "PIC: non byte write\n");
486 pic_ioport_write(&s->pics[addr >> 7], addr, data);
490 elcr_ioport_write(&s->pics[addr & 1], addr, data);
497 static int picdev_read(struct kvm_io_device *this,
498 gpa_t addr, int len, void *val)
500 struct kvm_pic *s = to_pic(this);
501 unsigned char data = 0;
502 if (!picdev_in_range(addr))
506 if (printk_ratelimit())
507 printk(KERN_ERR "PIC: non byte read\n");
516 data = pic_ioport_read(&s->pics[addr >> 7], addr);
520 data = elcr_ioport_read(&s->pics[addr & 1], addr);
523 *(unsigned char *)val = data;
529 * callback when PIC0 irq status changed
531 static void pic_irq_request(struct kvm *kvm, int level)
533 struct kvm_pic *s = pic_irqchip(kvm);
536 s->wakeup_needed = true;
540 static const struct kvm_io_device_ops picdev_ops = {
542 .write = picdev_write,
545 struct kvm_pic *kvm_create_pic(struct kvm *kvm)
550 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
553 spin_lock_init(&s->lock);
555 s->pics[0].elcr_mask = 0xf8;
556 s->pics[1].elcr_mask = 0xde;
557 s->pics[0].pics_state = s;
558 s->pics[1].pics_state = s;
561 * Initialize PIO device
563 kvm_iodevice_init(&s->dev, &picdev_ops);
564 mutex_lock(&kvm->slots_lock);
565 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, &s->dev);
566 mutex_unlock(&kvm->slots_lock);
575 void kvm_destroy_pic(struct kvm *kvm)
577 struct kvm_pic *vpic = kvm->arch.vpic;
580 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev);
581 kvm->arch.vpic = NULL;