2 * Copyright (C) 2001 MandrakeSoft S.A.
3 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
8 * http://www.linux-mandrake.com/
9 * http://www.mandrakesoft.com/
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License as published by the Free Software Foundation; either
14 * version 2 of the License, or (at your option) any later version.
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * Lesser General Public License for more details.
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this library; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * Yunhong Jiang <yunhong.jiang@intel.com>
26 * Yaozu (Eddie) Dong <eddie.dong@intel.com>
27 * Based on Xen 3.1 code.
30 #include <linux/kvm_host.h>
31 #include <linux/kvm.h>
33 #include <linux/highmem.h>
34 #include <linux/smp.h>
35 #include <linux/hrtimer.h>
37 #include <linux/slab.h>
38 #include <linux/export.h>
39 #include <asm/processor.h>
41 #include <asm/current.h>
42 #include <trace/events/kvm.h>
49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
51 #define ioapic_debug(fmt, arg...)
53 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
60 unsigned long result = 0;
62 switch (ioapic->ioregsel) {
63 case IOAPIC_REG_VERSION:
64 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
65 | (IOAPIC_VERSION_ID & 0xff));
68 case IOAPIC_REG_APIC_ID:
69 case IOAPIC_REG_ARB_ID:
70 result = ((ioapic->id & 0xf) << 24);
75 u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
78 if (redir_index < IOAPIC_NUM_PINS)
80 ioapic->redirtbl[redir_index].bits;
82 redir_content = ~0ULL;
84 result = (ioapic->ioregsel & 0x1) ?
85 (redir_content >> 32) & 0xffffffff :
86 redir_content & 0xffffffff;
94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
96 ioapic->rtc_status.pending_eoi = 0;
97 bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPU_ID);
100 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
102 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
104 if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
105 kvm_rtc_eoi_tracking_restore_all(ioapic);
108 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
110 bool new_val, old_val;
111 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
112 struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
113 union kvm_ioapic_redirect_entry *e;
115 e = &ioapic->redirtbl[RTC_GSI];
116 if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
117 e->fields.dest_mode))
120 new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
121 old_val = test_bit(vcpu->vcpu_id, dest_map->map);
123 if (new_val == old_val)
127 __set_bit(vcpu->vcpu_id, dest_map->map);
128 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector;
129 ioapic->rtc_status.pending_eoi++;
131 __clear_bit(vcpu->vcpu_id, dest_map->map);
132 ioapic->rtc_status.pending_eoi--;
133 rtc_status_pending_eoi_check_valid(ioapic);
137 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
139 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
141 spin_lock(&ioapic->lock);
142 __rtc_irq_eoi_tracking_restore_one(vcpu);
143 spin_unlock(&ioapic->lock);
146 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
148 struct kvm_vcpu *vcpu;
151 if (RTC_GSI >= IOAPIC_NUM_PINS)
154 rtc_irq_eoi_tracking_reset(ioapic);
155 kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
156 __rtc_irq_eoi_tracking_restore_one(vcpu);
159 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
161 if (test_and_clear_bit(vcpu->vcpu_id,
162 ioapic->rtc_status.dest_map.map)) {
163 --ioapic->rtc_status.pending_eoi;
164 rtc_status_pending_eoi_check_valid(ioapic);
168 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
170 if (ioapic->rtc_status.pending_eoi > 0)
171 return true; /* coalesced */
176 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
177 int irq_level, bool line_status)
179 union kvm_ioapic_redirect_entry entry;
184 entry = ioapic->redirtbl[irq];
185 edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
188 ioapic->irr &= ~mask;
194 * Return 0 for coalesced interrupts; for edge-triggered interrupts,
195 * this only happens if a previous edge has not been delivered due
196 * do masking. For level interrupts, the remote_irr field tells
197 * us if the interrupt is waiting for an EOI.
199 * RTC is special: it is edge-triggered, but userspace likes to know
200 * if it has been already ack-ed via EOI because coalesced RTC
201 * interrupts lead to time drift in Windows guests. So we track
202 * EOI manually for the RTC interrupt.
204 if (irq == RTC_GSI && line_status &&
205 rtc_irq_check_coalesced(ioapic)) {
210 old_irr = ioapic->irr;
213 ioapic->irr_delivered &= ~mask;
214 if ((edge && old_irr == ioapic->irr) ||
215 (!edge && entry.fields.remote_irr)) {
220 ret = ioapic_service(ioapic, irq, line_status);
223 trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
227 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
231 rtc_irq_eoi_tracking_reset(ioapic);
232 for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
233 ioapic_set_irq(ioapic, idx, 1, true);
235 kvm_rtc_eoi_tracking_restore_all(ioapic);
239 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
241 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
242 struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
243 union kvm_ioapic_redirect_entry *e;
246 spin_lock(&ioapic->lock);
248 /* Make sure we see any missing RTC EOI */
249 if (test_bit(vcpu->vcpu_id, dest_map->map))
250 __set_bit(dest_map->vectors[vcpu->vcpu_id],
251 ioapic_handled_vectors);
253 for (index = 0; index < IOAPIC_NUM_PINS; index++) {
254 e = &ioapic->redirtbl[index];
255 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
256 kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
258 if (kvm_apic_match_dest(vcpu, NULL, 0,
259 e->fields.dest_id, e->fields.dest_mode) ||
260 (e->fields.trig_mode == IOAPIC_EDGE_TRIG &&
261 kvm_apic_pending_eoi(vcpu, e->fields.vector)))
262 __set_bit(e->fields.vector,
263 ioapic_handled_vectors);
266 spin_unlock(&ioapic->lock);
269 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
271 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
275 kvm_make_scan_ioapic_request(kvm);
278 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
281 bool mask_before, mask_after;
282 union kvm_ioapic_redirect_entry *e;
284 switch (ioapic->ioregsel) {
285 case IOAPIC_REG_VERSION:
286 /* Writes are ignored. */
289 case IOAPIC_REG_APIC_ID:
290 ioapic->id = (val >> 24) & 0xf;
293 case IOAPIC_REG_ARB_ID:
297 index = (ioapic->ioregsel - 0x10) >> 1;
299 ioapic_debug("change redir index %x val %x\n", index, val);
300 if (index >= IOAPIC_NUM_PINS)
302 e = &ioapic->redirtbl[index];
303 mask_before = e->fields.mask;
304 if (ioapic->ioregsel & 1) {
305 e->bits &= 0xffffffff;
306 e->bits |= (u64) val << 32;
308 e->bits &= ~0xffffffffULL;
309 e->bits |= (u32) val;
310 e->fields.remote_irr = 0;
312 mask_after = e->fields.mask;
313 if (mask_before != mask_after)
314 kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
315 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
316 && ioapic->irr & (1 << index))
317 ioapic_service(ioapic, index, false);
318 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
323 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
325 union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
326 struct kvm_lapic_irq irqe;
329 if (entry->fields.mask)
332 ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
333 "vector=%x trig_mode=%x\n",
334 entry->fields.dest_id, entry->fields.dest_mode,
335 entry->fields.delivery_mode, entry->fields.vector,
336 entry->fields.trig_mode);
338 irqe.dest_id = entry->fields.dest_id;
339 irqe.vector = entry->fields.vector;
340 irqe.dest_mode = entry->fields.dest_mode;
341 irqe.trig_mode = entry->fields.trig_mode;
342 irqe.delivery_mode = entry->fields.delivery_mode << 8;
345 irqe.msi_redir_hint = false;
347 if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
348 ioapic->irr_delivered |= 1 << irq;
350 if (irq == RTC_GSI && line_status) {
352 * pending_eoi cannot ever become negative (see
353 * rtc_status_pending_eoi_check_valid) and the caller
354 * ensures that it is only called if it is >= zero, namely
355 * if rtc_irq_check_coalesced returns false).
357 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
358 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
359 &ioapic->rtc_status.dest_map);
360 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
362 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
364 if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
365 entry->fields.remote_irr = 1;
370 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
371 int level, bool line_status)
375 BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
377 spin_lock(&ioapic->lock);
378 irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
379 irq_source_id, level);
380 ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
382 spin_unlock(&ioapic->lock);
387 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
391 spin_lock(&ioapic->lock);
392 for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
393 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
394 spin_unlock(&ioapic->lock);
397 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
400 struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
402 spin_lock(&ioapic->lock);
403 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
404 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
406 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
409 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
410 ioapic_service(ioapic, i, false);
412 spin_unlock(&ioapic->lock);
415 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
417 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
418 struct kvm_ioapic *ioapic, int vector, int trigger_mode)
420 struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
421 struct kvm_lapic *apic = vcpu->arch.apic;
424 /* RTC special handling */
425 if (test_bit(vcpu->vcpu_id, dest_map->map) &&
426 vector == dest_map->vectors[vcpu->vcpu_id])
427 rtc_irq_eoi(ioapic, vcpu);
429 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
430 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
432 if (ent->fields.vector != vector)
436 * We are dropping lock while calling ack notifiers because ack
437 * notifier callbacks for assigned devices call into IOAPIC
438 * recursively. Since remote_irr is cleared only after call
439 * to notifiers if the same vector will be delivered while lock
440 * is dropped it will be put into irr and will be delivered
441 * after ack notifier returns.
443 spin_unlock(&ioapic->lock);
444 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
445 spin_lock(&ioapic->lock);
447 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
448 kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
451 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
452 ent->fields.remote_irr = 0;
453 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
454 ++ioapic->irq_eoi[i];
455 if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
457 * Real hardware does not deliver the interrupt
458 * immediately during eoi broadcast, and this
459 * lets a buggy guest make slow progress
460 * even if it does not correctly handle a
461 * level-triggered interrupt. Emulate this
462 * behavior if we detect an interrupt storm.
464 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
465 ioapic->irq_eoi[i] = 0;
466 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
468 ioapic_service(ioapic, i, false);
471 ioapic->irq_eoi[i] = 0;
476 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
478 struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
480 spin_lock(&ioapic->lock);
481 __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
482 spin_unlock(&ioapic->lock);
485 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
487 return container_of(dev, struct kvm_ioapic, dev);
490 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
492 return ((addr >= ioapic->base_address &&
493 (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
496 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
497 gpa_t addr, int len, void *val)
499 struct kvm_ioapic *ioapic = to_ioapic(this);
501 if (!ioapic_in_range(ioapic, addr))
504 ioapic_debug("addr %lx\n", (unsigned long)addr);
505 ASSERT(!(addr & 0xf)); /* check alignment */
508 spin_lock(&ioapic->lock);
510 case IOAPIC_REG_SELECT:
511 result = ioapic->ioregsel;
514 case IOAPIC_REG_WINDOW:
515 result = ioapic_read_indirect(ioapic, addr, len);
522 spin_unlock(&ioapic->lock);
526 *(u64 *) val = result;
531 memcpy(val, (char *)&result, len);
534 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
539 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
540 gpa_t addr, int len, const void *val)
542 struct kvm_ioapic *ioapic = to_ioapic(this);
544 if (!ioapic_in_range(ioapic, addr))
547 ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
548 (void*)addr, len, val);
549 ASSERT(!(addr & 0xf)); /* check alignment */
563 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
568 spin_lock(&ioapic->lock);
570 case IOAPIC_REG_SELECT:
571 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
574 case IOAPIC_REG_WINDOW:
575 ioapic_write_indirect(ioapic, data);
581 spin_unlock(&ioapic->lock);
585 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
589 cancel_delayed_work_sync(&ioapic->eoi_inject);
590 for (i = 0; i < IOAPIC_NUM_PINS; i++)
591 ioapic->redirtbl[i].fields.mask = 1;
592 ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
593 ioapic->ioregsel = 0;
595 ioapic->irr_delivered = 0;
597 memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi));
598 rtc_irq_eoi_tracking_reset(ioapic);
601 static const struct kvm_io_device_ops ioapic_mmio_ops = {
602 .read = ioapic_mmio_read,
603 .write = ioapic_mmio_write,
606 int kvm_ioapic_init(struct kvm *kvm)
608 struct kvm_ioapic *ioapic;
611 ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
614 spin_lock_init(&ioapic->lock);
615 INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
616 kvm->arch.vioapic = ioapic;
617 kvm_ioapic_reset(ioapic);
618 kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
620 mutex_lock(&kvm->slots_lock);
621 ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
622 IOAPIC_MEM_LENGTH, &ioapic->dev);
623 mutex_unlock(&kvm->slots_lock);
625 kvm->arch.vioapic = NULL;
630 kvm_vcpu_request_scan_ioapic(kvm);
634 void kvm_ioapic_destroy(struct kvm *kvm)
636 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
638 cancel_delayed_work_sync(&ioapic->eoi_inject);
639 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
640 kvm->arch.vioapic = NULL;
644 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
646 struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
650 spin_lock(&ioapic->lock);
651 memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
652 state->irr &= ~ioapic->irr_delivered;
653 spin_unlock(&ioapic->lock);
657 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
659 struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
663 spin_lock(&ioapic->lock);
664 memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
666 ioapic->irr_delivered = 0;
667 kvm_vcpu_request_scan_ioapic(kvm);
668 kvm_ioapic_inject_all(ioapic, state->irr);
669 spin_unlock(&ioapic->lock);