2 * irq_comm.c: Common API for in kernel interrupt controller
3 * Copyright (c) 2007, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
20 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
23 #include <linux/kvm_host.h>
24 #include <linux/slab.h>
25 #include <linux/export.h>
26 #include <trace/events/kvm.h>
28 #include <asm/msidef.h>
38 static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
39 struct kvm *kvm, int irq_source_id, int level,
42 struct kvm_pic *pic = pic_irqchip(kvm);
43 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
46 static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
47 struct kvm *kvm, int irq_source_id, int level,
50 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
51 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
55 int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
56 struct kvm_lapic_irq *irq, unsigned long *dest_map)
59 struct kvm_vcpu *vcpu, *lowest = NULL;
61 if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
62 kvm_lowest_prio_delivery(irq)) {
63 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
64 irq->delivery_mode = APIC_DM_FIXED;
67 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
70 kvm_for_each_vcpu(i, vcpu, kvm) {
71 if (!kvm_apic_present(vcpu))
74 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
75 irq->dest_id, irq->dest_mode))
78 if (!kvm_lowest_prio_delivery(irq)) {
81 r += kvm_apic_set_irq(vcpu, irq, dest_map);
82 } else if (kvm_lapic_enabled(vcpu)) {
85 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
91 r = kvm_apic_set_irq(lowest, irq, dest_map);
96 void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
97 struct kvm_lapic_irq *irq)
99 trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
101 irq->dest_id = (e->msi.address_lo &
102 MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
103 irq->vector = (e->msi.data &
104 MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
105 irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
106 irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
107 irq->delivery_mode = e->msi.data & 0x700;
108 irq->msi_redir_hint = ((e->msi.address_lo
109 & MSI_ADDR_REDIRECTION_LOWPRI) > 0);
113 EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
115 int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
116 struct kvm *kvm, int irq_source_id, int level, bool line_status)
118 struct kvm_lapic_irq irq;
123 kvm_set_msi_irq(e, &irq);
125 return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
129 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
130 struct kvm *kvm, int irq_source_id, int level,
133 struct kvm_lapic_irq irq;
136 if (unlikely(e->type != KVM_IRQ_ROUTING_MSI))
139 kvm_set_msi_irq(e, &irq);
141 if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
147 int kvm_request_irq_source_id(struct kvm *kvm)
149 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
152 mutex_lock(&kvm->irq_lock);
153 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
155 if (irq_source_id >= BITS_PER_LONG) {
156 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
157 irq_source_id = -EFAULT;
161 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
162 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
163 set_bit(irq_source_id, bitmap);
165 mutex_unlock(&kvm->irq_lock);
167 return irq_source_id;
170 void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
172 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
173 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
175 mutex_lock(&kvm->irq_lock);
176 if (irq_source_id < 0 ||
177 irq_source_id >= BITS_PER_LONG) {
178 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
181 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
182 if (!ioapic_in_kernel(kvm))
185 kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
186 kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
188 mutex_unlock(&kvm->irq_lock);
191 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
192 struct kvm_irq_mask_notifier *kimn)
194 mutex_lock(&kvm->irq_lock);
196 hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
197 mutex_unlock(&kvm->irq_lock);
200 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
201 struct kvm_irq_mask_notifier *kimn)
203 mutex_lock(&kvm->irq_lock);
204 hlist_del_rcu(&kimn->link);
205 mutex_unlock(&kvm->irq_lock);
206 synchronize_srcu(&kvm->irq_srcu);
209 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
212 struct kvm_irq_mask_notifier *kimn;
215 idx = srcu_read_lock(&kvm->irq_srcu);
216 gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
218 hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
219 if (kimn->irq == gsi)
220 kimn->func(kimn, mask);
221 srcu_read_unlock(&kvm->irq_srcu, idx);
224 static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
225 struct kvm *kvm, int irq_source_id, int level,
231 return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
234 int kvm_set_routing_entry(struct kvm_kernel_irq_routing_entry *e,
235 const struct kvm_irq_routing_entry *ue)
242 case KVM_IRQ_ROUTING_IRQCHIP:
244 switch (ue->u.irqchip.irqchip) {
245 case KVM_IRQCHIP_PIC_MASTER:
246 e->set = kvm_set_pic_irq;
247 max_pin = PIC_NUM_PINS;
249 case KVM_IRQCHIP_PIC_SLAVE:
250 e->set = kvm_set_pic_irq;
251 max_pin = PIC_NUM_PINS;
254 case KVM_IRQCHIP_IOAPIC:
255 max_pin = KVM_IOAPIC_NUM_PINS;
256 e->set = kvm_set_ioapic_irq;
261 e->irqchip.irqchip = ue->u.irqchip.irqchip;
262 e->irqchip.pin = ue->u.irqchip.pin + delta;
263 if (e->irqchip.pin >= max_pin)
266 case KVM_IRQ_ROUTING_MSI:
267 e->set = kvm_set_msi;
268 e->msi.address_lo = ue->u.msi.address_lo;
269 e->msi.address_hi = ue->u.msi.address_hi;
270 e->msi.data = ue->u.msi.data;
272 case KVM_IRQ_ROUTING_HV_SINT:
273 e->set = kvm_hv_set_sint;
274 e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
275 e->hv_sint.sint = ue->u.hv_sint.sint;
286 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
287 struct kvm_vcpu **dest_vcpu)
290 struct kvm_vcpu *vcpu;
292 if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
295 kvm_for_each_vcpu(i, vcpu, kvm) {
296 if (!kvm_apic_present(vcpu))
299 if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
300 irq->dest_id, irq->dest_mode))
311 EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
313 #define IOAPIC_ROUTING_ENTRY(irq) \
314 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
315 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
316 #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
318 #define PIC_ROUTING_ENTRY(irq) \
319 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
320 .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
321 #define ROUTING_ENTRY2(irq) \
322 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
324 static const struct kvm_irq_routing_entry default_routing[] = {
325 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
326 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
327 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
328 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
329 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
330 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
331 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
332 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
333 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
334 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
335 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
336 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
339 int kvm_setup_default_irq_routing(struct kvm *kvm)
341 return kvm_set_irq_routing(kvm, default_routing,
342 ARRAY_SIZE(default_routing), 0);
345 static const struct kvm_irq_routing_entry empty_routing[] = {};
347 int kvm_setup_empty_irq_routing(struct kvm *kvm)
349 return kvm_set_irq_routing(kvm, empty_routing, 0, 0);
352 void kvm_arch_post_irq_routing_update(struct kvm *kvm)
354 if (ioapic_in_kernel(kvm) || !irqchip_in_kernel(kvm))
356 kvm_make_scan_ioapic_request(kvm);
359 void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
360 ulong *ioapic_handled_vectors)
362 struct kvm *kvm = vcpu->kvm;
363 struct kvm_kernel_irq_routing_entry *entry;
364 struct kvm_irq_routing_table *table;
365 u32 i, nr_ioapic_pins;
368 /* kvm->irq_routing must be read after clearing
369 * KVM_SCAN_IOAPIC. */
371 idx = srcu_read_lock(&kvm->irq_srcu);
372 table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
373 nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
374 kvm->arch.nr_reserved_ioapic_pins);
375 for (i = 0; i < nr_ioapic_pins; ++i) {
376 hlist_for_each_entry(entry, &table->map[i], link) {
377 u32 dest_id, dest_mode;
380 if (entry->type != KVM_IRQ_ROUTING_MSI)
382 dest_id = (entry->msi.address_lo >> 12) & 0xff;
383 dest_mode = (entry->msi.address_lo >> 2) & 0x1;
384 level = entry->msi.data & MSI_DATA_TRIGGER_LEVEL;
385 if (level && kvm_apic_match_dest(vcpu, NULL, 0,
386 dest_id, dest_mode)) {
387 u32 vector = entry->msi.data & 0xff;
390 ioapic_handled_vectors);
394 srcu_read_unlock(&kvm->irq_srcu, idx);
397 int kvm_arch_set_irq(struct kvm_kernel_irq_routing_entry *irq, struct kvm *kvm,
398 int irq_source_id, int level, bool line_status)
401 case KVM_IRQ_ROUTING_HV_SINT:
402 return kvm_hv_set_sint(irq, kvm, irq_source_id, level,
409 void kvm_arch_irq_routing_update(struct kvm *kvm)
411 kvm_hv_irq_routing_update(kvm);