2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 #include "kvm_cache_regs.h"
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
34 #include <asm/cmpxchg.h>
39 * When setting this variable to true it enables Two-Dimensional-Paging
40 * where the hardware walks 2 page tables:
41 * 1. the guest-virtual to guest-physical
42 * 2. while doing 1. it walks guest-physical to host-physical
43 * If the hardware supports that we don't need to do shadow paging.
45 bool tdp_enabled = false;
52 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
59 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
60 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64 #define pgprintk(x...) do { } while (0)
65 #define rmap_printk(x...) do { } while (0)
69 #if defined(MMU_DEBUG) || defined(AUDIT)
71 module_param(dbg, bool, 0644);
74 static int oos_shadow = 1;
75 module_param(oos_shadow, bool, 0644);
78 #define ASSERT(x) do { } while (0)
82 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
83 __FILE__, __LINE__, #x); \
87 #define PT_FIRST_AVAIL_BITS_SHIFT 9
88 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
90 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
92 #define PT64_LEVEL_BITS 9
94 #define PT64_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
97 #define PT64_LEVEL_MASK(level) \
98 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
100 #define PT64_INDEX(address, level)\
101 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
104 #define PT32_LEVEL_BITS 10
106 #define PT32_LEVEL_SHIFT(level) \
107 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
109 #define PT32_LEVEL_MASK(level) \
110 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
111 #define PT32_LVL_OFFSET_MASK(level) \
112 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113 * PT32_LEVEL_BITS))) - 1))
115 #define PT32_INDEX(address, level)\
116 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
119 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
120 #define PT64_DIR_BASE_ADDR_MASK \
121 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
122 #define PT64_LVL_ADDR_MASK(level) \
123 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
124 * PT64_LEVEL_BITS))) - 1))
125 #define PT64_LVL_OFFSET_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
129 #define PT32_BASE_ADDR_MASK PAGE_MASK
130 #define PT32_DIR_BASE_ADDR_MASK \
131 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
132 #define PT32_LVL_ADDR_MASK(level) \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
134 * PT32_LEVEL_BITS))) - 1))
136 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
139 #define PFERR_PRESENT_MASK (1U << 0)
140 #define PFERR_WRITE_MASK (1U << 1)
141 #define PFERR_USER_MASK (1U << 2)
142 #define PFERR_RSVD_MASK (1U << 3)
143 #define PFERR_FETCH_MASK (1U << 4)
145 #define PT_PDPE_LEVEL 3
146 #define PT_DIRECTORY_LEVEL 2
147 #define PT_PAGE_TABLE_LEVEL 1
151 #define ACC_EXEC_MASK 1
152 #define ACC_WRITE_MASK PT_WRITABLE_MASK
153 #define ACC_USER_MASK PT_USER_MASK
154 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
156 #define CREATE_TRACE_POINTS
157 #include "mmutrace.h"
159 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
161 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
163 struct kvm_rmap_desc {
164 u64 *sptes[RMAP_EXT];
165 struct kvm_rmap_desc *more;
168 struct kvm_shadow_walk_iterator {
176 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
177 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
178 shadow_walk_okay(&(_walker)); \
179 shadow_walk_next(&(_walker)))
182 struct kvm_unsync_walk {
183 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
186 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
188 static struct kmem_cache *pte_chain_cache;
189 static struct kmem_cache *rmap_desc_cache;
190 static struct kmem_cache *mmu_page_header_cache;
192 static u64 __read_mostly shadow_trap_nonpresent_pte;
193 static u64 __read_mostly shadow_notrap_nonpresent_pte;
194 static u64 __read_mostly shadow_base_present_pte;
195 static u64 __read_mostly shadow_nx_mask;
196 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
197 static u64 __read_mostly shadow_user_mask;
198 static u64 __read_mostly shadow_accessed_mask;
199 static u64 __read_mostly shadow_dirty_mask;
201 static inline u64 rsvd_bits(int s, int e)
203 return ((1ULL << (e - s + 1)) - 1) << s;
206 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
208 shadow_trap_nonpresent_pte = trap_pte;
209 shadow_notrap_nonpresent_pte = notrap_pte;
211 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
213 void kvm_mmu_set_base_ptes(u64 base_pte)
215 shadow_base_present_pte = base_pte;
217 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
219 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
220 u64 dirty_mask, u64 nx_mask, u64 x_mask)
222 shadow_user_mask = user_mask;
223 shadow_accessed_mask = accessed_mask;
224 shadow_dirty_mask = dirty_mask;
225 shadow_nx_mask = nx_mask;
226 shadow_x_mask = x_mask;
228 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
230 static int is_write_protection(struct kvm_vcpu *vcpu)
232 return vcpu->arch.cr0 & X86_CR0_WP;
235 static int is_cpuid_PSE36(void)
240 static int is_nx(struct kvm_vcpu *vcpu)
242 return vcpu->arch.shadow_efer & EFER_NX;
245 static int is_shadow_present_pte(u64 pte)
247 return pte != shadow_trap_nonpresent_pte
248 && pte != shadow_notrap_nonpresent_pte;
251 static int is_large_pte(u64 pte)
253 return pte & PT_PAGE_SIZE_MASK;
256 static int is_writeble_pte(unsigned long pte)
258 return pte & PT_WRITABLE_MASK;
261 static int is_dirty_gpte(unsigned long pte)
263 return pte & PT_DIRTY_MASK;
266 static int is_rmap_spte(u64 pte)
268 return is_shadow_present_pte(pte);
271 static int is_last_spte(u64 pte, int level)
273 if (level == PT_PAGE_TABLE_LEVEL)
275 if (is_large_pte(pte))
280 static pfn_t spte_to_pfn(u64 pte)
282 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
285 static gfn_t pse36_gfn_delta(u32 gpte)
287 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
289 return (gpte & PT32_DIR_PSE36_MASK) << shift;
292 static void __set_spte(u64 *sptep, u64 spte)
295 set_64bit((unsigned long *)sptep, spte);
297 set_64bit((unsigned long long *)sptep, spte);
301 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
302 struct kmem_cache *base_cache, int min)
306 if (cache->nobjs >= min)
308 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
309 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
312 cache->objects[cache->nobjs++] = obj;
317 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
320 kfree(mc->objects[--mc->nobjs]);
323 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
328 if (cache->nobjs >= min)
330 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
331 page = alloc_page(GFP_KERNEL);
334 set_page_private(page, 0);
335 cache->objects[cache->nobjs++] = page_address(page);
340 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
343 free_page((unsigned long)mc->objects[--mc->nobjs]);
346 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
350 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
354 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
358 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
361 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
362 mmu_page_header_cache, 4);
367 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
369 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
370 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
371 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
372 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
375 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
381 p = mc->objects[--mc->nobjs];
385 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
387 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
388 sizeof(struct kvm_pte_chain));
391 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
396 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
398 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
399 sizeof(struct kvm_rmap_desc));
402 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
408 * Return the pointer to the largepage write count for a given
409 * gfn, handling slots that are not large page aligned.
411 static int *slot_largepage_idx(gfn_t gfn,
412 struct kvm_memory_slot *slot,
417 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
418 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
419 return &slot->lpage_info[level - 2][idx].write_count;
422 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
424 struct kvm_memory_slot *slot;
428 gfn = unalias_gfn(kvm, gfn);
430 slot = gfn_to_memslot_unaliased(kvm, gfn);
431 for (i = PT_DIRECTORY_LEVEL;
432 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
433 write_count = slot_largepage_idx(gfn, slot, i);
438 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
440 struct kvm_memory_slot *slot;
444 gfn = unalias_gfn(kvm, gfn);
445 for (i = PT_DIRECTORY_LEVEL;
446 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
447 slot = gfn_to_memslot_unaliased(kvm, gfn);
448 write_count = slot_largepage_idx(gfn, slot, i);
450 WARN_ON(*write_count < 0);
454 static int has_wrprotected_page(struct kvm *kvm,
458 struct kvm_memory_slot *slot;
461 gfn = unalias_gfn(kvm, gfn);
462 slot = gfn_to_memslot_unaliased(kvm, gfn);
464 largepage_idx = slot_largepage_idx(gfn, slot, level);
465 return *largepage_idx;
471 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
473 unsigned long page_size = PAGE_SIZE;
474 struct vm_area_struct *vma;
478 addr = gfn_to_hva(kvm, gfn);
479 if (kvm_is_error_hva(addr))
482 down_read(¤t->mm->mmap_sem);
483 vma = find_vma(current->mm, addr);
487 page_size = vma_kernel_pagesize(vma);
490 up_read(¤t->mm->mmap_sem);
492 for (i = PT_PAGE_TABLE_LEVEL;
493 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
494 if (page_size >= KVM_HPAGE_SIZE(i))
503 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
505 struct kvm_memory_slot *slot;
507 int level = PT_PAGE_TABLE_LEVEL;
509 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
510 if (slot && slot->dirty_bitmap)
511 return PT_PAGE_TABLE_LEVEL;
513 host_level = host_mapping_level(vcpu->kvm, large_gfn);
515 if (host_level == PT_PAGE_TABLE_LEVEL)
518 for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level) {
520 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
528 * Take gfn and return the reverse mapping to it.
529 * Note: gfn must be unaliased before this function get called
532 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
534 struct kvm_memory_slot *slot;
537 slot = gfn_to_memslot(kvm, gfn);
538 if (likely(level == PT_PAGE_TABLE_LEVEL))
539 return &slot->rmap[gfn - slot->base_gfn];
541 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
542 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
544 return &slot->lpage_info[level - 2][idx].rmap_pde;
548 * Reverse mapping data structures:
550 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
551 * that points to page_address(page).
553 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
554 * containing more mappings.
556 * Returns the number of rmap entries before the spte was added or zero if
557 * the spte was not added.
560 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
562 struct kvm_mmu_page *sp;
563 struct kvm_rmap_desc *desc;
564 unsigned long *rmapp;
567 if (!is_rmap_spte(*spte))
569 gfn = unalias_gfn(vcpu->kvm, gfn);
570 sp = page_header(__pa(spte));
571 sp->gfns[spte - sp->spt] = gfn;
572 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
574 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
575 *rmapp = (unsigned long)spte;
576 } else if (!(*rmapp & 1)) {
577 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
578 desc = mmu_alloc_rmap_desc(vcpu);
579 desc->sptes[0] = (u64 *)*rmapp;
580 desc->sptes[1] = spte;
581 *rmapp = (unsigned long)desc | 1;
583 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
584 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
585 while (desc->sptes[RMAP_EXT-1] && desc->more) {
589 if (desc->sptes[RMAP_EXT-1]) {
590 desc->more = mmu_alloc_rmap_desc(vcpu);
593 for (i = 0; desc->sptes[i]; ++i)
595 desc->sptes[i] = spte;
600 static void rmap_desc_remove_entry(unsigned long *rmapp,
601 struct kvm_rmap_desc *desc,
603 struct kvm_rmap_desc *prev_desc)
607 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
609 desc->sptes[i] = desc->sptes[j];
610 desc->sptes[j] = NULL;
613 if (!prev_desc && !desc->more)
614 *rmapp = (unsigned long)desc->sptes[0];
617 prev_desc->more = desc->more;
619 *rmapp = (unsigned long)desc->more | 1;
620 mmu_free_rmap_desc(desc);
623 static void rmap_remove(struct kvm *kvm, u64 *spte)
625 struct kvm_rmap_desc *desc;
626 struct kvm_rmap_desc *prev_desc;
627 struct kvm_mmu_page *sp;
629 unsigned long *rmapp;
632 if (!is_rmap_spte(*spte))
634 sp = page_header(__pa(spte));
635 pfn = spte_to_pfn(*spte);
636 if (*spte & shadow_accessed_mask)
637 kvm_set_pfn_accessed(pfn);
638 if (is_writeble_pte(*spte))
639 kvm_set_pfn_dirty(pfn);
640 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
642 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
644 } else if (!(*rmapp & 1)) {
645 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
646 if ((u64 *)*rmapp != spte) {
647 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
653 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
654 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
657 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
658 if (desc->sptes[i] == spte) {
659 rmap_desc_remove_entry(rmapp,
671 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
673 struct kvm_rmap_desc *desc;
674 struct kvm_rmap_desc *prev_desc;
680 else if (!(*rmapp & 1)) {
682 return (u64 *)*rmapp;
685 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
689 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
690 if (prev_spte == spte)
691 return desc->sptes[i];
692 prev_spte = desc->sptes[i];
699 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
701 unsigned long *rmapp;
703 int i, write_protected = 0;
705 gfn = unalias_gfn(kvm, gfn);
706 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
708 spte = rmap_next(kvm, rmapp, NULL);
711 BUG_ON(!(*spte & PT_PRESENT_MASK));
712 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
713 if (is_writeble_pte(*spte)) {
714 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
717 spte = rmap_next(kvm, rmapp, spte);
719 if (write_protected) {
722 spte = rmap_next(kvm, rmapp, NULL);
723 pfn = spte_to_pfn(*spte);
724 kvm_set_pfn_dirty(pfn);
727 /* check for huge page mappings */
728 for (i = PT_DIRECTORY_LEVEL;
729 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
730 rmapp = gfn_to_rmap(kvm, gfn, i);
731 spte = rmap_next(kvm, rmapp, NULL);
734 BUG_ON(!(*spte & PT_PRESENT_MASK));
735 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
736 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
737 if (is_writeble_pte(*spte)) {
738 rmap_remove(kvm, spte);
740 __set_spte(spte, shadow_trap_nonpresent_pte);
744 spte = rmap_next(kvm, rmapp, spte);
748 return write_protected;
751 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
755 int need_tlb_flush = 0;
757 while ((spte = rmap_next(kvm, rmapp, NULL))) {
758 BUG_ON(!(*spte & PT_PRESENT_MASK));
759 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
760 rmap_remove(kvm, spte);
761 __set_spte(spte, shadow_trap_nonpresent_pte);
764 return need_tlb_flush;
767 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
772 pte_t *ptep = (pte_t *)data;
775 WARN_ON(pte_huge(*ptep));
776 new_pfn = pte_pfn(*ptep);
777 spte = rmap_next(kvm, rmapp, NULL);
779 BUG_ON(!is_shadow_present_pte(*spte));
780 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
782 if (pte_write(*ptep)) {
783 rmap_remove(kvm, spte);
784 __set_spte(spte, shadow_trap_nonpresent_pte);
785 spte = rmap_next(kvm, rmapp, NULL);
787 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
788 new_spte |= (u64)new_pfn << PAGE_SHIFT;
790 new_spte &= ~PT_WRITABLE_MASK;
791 new_spte &= ~SPTE_HOST_WRITEABLE;
792 if (is_writeble_pte(*spte))
793 kvm_set_pfn_dirty(spte_to_pfn(*spte));
794 __set_spte(spte, new_spte);
795 spte = rmap_next(kvm, rmapp, spte);
799 kvm_flush_remote_tlbs(kvm);
804 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
806 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
813 * If mmap_sem isn't taken, we can look the memslots with only
814 * the mmu_lock by skipping over the slots with userspace_addr == 0.
816 for (i = 0; i < kvm->nmemslots; i++) {
817 struct kvm_memory_slot *memslot = &kvm->memslots[i];
818 unsigned long start = memslot->userspace_addr;
821 /* mmu_lock protects userspace_addr */
825 end = start + (memslot->npages << PAGE_SHIFT);
826 if (hva >= start && hva < end) {
827 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
829 retval |= handler(kvm, &memslot->rmap[gfn_offset],
832 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
833 int idx = gfn_offset;
834 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
835 retval |= handler(kvm,
836 &memslot->lpage_info[j][idx].rmap_pde,
845 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
847 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
850 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
852 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
855 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
861 /* always return old for EPT */
862 if (!shadow_accessed_mask)
865 spte = rmap_next(kvm, rmapp, NULL);
869 BUG_ON(!(_spte & PT_PRESENT_MASK));
870 _young = _spte & PT_ACCESSED_MASK;
873 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
875 spte = rmap_next(kvm, rmapp, spte);
880 #define RMAP_RECYCLE_THRESHOLD 1000
882 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
884 unsigned long *rmapp;
885 struct kvm_mmu_page *sp;
887 sp = page_header(__pa(spte));
889 gfn = unalias_gfn(vcpu->kvm, gfn);
890 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
892 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
893 kvm_flush_remote_tlbs(vcpu->kvm);
896 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
898 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
902 static int is_empty_shadow_page(u64 *spt)
907 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
908 if (is_shadow_present_pte(*pos)) {
909 printk(KERN_ERR "%s: %p %llx\n", __func__,
917 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
919 ASSERT(is_empty_shadow_page(sp->spt));
921 __free_page(virt_to_page(sp->spt));
922 __free_page(virt_to_page(sp->gfns));
924 ++kvm->arch.n_free_mmu_pages;
927 static unsigned kvm_page_table_hashfn(gfn_t gfn)
929 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
932 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
935 struct kvm_mmu_page *sp;
937 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
938 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
939 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
940 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
941 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
942 INIT_LIST_HEAD(&sp->oos_link);
943 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
945 sp->parent_pte = parent_pte;
946 --vcpu->kvm->arch.n_free_mmu_pages;
950 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
951 struct kvm_mmu_page *sp, u64 *parent_pte)
953 struct kvm_pte_chain *pte_chain;
954 struct hlist_node *node;
959 if (!sp->multimapped) {
960 u64 *old = sp->parent_pte;
963 sp->parent_pte = parent_pte;
967 pte_chain = mmu_alloc_pte_chain(vcpu);
968 INIT_HLIST_HEAD(&sp->parent_ptes);
969 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
970 pte_chain->parent_ptes[0] = old;
972 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
973 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
975 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
976 if (!pte_chain->parent_ptes[i]) {
977 pte_chain->parent_ptes[i] = parent_pte;
981 pte_chain = mmu_alloc_pte_chain(vcpu);
983 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
984 pte_chain->parent_ptes[0] = parent_pte;
987 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
990 struct kvm_pte_chain *pte_chain;
991 struct hlist_node *node;
994 if (!sp->multimapped) {
995 BUG_ON(sp->parent_pte != parent_pte);
996 sp->parent_pte = NULL;
999 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1000 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1001 if (!pte_chain->parent_ptes[i])
1003 if (pte_chain->parent_ptes[i] != parent_pte)
1005 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1006 && pte_chain->parent_ptes[i + 1]) {
1007 pte_chain->parent_ptes[i]
1008 = pte_chain->parent_ptes[i + 1];
1011 pte_chain->parent_ptes[i] = NULL;
1013 hlist_del(&pte_chain->link);
1014 mmu_free_pte_chain(pte_chain);
1015 if (hlist_empty(&sp->parent_ptes)) {
1016 sp->multimapped = 0;
1017 sp->parent_pte = NULL;
1026 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1027 mmu_parent_walk_fn fn)
1029 struct kvm_pte_chain *pte_chain;
1030 struct hlist_node *node;
1031 struct kvm_mmu_page *parent_sp;
1034 if (!sp->multimapped && sp->parent_pte) {
1035 parent_sp = page_header(__pa(sp->parent_pte));
1036 fn(vcpu, parent_sp);
1037 mmu_parent_walk(vcpu, parent_sp, fn);
1040 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1041 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1042 if (!pte_chain->parent_ptes[i])
1044 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1045 fn(vcpu, parent_sp);
1046 mmu_parent_walk(vcpu, parent_sp, fn);
1050 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1053 struct kvm_mmu_page *sp = page_header(__pa(spte));
1055 index = spte - sp->spt;
1056 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1057 sp->unsync_children++;
1058 WARN_ON(!sp->unsync_children);
1061 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1063 struct kvm_pte_chain *pte_chain;
1064 struct hlist_node *node;
1067 if (!sp->parent_pte)
1070 if (!sp->multimapped) {
1071 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1075 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1076 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1077 if (!pte_chain->parent_ptes[i])
1079 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1083 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1085 kvm_mmu_update_parents_unsync(sp);
1089 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1090 struct kvm_mmu_page *sp)
1092 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1093 kvm_mmu_update_parents_unsync(sp);
1096 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1097 struct kvm_mmu_page *sp)
1101 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1102 sp->spt[i] = shadow_trap_nonpresent_pte;
1105 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1106 struct kvm_mmu_page *sp)
1111 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1115 #define KVM_PAGE_ARRAY_NR 16
1117 struct kvm_mmu_pages {
1118 struct mmu_page_and_offset {
1119 struct kvm_mmu_page *sp;
1121 } page[KVM_PAGE_ARRAY_NR];
1125 #define for_each_unsync_children(bitmap, idx) \
1126 for (idx = find_first_bit(bitmap, 512); \
1128 idx = find_next_bit(bitmap, 512, idx+1))
1130 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1136 for (i=0; i < pvec->nr; i++)
1137 if (pvec->page[i].sp == sp)
1140 pvec->page[pvec->nr].sp = sp;
1141 pvec->page[pvec->nr].idx = idx;
1143 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1146 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1147 struct kvm_mmu_pages *pvec)
1149 int i, ret, nr_unsync_leaf = 0;
1151 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1152 u64 ent = sp->spt[i];
1154 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1155 struct kvm_mmu_page *child;
1156 child = page_header(ent & PT64_BASE_ADDR_MASK);
1158 if (child->unsync_children) {
1159 if (mmu_pages_add(pvec, child, i))
1162 ret = __mmu_unsync_walk(child, pvec);
1164 __clear_bit(i, sp->unsync_child_bitmap);
1166 nr_unsync_leaf += ret;
1171 if (child->unsync) {
1173 if (mmu_pages_add(pvec, child, i))
1179 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1180 sp->unsync_children = 0;
1182 return nr_unsync_leaf;
1185 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1186 struct kvm_mmu_pages *pvec)
1188 if (!sp->unsync_children)
1191 mmu_pages_add(pvec, sp, 0);
1192 return __mmu_unsync_walk(sp, pvec);
1195 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1198 struct hlist_head *bucket;
1199 struct kvm_mmu_page *sp;
1200 struct hlist_node *node;
1202 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1203 index = kvm_page_table_hashfn(gfn);
1204 bucket = &kvm->arch.mmu_page_hash[index];
1205 hlist_for_each_entry(sp, node, bucket, hash_link)
1206 if (sp->gfn == gfn && !sp->role.direct
1207 && !sp->role.invalid) {
1208 pgprintk("%s: found role %x\n",
1209 __func__, sp->role.word);
1215 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1217 WARN_ON(!sp->unsync);
1219 --kvm->stat.mmu_unsync;
1222 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1224 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1226 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1227 kvm_mmu_zap_page(vcpu->kvm, sp);
1231 trace_kvm_mmu_sync_page(sp);
1232 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1233 kvm_flush_remote_tlbs(vcpu->kvm);
1234 kvm_unlink_unsync_page(vcpu->kvm, sp);
1235 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1236 kvm_mmu_zap_page(vcpu->kvm, sp);
1240 kvm_mmu_flush_tlb(vcpu);
1244 struct mmu_page_path {
1245 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1246 unsigned int idx[PT64_ROOT_LEVEL-1];
1249 #define for_each_sp(pvec, sp, parents, i) \
1250 for (i = mmu_pages_next(&pvec, &parents, -1), \
1251 sp = pvec.page[i].sp; \
1252 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1253 i = mmu_pages_next(&pvec, &parents, i))
1255 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1256 struct mmu_page_path *parents,
1261 for (n = i+1; n < pvec->nr; n++) {
1262 struct kvm_mmu_page *sp = pvec->page[n].sp;
1264 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1265 parents->idx[0] = pvec->page[n].idx;
1269 parents->parent[sp->role.level-2] = sp;
1270 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1276 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1278 struct kvm_mmu_page *sp;
1279 unsigned int level = 0;
1282 unsigned int idx = parents->idx[level];
1284 sp = parents->parent[level];
1288 --sp->unsync_children;
1289 WARN_ON((int)sp->unsync_children < 0);
1290 __clear_bit(idx, sp->unsync_child_bitmap);
1292 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1295 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1296 struct mmu_page_path *parents,
1297 struct kvm_mmu_pages *pvec)
1299 parents->parent[parent->role.level-1] = NULL;
1303 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1304 struct kvm_mmu_page *parent)
1307 struct kvm_mmu_page *sp;
1308 struct mmu_page_path parents;
1309 struct kvm_mmu_pages pages;
1311 kvm_mmu_pages_init(parent, &parents, &pages);
1312 while (mmu_unsync_walk(parent, &pages)) {
1315 for_each_sp(pages, sp, parents, i)
1316 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1319 kvm_flush_remote_tlbs(vcpu->kvm);
1321 for_each_sp(pages, sp, parents, i) {
1322 kvm_sync_page(vcpu, sp);
1323 mmu_pages_clear_parents(&parents);
1325 cond_resched_lock(&vcpu->kvm->mmu_lock);
1326 kvm_mmu_pages_init(parent, &parents, &pages);
1330 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1338 union kvm_mmu_page_role role;
1341 struct hlist_head *bucket;
1342 struct kvm_mmu_page *sp;
1343 struct hlist_node *node, *tmp;
1345 role = vcpu->arch.mmu.base_role;
1347 role.direct = direct;
1348 role.access = access;
1349 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1350 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1351 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1352 role.quadrant = quadrant;
1354 index = kvm_page_table_hashfn(gfn);
1355 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1356 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1357 if (sp->gfn == gfn) {
1359 if (kvm_sync_page(vcpu, sp))
1362 if (sp->role.word != role.word)
1365 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1366 if (sp->unsync_children) {
1367 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1368 kvm_mmu_mark_parents_unsync(vcpu, sp);
1370 trace_kvm_mmu_get_page(sp, false);
1373 ++vcpu->kvm->stat.mmu_cache_miss;
1374 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1379 hlist_add_head(&sp->hash_link, bucket);
1381 if (rmap_write_protect(vcpu->kvm, gfn))
1382 kvm_flush_remote_tlbs(vcpu->kvm);
1383 account_shadowed(vcpu->kvm, gfn);
1385 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1386 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1388 nonpaging_prefetch_page(vcpu, sp);
1389 trace_kvm_mmu_get_page(sp, true);
1393 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1394 struct kvm_vcpu *vcpu, u64 addr)
1396 iterator->addr = addr;
1397 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1398 iterator->level = vcpu->arch.mmu.shadow_root_level;
1399 if (iterator->level == PT32E_ROOT_LEVEL) {
1400 iterator->shadow_addr
1401 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1402 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1404 if (!iterator->shadow_addr)
1405 iterator->level = 0;
1409 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1411 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1414 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1415 if (is_large_pte(*iterator->sptep))
1418 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1419 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1423 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1425 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1429 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1430 struct kvm_mmu_page *sp)
1438 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1441 if (is_shadow_present_pte(ent)) {
1442 if (!is_last_spte(ent, sp->role.level)) {
1443 ent &= PT64_BASE_ADDR_MASK;
1444 mmu_page_remove_parent_pte(page_header(ent),
1447 if (is_large_pte(ent))
1449 rmap_remove(kvm, &pt[i]);
1452 pt[i] = shadow_trap_nonpresent_pte;
1456 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1458 mmu_page_remove_parent_pte(sp, parent_pte);
1461 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1464 struct kvm_vcpu *vcpu;
1466 kvm_for_each_vcpu(i, vcpu, kvm)
1467 vcpu->arch.last_pte_updated = NULL;
1470 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1474 while (sp->multimapped || sp->parent_pte) {
1475 if (!sp->multimapped)
1476 parent_pte = sp->parent_pte;
1478 struct kvm_pte_chain *chain;
1480 chain = container_of(sp->parent_ptes.first,
1481 struct kvm_pte_chain, link);
1482 parent_pte = chain->parent_ptes[0];
1484 BUG_ON(!parent_pte);
1485 kvm_mmu_put_page(sp, parent_pte);
1486 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1490 static int mmu_zap_unsync_children(struct kvm *kvm,
1491 struct kvm_mmu_page *parent)
1494 struct mmu_page_path parents;
1495 struct kvm_mmu_pages pages;
1497 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1500 kvm_mmu_pages_init(parent, &parents, &pages);
1501 while (mmu_unsync_walk(parent, &pages)) {
1502 struct kvm_mmu_page *sp;
1504 for_each_sp(pages, sp, parents, i) {
1505 kvm_mmu_zap_page(kvm, sp);
1506 mmu_pages_clear_parents(&parents);
1509 kvm_mmu_pages_init(parent, &parents, &pages);
1515 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1519 trace_kvm_mmu_zap_page(sp);
1520 ++kvm->stat.mmu_shadow_zapped;
1521 ret = mmu_zap_unsync_children(kvm, sp);
1522 kvm_mmu_page_unlink_children(kvm, sp);
1523 kvm_mmu_unlink_parents(kvm, sp);
1524 kvm_flush_remote_tlbs(kvm);
1525 if (!sp->role.invalid && !sp->role.direct)
1526 unaccount_shadowed(kvm, sp->gfn);
1528 kvm_unlink_unsync_page(kvm, sp);
1529 if (!sp->root_count) {
1530 hlist_del(&sp->hash_link);
1531 kvm_mmu_free_page(kvm, sp);
1533 sp->role.invalid = 1;
1534 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1535 kvm_reload_remote_mmus(kvm);
1537 kvm_mmu_reset_last_pte_updated(kvm);
1542 * Changing the number of mmu pages allocated to the vm
1543 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1545 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1549 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1550 used_pages = max(0, used_pages);
1553 * If we set the number of mmu pages to be smaller be than the
1554 * number of actived pages , we must to free some mmu pages before we
1558 if (used_pages > kvm_nr_mmu_pages) {
1559 while (used_pages > kvm_nr_mmu_pages) {
1560 struct kvm_mmu_page *page;
1562 page = container_of(kvm->arch.active_mmu_pages.prev,
1563 struct kvm_mmu_page, link);
1564 kvm_mmu_zap_page(kvm, page);
1567 kvm->arch.n_free_mmu_pages = 0;
1570 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1571 - kvm->arch.n_alloc_mmu_pages;
1573 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1576 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1579 struct hlist_head *bucket;
1580 struct kvm_mmu_page *sp;
1581 struct hlist_node *node, *n;
1584 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1586 index = kvm_page_table_hashfn(gfn);
1587 bucket = &kvm->arch.mmu_page_hash[index];
1588 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1589 if (sp->gfn == gfn && !sp->role.direct) {
1590 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1593 if (kvm_mmu_zap_page(kvm, sp))
1599 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1602 struct hlist_head *bucket;
1603 struct kvm_mmu_page *sp;
1604 struct hlist_node *node, *nn;
1606 index = kvm_page_table_hashfn(gfn);
1607 bucket = &kvm->arch.mmu_page_hash[index];
1608 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1609 if (sp->gfn == gfn && !sp->role.direct
1610 && !sp->role.invalid) {
1611 pgprintk("%s: zap %lx %x\n",
1612 __func__, gfn, sp->role.word);
1613 kvm_mmu_zap_page(kvm, sp);
1618 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1620 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1621 struct kvm_mmu_page *sp = page_header(__pa(pte));
1623 __set_bit(slot, sp->slot_bitmap);
1626 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1631 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1634 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1635 if (pt[i] == shadow_notrap_nonpresent_pte)
1636 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1640 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1644 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1646 if (gpa == UNMAPPED_GVA)
1649 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1655 * The function is based on mtrr_type_lookup() in
1656 * arch/x86/kernel/cpu/mtrr/generic.c
1658 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1663 u8 prev_match, curr_match;
1664 int num_var_ranges = KVM_NR_VAR_MTRR;
1666 if (!mtrr_state->enabled)
1669 /* Make end inclusive end, instead of exclusive */
1672 /* Look in fixed ranges. Just return the type as per start */
1673 if (mtrr_state->have_fixed && (start < 0x100000)) {
1676 if (start < 0x80000) {
1678 idx += (start >> 16);
1679 return mtrr_state->fixed_ranges[idx];
1680 } else if (start < 0xC0000) {
1682 idx += ((start - 0x80000) >> 14);
1683 return mtrr_state->fixed_ranges[idx];
1684 } else if (start < 0x1000000) {
1686 idx += ((start - 0xC0000) >> 12);
1687 return mtrr_state->fixed_ranges[idx];
1692 * Look in variable ranges
1693 * Look of multiple ranges matching this address and pick type
1694 * as per MTRR precedence
1696 if (!(mtrr_state->enabled & 2))
1697 return mtrr_state->def_type;
1700 for (i = 0; i < num_var_ranges; ++i) {
1701 unsigned short start_state, end_state;
1703 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1706 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1707 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1708 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1709 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1711 start_state = ((start & mask) == (base & mask));
1712 end_state = ((end & mask) == (base & mask));
1713 if (start_state != end_state)
1716 if ((start & mask) != (base & mask))
1719 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1720 if (prev_match == 0xFF) {
1721 prev_match = curr_match;
1725 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1726 curr_match == MTRR_TYPE_UNCACHABLE)
1727 return MTRR_TYPE_UNCACHABLE;
1729 if ((prev_match == MTRR_TYPE_WRBACK &&
1730 curr_match == MTRR_TYPE_WRTHROUGH) ||
1731 (prev_match == MTRR_TYPE_WRTHROUGH &&
1732 curr_match == MTRR_TYPE_WRBACK)) {
1733 prev_match = MTRR_TYPE_WRTHROUGH;
1734 curr_match = MTRR_TYPE_WRTHROUGH;
1737 if (prev_match != curr_match)
1738 return MTRR_TYPE_UNCACHABLE;
1741 if (prev_match != 0xFF)
1744 return mtrr_state->def_type;
1747 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1751 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1752 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1753 if (mtrr == 0xfe || mtrr == 0xff)
1754 mtrr = MTRR_TYPE_WRBACK;
1757 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1759 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1762 struct hlist_head *bucket;
1763 struct kvm_mmu_page *s;
1764 struct hlist_node *node, *n;
1766 trace_kvm_mmu_unsync_page(sp);
1767 index = kvm_page_table_hashfn(sp->gfn);
1768 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1769 /* don't unsync if pagetable is shadowed with multiple roles */
1770 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1771 if (s->gfn != sp->gfn || s->role.direct)
1773 if (s->role.word != sp->role.word)
1776 ++vcpu->kvm->stat.mmu_unsync;
1779 kvm_mmu_mark_parents_unsync(vcpu, sp);
1781 mmu_convert_notrap(sp);
1785 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1788 struct kvm_mmu_page *shadow;
1790 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1792 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1796 if (can_unsync && oos_shadow)
1797 return kvm_unsync_page(vcpu, shadow);
1803 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1804 unsigned pte_access, int user_fault,
1805 int write_fault, int dirty, int level,
1806 gfn_t gfn, pfn_t pfn, bool speculative,
1807 bool can_unsync, bool reset_host_protection)
1813 * We don't set the accessed bit, since we sometimes want to see
1814 * whether the guest actually used the pte (in order to detect
1817 spte = shadow_base_present_pte | shadow_dirty_mask;
1819 spte |= shadow_accessed_mask;
1821 pte_access &= ~ACC_WRITE_MASK;
1822 if (pte_access & ACC_EXEC_MASK)
1823 spte |= shadow_x_mask;
1825 spte |= shadow_nx_mask;
1826 if (pte_access & ACC_USER_MASK)
1827 spte |= shadow_user_mask;
1828 if (level > PT_PAGE_TABLE_LEVEL)
1829 spte |= PT_PAGE_SIZE_MASK;
1831 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1832 kvm_is_mmio_pfn(pfn));
1834 if (reset_host_protection)
1835 spte |= SPTE_HOST_WRITEABLE;
1837 spte |= (u64)pfn << PAGE_SHIFT;
1839 if ((pte_access & ACC_WRITE_MASK)
1840 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1842 if (level > PT_PAGE_TABLE_LEVEL &&
1843 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1845 spte = shadow_trap_nonpresent_pte;
1849 spte |= PT_WRITABLE_MASK;
1852 * Optimization: for pte sync, if spte was writable the hash
1853 * lookup is unnecessary (and expensive). Write protection
1854 * is responsibility of mmu_get_page / kvm_sync_page.
1855 * Same reasoning can be applied to dirty page accounting.
1857 if (!can_unsync && is_writeble_pte(*sptep))
1860 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1861 pgprintk("%s: found shadow page for %lx, marking ro\n",
1864 pte_access &= ~ACC_WRITE_MASK;
1865 if (is_writeble_pte(spte))
1866 spte &= ~PT_WRITABLE_MASK;
1870 if (pte_access & ACC_WRITE_MASK)
1871 mark_page_dirty(vcpu->kvm, gfn);
1874 __set_spte(sptep, spte);
1878 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1879 unsigned pt_access, unsigned pte_access,
1880 int user_fault, int write_fault, int dirty,
1881 int *ptwrite, int level, gfn_t gfn,
1882 pfn_t pfn, bool speculative,
1883 bool reset_host_protection)
1885 int was_rmapped = 0;
1886 int was_writeble = is_writeble_pte(*sptep);
1889 pgprintk("%s: spte %llx access %x write_fault %d"
1890 " user_fault %d gfn %lx\n",
1891 __func__, *sptep, pt_access,
1892 write_fault, user_fault, gfn);
1894 if (is_rmap_spte(*sptep)) {
1896 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1897 * the parent of the now unreachable PTE.
1899 if (level > PT_PAGE_TABLE_LEVEL &&
1900 !is_large_pte(*sptep)) {
1901 struct kvm_mmu_page *child;
1904 child = page_header(pte & PT64_BASE_ADDR_MASK);
1905 mmu_page_remove_parent_pte(child, sptep);
1906 } else if (pfn != spte_to_pfn(*sptep)) {
1907 pgprintk("hfn old %lx new %lx\n",
1908 spte_to_pfn(*sptep), pfn);
1909 rmap_remove(vcpu->kvm, sptep);
1914 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1915 dirty, level, gfn, pfn, speculative, true,
1916 reset_host_protection)) {
1919 kvm_x86_ops->tlb_flush(vcpu);
1922 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1923 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1924 is_large_pte(*sptep)? "2MB" : "4kB",
1925 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1927 if (!was_rmapped && is_large_pte(*sptep))
1928 ++vcpu->kvm->stat.lpages;
1930 page_header_update_slot(vcpu->kvm, sptep, gfn);
1932 rmap_count = rmap_add(vcpu, sptep, gfn);
1933 kvm_release_pfn_clean(pfn);
1934 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1935 rmap_recycle(vcpu, sptep, gfn);
1938 kvm_release_pfn_dirty(pfn);
1940 kvm_release_pfn_clean(pfn);
1943 vcpu->arch.last_pte_updated = sptep;
1944 vcpu->arch.last_pte_gfn = gfn;
1948 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1952 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1953 int level, gfn_t gfn, pfn_t pfn)
1955 struct kvm_shadow_walk_iterator iterator;
1956 struct kvm_mmu_page *sp;
1960 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1961 if (iterator.level == level) {
1962 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1963 0, write, 1, &pt_write,
1964 level, gfn, pfn, false, true);
1965 ++vcpu->stat.pf_fixed;
1969 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1970 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1971 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1973 1, ACC_ALL, iterator.sptep);
1975 pgprintk("nonpaging_map: ENOMEM\n");
1976 kvm_release_pfn_clean(pfn);
1980 __set_spte(iterator.sptep,
1982 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1983 | shadow_user_mask | shadow_x_mask);
1989 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1994 unsigned long mmu_seq;
1996 level = mapping_level(vcpu, gfn);
1999 * This path builds a PAE pagetable - so we can map 2mb pages at
2000 * maximum. Therefore check if the level is larger than that.
2002 if (level > PT_DIRECTORY_LEVEL)
2003 level = PT_DIRECTORY_LEVEL;
2005 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2007 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2009 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2012 if (is_error_pfn(pfn)) {
2013 kvm_release_pfn_clean(pfn);
2017 spin_lock(&vcpu->kvm->mmu_lock);
2018 if (mmu_notifier_retry(vcpu, mmu_seq))
2020 kvm_mmu_free_some_pages(vcpu);
2021 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2022 spin_unlock(&vcpu->kvm->mmu_lock);
2028 spin_unlock(&vcpu->kvm->mmu_lock);
2029 kvm_release_pfn_clean(pfn);
2034 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2037 struct kvm_mmu_page *sp;
2039 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2041 spin_lock(&vcpu->kvm->mmu_lock);
2042 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2043 hpa_t root = vcpu->arch.mmu.root_hpa;
2045 sp = page_header(root);
2047 if (!sp->root_count && sp->role.invalid)
2048 kvm_mmu_zap_page(vcpu->kvm, sp);
2049 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2050 spin_unlock(&vcpu->kvm->mmu_lock);
2053 for (i = 0; i < 4; ++i) {
2054 hpa_t root = vcpu->arch.mmu.pae_root[i];
2057 root &= PT64_BASE_ADDR_MASK;
2058 sp = page_header(root);
2060 if (!sp->root_count && sp->role.invalid)
2061 kvm_mmu_zap_page(vcpu->kvm, sp);
2063 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2065 spin_unlock(&vcpu->kvm->mmu_lock);
2066 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2069 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2073 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2074 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2081 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2085 struct kvm_mmu_page *sp;
2089 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2091 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2092 hpa_t root = vcpu->arch.mmu.root_hpa;
2094 ASSERT(!VALID_PAGE(root));
2097 if (mmu_check_root(vcpu, root_gfn))
2099 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2100 PT64_ROOT_LEVEL, direct,
2102 root = __pa(sp->spt);
2104 vcpu->arch.mmu.root_hpa = root;
2107 direct = !is_paging(vcpu);
2110 for (i = 0; i < 4; ++i) {
2111 hpa_t root = vcpu->arch.mmu.pae_root[i];
2113 ASSERT(!VALID_PAGE(root));
2114 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2115 pdptr = kvm_pdptr_read(vcpu, i);
2116 if (!is_present_gpte(pdptr)) {
2117 vcpu->arch.mmu.pae_root[i] = 0;
2120 root_gfn = pdptr >> PAGE_SHIFT;
2121 } else if (vcpu->arch.mmu.root_level == 0)
2123 if (mmu_check_root(vcpu, root_gfn))
2125 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2126 PT32_ROOT_LEVEL, direct,
2128 root = __pa(sp->spt);
2130 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2132 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2136 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2139 struct kvm_mmu_page *sp;
2141 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2143 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2144 hpa_t root = vcpu->arch.mmu.root_hpa;
2145 sp = page_header(root);
2146 mmu_sync_children(vcpu, sp);
2149 for (i = 0; i < 4; ++i) {
2150 hpa_t root = vcpu->arch.mmu.pae_root[i];
2152 if (root && VALID_PAGE(root)) {
2153 root &= PT64_BASE_ADDR_MASK;
2154 sp = page_header(root);
2155 mmu_sync_children(vcpu, sp);
2160 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2162 spin_lock(&vcpu->kvm->mmu_lock);
2163 mmu_sync_roots(vcpu);
2164 spin_unlock(&vcpu->kvm->mmu_lock);
2167 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2172 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2178 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2179 r = mmu_topup_memory_caches(vcpu);
2184 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2186 gfn = gva >> PAGE_SHIFT;
2188 return nonpaging_map(vcpu, gva & PAGE_MASK,
2189 error_code & PFERR_WRITE_MASK, gfn);
2192 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2198 gfn_t gfn = gpa >> PAGE_SHIFT;
2199 unsigned long mmu_seq;
2202 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2204 r = mmu_topup_memory_caches(vcpu);
2208 level = mapping_level(vcpu, gfn);
2210 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2212 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2214 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2215 if (is_error_pfn(pfn)) {
2216 kvm_release_pfn_clean(pfn);
2219 spin_lock(&vcpu->kvm->mmu_lock);
2220 if (mmu_notifier_retry(vcpu, mmu_seq))
2222 kvm_mmu_free_some_pages(vcpu);
2223 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2225 spin_unlock(&vcpu->kvm->mmu_lock);
2230 spin_unlock(&vcpu->kvm->mmu_lock);
2231 kvm_release_pfn_clean(pfn);
2235 static void nonpaging_free(struct kvm_vcpu *vcpu)
2237 mmu_free_roots(vcpu);
2240 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2242 struct kvm_mmu *context = &vcpu->arch.mmu;
2244 context->new_cr3 = nonpaging_new_cr3;
2245 context->page_fault = nonpaging_page_fault;
2246 context->gva_to_gpa = nonpaging_gva_to_gpa;
2247 context->free = nonpaging_free;
2248 context->prefetch_page = nonpaging_prefetch_page;
2249 context->sync_page = nonpaging_sync_page;
2250 context->invlpg = nonpaging_invlpg;
2251 context->root_level = 0;
2252 context->shadow_root_level = PT32E_ROOT_LEVEL;
2253 context->root_hpa = INVALID_PAGE;
2257 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2259 ++vcpu->stat.tlb_flush;
2260 kvm_x86_ops->tlb_flush(vcpu);
2263 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2265 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2266 mmu_free_roots(vcpu);
2269 static void inject_page_fault(struct kvm_vcpu *vcpu,
2273 kvm_inject_page_fault(vcpu, addr, err_code);
2276 static void paging_free(struct kvm_vcpu *vcpu)
2278 nonpaging_free(vcpu);
2281 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2285 bit7 = (gpte >> 7) & 1;
2286 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2290 #include "paging_tmpl.h"
2294 #include "paging_tmpl.h"
2297 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2299 struct kvm_mmu *context = &vcpu->arch.mmu;
2300 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2301 u64 exb_bit_rsvd = 0;
2304 exb_bit_rsvd = rsvd_bits(63, 63);
2306 case PT32_ROOT_LEVEL:
2307 /* no rsvd bits for 2 level 4K page table entries */
2308 context->rsvd_bits_mask[0][1] = 0;
2309 context->rsvd_bits_mask[0][0] = 0;
2310 if (is_cpuid_PSE36())
2311 /* 36bits PSE 4MB page */
2312 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2314 /* 32 bits PSE 4MB page */
2315 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2316 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2318 case PT32E_ROOT_LEVEL:
2319 context->rsvd_bits_mask[0][2] =
2320 rsvd_bits(maxphyaddr, 63) |
2321 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2322 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2323 rsvd_bits(maxphyaddr, 62); /* PDE */
2324 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2325 rsvd_bits(maxphyaddr, 62); /* PTE */
2326 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2327 rsvd_bits(maxphyaddr, 62) |
2328 rsvd_bits(13, 20); /* large page */
2329 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2331 case PT64_ROOT_LEVEL:
2332 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2333 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2334 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2335 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2336 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2337 rsvd_bits(maxphyaddr, 51);
2338 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2339 rsvd_bits(maxphyaddr, 51);
2340 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2341 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2342 rsvd_bits(maxphyaddr, 51) |
2344 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2345 rsvd_bits(maxphyaddr, 51) |
2346 rsvd_bits(13, 20); /* large page */
2347 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2352 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2354 struct kvm_mmu *context = &vcpu->arch.mmu;
2356 ASSERT(is_pae(vcpu));
2357 context->new_cr3 = paging_new_cr3;
2358 context->page_fault = paging64_page_fault;
2359 context->gva_to_gpa = paging64_gva_to_gpa;
2360 context->prefetch_page = paging64_prefetch_page;
2361 context->sync_page = paging64_sync_page;
2362 context->invlpg = paging64_invlpg;
2363 context->free = paging_free;
2364 context->root_level = level;
2365 context->shadow_root_level = level;
2366 context->root_hpa = INVALID_PAGE;
2370 static int paging64_init_context(struct kvm_vcpu *vcpu)
2372 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2373 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2376 static int paging32_init_context(struct kvm_vcpu *vcpu)
2378 struct kvm_mmu *context = &vcpu->arch.mmu;
2380 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2381 context->new_cr3 = paging_new_cr3;
2382 context->page_fault = paging32_page_fault;
2383 context->gva_to_gpa = paging32_gva_to_gpa;
2384 context->free = paging_free;
2385 context->prefetch_page = paging32_prefetch_page;
2386 context->sync_page = paging32_sync_page;
2387 context->invlpg = paging32_invlpg;
2388 context->root_level = PT32_ROOT_LEVEL;
2389 context->shadow_root_level = PT32E_ROOT_LEVEL;
2390 context->root_hpa = INVALID_PAGE;
2394 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2396 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2397 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2400 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2402 struct kvm_mmu *context = &vcpu->arch.mmu;
2404 context->new_cr3 = nonpaging_new_cr3;
2405 context->page_fault = tdp_page_fault;
2406 context->free = nonpaging_free;
2407 context->prefetch_page = nonpaging_prefetch_page;
2408 context->sync_page = nonpaging_sync_page;
2409 context->invlpg = nonpaging_invlpg;
2410 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2411 context->root_hpa = INVALID_PAGE;
2413 if (!is_paging(vcpu)) {
2414 context->gva_to_gpa = nonpaging_gva_to_gpa;
2415 context->root_level = 0;
2416 } else if (is_long_mode(vcpu)) {
2417 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2418 context->gva_to_gpa = paging64_gva_to_gpa;
2419 context->root_level = PT64_ROOT_LEVEL;
2420 } else if (is_pae(vcpu)) {
2421 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2422 context->gva_to_gpa = paging64_gva_to_gpa;
2423 context->root_level = PT32E_ROOT_LEVEL;
2425 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2426 context->gva_to_gpa = paging32_gva_to_gpa;
2427 context->root_level = PT32_ROOT_LEVEL;
2433 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2438 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2440 if (!is_paging(vcpu))
2441 r = nonpaging_init_context(vcpu);
2442 else if (is_long_mode(vcpu))
2443 r = paging64_init_context(vcpu);
2444 else if (is_pae(vcpu))
2445 r = paging32E_init_context(vcpu);
2447 r = paging32_init_context(vcpu);
2449 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2454 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2456 vcpu->arch.update_pte.pfn = bad_pfn;
2459 return init_kvm_tdp_mmu(vcpu);
2461 return init_kvm_softmmu(vcpu);
2464 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2467 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2468 vcpu->arch.mmu.free(vcpu);
2469 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2473 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2475 destroy_kvm_mmu(vcpu);
2476 return init_kvm_mmu(vcpu);
2478 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2480 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2484 r = mmu_topup_memory_caches(vcpu);
2487 spin_lock(&vcpu->kvm->mmu_lock);
2488 kvm_mmu_free_some_pages(vcpu);
2489 r = mmu_alloc_roots(vcpu);
2490 mmu_sync_roots(vcpu);
2491 spin_unlock(&vcpu->kvm->mmu_lock);
2494 /* set_cr3() should ensure TLB has been flushed */
2495 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2499 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2501 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2503 mmu_free_roots(vcpu);
2506 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2507 struct kvm_mmu_page *sp,
2511 struct kvm_mmu_page *child;
2514 if (is_shadow_present_pte(pte)) {
2515 if (is_last_spte(pte, sp->role.level))
2516 rmap_remove(vcpu->kvm, spte);
2518 child = page_header(pte & PT64_BASE_ADDR_MASK);
2519 mmu_page_remove_parent_pte(child, spte);
2522 __set_spte(spte, shadow_trap_nonpresent_pte);
2523 if (is_large_pte(pte))
2524 --vcpu->kvm->stat.lpages;
2527 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2528 struct kvm_mmu_page *sp,
2532 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2533 ++vcpu->kvm->stat.mmu_pde_zapped;
2537 ++vcpu->kvm->stat.mmu_pte_updated;
2538 if (sp->role.glevels == PT32_ROOT_LEVEL)
2539 paging32_update_pte(vcpu, sp, spte, new);
2541 paging64_update_pte(vcpu, sp, spte, new);
2544 static bool need_remote_flush(u64 old, u64 new)
2546 if (!is_shadow_present_pte(old))
2548 if (!is_shadow_present_pte(new))
2550 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2552 old ^= PT64_NX_MASK;
2553 new ^= PT64_NX_MASK;
2554 return (old & ~new & PT64_PERM_MASK) != 0;
2557 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2559 if (need_remote_flush(old, new))
2560 kvm_flush_remote_tlbs(vcpu->kvm);
2562 kvm_mmu_flush_tlb(vcpu);
2565 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2567 u64 *spte = vcpu->arch.last_pte_updated;
2569 return !!(spte && (*spte & shadow_accessed_mask));
2572 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2573 const u8 *new, int bytes)
2580 if (bytes != 4 && bytes != 8)
2584 * Assume that the pte write on a page table of the same type
2585 * as the current vcpu paging mode. This is nearly always true
2586 * (might be false while changing modes). Note it is verified later
2590 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2591 if ((bytes == 4) && (gpa % 4 == 0)) {
2592 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2595 memcpy((void *)&gpte + (gpa % 8), new, 4);
2596 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2597 memcpy((void *)&gpte, new, 8);
2600 if ((bytes == 4) && (gpa % 4 == 0))
2601 memcpy((void *)&gpte, new, 4);
2603 if (!is_present_gpte(gpte))
2605 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2607 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2609 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2611 if (is_error_pfn(pfn)) {
2612 kvm_release_pfn_clean(pfn);
2615 vcpu->arch.update_pte.gfn = gfn;
2616 vcpu->arch.update_pte.pfn = pfn;
2619 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2621 u64 *spte = vcpu->arch.last_pte_updated;
2624 && vcpu->arch.last_pte_gfn == gfn
2625 && shadow_accessed_mask
2626 && !(*spte & shadow_accessed_mask)
2627 && is_shadow_present_pte(*spte))
2628 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2631 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2632 const u8 *new, int bytes,
2633 bool guest_initiated)
2635 gfn_t gfn = gpa >> PAGE_SHIFT;
2636 struct kvm_mmu_page *sp;
2637 struct hlist_node *node, *n;
2638 struct hlist_head *bucket;
2642 unsigned offset = offset_in_page(gpa);
2644 unsigned page_offset;
2645 unsigned misaligned;
2652 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2653 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2654 spin_lock(&vcpu->kvm->mmu_lock);
2655 kvm_mmu_access_page(vcpu, gfn);
2656 kvm_mmu_free_some_pages(vcpu);
2657 ++vcpu->kvm->stat.mmu_pte_write;
2658 kvm_mmu_audit(vcpu, "pre pte write");
2659 if (guest_initiated) {
2660 if (gfn == vcpu->arch.last_pt_write_gfn
2661 && !last_updated_pte_accessed(vcpu)) {
2662 ++vcpu->arch.last_pt_write_count;
2663 if (vcpu->arch.last_pt_write_count >= 3)
2666 vcpu->arch.last_pt_write_gfn = gfn;
2667 vcpu->arch.last_pt_write_count = 1;
2668 vcpu->arch.last_pte_updated = NULL;
2671 index = kvm_page_table_hashfn(gfn);
2672 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2673 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2674 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2676 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2677 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2678 misaligned |= bytes < 4;
2679 if (misaligned || flooded) {
2681 * Misaligned accesses are too much trouble to fix
2682 * up; also, they usually indicate a page is not used
2685 * If we're seeing too many writes to a page,
2686 * it may no longer be a page table, or we may be
2687 * forking, in which case it is better to unmap the
2690 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2691 gpa, bytes, sp->role.word);
2692 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2694 ++vcpu->kvm->stat.mmu_flooded;
2697 page_offset = offset;
2698 level = sp->role.level;
2700 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2701 page_offset <<= 1; /* 32->64 */
2703 * A 32-bit pde maps 4MB while the shadow pdes map
2704 * only 2MB. So we need to double the offset again
2705 * and zap two pdes instead of one.
2707 if (level == PT32_ROOT_LEVEL) {
2708 page_offset &= ~7; /* kill rounding error */
2712 quadrant = page_offset >> PAGE_SHIFT;
2713 page_offset &= ~PAGE_MASK;
2714 if (quadrant != sp->role.quadrant)
2717 spte = &sp->spt[page_offset / sizeof(*spte)];
2718 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2720 r = kvm_read_guest_atomic(vcpu->kvm,
2721 gpa & ~(u64)(pte_size - 1),
2723 new = (const void *)&gentry;
2729 mmu_pte_write_zap_pte(vcpu, sp, spte);
2731 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2732 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2736 kvm_mmu_audit(vcpu, "post pte write");
2737 spin_unlock(&vcpu->kvm->mmu_lock);
2738 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2739 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2740 vcpu->arch.update_pte.pfn = bad_pfn;
2744 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2752 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2754 spin_lock(&vcpu->kvm->mmu_lock);
2755 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2756 spin_unlock(&vcpu->kvm->mmu_lock);
2759 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2761 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2763 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2764 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2765 struct kvm_mmu_page *sp;
2767 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2768 struct kvm_mmu_page, link);
2769 kvm_mmu_zap_page(vcpu->kvm, sp);
2770 ++vcpu->kvm->stat.mmu_recycled;
2774 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2777 enum emulation_result er;
2779 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2788 r = mmu_topup_memory_caches(vcpu);
2792 er = emulate_instruction(vcpu, cr2, error_code, 0);
2797 case EMULATE_DO_MMIO:
2798 ++vcpu->stat.mmio_exits;
2801 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2802 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2803 vcpu->run->internal.ndata = 0;
2811 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2813 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2815 vcpu->arch.mmu.invlpg(vcpu, gva);
2816 kvm_mmu_flush_tlb(vcpu);
2817 ++vcpu->stat.invlpg;
2819 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2821 void kvm_enable_tdp(void)
2825 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2827 void kvm_disable_tdp(void)
2829 tdp_enabled = false;
2831 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2833 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2835 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2838 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2846 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2847 * Therefore we need to allocate shadow page tables in the first
2848 * 4GB of memory, which happens to fit the DMA32 zone.
2850 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2853 vcpu->arch.mmu.pae_root = page_address(page);
2854 for (i = 0; i < 4; ++i)
2855 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2860 free_mmu_pages(vcpu);
2864 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2867 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2869 return alloc_mmu_pages(vcpu);
2872 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2875 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2877 return init_kvm_mmu(vcpu);
2880 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2884 destroy_kvm_mmu(vcpu);
2885 free_mmu_pages(vcpu);
2886 mmu_free_memory_caches(vcpu);
2889 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2891 struct kvm_mmu_page *sp;
2893 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2897 if (!test_bit(slot, sp->slot_bitmap))
2901 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2903 if (pt[i] & PT_WRITABLE_MASK)
2904 pt[i] &= ~PT_WRITABLE_MASK;
2906 kvm_flush_remote_tlbs(kvm);
2909 void kvm_mmu_zap_all(struct kvm *kvm)
2911 struct kvm_mmu_page *sp, *node;
2913 spin_lock(&kvm->mmu_lock);
2914 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2915 if (kvm_mmu_zap_page(kvm, sp))
2916 node = container_of(kvm->arch.active_mmu_pages.next,
2917 struct kvm_mmu_page, link);
2918 spin_unlock(&kvm->mmu_lock);
2920 kvm_flush_remote_tlbs(kvm);
2923 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2925 struct kvm_mmu_page *page;
2927 page = container_of(kvm->arch.active_mmu_pages.prev,
2928 struct kvm_mmu_page, link);
2929 kvm_mmu_zap_page(kvm, page);
2932 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2935 struct kvm *kvm_freed = NULL;
2936 int cache_count = 0;
2938 spin_lock(&kvm_lock);
2940 list_for_each_entry(kvm, &vm_list, vm_list) {
2943 if (!down_read_trylock(&kvm->slots_lock))
2945 spin_lock(&kvm->mmu_lock);
2946 npages = kvm->arch.n_alloc_mmu_pages -
2947 kvm->arch.n_free_mmu_pages;
2948 cache_count += npages;
2949 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2950 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2956 spin_unlock(&kvm->mmu_lock);
2957 up_read(&kvm->slots_lock);
2960 list_move_tail(&kvm_freed->vm_list, &vm_list);
2962 spin_unlock(&kvm_lock);
2967 static struct shrinker mmu_shrinker = {
2968 .shrink = mmu_shrink,
2969 .seeks = DEFAULT_SEEKS * 10,
2972 static void mmu_destroy_caches(void)
2974 if (pte_chain_cache)
2975 kmem_cache_destroy(pte_chain_cache);
2976 if (rmap_desc_cache)
2977 kmem_cache_destroy(rmap_desc_cache);
2978 if (mmu_page_header_cache)
2979 kmem_cache_destroy(mmu_page_header_cache);
2982 void kvm_mmu_module_exit(void)
2984 mmu_destroy_caches();
2985 unregister_shrinker(&mmu_shrinker);
2988 int kvm_mmu_module_init(void)
2990 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2991 sizeof(struct kvm_pte_chain),
2993 if (!pte_chain_cache)
2995 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2996 sizeof(struct kvm_rmap_desc),
2998 if (!rmap_desc_cache)
3001 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3002 sizeof(struct kvm_mmu_page),
3004 if (!mmu_page_header_cache)
3007 register_shrinker(&mmu_shrinker);
3012 mmu_destroy_caches();
3017 * Caculate mmu pages needed for kvm.
3019 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3022 unsigned int nr_mmu_pages;
3023 unsigned int nr_pages = 0;
3025 for (i = 0; i < kvm->nmemslots; i++)
3026 nr_pages += kvm->memslots[i].npages;
3028 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3029 nr_mmu_pages = max(nr_mmu_pages,
3030 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3032 return nr_mmu_pages;
3035 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3038 if (len > buffer->len)
3043 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3048 ret = pv_mmu_peek_buffer(buffer, len);
3053 buffer->processed += len;
3057 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3058 gpa_t addr, gpa_t value)
3063 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3066 r = mmu_topup_memory_caches(vcpu);
3070 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3076 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3078 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3082 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3084 spin_lock(&vcpu->kvm->mmu_lock);
3085 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3086 spin_unlock(&vcpu->kvm->mmu_lock);
3090 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3091 struct kvm_pv_mmu_op_buffer *buffer)
3093 struct kvm_mmu_op_header *header;
3095 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3098 switch (header->op) {
3099 case KVM_MMU_OP_WRITE_PTE: {
3100 struct kvm_mmu_op_write_pte *wpte;
3102 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3105 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3108 case KVM_MMU_OP_FLUSH_TLB: {
3109 struct kvm_mmu_op_flush_tlb *ftlb;
3111 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3114 return kvm_pv_mmu_flush_tlb(vcpu);
3116 case KVM_MMU_OP_RELEASE_PT: {
3117 struct kvm_mmu_op_release_pt *rpt;
3119 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3122 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3128 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3129 gpa_t addr, unsigned long *ret)
3132 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3134 buffer->ptr = buffer->buf;
3135 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3136 buffer->processed = 0;
3138 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3142 while (buffer->len) {
3143 r = kvm_pv_mmu_op_one(vcpu, buffer);
3152 *ret = buffer->processed;
3156 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3158 struct kvm_shadow_walk_iterator iterator;
3161 spin_lock(&vcpu->kvm->mmu_lock);
3162 for_each_shadow_entry(vcpu, addr, iterator) {
3163 sptes[iterator.level-1] = *iterator.sptep;
3165 if (!is_shadow_present_pte(*iterator.sptep))
3168 spin_unlock(&vcpu->kvm->mmu_lock);
3172 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3176 static const char *audit_msg;
3178 static gva_t canonicalize(gva_t gva)
3180 #ifdef CONFIG_X86_64
3181 gva = (long long)(gva << 16) >> 16;
3187 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3190 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3195 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3196 u64 ent = sp->spt[i];
3198 if (is_shadow_present_pte(ent)) {
3199 if (!is_last_spte(ent, sp->role.level)) {
3200 struct kvm_mmu_page *child;
3201 child = page_header(ent & PT64_BASE_ADDR_MASK);
3202 __mmu_spte_walk(kvm, child, fn);
3204 fn(kvm, sp, &sp->spt[i]);
3209 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3212 struct kvm_mmu_page *sp;
3214 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3216 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3217 hpa_t root = vcpu->arch.mmu.root_hpa;
3218 sp = page_header(root);
3219 __mmu_spte_walk(vcpu->kvm, sp, fn);
3222 for (i = 0; i < 4; ++i) {
3223 hpa_t root = vcpu->arch.mmu.pae_root[i];
3225 if (root && VALID_PAGE(root)) {
3226 root &= PT64_BASE_ADDR_MASK;
3227 sp = page_header(root);
3228 __mmu_spte_walk(vcpu->kvm, sp, fn);
3234 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3235 gva_t va, int level)
3237 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3239 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3241 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3244 if (ent == shadow_trap_nonpresent_pte)
3247 va = canonicalize(va);
3248 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3249 audit_mappings_page(vcpu, ent, va, level - 1);
3251 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3252 gfn_t gfn = gpa >> PAGE_SHIFT;
3253 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3254 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3256 if (is_error_pfn(pfn)) {
3257 kvm_release_pfn_clean(pfn);
3261 if (is_shadow_present_pte(ent)
3262 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3263 printk(KERN_ERR "xx audit error: (%s) levels %d"
3264 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3265 audit_msg, vcpu->arch.mmu.root_level,
3267 is_shadow_present_pte(ent));
3268 else if (ent == shadow_notrap_nonpresent_pte
3269 && !is_error_hpa(hpa))
3270 printk(KERN_ERR "audit: (%s) notrap shadow,"
3271 " valid guest gva %lx\n", audit_msg, va);
3272 kvm_release_pfn_clean(pfn);
3278 static void audit_mappings(struct kvm_vcpu *vcpu)
3282 if (vcpu->arch.mmu.root_level == 4)
3283 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3285 for (i = 0; i < 4; ++i)
3286 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3287 audit_mappings_page(vcpu,
3288 vcpu->arch.mmu.pae_root[i],
3293 static int count_rmaps(struct kvm_vcpu *vcpu)
3298 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3299 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3300 struct kvm_rmap_desc *d;
3302 for (j = 0; j < m->npages; ++j) {
3303 unsigned long *rmapp = &m->rmap[j];
3307 if (!(*rmapp & 1)) {
3311 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3313 for (k = 0; k < RMAP_EXT; ++k)
3325 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3327 unsigned long *rmapp;
3328 struct kvm_mmu_page *rev_sp;
3331 if (*sptep & PT_WRITABLE_MASK) {
3332 rev_sp = page_header(__pa(sptep));
3333 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3335 if (!gfn_to_memslot(kvm, gfn)) {
3336 if (!printk_ratelimit())
3338 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3340 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3341 audit_msg, sptep - rev_sp->spt,
3347 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3348 is_large_pte(*sptep));
3350 if (!printk_ratelimit())
3352 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3360 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3362 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3365 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3367 struct kvm_mmu_page *sp;
3370 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3373 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3376 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3379 if (!(ent & PT_PRESENT_MASK))
3381 if (!(ent & PT_WRITABLE_MASK))
3383 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3389 static void audit_rmap(struct kvm_vcpu *vcpu)
3391 check_writable_mappings_rmap(vcpu);
3395 static void audit_write_protection(struct kvm_vcpu *vcpu)
3397 struct kvm_mmu_page *sp;
3398 struct kvm_memory_slot *slot;
3399 unsigned long *rmapp;
3403 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3404 if (sp->role.direct)
3409 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3410 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3411 rmapp = &slot->rmap[gfn - slot->base_gfn];
3413 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3415 if (*spte & PT_WRITABLE_MASK)
3416 printk(KERN_ERR "%s: (%s) shadow page has "
3417 "writable mappings: gfn %lx role %x\n",
3418 __func__, audit_msg, sp->gfn,
3420 spte = rmap_next(vcpu->kvm, rmapp, spte);
3425 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3432 audit_write_protection(vcpu);
3433 if (strcmp("pre pte write", audit_msg) != 0)
3434 audit_mappings(vcpu);
3435 audit_writable_sptes_have_rmaps(vcpu);