2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 #include "kvm_cache_regs.h"
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
34 #include <asm/cmpxchg.h>
39 * When setting this variable to true it enables Two-Dimensional-Paging
40 * where the hardware walks 2 page tables:
41 * 1. the guest-virtual to guest-physical
42 * 2. while doing 1. it walks guest-physical to host-physical
43 * If the hardware supports that we don't need to do shadow paging.
45 bool tdp_enabled = false;
52 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
59 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
60 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64 #define pgprintk(x...) do { } while (0)
65 #define rmap_printk(x...) do { } while (0)
69 #if defined(MMU_DEBUG) || defined(AUDIT)
71 module_param(dbg, bool, 0644);
74 static int oos_shadow = 1;
75 module_param(oos_shadow, bool, 0644);
78 #define ASSERT(x) do { } while (0)
82 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
83 __FILE__, __LINE__, #x); \
87 #define PT_FIRST_AVAIL_BITS_SHIFT 9
88 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
90 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
92 #define PT64_LEVEL_BITS 9
94 #define PT64_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
97 #define PT64_LEVEL_MASK(level) \
98 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
100 #define PT64_INDEX(address, level)\
101 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
104 #define PT32_LEVEL_BITS 10
106 #define PT32_LEVEL_SHIFT(level) \
107 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
109 #define PT32_LEVEL_MASK(level) \
110 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
111 #define PT32_LVL_OFFSET_MASK(level) \
112 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113 * PT32_LEVEL_BITS))) - 1))
115 #define PT32_INDEX(address, level)\
116 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
119 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
120 #define PT64_DIR_BASE_ADDR_MASK \
121 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
122 #define PT64_LVL_ADDR_MASK(level) \
123 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
124 * PT64_LEVEL_BITS))) - 1))
125 #define PT64_LVL_OFFSET_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
129 #define PT32_BASE_ADDR_MASK PAGE_MASK
130 #define PT32_DIR_BASE_ADDR_MASK \
131 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
132 #define PT32_LVL_ADDR_MASK(level) \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
134 * PT32_LEVEL_BITS))) - 1))
136 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
139 #define PFERR_PRESENT_MASK (1U << 0)
140 #define PFERR_WRITE_MASK (1U << 1)
141 #define PFERR_USER_MASK (1U << 2)
142 #define PFERR_RSVD_MASK (1U << 3)
143 #define PFERR_FETCH_MASK (1U << 4)
145 #define PT_PDPE_LEVEL 3
146 #define PT_DIRECTORY_LEVEL 2
147 #define PT_PAGE_TABLE_LEVEL 1
151 #define ACC_EXEC_MASK 1
152 #define ACC_WRITE_MASK PT_WRITABLE_MASK
153 #define ACC_USER_MASK PT_USER_MASK
154 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
156 #define CREATE_TRACE_POINTS
157 #include "mmutrace.h"
159 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
161 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
163 struct kvm_rmap_desc {
164 u64 *sptes[RMAP_EXT];
165 struct kvm_rmap_desc *more;
168 struct kvm_shadow_walk_iterator {
176 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
177 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
178 shadow_walk_okay(&(_walker)); \
179 shadow_walk_next(&(_walker)))
182 struct kvm_unsync_walk {
183 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
186 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
188 static struct kmem_cache *pte_chain_cache;
189 static struct kmem_cache *rmap_desc_cache;
190 static struct kmem_cache *mmu_page_header_cache;
192 static u64 __read_mostly shadow_trap_nonpresent_pte;
193 static u64 __read_mostly shadow_notrap_nonpresent_pte;
194 static u64 __read_mostly shadow_base_present_pte;
195 static u64 __read_mostly shadow_nx_mask;
196 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
197 static u64 __read_mostly shadow_user_mask;
198 static u64 __read_mostly shadow_accessed_mask;
199 static u64 __read_mostly shadow_dirty_mask;
201 static inline u64 rsvd_bits(int s, int e)
203 return ((1ULL << (e - s + 1)) - 1) << s;
206 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
208 shadow_trap_nonpresent_pte = trap_pte;
209 shadow_notrap_nonpresent_pte = notrap_pte;
211 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
213 void kvm_mmu_set_base_ptes(u64 base_pte)
215 shadow_base_present_pte = base_pte;
217 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
219 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
220 u64 dirty_mask, u64 nx_mask, u64 x_mask)
222 shadow_user_mask = user_mask;
223 shadow_accessed_mask = accessed_mask;
224 shadow_dirty_mask = dirty_mask;
225 shadow_nx_mask = nx_mask;
226 shadow_x_mask = x_mask;
228 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
230 static bool is_write_protection(struct kvm_vcpu *vcpu)
232 return vcpu->arch.cr0 & X86_CR0_WP;
235 static int is_cpuid_PSE36(void)
240 static int is_nx(struct kvm_vcpu *vcpu)
242 return vcpu->arch.shadow_efer & EFER_NX;
245 static int is_shadow_present_pte(u64 pte)
247 return pte != shadow_trap_nonpresent_pte
248 && pte != shadow_notrap_nonpresent_pte;
251 static int is_large_pte(u64 pte)
253 return pte & PT_PAGE_SIZE_MASK;
256 static int is_writeble_pte(unsigned long pte)
258 return pte & PT_WRITABLE_MASK;
261 static int is_dirty_gpte(unsigned long pte)
263 return pte & PT_DIRTY_MASK;
266 static int is_rmap_spte(u64 pte)
268 return is_shadow_present_pte(pte);
271 static int is_last_spte(u64 pte, int level)
273 if (level == PT_PAGE_TABLE_LEVEL)
275 if (is_large_pte(pte))
280 static pfn_t spte_to_pfn(u64 pte)
282 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
285 static gfn_t pse36_gfn_delta(u32 gpte)
287 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
289 return (gpte & PT32_DIR_PSE36_MASK) << shift;
292 static void __set_spte(u64 *sptep, u64 spte)
295 set_64bit((unsigned long *)sptep, spte);
297 set_64bit((unsigned long long *)sptep, spte);
301 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
302 struct kmem_cache *base_cache, int min)
306 if (cache->nobjs >= min)
308 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
309 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
312 cache->objects[cache->nobjs++] = obj;
317 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
320 kfree(mc->objects[--mc->nobjs]);
323 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
328 if (cache->nobjs >= min)
330 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
331 page = alloc_page(GFP_KERNEL);
334 set_page_private(page, 0);
335 cache->objects[cache->nobjs++] = page_address(page);
340 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
343 free_page((unsigned long)mc->objects[--mc->nobjs]);
346 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
350 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
354 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
358 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
361 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
362 mmu_page_header_cache, 4);
367 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
369 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
370 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
371 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
372 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
375 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
381 p = mc->objects[--mc->nobjs];
385 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
387 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
388 sizeof(struct kvm_pte_chain));
391 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
396 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
398 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
399 sizeof(struct kvm_rmap_desc));
402 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
408 * Return the pointer to the largepage write count for a given
409 * gfn, handling slots that are not large page aligned.
411 static int *slot_largepage_idx(gfn_t gfn,
412 struct kvm_memory_slot *slot,
417 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
418 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
419 return &slot->lpage_info[level - 2][idx].write_count;
422 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
424 struct kvm_memory_slot *slot;
428 gfn = unalias_gfn(kvm, gfn);
430 slot = gfn_to_memslot_unaliased(kvm, gfn);
431 for (i = PT_DIRECTORY_LEVEL;
432 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
433 write_count = slot_largepage_idx(gfn, slot, i);
438 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
440 struct kvm_memory_slot *slot;
444 gfn = unalias_gfn(kvm, gfn);
445 for (i = PT_DIRECTORY_LEVEL;
446 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
447 slot = gfn_to_memslot_unaliased(kvm, gfn);
448 write_count = slot_largepage_idx(gfn, slot, i);
450 WARN_ON(*write_count < 0);
454 static int has_wrprotected_page(struct kvm *kvm,
458 struct kvm_memory_slot *slot;
461 gfn = unalias_gfn(kvm, gfn);
462 slot = gfn_to_memslot_unaliased(kvm, gfn);
464 largepage_idx = slot_largepage_idx(gfn, slot, level);
465 return *largepage_idx;
471 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
473 unsigned long page_size = PAGE_SIZE;
474 struct vm_area_struct *vma;
478 addr = gfn_to_hva(kvm, gfn);
479 if (kvm_is_error_hva(addr))
480 return PT_PAGE_TABLE_LEVEL;
482 down_read(¤t->mm->mmap_sem);
483 vma = find_vma(current->mm, addr);
487 page_size = vma_kernel_pagesize(vma);
490 up_read(¤t->mm->mmap_sem);
492 for (i = PT_PAGE_TABLE_LEVEL;
493 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
494 if (page_size >= KVM_HPAGE_SIZE(i))
503 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
505 struct kvm_memory_slot *slot;
507 int level = PT_PAGE_TABLE_LEVEL;
509 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
510 if (slot && slot->dirty_bitmap)
511 return PT_PAGE_TABLE_LEVEL;
513 host_level = host_mapping_level(vcpu->kvm, large_gfn);
515 if (host_level == PT_PAGE_TABLE_LEVEL)
518 for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level)
519 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
526 * Take gfn and return the reverse mapping to it.
527 * Note: gfn must be unaliased before this function get called
530 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
532 struct kvm_memory_slot *slot;
535 slot = gfn_to_memslot(kvm, gfn);
536 if (likely(level == PT_PAGE_TABLE_LEVEL))
537 return &slot->rmap[gfn - slot->base_gfn];
539 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
540 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
542 return &slot->lpage_info[level - 2][idx].rmap_pde;
546 * Reverse mapping data structures:
548 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
549 * that points to page_address(page).
551 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
552 * containing more mappings.
554 * Returns the number of rmap entries before the spte was added or zero if
555 * the spte was not added.
558 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
560 struct kvm_mmu_page *sp;
561 struct kvm_rmap_desc *desc;
562 unsigned long *rmapp;
565 if (!is_rmap_spte(*spte))
567 gfn = unalias_gfn(vcpu->kvm, gfn);
568 sp = page_header(__pa(spte));
569 sp->gfns[spte - sp->spt] = gfn;
570 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
572 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
573 *rmapp = (unsigned long)spte;
574 } else if (!(*rmapp & 1)) {
575 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
576 desc = mmu_alloc_rmap_desc(vcpu);
577 desc->sptes[0] = (u64 *)*rmapp;
578 desc->sptes[1] = spte;
579 *rmapp = (unsigned long)desc | 1;
581 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
582 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
583 while (desc->sptes[RMAP_EXT-1] && desc->more) {
587 if (desc->sptes[RMAP_EXT-1]) {
588 desc->more = mmu_alloc_rmap_desc(vcpu);
591 for (i = 0; desc->sptes[i]; ++i)
593 desc->sptes[i] = spte;
598 static void rmap_desc_remove_entry(unsigned long *rmapp,
599 struct kvm_rmap_desc *desc,
601 struct kvm_rmap_desc *prev_desc)
605 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
607 desc->sptes[i] = desc->sptes[j];
608 desc->sptes[j] = NULL;
611 if (!prev_desc && !desc->more)
612 *rmapp = (unsigned long)desc->sptes[0];
615 prev_desc->more = desc->more;
617 *rmapp = (unsigned long)desc->more | 1;
618 mmu_free_rmap_desc(desc);
621 static void rmap_remove(struct kvm *kvm, u64 *spte)
623 struct kvm_rmap_desc *desc;
624 struct kvm_rmap_desc *prev_desc;
625 struct kvm_mmu_page *sp;
627 unsigned long *rmapp;
630 if (!is_rmap_spte(*spte))
632 sp = page_header(__pa(spte));
633 pfn = spte_to_pfn(*spte);
634 if (*spte & shadow_accessed_mask)
635 kvm_set_pfn_accessed(pfn);
636 if (is_writeble_pte(*spte))
637 kvm_set_pfn_dirty(pfn);
638 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
640 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
642 } else if (!(*rmapp & 1)) {
643 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
644 if ((u64 *)*rmapp != spte) {
645 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
651 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
652 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
655 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
656 if (desc->sptes[i] == spte) {
657 rmap_desc_remove_entry(rmapp,
669 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
671 struct kvm_rmap_desc *desc;
672 struct kvm_rmap_desc *prev_desc;
678 else if (!(*rmapp & 1)) {
680 return (u64 *)*rmapp;
683 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
687 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
688 if (prev_spte == spte)
689 return desc->sptes[i];
690 prev_spte = desc->sptes[i];
697 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
699 unsigned long *rmapp;
701 int i, write_protected = 0;
703 gfn = unalias_gfn(kvm, gfn);
704 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
706 spte = rmap_next(kvm, rmapp, NULL);
709 BUG_ON(!(*spte & PT_PRESENT_MASK));
710 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
711 if (is_writeble_pte(*spte)) {
712 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
715 spte = rmap_next(kvm, rmapp, spte);
717 if (write_protected) {
720 spte = rmap_next(kvm, rmapp, NULL);
721 pfn = spte_to_pfn(*spte);
722 kvm_set_pfn_dirty(pfn);
725 /* check for huge page mappings */
726 for (i = PT_DIRECTORY_LEVEL;
727 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
728 rmapp = gfn_to_rmap(kvm, gfn, i);
729 spte = rmap_next(kvm, rmapp, NULL);
732 BUG_ON(!(*spte & PT_PRESENT_MASK));
733 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
734 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
735 if (is_writeble_pte(*spte)) {
736 rmap_remove(kvm, spte);
738 __set_spte(spte, shadow_trap_nonpresent_pte);
742 spte = rmap_next(kvm, rmapp, spte);
746 return write_protected;
749 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
753 int need_tlb_flush = 0;
755 while ((spte = rmap_next(kvm, rmapp, NULL))) {
756 BUG_ON(!(*spte & PT_PRESENT_MASK));
757 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
758 rmap_remove(kvm, spte);
759 __set_spte(spte, shadow_trap_nonpresent_pte);
762 return need_tlb_flush;
765 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
770 pte_t *ptep = (pte_t *)data;
773 WARN_ON(pte_huge(*ptep));
774 new_pfn = pte_pfn(*ptep);
775 spte = rmap_next(kvm, rmapp, NULL);
777 BUG_ON(!is_shadow_present_pte(*spte));
778 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
780 if (pte_write(*ptep)) {
781 rmap_remove(kvm, spte);
782 __set_spte(spte, shadow_trap_nonpresent_pte);
783 spte = rmap_next(kvm, rmapp, NULL);
785 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
786 new_spte |= (u64)new_pfn << PAGE_SHIFT;
788 new_spte &= ~PT_WRITABLE_MASK;
789 new_spte &= ~SPTE_HOST_WRITEABLE;
790 if (is_writeble_pte(*spte))
791 kvm_set_pfn_dirty(spte_to_pfn(*spte));
792 __set_spte(spte, new_spte);
793 spte = rmap_next(kvm, rmapp, spte);
797 kvm_flush_remote_tlbs(kvm);
802 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
804 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
811 * If mmap_sem isn't taken, we can look the memslots with only
812 * the mmu_lock by skipping over the slots with userspace_addr == 0.
814 for (i = 0; i < kvm->nmemslots; i++) {
815 struct kvm_memory_slot *memslot = &kvm->memslots[i];
816 unsigned long start = memslot->userspace_addr;
819 /* mmu_lock protects userspace_addr */
823 end = start + (memslot->npages << PAGE_SHIFT);
824 if (hva >= start && hva < end) {
825 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
827 retval |= handler(kvm, &memslot->rmap[gfn_offset],
830 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
831 int idx = gfn_offset;
832 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
833 retval |= handler(kvm,
834 &memslot->lpage_info[j][idx].rmap_pde,
843 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
845 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
848 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
850 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
853 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
859 /* always return old for EPT */
860 if (!shadow_accessed_mask)
863 spte = rmap_next(kvm, rmapp, NULL);
867 BUG_ON(!(_spte & PT_PRESENT_MASK));
868 _young = _spte & PT_ACCESSED_MASK;
871 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
873 spte = rmap_next(kvm, rmapp, spte);
878 #define RMAP_RECYCLE_THRESHOLD 1000
880 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
882 unsigned long *rmapp;
883 struct kvm_mmu_page *sp;
885 sp = page_header(__pa(spte));
887 gfn = unalias_gfn(vcpu->kvm, gfn);
888 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
890 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
891 kvm_flush_remote_tlbs(vcpu->kvm);
894 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
896 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
900 static int is_empty_shadow_page(u64 *spt)
905 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
906 if (is_shadow_present_pte(*pos)) {
907 printk(KERN_ERR "%s: %p %llx\n", __func__,
915 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
917 ASSERT(is_empty_shadow_page(sp->spt));
919 __free_page(virt_to_page(sp->spt));
920 __free_page(virt_to_page(sp->gfns));
922 ++kvm->arch.n_free_mmu_pages;
925 static unsigned kvm_page_table_hashfn(gfn_t gfn)
927 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
930 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
933 struct kvm_mmu_page *sp;
935 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
936 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
937 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
938 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
939 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
940 INIT_LIST_HEAD(&sp->oos_link);
941 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
943 sp->parent_pte = parent_pte;
944 --vcpu->kvm->arch.n_free_mmu_pages;
948 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
949 struct kvm_mmu_page *sp, u64 *parent_pte)
951 struct kvm_pte_chain *pte_chain;
952 struct hlist_node *node;
957 if (!sp->multimapped) {
958 u64 *old = sp->parent_pte;
961 sp->parent_pte = parent_pte;
965 pte_chain = mmu_alloc_pte_chain(vcpu);
966 INIT_HLIST_HEAD(&sp->parent_ptes);
967 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
968 pte_chain->parent_ptes[0] = old;
970 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
971 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
973 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
974 if (!pte_chain->parent_ptes[i]) {
975 pte_chain->parent_ptes[i] = parent_pte;
979 pte_chain = mmu_alloc_pte_chain(vcpu);
981 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
982 pte_chain->parent_ptes[0] = parent_pte;
985 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
988 struct kvm_pte_chain *pte_chain;
989 struct hlist_node *node;
992 if (!sp->multimapped) {
993 BUG_ON(sp->parent_pte != parent_pte);
994 sp->parent_pte = NULL;
997 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
998 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
999 if (!pte_chain->parent_ptes[i])
1001 if (pte_chain->parent_ptes[i] != parent_pte)
1003 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1004 && pte_chain->parent_ptes[i + 1]) {
1005 pte_chain->parent_ptes[i]
1006 = pte_chain->parent_ptes[i + 1];
1009 pte_chain->parent_ptes[i] = NULL;
1011 hlist_del(&pte_chain->link);
1012 mmu_free_pte_chain(pte_chain);
1013 if (hlist_empty(&sp->parent_ptes)) {
1014 sp->multimapped = 0;
1015 sp->parent_pte = NULL;
1024 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1025 mmu_parent_walk_fn fn)
1027 struct kvm_pte_chain *pte_chain;
1028 struct hlist_node *node;
1029 struct kvm_mmu_page *parent_sp;
1032 if (!sp->multimapped && sp->parent_pte) {
1033 parent_sp = page_header(__pa(sp->parent_pte));
1034 fn(vcpu, parent_sp);
1035 mmu_parent_walk(vcpu, parent_sp, fn);
1038 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1039 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1040 if (!pte_chain->parent_ptes[i])
1042 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1043 fn(vcpu, parent_sp);
1044 mmu_parent_walk(vcpu, parent_sp, fn);
1048 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1051 struct kvm_mmu_page *sp = page_header(__pa(spte));
1053 index = spte - sp->spt;
1054 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1055 sp->unsync_children++;
1056 WARN_ON(!sp->unsync_children);
1059 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1061 struct kvm_pte_chain *pte_chain;
1062 struct hlist_node *node;
1065 if (!sp->parent_pte)
1068 if (!sp->multimapped) {
1069 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1073 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1074 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1075 if (!pte_chain->parent_ptes[i])
1077 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1081 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1083 kvm_mmu_update_parents_unsync(sp);
1087 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1088 struct kvm_mmu_page *sp)
1090 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1091 kvm_mmu_update_parents_unsync(sp);
1094 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1095 struct kvm_mmu_page *sp)
1099 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1100 sp->spt[i] = shadow_trap_nonpresent_pte;
1103 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1104 struct kvm_mmu_page *sp)
1109 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1113 #define KVM_PAGE_ARRAY_NR 16
1115 struct kvm_mmu_pages {
1116 struct mmu_page_and_offset {
1117 struct kvm_mmu_page *sp;
1119 } page[KVM_PAGE_ARRAY_NR];
1123 #define for_each_unsync_children(bitmap, idx) \
1124 for (idx = find_first_bit(bitmap, 512); \
1126 idx = find_next_bit(bitmap, 512, idx+1))
1128 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1134 for (i=0; i < pvec->nr; i++)
1135 if (pvec->page[i].sp == sp)
1138 pvec->page[pvec->nr].sp = sp;
1139 pvec->page[pvec->nr].idx = idx;
1141 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1144 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1145 struct kvm_mmu_pages *pvec)
1147 int i, ret, nr_unsync_leaf = 0;
1149 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1150 u64 ent = sp->spt[i];
1152 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1153 struct kvm_mmu_page *child;
1154 child = page_header(ent & PT64_BASE_ADDR_MASK);
1156 if (child->unsync_children) {
1157 if (mmu_pages_add(pvec, child, i))
1160 ret = __mmu_unsync_walk(child, pvec);
1162 __clear_bit(i, sp->unsync_child_bitmap);
1164 nr_unsync_leaf += ret;
1169 if (child->unsync) {
1171 if (mmu_pages_add(pvec, child, i))
1177 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1178 sp->unsync_children = 0;
1180 return nr_unsync_leaf;
1183 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1184 struct kvm_mmu_pages *pvec)
1186 if (!sp->unsync_children)
1189 mmu_pages_add(pvec, sp, 0);
1190 return __mmu_unsync_walk(sp, pvec);
1193 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1196 struct hlist_head *bucket;
1197 struct kvm_mmu_page *sp;
1198 struct hlist_node *node;
1200 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1201 index = kvm_page_table_hashfn(gfn);
1202 bucket = &kvm->arch.mmu_page_hash[index];
1203 hlist_for_each_entry(sp, node, bucket, hash_link)
1204 if (sp->gfn == gfn && !sp->role.direct
1205 && !sp->role.invalid) {
1206 pgprintk("%s: found role %x\n",
1207 __func__, sp->role.word);
1213 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1215 WARN_ON(!sp->unsync);
1217 --kvm->stat.mmu_unsync;
1220 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1222 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1224 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1225 kvm_mmu_zap_page(vcpu->kvm, sp);
1229 trace_kvm_mmu_sync_page(sp);
1230 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1231 kvm_flush_remote_tlbs(vcpu->kvm);
1232 kvm_unlink_unsync_page(vcpu->kvm, sp);
1233 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1234 kvm_mmu_zap_page(vcpu->kvm, sp);
1238 kvm_mmu_flush_tlb(vcpu);
1242 struct mmu_page_path {
1243 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1244 unsigned int idx[PT64_ROOT_LEVEL-1];
1247 #define for_each_sp(pvec, sp, parents, i) \
1248 for (i = mmu_pages_next(&pvec, &parents, -1), \
1249 sp = pvec.page[i].sp; \
1250 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1251 i = mmu_pages_next(&pvec, &parents, i))
1253 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1254 struct mmu_page_path *parents,
1259 for (n = i+1; n < pvec->nr; n++) {
1260 struct kvm_mmu_page *sp = pvec->page[n].sp;
1262 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1263 parents->idx[0] = pvec->page[n].idx;
1267 parents->parent[sp->role.level-2] = sp;
1268 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1274 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1276 struct kvm_mmu_page *sp;
1277 unsigned int level = 0;
1280 unsigned int idx = parents->idx[level];
1282 sp = parents->parent[level];
1286 --sp->unsync_children;
1287 WARN_ON((int)sp->unsync_children < 0);
1288 __clear_bit(idx, sp->unsync_child_bitmap);
1290 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1293 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1294 struct mmu_page_path *parents,
1295 struct kvm_mmu_pages *pvec)
1297 parents->parent[parent->role.level-1] = NULL;
1301 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1302 struct kvm_mmu_page *parent)
1305 struct kvm_mmu_page *sp;
1306 struct mmu_page_path parents;
1307 struct kvm_mmu_pages pages;
1309 kvm_mmu_pages_init(parent, &parents, &pages);
1310 while (mmu_unsync_walk(parent, &pages)) {
1313 for_each_sp(pages, sp, parents, i)
1314 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1317 kvm_flush_remote_tlbs(vcpu->kvm);
1319 for_each_sp(pages, sp, parents, i) {
1320 kvm_sync_page(vcpu, sp);
1321 mmu_pages_clear_parents(&parents);
1323 cond_resched_lock(&vcpu->kvm->mmu_lock);
1324 kvm_mmu_pages_init(parent, &parents, &pages);
1328 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1336 union kvm_mmu_page_role role;
1339 struct hlist_head *bucket;
1340 struct kvm_mmu_page *sp;
1341 struct hlist_node *node, *tmp;
1343 role = vcpu->arch.mmu.base_role;
1345 role.direct = direct;
1346 role.access = access;
1347 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1348 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1349 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1350 role.quadrant = quadrant;
1352 index = kvm_page_table_hashfn(gfn);
1353 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1354 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1355 if (sp->gfn == gfn) {
1357 if (kvm_sync_page(vcpu, sp))
1360 if (sp->role.word != role.word)
1363 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1364 if (sp->unsync_children) {
1365 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1366 kvm_mmu_mark_parents_unsync(vcpu, sp);
1368 trace_kvm_mmu_get_page(sp, false);
1371 ++vcpu->kvm->stat.mmu_cache_miss;
1372 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1377 hlist_add_head(&sp->hash_link, bucket);
1379 if (rmap_write_protect(vcpu->kvm, gfn))
1380 kvm_flush_remote_tlbs(vcpu->kvm);
1381 account_shadowed(vcpu->kvm, gfn);
1383 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1384 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1386 nonpaging_prefetch_page(vcpu, sp);
1387 trace_kvm_mmu_get_page(sp, true);
1391 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1392 struct kvm_vcpu *vcpu, u64 addr)
1394 iterator->addr = addr;
1395 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1396 iterator->level = vcpu->arch.mmu.shadow_root_level;
1397 if (iterator->level == PT32E_ROOT_LEVEL) {
1398 iterator->shadow_addr
1399 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1400 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1402 if (!iterator->shadow_addr)
1403 iterator->level = 0;
1407 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1409 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1412 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1413 if (is_large_pte(*iterator->sptep))
1416 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1417 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1421 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1423 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1427 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1428 struct kvm_mmu_page *sp)
1436 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1439 if (is_shadow_present_pte(ent)) {
1440 if (!is_last_spte(ent, sp->role.level)) {
1441 ent &= PT64_BASE_ADDR_MASK;
1442 mmu_page_remove_parent_pte(page_header(ent),
1445 if (is_large_pte(ent))
1447 rmap_remove(kvm, &pt[i]);
1450 pt[i] = shadow_trap_nonpresent_pte;
1454 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1456 mmu_page_remove_parent_pte(sp, parent_pte);
1459 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1462 struct kvm_vcpu *vcpu;
1464 kvm_for_each_vcpu(i, vcpu, kvm)
1465 vcpu->arch.last_pte_updated = NULL;
1468 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1472 while (sp->multimapped || sp->parent_pte) {
1473 if (!sp->multimapped)
1474 parent_pte = sp->parent_pte;
1476 struct kvm_pte_chain *chain;
1478 chain = container_of(sp->parent_ptes.first,
1479 struct kvm_pte_chain, link);
1480 parent_pte = chain->parent_ptes[0];
1482 BUG_ON(!parent_pte);
1483 kvm_mmu_put_page(sp, parent_pte);
1484 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1488 static int mmu_zap_unsync_children(struct kvm *kvm,
1489 struct kvm_mmu_page *parent)
1492 struct mmu_page_path parents;
1493 struct kvm_mmu_pages pages;
1495 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1498 kvm_mmu_pages_init(parent, &parents, &pages);
1499 while (mmu_unsync_walk(parent, &pages)) {
1500 struct kvm_mmu_page *sp;
1502 for_each_sp(pages, sp, parents, i) {
1503 kvm_mmu_zap_page(kvm, sp);
1504 mmu_pages_clear_parents(&parents);
1507 kvm_mmu_pages_init(parent, &parents, &pages);
1513 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1517 trace_kvm_mmu_zap_page(sp);
1518 ++kvm->stat.mmu_shadow_zapped;
1519 ret = mmu_zap_unsync_children(kvm, sp);
1520 kvm_mmu_page_unlink_children(kvm, sp);
1521 kvm_mmu_unlink_parents(kvm, sp);
1522 kvm_flush_remote_tlbs(kvm);
1523 if (!sp->role.invalid && !sp->role.direct)
1524 unaccount_shadowed(kvm, sp->gfn);
1526 kvm_unlink_unsync_page(kvm, sp);
1527 if (!sp->root_count) {
1528 hlist_del(&sp->hash_link);
1529 kvm_mmu_free_page(kvm, sp);
1531 sp->role.invalid = 1;
1532 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1533 kvm_reload_remote_mmus(kvm);
1535 kvm_mmu_reset_last_pte_updated(kvm);
1540 * Changing the number of mmu pages allocated to the vm
1541 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1543 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1547 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1548 used_pages = max(0, used_pages);
1551 * If we set the number of mmu pages to be smaller be than the
1552 * number of actived pages , we must to free some mmu pages before we
1556 if (used_pages > kvm_nr_mmu_pages) {
1557 while (used_pages > kvm_nr_mmu_pages &&
1558 !list_empty(&kvm->arch.active_mmu_pages)) {
1559 struct kvm_mmu_page *page;
1561 page = container_of(kvm->arch.active_mmu_pages.prev,
1562 struct kvm_mmu_page, link);
1563 used_pages -= kvm_mmu_zap_page(kvm, page);
1566 kvm_nr_mmu_pages = used_pages;
1567 kvm->arch.n_free_mmu_pages = 0;
1570 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1571 - kvm->arch.n_alloc_mmu_pages;
1573 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1576 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1579 struct hlist_head *bucket;
1580 struct kvm_mmu_page *sp;
1581 struct hlist_node *node, *n;
1584 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1586 index = kvm_page_table_hashfn(gfn);
1587 bucket = &kvm->arch.mmu_page_hash[index];
1588 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1589 if (sp->gfn == gfn && !sp->role.direct) {
1590 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1593 if (kvm_mmu_zap_page(kvm, sp))
1599 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1602 struct hlist_head *bucket;
1603 struct kvm_mmu_page *sp;
1604 struct hlist_node *node, *nn;
1606 index = kvm_page_table_hashfn(gfn);
1607 bucket = &kvm->arch.mmu_page_hash[index];
1608 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1609 if (sp->gfn == gfn && !sp->role.direct
1610 && !sp->role.invalid) {
1611 pgprintk("%s: zap %lx %x\n",
1612 __func__, gfn, sp->role.word);
1613 if (kvm_mmu_zap_page(kvm, sp))
1619 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1621 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1622 struct kvm_mmu_page *sp = page_header(__pa(pte));
1624 __set_bit(slot, sp->slot_bitmap);
1627 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1632 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1635 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1636 if (pt[i] == shadow_notrap_nonpresent_pte)
1637 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1641 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1645 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1647 if (gpa == UNMAPPED_GVA)
1650 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1656 * The function is based on mtrr_type_lookup() in
1657 * arch/x86/kernel/cpu/mtrr/generic.c
1659 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1664 u8 prev_match, curr_match;
1665 int num_var_ranges = KVM_NR_VAR_MTRR;
1667 if (!mtrr_state->enabled)
1670 /* Make end inclusive end, instead of exclusive */
1673 /* Look in fixed ranges. Just return the type as per start */
1674 if (mtrr_state->have_fixed && (start < 0x100000)) {
1677 if (start < 0x80000) {
1679 idx += (start >> 16);
1680 return mtrr_state->fixed_ranges[idx];
1681 } else if (start < 0xC0000) {
1683 idx += ((start - 0x80000) >> 14);
1684 return mtrr_state->fixed_ranges[idx];
1685 } else if (start < 0x1000000) {
1687 idx += ((start - 0xC0000) >> 12);
1688 return mtrr_state->fixed_ranges[idx];
1693 * Look in variable ranges
1694 * Look of multiple ranges matching this address and pick type
1695 * as per MTRR precedence
1697 if (!(mtrr_state->enabled & 2))
1698 return mtrr_state->def_type;
1701 for (i = 0; i < num_var_ranges; ++i) {
1702 unsigned short start_state, end_state;
1704 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1707 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1708 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1709 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1710 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1712 start_state = ((start & mask) == (base & mask));
1713 end_state = ((end & mask) == (base & mask));
1714 if (start_state != end_state)
1717 if ((start & mask) != (base & mask))
1720 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1721 if (prev_match == 0xFF) {
1722 prev_match = curr_match;
1726 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1727 curr_match == MTRR_TYPE_UNCACHABLE)
1728 return MTRR_TYPE_UNCACHABLE;
1730 if ((prev_match == MTRR_TYPE_WRBACK &&
1731 curr_match == MTRR_TYPE_WRTHROUGH) ||
1732 (prev_match == MTRR_TYPE_WRTHROUGH &&
1733 curr_match == MTRR_TYPE_WRBACK)) {
1734 prev_match = MTRR_TYPE_WRTHROUGH;
1735 curr_match = MTRR_TYPE_WRTHROUGH;
1738 if (prev_match != curr_match)
1739 return MTRR_TYPE_UNCACHABLE;
1742 if (prev_match != 0xFF)
1745 return mtrr_state->def_type;
1748 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1752 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1753 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1754 if (mtrr == 0xfe || mtrr == 0xff)
1755 mtrr = MTRR_TYPE_WRBACK;
1758 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1760 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1763 struct hlist_head *bucket;
1764 struct kvm_mmu_page *s;
1765 struct hlist_node *node, *n;
1767 trace_kvm_mmu_unsync_page(sp);
1768 index = kvm_page_table_hashfn(sp->gfn);
1769 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1770 /* don't unsync if pagetable is shadowed with multiple roles */
1771 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1772 if (s->gfn != sp->gfn || s->role.direct)
1774 if (s->role.word != sp->role.word)
1777 ++vcpu->kvm->stat.mmu_unsync;
1780 kvm_mmu_mark_parents_unsync(vcpu, sp);
1782 mmu_convert_notrap(sp);
1786 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1789 struct kvm_mmu_page *shadow;
1791 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1793 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1797 if (can_unsync && oos_shadow)
1798 return kvm_unsync_page(vcpu, shadow);
1804 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1805 unsigned pte_access, int user_fault,
1806 int write_fault, int dirty, int level,
1807 gfn_t gfn, pfn_t pfn, bool speculative,
1808 bool can_unsync, bool reset_host_protection)
1814 * We don't set the accessed bit, since we sometimes want to see
1815 * whether the guest actually used the pte (in order to detect
1818 spte = shadow_base_present_pte | shadow_dirty_mask;
1820 spte |= shadow_accessed_mask;
1822 pte_access &= ~ACC_WRITE_MASK;
1823 if (pte_access & ACC_EXEC_MASK)
1824 spte |= shadow_x_mask;
1826 spte |= shadow_nx_mask;
1827 if (pte_access & ACC_USER_MASK)
1828 spte |= shadow_user_mask;
1829 if (level > PT_PAGE_TABLE_LEVEL)
1830 spte |= PT_PAGE_SIZE_MASK;
1832 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1833 kvm_is_mmio_pfn(pfn));
1835 if (reset_host_protection)
1836 spte |= SPTE_HOST_WRITEABLE;
1838 spte |= (u64)pfn << PAGE_SHIFT;
1840 if ((pte_access & ACC_WRITE_MASK)
1841 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1843 if (level > PT_PAGE_TABLE_LEVEL &&
1844 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1846 spte = shadow_trap_nonpresent_pte;
1850 spte |= PT_WRITABLE_MASK;
1852 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1853 spte &= ~PT_USER_MASK;
1856 * Optimization: for pte sync, if spte was writable the hash
1857 * lookup is unnecessary (and expensive). Write protection
1858 * is responsibility of mmu_get_page / kvm_sync_page.
1859 * Same reasoning can be applied to dirty page accounting.
1861 if (!can_unsync && is_writeble_pte(*sptep))
1864 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1865 pgprintk("%s: found shadow page for %lx, marking ro\n",
1868 pte_access &= ~ACC_WRITE_MASK;
1869 if (is_writeble_pte(spte))
1870 spte &= ~PT_WRITABLE_MASK;
1874 if (pte_access & ACC_WRITE_MASK)
1875 mark_page_dirty(vcpu->kvm, gfn);
1878 __set_spte(sptep, spte);
1882 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1883 unsigned pt_access, unsigned pte_access,
1884 int user_fault, int write_fault, int dirty,
1885 int *ptwrite, int level, gfn_t gfn,
1886 pfn_t pfn, bool speculative,
1887 bool reset_host_protection)
1889 int was_rmapped = 0;
1890 int was_writeble = is_writeble_pte(*sptep);
1893 pgprintk("%s: spte %llx access %x write_fault %d"
1894 " user_fault %d gfn %lx\n",
1895 __func__, *sptep, pt_access,
1896 write_fault, user_fault, gfn);
1898 if (is_rmap_spte(*sptep)) {
1900 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1901 * the parent of the now unreachable PTE.
1903 if (level > PT_PAGE_TABLE_LEVEL &&
1904 !is_large_pte(*sptep)) {
1905 struct kvm_mmu_page *child;
1908 child = page_header(pte & PT64_BASE_ADDR_MASK);
1909 mmu_page_remove_parent_pte(child, sptep);
1910 } else if (pfn != spte_to_pfn(*sptep)) {
1911 pgprintk("hfn old %lx new %lx\n",
1912 spte_to_pfn(*sptep), pfn);
1913 rmap_remove(vcpu->kvm, sptep);
1918 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1919 dirty, level, gfn, pfn, speculative, true,
1920 reset_host_protection)) {
1923 kvm_x86_ops->tlb_flush(vcpu);
1926 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1927 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1928 is_large_pte(*sptep)? "2MB" : "4kB",
1929 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1931 if (!was_rmapped && is_large_pte(*sptep))
1932 ++vcpu->kvm->stat.lpages;
1934 page_header_update_slot(vcpu->kvm, sptep, gfn);
1936 rmap_count = rmap_add(vcpu, sptep, gfn);
1937 kvm_release_pfn_clean(pfn);
1938 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1939 rmap_recycle(vcpu, sptep, gfn);
1942 kvm_release_pfn_dirty(pfn);
1944 kvm_release_pfn_clean(pfn);
1947 vcpu->arch.last_pte_updated = sptep;
1948 vcpu->arch.last_pte_gfn = gfn;
1952 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1956 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1957 int level, gfn_t gfn, pfn_t pfn)
1959 struct kvm_shadow_walk_iterator iterator;
1960 struct kvm_mmu_page *sp;
1964 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1965 if (iterator.level == level) {
1966 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1967 0, write, 1, &pt_write,
1968 level, gfn, pfn, false, true);
1969 ++vcpu->stat.pf_fixed;
1973 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1974 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1975 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1977 1, ACC_ALL, iterator.sptep);
1979 pgprintk("nonpaging_map: ENOMEM\n");
1980 kvm_release_pfn_clean(pfn);
1984 __set_spte(iterator.sptep,
1986 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1987 | shadow_user_mask | shadow_x_mask);
1993 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1998 unsigned long mmu_seq;
2000 level = mapping_level(vcpu, gfn);
2003 * This path builds a PAE pagetable - so we can map 2mb pages at
2004 * maximum. Therefore check if the level is larger than that.
2006 if (level > PT_DIRECTORY_LEVEL)
2007 level = PT_DIRECTORY_LEVEL;
2009 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2011 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2013 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2016 if (is_error_pfn(pfn)) {
2017 kvm_release_pfn_clean(pfn);
2021 spin_lock(&vcpu->kvm->mmu_lock);
2022 if (mmu_notifier_retry(vcpu, mmu_seq))
2024 kvm_mmu_free_some_pages(vcpu);
2025 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2026 spin_unlock(&vcpu->kvm->mmu_lock);
2032 spin_unlock(&vcpu->kvm->mmu_lock);
2033 kvm_release_pfn_clean(pfn);
2038 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2041 struct kvm_mmu_page *sp;
2043 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2045 spin_lock(&vcpu->kvm->mmu_lock);
2046 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2047 hpa_t root = vcpu->arch.mmu.root_hpa;
2049 sp = page_header(root);
2051 if (!sp->root_count && sp->role.invalid)
2052 kvm_mmu_zap_page(vcpu->kvm, sp);
2053 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2054 spin_unlock(&vcpu->kvm->mmu_lock);
2057 for (i = 0; i < 4; ++i) {
2058 hpa_t root = vcpu->arch.mmu.pae_root[i];
2061 root &= PT64_BASE_ADDR_MASK;
2062 sp = page_header(root);
2064 if (!sp->root_count && sp->role.invalid)
2065 kvm_mmu_zap_page(vcpu->kvm, sp);
2067 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2069 spin_unlock(&vcpu->kvm->mmu_lock);
2070 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2073 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2077 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2078 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2085 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2089 struct kvm_mmu_page *sp;
2093 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2095 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2096 hpa_t root = vcpu->arch.mmu.root_hpa;
2098 ASSERT(!VALID_PAGE(root));
2101 if (mmu_check_root(vcpu, root_gfn))
2104 spin_lock(&vcpu->kvm->mmu_lock);
2105 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2106 PT64_ROOT_LEVEL, direct,
2108 root = __pa(sp->spt);
2110 spin_unlock(&vcpu->kvm->mmu_lock);
2111 vcpu->arch.mmu.root_hpa = root;
2114 direct = !is_paging(vcpu);
2117 for (i = 0; i < 4; ++i) {
2118 hpa_t root = vcpu->arch.mmu.pae_root[i];
2120 ASSERT(!VALID_PAGE(root));
2121 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2122 pdptr = kvm_pdptr_read(vcpu, i);
2123 if (!is_present_gpte(pdptr)) {
2124 vcpu->arch.mmu.pae_root[i] = 0;
2127 root_gfn = pdptr >> PAGE_SHIFT;
2128 } else if (vcpu->arch.mmu.root_level == 0)
2130 if (mmu_check_root(vcpu, root_gfn))
2133 spin_lock(&vcpu->kvm->mmu_lock);
2134 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2135 PT32_ROOT_LEVEL, direct,
2137 root = __pa(sp->spt);
2139 spin_unlock(&vcpu->kvm->mmu_lock);
2141 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2143 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2147 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2150 struct kvm_mmu_page *sp;
2152 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2154 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2155 hpa_t root = vcpu->arch.mmu.root_hpa;
2156 sp = page_header(root);
2157 mmu_sync_children(vcpu, sp);
2160 for (i = 0; i < 4; ++i) {
2161 hpa_t root = vcpu->arch.mmu.pae_root[i];
2163 if (root && VALID_PAGE(root)) {
2164 root &= PT64_BASE_ADDR_MASK;
2165 sp = page_header(root);
2166 mmu_sync_children(vcpu, sp);
2171 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2173 spin_lock(&vcpu->kvm->mmu_lock);
2174 mmu_sync_roots(vcpu);
2175 spin_unlock(&vcpu->kvm->mmu_lock);
2178 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2183 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2189 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2190 r = mmu_topup_memory_caches(vcpu);
2195 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2197 gfn = gva >> PAGE_SHIFT;
2199 return nonpaging_map(vcpu, gva & PAGE_MASK,
2200 error_code & PFERR_WRITE_MASK, gfn);
2203 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2209 gfn_t gfn = gpa >> PAGE_SHIFT;
2210 unsigned long mmu_seq;
2213 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2215 r = mmu_topup_memory_caches(vcpu);
2219 level = mapping_level(vcpu, gfn);
2221 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2223 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2225 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2226 if (is_error_pfn(pfn)) {
2227 kvm_release_pfn_clean(pfn);
2230 spin_lock(&vcpu->kvm->mmu_lock);
2231 if (mmu_notifier_retry(vcpu, mmu_seq))
2233 kvm_mmu_free_some_pages(vcpu);
2234 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2236 spin_unlock(&vcpu->kvm->mmu_lock);
2241 spin_unlock(&vcpu->kvm->mmu_lock);
2242 kvm_release_pfn_clean(pfn);
2246 static void nonpaging_free(struct kvm_vcpu *vcpu)
2248 mmu_free_roots(vcpu);
2251 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2253 struct kvm_mmu *context = &vcpu->arch.mmu;
2255 context->new_cr3 = nonpaging_new_cr3;
2256 context->page_fault = nonpaging_page_fault;
2257 context->gva_to_gpa = nonpaging_gva_to_gpa;
2258 context->free = nonpaging_free;
2259 context->prefetch_page = nonpaging_prefetch_page;
2260 context->sync_page = nonpaging_sync_page;
2261 context->invlpg = nonpaging_invlpg;
2262 context->root_level = 0;
2263 context->shadow_root_level = PT32E_ROOT_LEVEL;
2264 context->root_hpa = INVALID_PAGE;
2268 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2270 ++vcpu->stat.tlb_flush;
2271 kvm_x86_ops->tlb_flush(vcpu);
2274 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2276 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2277 mmu_free_roots(vcpu);
2280 static void inject_page_fault(struct kvm_vcpu *vcpu,
2284 kvm_inject_page_fault(vcpu, addr, err_code);
2287 static void paging_free(struct kvm_vcpu *vcpu)
2289 nonpaging_free(vcpu);
2292 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2296 bit7 = (gpte >> 7) & 1;
2297 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2301 #include "paging_tmpl.h"
2305 #include "paging_tmpl.h"
2308 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2310 struct kvm_mmu *context = &vcpu->arch.mmu;
2311 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2312 u64 exb_bit_rsvd = 0;
2315 exb_bit_rsvd = rsvd_bits(63, 63);
2317 case PT32_ROOT_LEVEL:
2318 /* no rsvd bits for 2 level 4K page table entries */
2319 context->rsvd_bits_mask[0][1] = 0;
2320 context->rsvd_bits_mask[0][0] = 0;
2321 if (is_cpuid_PSE36())
2322 /* 36bits PSE 4MB page */
2323 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2325 /* 32 bits PSE 4MB page */
2326 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2327 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2329 case PT32E_ROOT_LEVEL:
2330 context->rsvd_bits_mask[0][2] =
2331 rsvd_bits(maxphyaddr, 63) |
2332 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2333 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2334 rsvd_bits(maxphyaddr, 62); /* PDE */
2335 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2336 rsvd_bits(maxphyaddr, 62); /* PTE */
2337 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2338 rsvd_bits(maxphyaddr, 62) |
2339 rsvd_bits(13, 20); /* large page */
2340 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2342 case PT64_ROOT_LEVEL:
2343 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2344 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2345 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2346 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2347 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2348 rsvd_bits(maxphyaddr, 51);
2349 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2350 rsvd_bits(maxphyaddr, 51);
2351 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2352 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2353 rsvd_bits(maxphyaddr, 51) |
2355 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2356 rsvd_bits(maxphyaddr, 51) |
2357 rsvd_bits(13, 20); /* large page */
2358 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2363 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2365 struct kvm_mmu *context = &vcpu->arch.mmu;
2367 ASSERT(is_pae(vcpu));
2368 context->new_cr3 = paging_new_cr3;
2369 context->page_fault = paging64_page_fault;
2370 context->gva_to_gpa = paging64_gva_to_gpa;
2371 context->prefetch_page = paging64_prefetch_page;
2372 context->sync_page = paging64_sync_page;
2373 context->invlpg = paging64_invlpg;
2374 context->free = paging_free;
2375 context->root_level = level;
2376 context->shadow_root_level = level;
2377 context->root_hpa = INVALID_PAGE;
2381 static int paging64_init_context(struct kvm_vcpu *vcpu)
2383 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2384 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2387 static int paging32_init_context(struct kvm_vcpu *vcpu)
2389 struct kvm_mmu *context = &vcpu->arch.mmu;
2391 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2392 context->new_cr3 = paging_new_cr3;
2393 context->page_fault = paging32_page_fault;
2394 context->gva_to_gpa = paging32_gva_to_gpa;
2395 context->free = paging_free;
2396 context->prefetch_page = paging32_prefetch_page;
2397 context->sync_page = paging32_sync_page;
2398 context->invlpg = paging32_invlpg;
2399 context->root_level = PT32_ROOT_LEVEL;
2400 context->shadow_root_level = PT32E_ROOT_LEVEL;
2401 context->root_hpa = INVALID_PAGE;
2405 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2407 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2408 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2411 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2413 struct kvm_mmu *context = &vcpu->arch.mmu;
2415 context->new_cr3 = nonpaging_new_cr3;
2416 context->page_fault = tdp_page_fault;
2417 context->free = nonpaging_free;
2418 context->prefetch_page = nonpaging_prefetch_page;
2419 context->sync_page = nonpaging_sync_page;
2420 context->invlpg = nonpaging_invlpg;
2421 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2422 context->root_hpa = INVALID_PAGE;
2424 if (!is_paging(vcpu)) {
2425 context->gva_to_gpa = nonpaging_gva_to_gpa;
2426 context->root_level = 0;
2427 } else if (is_long_mode(vcpu)) {
2428 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2429 context->gva_to_gpa = paging64_gva_to_gpa;
2430 context->root_level = PT64_ROOT_LEVEL;
2431 } else if (is_pae(vcpu)) {
2432 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2433 context->gva_to_gpa = paging64_gva_to_gpa;
2434 context->root_level = PT32E_ROOT_LEVEL;
2436 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2437 context->gva_to_gpa = paging32_gva_to_gpa;
2438 context->root_level = PT32_ROOT_LEVEL;
2444 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2449 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2451 if (!is_paging(vcpu))
2452 r = nonpaging_init_context(vcpu);
2453 else if (is_long_mode(vcpu))
2454 r = paging64_init_context(vcpu);
2455 else if (is_pae(vcpu))
2456 r = paging32E_init_context(vcpu);
2458 r = paging32_init_context(vcpu);
2460 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2461 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2466 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2468 vcpu->arch.update_pte.pfn = bad_pfn;
2471 return init_kvm_tdp_mmu(vcpu);
2473 return init_kvm_softmmu(vcpu);
2476 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2479 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2480 vcpu->arch.mmu.free(vcpu);
2481 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2485 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2487 destroy_kvm_mmu(vcpu);
2488 return init_kvm_mmu(vcpu);
2490 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2492 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2496 r = mmu_topup_memory_caches(vcpu);
2499 spin_lock(&vcpu->kvm->mmu_lock);
2500 kvm_mmu_free_some_pages(vcpu);
2501 spin_unlock(&vcpu->kvm->mmu_lock);
2502 r = mmu_alloc_roots(vcpu);
2503 spin_lock(&vcpu->kvm->mmu_lock);
2504 mmu_sync_roots(vcpu);
2505 spin_unlock(&vcpu->kvm->mmu_lock);
2508 /* set_cr3() should ensure TLB has been flushed */
2509 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2513 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2515 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2517 mmu_free_roots(vcpu);
2520 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2521 struct kvm_mmu_page *sp,
2525 struct kvm_mmu_page *child;
2528 if (is_shadow_present_pte(pte)) {
2529 if (is_last_spte(pte, sp->role.level))
2530 rmap_remove(vcpu->kvm, spte);
2532 child = page_header(pte & PT64_BASE_ADDR_MASK);
2533 mmu_page_remove_parent_pte(child, spte);
2536 __set_spte(spte, shadow_trap_nonpresent_pte);
2537 if (is_large_pte(pte))
2538 --vcpu->kvm->stat.lpages;
2541 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2542 struct kvm_mmu_page *sp,
2546 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2547 ++vcpu->kvm->stat.mmu_pde_zapped;
2551 ++vcpu->kvm->stat.mmu_pte_updated;
2552 if (sp->role.glevels == PT32_ROOT_LEVEL)
2553 paging32_update_pte(vcpu, sp, spte, new);
2555 paging64_update_pte(vcpu, sp, spte, new);
2558 static bool need_remote_flush(u64 old, u64 new)
2560 if (!is_shadow_present_pte(old))
2562 if (!is_shadow_present_pte(new))
2564 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2566 old ^= PT64_NX_MASK;
2567 new ^= PT64_NX_MASK;
2568 return (old & ~new & PT64_PERM_MASK) != 0;
2571 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2573 if (need_remote_flush(old, new))
2574 kvm_flush_remote_tlbs(vcpu->kvm);
2576 kvm_mmu_flush_tlb(vcpu);
2579 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2581 u64 *spte = vcpu->arch.last_pte_updated;
2583 return !!(spte && (*spte & shadow_accessed_mask));
2586 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2587 const u8 *new, int bytes)
2594 if (bytes != 4 && bytes != 8)
2598 * Assume that the pte write on a page table of the same type
2599 * as the current vcpu paging mode. This is nearly always true
2600 * (might be false while changing modes). Note it is verified later
2604 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2605 if ((bytes == 4) && (gpa % 4 == 0)) {
2606 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2609 memcpy((void *)&gpte + (gpa % 8), new, 4);
2610 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2611 memcpy((void *)&gpte, new, 8);
2614 if ((bytes == 4) && (gpa % 4 == 0))
2615 memcpy((void *)&gpte, new, 4);
2617 if (!is_present_gpte(gpte))
2619 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2621 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2623 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2625 if (is_error_pfn(pfn)) {
2626 kvm_release_pfn_clean(pfn);
2629 vcpu->arch.update_pte.gfn = gfn;
2630 vcpu->arch.update_pte.pfn = pfn;
2633 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2635 u64 *spte = vcpu->arch.last_pte_updated;
2638 && vcpu->arch.last_pte_gfn == gfn
2639 && shadow_accessed_mask
2640 && !(*spte & shadow_accessed_mask)
2641 && is_shadow_present_pte(*spte))
2642 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2645 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2646 const u8 *new, int bytes,
2647 bool guest_initiated)
2649 gfn_t gfn = gpa >> PAGE_SHIFT;
2650 struct kvm_mmu_page *sp;
2651 struct hlist_node *node, *n;
2652 struct hlist_head *bucket;
2656 unsigned offset = offset_in_page(gpa);
2658 unsigned page_offset;
2659 unsigned misaligned;
2666 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2667 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2668 spin_lock(&vcpu->kvm->mmu_lock);
2669 kvm_mmu_access_page(vcpu, gfn);
2670 kvm_mmu_free_some_pages(vcpu);
2671 ++vcpu->kvm->stat.mmu_pte_write;
2672 kvm_mmu_audit(vcpu, "pre pte write");
2673 if (guest_initiated) {
2674 if (gfn == vcpu->arch.last_pt_write_gfn
2675 && !last_updated_pte_accessed(vcpu)) {
2676 ++vcpu->arch.last_pt_write_count;
2677 if (vcpu->arch.last_pt_write_count >= 3)
2680 vcpu->arch.last_pt_write_gfn = gfn;
2681 vcpu->arch.last_pt_write_count = 1;
2682 vcpu->arch.last_pte_updated = NULL;
2685 index = kvm_page_table_hashfn(gfn);
2686 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2687 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2688 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2690 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2691 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2692 misaligned |= bytes < 4;
2693 if (misaligned || flooded) {
2695 * Misaligned accesses are too much trouble to fix
2696 * up; also, they usually indicate a page is not used
2699 * If we're seeing too many writes to a page,
2700 * it may no longer be a page table, or we may be
2701 * forking, in which case it is better to unmap the
2704 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2705 gpa, bytes, sp->role.word);
2706 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2708 ++vcpu->kvm->stat.mmu_flooded;
2711 page_offset = offset;
2712 level = sp->role.level;
2714 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2715 page_offset <<= 1; /* 32->64 */
2717 * A 32-bit pde maps 4MB while the shadow pdes map
2718 * only 2MB. So we need to double the offset again
2719 * and zap two pdes instead of one.
2721 if (level == PT32_ROOT_LEVEL) {
2722 page_offset &= ~7; /* kill rounding error */
2726 quadrant = page_offset >> PAGE_SHIFT;
2727 page_offset &= ~PAGE_MASK;
2728 if (quadrant != sp->role.quadrant)
2731 spte = &sp->spt[page_offset / sizeof(*spte)];
2732 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2734 r = kvm_read_guest_atomic(vcpu->kvm,
2735 gpa & ~(u64)(pte_size - 1),
2737 new = (const void *)&gentry;
2743 mmu_pte_write_zap_pte(vcpu, sp, spte);
2745 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2746 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2750 kvm_mmu_audit(vcpu, "post pte write");
2751 spin_unlock(&vcpu->kvm->mmu_lock);
2752 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2753 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2754 vcpu->arch.update_pte.pfn = bad_pfn;
2758 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2766 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2768 spin_lock(&vcpu->kvm->mmu_lock);
2769 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2770 spin_unlock(&vcpu->kvm->mmu_lock);
2773 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2775 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2777 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2778 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2779 struct kvm_mmu_page *sp;
2781 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2782 struct kvm_mmu_page, link);
2783 kvm_mmu_zap_page(vcpu->kvm, sp);
2784 ++vcpu->kvm->stat.mmu_recycled;
2788 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2791 enum emulation_result er;
2793 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2802 r = mmu_topup_memory_caches(vcpu);
2806 er = emulate_instruction(vcpu, cr2, error_code, 0);
2811 case EMULATE_DO_MMIO:
2812 ++vcpu->stat.mmio_exits;
2815 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2816 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2817 vcpu->run->internal.ndata = 0;
2825 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2827 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2829 vcpu->arch.mmu.invlpg(vcpu, gva);
2830 kvm_mmu_flush_tlb(vcpu);
2831 ++vcpu->stat.invlpg;
2833 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2835 void kvm_enable_tdp(void)
2839 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2841 void kvm_disable_tdp(void)
2843 tdp_enabled = false;
2845 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2847 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2849 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2852 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2860 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2861 * Therefore we need to allocate shadow page tables in the first
2862 * 4GB of memory, which happens to fit the DMA32 zone.
2864 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2867 vcpu->arch.mmu.pae_root = page_address(page);
2868 for (i = 0; i < 4; ++i)
2869 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2874 free_mmu_pages(vcpu);
2878 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2881 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2883 return alloc_mmu_pages(vcpu);
2886 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2889 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2891 return init_kvm_mmu(vcpu);
2894 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2898 destroy_kvm_mmu(vcpu);
2899 free_mmu_pages(vcpu);
2900 mmu_free_memory_caches(vcpu);
2903 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2905 struct kvm_mmu_page *sp;
2907 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2911 if (!test_bit(slot, sp->slot_bitmap))
2915 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2917 if (pt[i] & PT_WRITABLE_MASK)
2918 pt[i] &= ~PT_WRITABLE_MASK;
2920 kvm_flush_remote_tlbs(kvm);
2923 void kvm_mmu_zap_all(struct kvm *kvm)
2925 struct kvm_mmu_page *sp, *node;
2927 spin_lock(&kvm->mmu_lock);
2928 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2929 if (kvm_mmu_zap_page(kvm, sp))
2930 node = container_of(kvm->arch.active_mmu_pages.next,
2931 struct kvm_mmu_page, link);
2932 spin_unlock(&kvm->mmu_lock);
2934 kvm_flush_remote_tlbs(kvm);
2937 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2939 struct kvm_mmu_page *page;
2941 page = container_of(kvm->arch.active_mmu_pages.prev,
2942 struct kvm_mmu_page, link);
2943 kvm_mmu_zap_page(kvm, page);
2946 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2949 struct kvm *kvm_freed = NULL;
2950 int cache_count = 0;
2952 spin_lock(&kvm_lock);
2954 list_for_each_entry(kvm, &vm_list, vm_list) {
2957 if (!down_read_trylock(&kvm->slots_lock))
2959 spin_lock(&kvm->mmu_lock);
2960 npages = kvm->arch.n_alloc_mmu_pages -
2961 kvm->arch.n_free_mmu_pages;
2962 cache_count += npages;
2963 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2964 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2970 spin_unlock(&kvm->mmu_lock);
2971 up_read(&kvm->slots_lock);
2974 list_move_tail(&kvm_freed->vm_list, &vm_list);
2976 spin_unlock(&kvm_lock);
2981 static struct shrinker mmu_shrinker = {
2982 .shrink = mmu_shrink,
2983 .seeks = DEFAULT_SEEKS * 10,
2986 static void mmu_destroy_caches(void)
2988 if (pte_chain_cache)
2989 kmem_cache_destroy(pte_chain_cache);
2990 if (rmap_desc_cache)
2991 kmem_cache_destroy(rmap_desc_cache);
2992 if (mmu_page_header_cache)
2993 kmem_cache_destroy(mmu_page_header_cache);
2996 void kvm_mmu_module_exit(void)
2998 mmu_destroy_caches();
2999 unregister_shrinker(&mmu_shrinker);
3002 int kvm_mmu_module_init(void)
3004 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3005 sizeof(struct kvm_pte_chain),
3007 if (!pte_chain_cache)
3009 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3010 sizeof(struct kvm_rmap_desc),
3012 if (!rmap_desc_cache)
3015 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3016 sizeof(struct kvm_mmu_page),
3018 if (!mmu_page_header_cache)
3021 register_shrinker(&mmu_shrinker);
3026 mmu_destroy_caches();
3031 * Caculate mmu pages needed for kvm.
3033 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3036 unsigned int nr_mmu_pages;
3037 unsigned int nr_pages = 0;
3039 for (i = 0; i < kvm->nmemslots; i++)
3040 nr_pages += kvm->memslots[i].npages;
3042 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3043 nr_mmu_pages = max(nr_mmu_pages,
3044 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3046 return nr_mmu_pages;
3049 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3052 if (len > buffer->len)
3057 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3062 ret = pv_mmu_peek_buffer(buffer, len);
3067 buffer->processed += len;
3071 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3072 gpa_t addr, gpa_t value)
3077 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3080 r = mmu_topup_memory_caches(vcpu);
3084 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3090 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3092 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3096 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3098 spin_lock(&vcpu->kvm->mmu_lock);
3099 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3100 spin_unlock(&vcpu->kvm->mmu_lock);
3104 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3105 struct kvm_pv_mmu_op_buffer *buffer)
3107 struct kvm_mmu_op_header *header;
3109 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3112 switch (header->op) {
3113 case KVM_MMU_OP_WRITE_PTE: {
3114 struct kvm_mmu_op_write_pte *wpte;
3116 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3119 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3122 case KVM_MMU_OP_FLUSH_TLB: {
3123 struct kvm_mmu_op_flush_tlb *ftlb;
3125 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3128 return kvm_pv_mmu_flush_tlb(vcpu);
3130 case KVM_MMU_OP_RELEASE_PT: {
3131 struct kvm_mmu_op_release_pt *rpt;
3133 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3136 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3142 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3143 gpa_t addr, unsigned long *ret)
3146 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3148 buffer->ptr = buffer->buf;
3149 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3150 buffer->processed = 0;
3152 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3156 while (buffer->len) {
3157 r = kvm_pv_mmu_op_one(vcpu, buffer);
3166 *ret = buffer->processed;
3170 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3172 struct kvm_shadow_walk_iterator iterator;
3175 spin_lock(&vcpu->kvm->mmu_lock);
3176 for_each_shadow_entry(vcpu, addr, iterator) {
3177 sptes[iterator.level-1] = *iterator.sptep;
3179 if (!is_shadow_present_pte(*iterator.sptep))
3182 spin_unlock(&vcpu->kvm->mmu_lock);
3186 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3190 static const char *audit_msg;
3192 static gva_t canonicalize(gva_t gva)
3194 #ifdef CONFIG_X86_64
3195 gva = (long long)(gva << 16) >> 16;
3201 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3204 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3209 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3210 u64 ent = sp->spt[i];
3212 if (is_shadow_present_pte(ent)) {
3213 if (!is_last_spte(ent, sp->role.level)) {
3214 struct kvm_mmu_page *child;
3215 child = page_header(ent & PT64_BASE_ADDR_MASK);
3216 __mmu_spte_walk(kvm, child, fn);
3218 fn(kvm, sp, &sp->spt[i]);
3223 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3226 struct kvm_mmu_page *sp;
3228 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3230 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3231 hpa_t root = vcpu->arch.mmu.root_hpa;
3232 sp = page_header(root);
3233 __mmu_spte_walk(vcpu->kvm, sp, fn);
3236 for (i = 0; i < 4; ++i) {
3237 hpa_t root = vcpu->arch.mmu.pae_root[i];
3239 if (root && VALID_PAGE(root)) {
3240 root &= PT64_BASE_ADDR_MASK;
3241 sp = page_header(root);
3242 __mmu_spte_walk(vcpu->kvm, sp, fn);
3248 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3249 gva_t va, int level)
3251 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3253 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3255 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3258 if (ent == shadow_trap_nonpresent_pte)
3261 va = canonicalize(va);
3262 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3263 audit_mappings_page(vcpu, ent, va, level - 1);
3265 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3266 gfn_t gfn = gpa >> PAGE_SHIFT;
3267 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3268 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3270 if (is_error_pfn(pfn)) {
3271 kvm_release_pfn_clean(pfn);
3275 if (is_shadow_present_pte(ent)
3276 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3277 printk(KERN_ERR "xx audit error: (%s) levels %d"
3278 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3279 audit_msg, vcpu->arch.mmu.root_level,
3281 is_shadow_present_pte(ent));
3282 else if (ent == shadow_notrap_nonpresent_pte
3283 && !is_error_hpa(hpa))
3284 printk(KERN_ERR "audit: (%s) notrap shadow,"
3285 " valid guest gva %lx\n", audit_msg, va);
3286 kvm_release_pfn_clean(pfn);
3292 static void audit_mappings(struct kvm_vcpu *vcpu)
3296 if (vcpu->arch.mmu.root_level == 4)
3297 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3299 for (i = 0; i < 4; ++i)
3300 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3301 audit_mappings_page(vcpu,
3302 vcpu->arch.mmu.pae_root[i],
3307 static int count_rmaps(struct kvm_vcpu *vcpu)
3312 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3313 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3314 struct kvm_rmap_desc *d;
3316 for (j = 0; j < m->npages; ++j) {
3317 unsigned long *rmapp = &m->rmap[j];
3321 if (!(*rmapp & 1)) {
3325 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3327 for (k = 0; k < RMAP_EXT; ++k)
3339 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3341 unsigned long *rmapp;
3342 struct kvm_mmu_page *rev_sp;
3345 if (*sptep & PT_WRITABLE_MASK) {
3346 rev_sp = page_header(__pa(sptep));
3347 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3349 if (!gfn_to_memslot(kvm, gfn)) {
3350 if (!printk_ratelimit())
3352 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3354 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3355 audit_msg, sptep - rev_sp->spt,
3361 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3362 is_large_pte(*sptep));
3364 if (!printk_ratelimit())
3366 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3374 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3376 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3379 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3381 struct kvm_mmu_page *sp;
3384 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3387 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3390 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3393 if (!(ent & PT_PRESENT_MASK))
3395 if (!(ent & PT_WRITABLE_MASK))
3397 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3403 static void audit_rmap(struct kvm_vcpu *vcpu)
3405 check_writable_mappings_rmap(vcpu);
3409 static void audit_write_protection(struct kvm_vcpu *vcpu)
3411 struct kvm_mmu_page *sp;
3412 struct kvm_memory_slot *slot;
3413 unsigned long *rmapp;
3417 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3418 if (sp->role.direct)
3423 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3424 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3425 rmapp = &slot->rmap[gfn - slot->base_gfn];
3427 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3429 if (*spte & PT_WRITABLE_MASK)
3430 printk(KERN_ERR "%s: (%s) shadow page has "
3431 "writable mappings: gfn %lx role %x\n",
3432 __func__, audit_msg, sp->gfn,
3434 spte = rmap_next(vcpu->kvm, rmapp, spte);
3439 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3446 audit_write_protection(vcpu);
3447 if (strcmp("pre pte write", audit_msg) != 0)
3448 audit_mappings(vcpu);
3449 audit_writable_sptes_have_rmaps(vcpu);