2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 #include "kvm_cache_regs.h"
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
34 #include <asm/cmpxchg.h>
39 * When setting this variable to true it enables Two-Dimensional-Paging
40 * where the hardware walks 2 page tables:
41 * 1. the guest-virtual to guest-physical
42 * 2. while doing 1. it walks guest-physical to host-physical
43 * If the hardware supports that we don't need to do shadow paging.
45 bool tdp_enabled = false;
52 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
59 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
60 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64 #define pgprintk(x...) do { } while (0)
65 #define rmap_printk(x...) do { } while (0)
69 #if defined(MMU_DEBUG) || defined(AUDIT)
71 module_param(dbg, bool, 0644);
74 static int oos_shadow = 1;
75 module_param(oos_shadow, bool, 0644);
78 #define ASSERT(x) do { } while (0)
82 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
83 __FILE__, __LINE__, #x); \
87 #define PT_FIRST_AVAIL_BITS_SHIFT 9
88 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
90 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
92 #define PT64_LEVEL_BITS 9
94 #define PT64_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
97 #define PT64_LEVEL_MASK(level) \
98 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
100 #define PT64_INDEX(address, level)\
101 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
104 #define PT32_LEVEL_BITS 10
106 #define PT32_LEVEL_SHIFT(level) \
107 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
109 #define PT32_LEVEL_MASK(level) \
110 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
112 #define PT32_INDEX(address, level)\
113 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
116 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
117 #define PT64_DIR_BASE_ADDR_MASK \
118 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
120 #define PT32_BASE_ADDR_MASK PAGE_MASK
121 #define PT32_DIR_BASE_ADDR_MASK \
122 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
124 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
127 #define PFERR_PRESENT_MASK (1U << 0)
128 #define PFERR_WRITE_MASK (1U << 1)
129 #define PFERR_USER_MASK (1U << 2)
130 #define PFERR_RSVD_MASK (1U << 3)
131 #define PFERR_FETCH_MASK (1U << 4)
133 #define PT_DIRECTORY_LEVEL 2
134 #define PT_PAGE_TABLE_LEVEL 1
138 #define ACC_EXEC_MASK 1
139 #define ACC_WRITE_MASK PT_WRITABLE_MASK
140 #define ACC_USER_MASK PT_USER_MASK
141 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
143 #define CREATE_TRACE_POINTS
144 #include "mmutrace.h"
146 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
148 struct kvm_rmap_desc {
149 u64 *sptes[RMAP_EXT];
150 struct kvm_rmap_desc *more;
153 struct kvm_shadow_walk_iterator {
161 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)); \
164 shadow_walk_next(&(_walker)))
167 struct kvm_unsync_walk {
168 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
171 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
173 static struct kmem_cache *pte_chain_cache;
174 static struct kmem_cache *rmap_desc_cache;
175 static struct kmem_cache *mmu_page_header_cache;
177 static u64 __read_mostly shadow_trap_nonpresent_pte;
178 static u64 __read_mostly shadow_notrap_nonpresent_pte;
179 static u64 __read_mostly shadow_base_present_pte;
180 static u64 __read_mostly shadow_nx_mask;
181 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
182 static u64 __read_mostly shadow_user_mask;
183 static u64 __read_mostly shadow_accessed_mask;
184 static u64 __read_mostly shadow_dirty_mask;
186 static inline u64 rsvd_bits(int s, int e)
188 return ((1ULL << (e - s + 1)) - 1) << s;
191 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
193 shadow_trap_nonpresent_pte = trap_pte;
194 shadow_notrap_nonpresent_pte = notrap_pte;
196 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
198 void kvm_mmu_set_base_ptes(u64 base_pte)
200 shadow_base_present_pte = base_pte;
202 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
204 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
205 u64 dirty_mask, u64 nx_mask, u64 x_mask)
207 shadow_user_mask = user_mask;
208 shadow_accessed_mask = accessed_mask;
209 shadow_dirty_mask = dirty_mask;
210 shadow_nx_mask = nx_mask;
211 shadow_x_mask = x_mask;
213 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
215 static int is_write_protection(struct kvm_vcpu *vcpu)
217 return vcpu->arch.cr0 & X86_CR0_WP;
220 static int is_cpuid_PSE36(void)
225 static int is_nx(struct kvm_vcpu *vcpu)
227 return vcpu->arch.shadow_efer & EFER_NX;
230 static int is_shadow_present_pte(u64 pte)
232 return pte != shadow_trap_nonpresent_pte
233 && pte != shadow_notrap_nonpresent_pte;
236 static int is_large_pte(u64 pte)
238 return pte & PT_PAGE_SIZE_MASK;
241 static int is_writeble_pte(unsigned long pte)
243 return pte & PT_WRITABLE_MASK;
246 static int is_dirty_gpte(unsigned long pte)
248 return pte & PT_DIRTY_MASK;
251 static int is_rmap_spte(u64 pte)
253 return is_shadow_present_pte(pte);
256 static int is_last_spte(u64 pte, int level)
258 if (level == PT_PAGE_TABLE_LEVEL)
260 if (level == PT_DIRECTORY_LEVEL && is_large_pte(pte))
265 static pfn_t spte_to_pfn(u64 pte)
267 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
270 static gfn_t pse36_gfn_delta(u32 gpte)
272 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
274 return (gpte & PT32_DIR_PSE36_MASK) << shift;
277 static void __set_spte(u64 *sptep, u64 spte)
280 set_64bit((unsigned long *)sptep, spte);
282 set_64bit((unsigned long long *)sptep, spte);
286 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
287 struct kmem_cache *base_cache, int min)
291 if (cache->nobjs >= min)
293 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
294 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
297 cache->objects[cache->nobjs++] = obj;
302 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
305 kfree(mc->objects[--mc->nobjs]);
308 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
313 if (cache->nobjs >= min)
315 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
316 page = alloc_page(GFP_KERNEL);
319 set_page_private(page, 0);
320 cache->objects[cache->nobjs++] = page_address(page);
325 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
328 free_page((unsigned long)mc->objects[--mc->nobjs]);
331 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
335 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
339 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
343 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
347 mmu_page_header_cache, 4);
352 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
354 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
355 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
356 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
357 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
360 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
366 p = mc->objects[--mc->nobjs];
370 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
372 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
373 sizeof(struct kvm_pte_chain));
376 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
381 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
383 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
384 sizeof(struct kvm_rmap_desc));
387 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
393 * Return the pointer to the largepage write count for a given
394 * gfn, handling slots that are not large page aligned.
396 static int *slot_largepage_idx(gfn_t gfn,
397 struct kvm_memory_slot *slot,
402 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
403 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
404 return &slot->lpage_info[level - 2][idx].write_count;
407 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
409 struct kvm_memory_slot *slot;
413 gfn = unalias_gfn(kvm, gfn);
415 slot = gfn_to_memslot_unaliased(kvm, gfn);
416 for (i = PT_DIRECTORY_LEVEL;
417 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
418 write_count = slot_largepage_idx(gfn, slot, i);
423 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
425 struct kvm_memory_slot *slot;
429 gfn = unalias_gfn(kvm, gfn);
430 for (i = PT_DIRECTORY_LEVEL;
431 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
432 slot = gfn_to_memslot_unaliased(kvm, gfn);
433 write_count = slot_largepage_idx(gfn, slot, i);
435 WARN_ON(*write_count < 0);
439 static int has_wrprotected_page(struct kvm *kvm,
443 struct kvm_memory_slot *slot;
446 gfn = unalias_gfn(kvm, gfn);
447 slot = gfn_to_memslot_unaliased(kvm, gfn);
449 largepage_idx = slot_largepage_idx(gfn, slot, level);
450 return *largepage_idx;
456 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
458 unsigned long page_size = PAGE_SIZE;
459 struct vm_area_struct *vma;
463 addr = gfn_to_hva(kvm, gfn);
464 if (kvm_is_error_hva(addr))
467 down_read(¤t->mm->mmap_sem);
468 vma = find_vma(current->mm, addr);
472 page_size = vma_kernel_pagesize(vma);
475 up_read(¤t->mm->mmap_sem);
477 for (i = PT_PAGE_TABLE_LEVEL;
478 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
479 if (page_size >= KVM_HPAGE_SIZE(i))
488 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
490 struct kvm_memory_slot *slot;
492 int level = PT_PAGE_TABLE_LEVEL;
494 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
495 if (slot && slot->dirty_bitmap)
496 return PT_PAGE_TABLE_LEVEL;
498 host_level = host_mapping_level(vcpu->kvm, large_gfn);
500 if (host_level == PT_PAGE_TABLE_LEVEL)
503 for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level) {
505 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
513 * Take gfn and return the reverse mapping to it.
514 * Note: gfn must be unaliased before this function get called
517 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
519 struct kvm_memory_slot *slot;
522 slot = gfn_to_memslot(kvm, gfn);
523 if (likely(level == PT_PAGE_TABLE_LEVEL))
524 return &slot->rmap[gfn - slot->base_gfn];
526 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
527 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
529 return &slot->lpage_info[level - 2][idx].rmap_pde;
533 * Reverse mapping data structures:
535 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
536 * that points to page_address(page).
538 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
539 * containing more mappings.
541 * Returns the number of rmap entries before the spte was added or zero if
542 * the spte was not added.
545 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
547 struct kvm_mmu_page *sp;
548 struct kvm_rmap_desc *desc;
549 unsigned long *rmapp;
552 if (!is_rmap_spte(*spte))
554 gfn = unalias_gfn(vcpu->kvm, gfn);
555 sp = page_header(__pa(spte));
556 sp->gfns[spte - sp->spt] = gfn;
557 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
559 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
560 *rmapp = (unsigned long)spte;
561 } else if (!(*rmapp & 1)) {
562 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
563 desc = mmu_alloc_rmap_desc(vcpu);
564 desc->sptes[0] = (u64 *)*rmapp;
565 desc->sptes[1] = spte;
566 *rmapp = (unsigned long)desc | 1;
568 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
569 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
570 while (desc->sptes[RMAP_EXT-1] && desc->more) {
574 if (desc->sptes[RMAP_EXT-1]) {
575 desc->more = mmu_alloc_rmap_desc(vcpu);
578 for (i = 0; desc->sptes[i]; ++i)
580 desc->sptes[i] = spte;
585 static void rmap_desc_remove_entry(unsigned long *rmapp,
586 struct kvm_rmap_desc *desc,
588 struct kvm_rmap_desc *prev_desc)
592 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
594 desc->sptes[i] = desc->sptes[j];
595 desc->sptes[j] = NULL;
598 if (!prev_desc && !desc->more)
599 *rmapp = (unsigned long)desc->sptes[0];
602 prev_desc->more = desc->more;
604 *rmapp = (unsigned long)desc->more | 1;
605 mmu_free_rmap_desc(desc);
608 static void rmap_remove(struct kvm *kvm, u64 *spte)
610 struct kvm_rmap_desc *desc;
611 struct kvm_rmap_desc *prev_desc;
612 struct kvm_mmu_page *sp;
614 unsigned long *rmapp;
617 if (!is_rmap_spte(*spte))
619 sp = page_header(__pa(spte));
620 pfn = spte_to_pfn(*spte);
621 if (*spte & shadow_accessed_mask)
622 kvm_set_pfn_accessed(pfn);
623 if (is_writeble_pte(*spte))
624 kvm_release_pfn_dirty(pfn);
626 kvm_release_pfn_clean(pfn);
627 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
629 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
631 } else if (!(*rmapp & 1)) {
632 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
633 if ((u64 *)*rmapp != spte) {
634 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
640 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
641 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
644 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
645 if (desc->sptes[i] == spte) {
646 rmap_desc_remove_entry(rmapp,
658 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
660 struct kvm_rmap_desc *desc;
661 struct kvm_rmap_desc *prev_desc;
667 else if (!(*rmapp & 1)) {
669 return (u64 *)*rmapp;
672 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
676 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
677 if (prev_spte == spte)
678 return desc->sptes[i];
679 prev_spte = desc->sptes[i];
686 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
688 unsigned long *rmapp;
690 int i, write_protected = 0;
692 gfn = unalias_gfn(kvm, gfn);
693 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
695 spte = rmap_next(kvm, rmapp, NULL);
698 BUG_ON(!(*spte & PT_PRESENT_MASK));
699 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
700 if (is_writeble_pte(*spte)) {
701 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
704 spte = rmap_next(kvm, rmapp, spte);
706 if (write_protected) {
709 spte = rmap_next(kvm, rmapp, NULL);
710 pfn = spte_to_pfn(*spte);
711 kvm_set_pfn_dirty(pfn);
714 /* check for huge page mappings */
715 for (i = PT_DIRECTORY_LEVEL;
716 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
717 rmapp = gfn_to_rmap(kvm, gfn, i);
718 spte = rmap_next(kvm, rmapp, NULL);
721 BUG_ON(!(*spte & PT_PRESENT_MASK));
722 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
723 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
724 if (is_writeble_pte(*spte)) {
725 rmap_remove(kvm, spte);
727 __set_spte(spte, shadow_trap_nonpresent_pte);
731 spte = rmap_next(kvm, rmapp, spte);
735 return write_protected;
738 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
741 int need_tlb_flush = 0;
743 while ((spte = rmap_next(kvm, rmapp, NULL))) {
744 BUG_ON(!(*spte & PT_PRESENT_MASK));
745 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
746 rmap_remove(kvm, spte);
747 __set_spte(spte, shadow_trap_nonpresent_pte);
750 return need_tlb_flush;
753 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
754 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
760 * If mmap_sem isn't taken, we can look the memslots with only
761 * the mmu_lock by skipping over the slots with userspace_addr == 0.
763 for (i = 0; i < kvm->nmemslots; i++) {
764 struct kvm_memory_slot *memslot = &kvm->memslots[i];
765 unsigned long start = memslot->userspace_addr;
768 /* mmu_lock protects userspace_addr */
772 end = start + (memslot->npages << PAGE_SHIFT);
773 if (hva >= start && hva < end) {
774 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
775 int idx = gfn_offset /
776 KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL);
777 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
778 retval |= handler(kvm,
779 &memslot->lpage_info[0][idx].rmap_pde);
786 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
788 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
791 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
796 /* always return old for EPT */
797 if (!shadow_accessed_mask)
800 spte = rmap_next(kvm, rmapp, NULL);
804 BUG_ON(!(_spte & PT_PRESENT_MASK));
805 _young = _spte & PT_ACCESSED_MASK;
808 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
810 spte = rmap_next(kvm, rmapp, spte);
815 #define RMAP_RECYCLE_THRESHOLD 1000
817 static void rmap_recycle(struct kvm_vcpu *vcpu, gfn_t gfn, int lpage)
819 unsigned long *rmapp;
821 gfn = unalias_gfn(vcpu->kvm, gfn);
822 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
824 kvm_unmap_rmapp(vcpu->kvm, rmapp);
825 kvm_flush_remote_tlbs(vcpu->kvm);
828 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
830 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
834 static int is_empty_shadow_page(u64 *spt)
839 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
840 if (is_shadow_present_pte(*pos)) {
841 printk(KERN_ERR "%s: %p %llx\n", __func__,
849 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
851 ASSERT(is_empty_shadow_page(sp->spt));
853 __free_page(virt_to_page(sp->spt));
854 __free_page(virt_to_page(sp->gfns));
856 ++kvm->arch.n_free_mmu_pages;
859 static unsigned kvm_page_table_hashfn(gfn_t gfn)
861 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
864 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
867 struct kvm_mmu_page *sp;
869 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
870 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
871 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
872 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
873 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
874 INIT_LIST_HEAD(&sp->oos_link);
875 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
877 sp->parent_pte = parent_pte;
878 --vcpu->kvm->arch.n_free_mmu_pages;
882 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
883 struct kvm_mmu_page *sp, u64 *parent_pte)
885 struct kvm_pte_chain *pte_chain;
886 struct hlist_node *node;
891 if (!sp->multimapped) {
892 u64 *old = sp->parent_pte;
895 sp->parent_pte = parent_pte;
899 pte_chain = mmu_alloc_pte_chain(vcpu);
900 INIT_HLIST_HEAD(&sp->parent_ptes);
901 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
902 pte_chain->parent_ptes[0] = old;
904 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
905 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
907 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
908 if (!pte_chain->parent_ptes[i]) {
909 pte_chain->parent_ptes[i] = parent_pte;
913 pte_chain = mmu_alloc_pte_chain(vcpu);
915 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
916 pte_chain->parent_ptes[0] = parent_pte;
919 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
922 struct kvm_pte_chain *pte_chain;
923 struct hlist_node *node;
926 if (!sp->multimapped) {
927 BUG_ON(sp->parent_pte != parent_pte);
928 sp->parent_pte = NULL;
931 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
932 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
933 if (!pte_chain->parent_ptes[i])
935 if (pte_chain->parent_ptes[i] != parent_pte)
937 while (i + 1 < NR_PTE_CHAIN_ENTRIES
938 && pte_chain->parent_ptes[i + 1]) {
939 pte_chain->parent_ptes[i]
940 = pte_chain->parent_ptes[i + 1];
943 pte_chain->parent_ptes[i] = NULL;
945 hlist_del(&pte_chain->link);
946 mmu_free_pte_chain(pte_chain);
947 if (hlist_empty(&sp->parent_ptes)) {
949 sp->parent_pte = NULL;
958 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
959 mmu_parent_walk_fn fn)
961 struct kvm_pte_chain *pte_chain;
962 struct hlist_node *node;
963 struct kvm_mmu_page *parent_sp;
966 if (!sp->multimapped && sp->parent_pte) {
967 parent_sp = page_header(__pa(sp->parent_pte));
969 mmu_parent_walk(vcpu, parent_sp, fn);
972 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
973 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
974 if (!pte_chain->parent_ptes[i])
976 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
978 mmu_parent_walk(vcpu, parent_sp, fn);
982 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
985 struct kvm_mmu_page *sp = page_header(__pa(spte));
987 index = spte - sp->spt;
988 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
989 sp->unsync_children++;
990 WARN_ON(!sp->unsync_children);
993 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
995 struct kvm_pte_chain *pte_chain;
996 struct hlist_node *node;
1002 if (!sp->multimapped) {
1003 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1007 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1008 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1009 if (!pte_chain->parent_ptes[i])
1011 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1015 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1017 kvm_mmu_update_parents_unsync(sp);
1021 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1022 struct kvm_mmu_page *sp)
1024 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1025 kvm_mmu_update_parents_unsync(sp);
1028 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1029 struct kvm_mmu_page *sp)
1033 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1034 sp->spt[i] = shadow_trap_nonpresent_pte;
1037 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1038 struct kvm_mmu_page *sp)
1043 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1047 #define KVM_PAGE_ARRAY_NR 16
1049 struct kvm_mmu_pages {
1050 struct mmu_page_and_offset {
1051 struct kvm_mmu_page *sp;
1053 } page[KVM_PAGE_ARRAY_NR];
1057 #define for_each_unsync_children(bitmap, idx) \
1058 for (idx = find_first_bit(bitmap, 512); \
1060 idx = find_next_bit(bitmap, 512, idx+1))
1062 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1068 for (i=0; i < pvec->nr; i++)
1069 if (pvec->page[i].sp == sp)
1072 pvec->page[pvec->nr].sp = sp;
1073 pvec->page[pvec->nr].idx = idx;
1075 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1078 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1079 struct kvm_mmu_pages *pvec)
1081 int i, ret, nr_unsync_leaf = 0;
1083 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1084 u64 ent = sp->spt[i];
1086 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1087 struct kvm_mmu_page *child;
1088 child = page_header(ent & PT64_BASE_ADDR_MASK);
1090 if (child->unsync_children) {
1091 if (mmu_pages_add(pvec, child, i))
1094 ret = __mmu_unsync_walk(child, pvec);
1096 __clear_bit(i, sp->unsync_child_bitmap);
1098 nr_unsync_leaf += ret;
1103 if (child->unsync) {
1105 if (mmu_pages_add(pvec, child, i))
1111 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1112 sp->unsync_children = 0;
1114 return nr_unsync_leaf;
1117 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1118 struct kvm_mmu_pages *pvec)
1120 if (!sp->unsync_children)
1123 mmu_pages_add(pvec, sp, 0);
1124 return __mmu_unsync_walk(sp, pvec);
1127 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1130 struct hlist_head *bucket;
1131 struct kvm_mmu_page *sp;
1132 struct hlist_node *node;
1134 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1135 index = kvm_page_table_hashfn(gfn);
1136 bucket = &kvm->arch.mmu_page_hash[index];
1137 hlist_for_each_entry(sp, node, bucket, hash_link)
1138 if (sp->gfn == gfn && !sp->role.direct
1139 && !sp->role.invalid) {
1140 pgprintk("%s: found role %x\n",
1141 __func__, sp->role.word);
1147 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1149 WARN_ON(!sp->unsync);
1151 --kvm->stat.mmu_unsync;
1154 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1156 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1158 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1159 kvm_mmu_zap_page(vcpu->kvm, sp);
1163 trace_kvm_mmu_sync_page(sp);
1164 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1165 kvm_flush_remote_tlbs(vcpu->kvm);
1166 kvm_unlink_unsync_page(vcpu->kvm, sp);
1167 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1168 kvm_mmu_zap_page(vcpu->kvm, sp);
1172 kvm_mmu_flush_tlb(vcpu);
1176 struct mmu_page_path {
1177 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1178 unsigned int idx[PT64_ROOT_LEVEL-1];
1181 #define for_each_sp(pvec, sp, parents, i) \
1182 for (i = mmu_pages_next(&pvec, &parents, -1), \
1183 sp = pvec.page[i].sp; \
1184 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1185 i = mmu_pages_next(&pvec, &parents, i))
1187 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1188 struct mmu_page_path *parents,
1193 for (n = i+1; n < pvec->nr; n++) {
1194 struct kvm_mmu_page *sp = pvec->page[n].sp;
1196 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1197 parents->idx[0] = pvec->page[n].idx;
1201 parents->parent[sp->role.level-2] = sp;
1202 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1208 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1210 struct kvm_mmu_page *sp;
1211 unsigned int level = 0;
1214 unsigned int idx = parents->idx[level];
1216 sp = parents->parent[level];
1220 --sp->unsync_children;
1221 WARN_ON((int)sp->unsync_children < 0);
1222 __clear_bit(idx, sp->unsync_child_bitmap);
1224 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1227 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1228 struct mmu_page_path *parents,
1229 struct kvm_mmu_pages *pvec)
1231 parents->parent[parent->role.level-1] = NULL;
1235 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1236 struct kvm_mmu_page *parent)
1239 struct kvm_mmu_page *sp;
1240 struct mmu_page_path parents;
1241 struct kvm_mmu_pages pages;
1243 kvm_mmu_pages_init(parent, &parents, &pages);
1244 while (mmu_unsync_walk(parent, &pages)) {
1247 for_each_sp(pages, sp, parents, i)
1248 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1251 kvm_flush_remote_tlbs(vcpu->kvm);
1253 for_each_sp(pages, sp, parents, i) {
1254 kvm_sync_page(vcpu, sp);
1255 mmu_pages_clear_parents(&parents);
1257 cond_resched_lock(&vcpu->kvm->mmu_lock);
1258 kvm_mmu_pages_init(parent, &parents, &pages);
1262 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1270 union kvm_mmu_page_role role;
1273 struct hlist_head *bucket;
1274 struct kvm_mmu_page *sp;
1275 struct hlist_node *node, *tmp;
1277 role = vcpu->arch.mmu.base_role;
1279 role.direct = direct;
1280 role.access = access;
1281 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1282 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1283 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1284 role.quadrant = quadrant;
1286 index = kvm_page_table_hashfn(gfn);
1287 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1288 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1289 if (sp->gfn == gfn) {
1291 if (kvm_sync_page(vcpu, sp))
1294 if (sp->role.word != role.word)
1297 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1298 if (sp->unsync_children) {
1299 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1300 kvm_mmu_mark_parents_unsync(vcpu, sp);
1302 trace_kvm_mmu_get_page(sp, false);
1305 ++vcpu->kvm->stat.mmu_cache_miss;
1306 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1311 hlist_add_head(&sp->hash_link, bucket);
1313 if (rmap_write_protect(vcpu->kvm, gfn))
1314 kvm_flush_remote_tlbs(vcpu->kvm);
1315 account_shadowed(vcpu->kvm, gfn);
1317 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1318 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1320 nonpaging_prefetch_page(vcpu, sp);
1321 trace_kvm_mmu_get_page(sp, true);
1325 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1326 struct kvm_vcpu *vcpu, u64 addr)
1328 iterator->addr = addr;
1329 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1330 iterator->level = vcpu->arch.mmu.shadow_root_level;
1331 if (iterator->level == PT32E_ROOT_LEVEL) {
1332 iterator->shadow_addr
1333 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1334 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1336 if (!iterator->shadow_addr)
1337 iterator->level = 0;
1341 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1343 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1346 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1347 if (is_large_pte(*iterator->sptep))
1350 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1351 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1355 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1357 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1361 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1362 struct kvm_mmu_page *sp)
1370 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1373 if (is_shadow_present_pte(ent)) {
1374 if (!is_last_spte(ent, sp->role.level)) {
1375 ent &= PT64_BASE_ADDR_MASK;
1376 mmu_page_remove_parent_pte(page_header(ent),
1379 if (is_large_pte(ent))
1381 rmap_remove(kvm, &pt[i]);
1384 pt[i] = shadow_trap_nonpresent_pte;
1388 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1390 mmu_page_remove_parent_pte(sp, parent_pte);
1393 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1396 struct kvm_vcpu *vcpu;
1398 kvm_for_each_vcpu(i, vcpu, kvm)
1399 vcpu->arch.last_pte_updated = NULL;
1402 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1406 while (sp->multimapped || sp->parent_pte) {
1407 if (!sp->multimapped)
1408 parent_pte = sp->parent_pte;
1410 struct kvm_pte_chain *chain;
1412 chain = container_of(sp->parent_ptes.first,
1413 struct kvm_pte_chain, link);
1414 parent_pte = chain->parent_ptes[0];
1416 BUG_ON(!parent_pte);
1417 kvm_mmu_put_page(sp, parent_pte);
1418 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1422 static int mmu_zap_unsync_children(struct kvm *kvm,
1423 struct kvm_mmu_page *parent)
1426 struct mmu_page_path parents;
1427 struct kvm_mmu_pages pages;
1429 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1432 kvm_mmu_pages_init(parent, &parents, &pages);
1433 while (mmu_unsync_walk(parent, &pages)) {
1434 struct kvm_mmu_page *sp;
1436 for_each_sp(pages, sp, parents, i) {
1437 kvm_mmu_zap_page(kvm, sp);
1438 mmu_pages_clear_parents(&parents);
1441 kvm_mmu_pages_init(parent, &parents, &pages);
1447 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1451 trace_kvm_mmu_zap_page(sp);
1452 ++kvm->stat.mmu_shadow_zapped;
1453 ret = mmu_zap_unsync_children(kvm, sp);
1454 kvm_mmu_page_unlink_children(kvm, sp);
1455 kvm_mmu_unlink_parents(kvm, sp);
1456 kvm_flush_remote_tlbs(kvm);
1457 if (!sp->role.invalid && !sp->role.direct)
1458 unaccount_shadowed(kvm, sp->gfn);
1460 kvm_unlink_unsync_page(kvm, sp);
1461 if (!sp->root_count) {
1462 hlist_del(&sp->hash_link);
1463 kvm_mmu_free_page(kvm, sp);
1465 sp->role.invalid = 1;
1466 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1467 kvm_reload_remote_mmus(kvm);
1469 kvm_mmu_reset_last_pte_updated(kvm);
1474 * Changing the number of mmu pages allocated to the vm
1475 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1477 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1481 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1482 used_pages = max(0, used_pages);
1485 * If we set the number of mmu pages to be smaller be than the
1486 * number of actived pages , we must to free some mmu pages before we
1490 if (used_pages > kvm_nr_mmu_pages) {
1491 while (used_pages > kvm_nr_mmu_pages) {
1492 struct kvm_mmu_page *page;
1494 page = container_of(kvm->arch.active_mmu_pages.prev,
1495 struct kvm_mmu_page, link);
1496 kvm_mmu_zap_page(kvm, page);
1499 kvm->arch.n_free_mmu_pages = 0;
1502 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1503 - kvm->arch.n_alloc_mmu_pages;
1505 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1508 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1511 struct hlist_head *bucket;
1512 struct kvm_mmu_page *sp;
1513 struct hlist_node *node, *n;
1516 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1518 index = kvm_page_table_hashfn(gfn);
1519 bucket = &kvm->arch.mmu_page_hash[index];
1520 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1521 if (sp->gfn == gfn && !sp->role.direct) {
1522 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1525 if (kvm_mmu_zap_page(kvm, sp))
1531 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1534 struct hlist_head *bucket;
1535 struct kvm_mmu_page *sp;
1536 struct hlist_node *node, *nn;
1538 index = kvm_page_table_hashfn(gfn);
1539 bucket = &kvm->arch.mmu_page_hash[index];
1540 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1541 if (sp->gfn == gfn && !sp->role.direct
1542 && !sp->role.invalid) {
1543 pgprintk("%s: zap %lx %x\n",
1544 __func__, gfn, sp->role.word);
1545 kvm_mmu_zap_page(kvm, sp);
1550 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1552 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1553 struct kvm_mmu_page *sp = page_header(__pa(pte));
1555 __set_bit(slot, sp->slot_bitmap);
1558 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1563 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1566 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1567 if (pt[i] == shadow_notrap_nonpresent_pte)
1568 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1572 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1576 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1578 if (gpa == UNMAPPED_GVA)
1581 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1587 * The function is based on mtrr_type_lookup() in
1588 * arch/x86/kernel/cpu/mtrr/generic.c
1590 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1595 u8 prev_match, curr_match;
1596 int num_var_ranges = KVM_NR_VAR_MTRR;
1598 if (!mtrr_state->enabled)
1601 /* Make end inclusive end, instead of exclusive */
1604 /* Look in fixed ranges. Just return the type as per start */
1605 if (mtrr_state->have_fixed && (start < 0x100000)) {
1608 if (start < 0x80000) {
1610 idx += (start >> 16);
1611 return mtrr_state->fixed_ranges[idx];
1612 } else if (start < 0xC0000) {
1614 idx += ((start - 0x80000) >> 14);
1615 return mtrr_state->fixed_ranges[idx];
1616 } else if (start < 0x1000000) {
1618 idx += ((start - 0xC0000) >> 12);
1619 return mtrr_state->fixed_ranges[idx];
1624 * Look in variable ranges
1625 * Look of multiple ranges matching this address and pick type
1626 * as per MTRR precedence
1628 if (!(mtrr_state->enabled & 2))
1629 return mtrr_state->def_type;
1632 for (i = 0; i < num_var_ranges; ++i) {
1633 unsigned short start_state, end_state;
1635 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1638 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1639 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1640 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1641 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1643 start_state = ((start & mask) == (base & mask));
1644 end_state = ((end & mask) == (base & mask));
1645 if (start_state != end_state)
1648 if ((start & mask) != (base & mask))
1651 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1652 if (prev_match == 0xFF) {
1653 prev_match = curr_match;
1657 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1658 curr_match == MTRR_TYPE_UNCACHABLE)
1659 return MTRR_TYPE_UNCACHABLE;
1661 if ((prev_match == MTRR_TYPE_WRBACK &&
1662 curr_match == MTRR_TYPE_WRTHROUGH) ||
1663 (prev_match == MTRR_TYPE_WRTHROUGH &&
1664 curr_match == MTRR_TYPE_WRBACK)) {
1665 prev_match = MTRR_TYPE_WRTHROUGH;
1666 curr_match = MTRR_TYPE_WRTHROUGH;
1669 if (prev_match != curr_match)
1670 return MTRR_TYPE_UNCACHABLE;
1673 if (prev_match != 0xFF)
1676 return mtrr_state->def_type;
1679 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1683 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1684 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1685 if (mtrr == 0xfe || mtrr == 0xff)
1686 mtrr = MTRR_TYPE_WRBACK;
1689 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1691 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1694 struct hlist_head *bucket;
1695 struct kvm_mmu_page *s;
1696 struct hlist_node *node, *n;
1698 trace_kvm_mmu_unsync_page(sp);
1699 index = kvm_page_table_hashfn(sp->gfn);
1700 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1701 /* don't unsync if pagetable is shadowed with multiple roles */
1702 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1703 if (s->gfn != sp->gfn || s->role.direct)
1705 if (s->role.word != sp->role.word)
1708 ++vcpu->kvm->stat.mmu_unsync;
1711 kvm_mmu_mark_parents_unsync(vcpu, sp);
1713 mmu_convert_notrap(sp);
1717 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1720 struct kvm_mmu_page *shadow;
1722 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1724 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1728 if (can_unsync && oos_shadow)
1729 return kvm_unsync_page(vcpu, shadow);
1735 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1736 unsigned pte_access, int user_fault,
1737 int write_fault, int dirty, int largepage,
1738 gfn_t gfn, pfn_t pfn, bool speculative,
1745 * We don't set the accessed bit, since we sometimes want to see
1746 * whether the guest actually used the pte (in order to detect
1749 spte = shadow_base_present_pte | shadow_dirty_mask;
1751 spte |= shadow_accessed_mask;
1753 pte_access &= ~ACC_WRITE_MASK;
1754 if (pte_access & ACC_EXEC_MASK)
1755 spte |= shadow_x_mask;
1757 spte |= shadow_nx_mask;
1758 if (pte_access & ACC_USER_MASK)
1759 spte |= shadow_user_mask;
1761 spte |= PT_PAGE_SIZE_MASK;
1763 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1764 kvm_is_mmio_pfn(pfn));
1766 spte |= (u64)pfn << PAGE_SHIFT;
1768 if ((pte_access & ACC_WRITE_MASK)
1769 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1771 if (largepage && has_wrprotected_page(vcpu->kvm, gfn, 1)) {
1773 spte = shadow_trap_nonpresent_pte;
1777 spte |= PT_WRITABLE_MASK;
1780 * Optimization: for pte sync, if spte was writable the hash
1781 * lookup is unnecessary (and expensive). Write protection
1782 * is responsibility of mmu_get_page / kvm_sync_page.
1783 * Same reasoning can be applied to dirty page accounting.
1785 if (!can_unsync && is_writeble_pte(*sptep))
1788 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1789 pgprintk("%s: found shadow page for %lx, marking ro\n",
1792 pte_access &= ~ACC_WRITE_MASK;
1793 if (is_writeble_pte(spte))
1794 spte &= ~PT_WRITABLE_MASK;
1798 if (pte_access & ACC_WRITE_MASK)
1799 mark_page_dirty(vcpu->kvm, gfn);
1802 __set_spte(sptep, spte);
1806 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1807 unsigned pt_access, unsigned pte_access,
1808 int user_fault, int write_fault, int dirty,
1809 int *ptwrite, int largepage, gfn_t gfn,
1810 pfn_t pfn, bool speculative)
1812 int was_rmapped = 0;
1813 int was_writeble = is_writeble_pte(*sptep);
1816 pgprintk("%s: spte %llx access %x write_fault %d"
1817 " user_fault %d gfn %lx\n",
1818 __func__, *sptep, pt_access,
1819 write_fault, user_fault, gfn);
1821 if (is_rmap_spte(*sptep)) {
1823 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1824 * the parent of the now unreachable PTE.
1826 if (largepage && !is_large_pte(*sptep)) {
1827 struct kvm_mmu_page *child;
1830 child = page_header(pte & PT64_BASE_ADDR_MASK);
1831 mmu_page_remove_parent_pte(child, sptep);
1832 } else if (pfn != spte_to_pfn(*sptep)) {
1833 pgprintk("hfn old %lx new %lx\n",
1834 spte_to_pfn(*sptep), pfn);
1835 rmap_remove(vcpu->kvm, sptep);
1839 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1840 dirty, largepage, gfn, pfn, speculative, true)) {
1843 kvm_x86_ops->tlb_flush(vcpu);
1846 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1847 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1848 is_large_pte(*sptep)? "2MB" : "4kB",
1849 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1851 if (!was_rmapped && is_large_pte(*sptep))
1852 ++vcpu->kvm->stat.lpages;
1854 page_header_update_slot(vcpu->kvm, sptep, gfn);
1856 rmap_count = rmap_add(vcpu, sptep, gfn);
1857 if (!is_rmap_spte(*sptep))
1858 kvm_release_pfn_clean(pfn);
1859 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1860 rmap_recycle(vcpu, gfn, largepage);
1863 kvm_release_pfn_dirty(pfn);
1865 kvm_release_pfn_clean(pfn);
1868 vcpu->arch.last_pte_updated = sptep;
1869 vcpu->arch.last_pte_gfn = gfn;
1873 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1877 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1878 int largepage, gfn_t gfn, pfn_t pfn)
1880 struct kvm_shadow_walk_iterator iterator;
1881 struct kvm_mmu_page *sp;
1885 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1886 if (iterator.level == PT_PAGE_TABLE_LEVEL
1887 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1888 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1889 0, write, 1, &pt_write,
1890 largepage, gfn, pfn, false);
1891 ++vcpu->stat.pf_fixed;
1895 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1896 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1897 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1899 1, ACC_ALL, iterator.sptep);
1901 pgprintk("nonpaging_map: ENOMEM\n");
1902 kvm_release_pfn_clean(pfn);
1906 __set_spte(iterator.sptep,
1908 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1909 | shadow_user_mask | shadow_x_mask);
1915 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1920 unsigned long mmu_seq;
1922 if (mapping_level(vcpu, gfn) == PT_DIRECTORY_LEVEL) {
1923 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
1927 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1929 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1932 if (is_error_pfn(pfn)) {
1933 kvm_release_pfn_clean(pfn);
1937 spin_lock(&vcpu->kvm->mmu_lock);
1938 if (mmu_notifier_retry(vcpu, mmu_seq))
1940 kvm_mmu_free_some_pages(vcpu);
1941 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
1942 spin_unlock(&vcpu->kvm->mmu_lock);
1948 spin_unlock(&vcpu->kvm->mmu_lock);
1949 kvm_release_pfn_clean(pfn);
1954 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1957 struct kvm_mmu_page *sp;
1959 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1961 spin_lock(&vcpu->kvm->mmu_lock);
1962 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1963 hpa_t root = vcpu->arch.mmu.root_hpa;
1965 sp = page_header(root);
1967 if (!sp->root_count && sp->role.invalid)
1968 kvm_mmu_zap_page(vcpu->kvm, sp);
1969 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1970 spin_unlock(&vcpu->kvm->mmu_lock);
1973 for (i = 0; i < 4; ++i) {
1974 hpa_t root = vcpu->arch.mmu.pae_root[i];
1977 root &= PT64_BASE_ADDR_MASK;
1978 sp = page_header(root);
1980 if (!sp->root_count && sp->role.invalid)
1981 kvm_mmu_zap_page(vcpu->kvm, sp);
1983 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1985 spin_unlock(&vcpu->kvm->mmu_lock);
1986 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1989 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
1993 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
1994 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2001 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2005 struct kvm_mmu_page *sp;
2009 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2011 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2012 hpa_t root = vcpu->arch.mmu.root_hpa;
2014 ASSERT(!VALID_PAGE(root));
2017 if (mmu_check_root(vcpu, root_gfn))
2019 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2020 PT64_ROOT_LEVEL, direct,
2022 root = __pa(sp->spt);
2024 vcpu->arch.mmu.root_hpa = root;
2027 direct = !is_paging(vcpu);
2030 for (i = 0; i < 4; ++i) {
2031 hpa_t root = vcpu->arch.mmu.pae_root[i];
2033 ASSERT(!VALID_PAGE(root));
2034 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2035 pdptr = kvm_pdptr_read(vcpu, i);
2036 if (!is_present_gpte(pdptr)) {
2037 vcpu->arch.mmu.pae_root[i] = 0;
2040 root_gfn = pdptr >> PAGE_SHIFT;
2041 } else if (vcpu->arch.mmu.root_level == 0)
2043 if (mmu_check_root(vcpu, root_gfn))
2045 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2046 PT32_ROOT_LEVEL, direct,
2048 root = __pa(sp->spt);
2050 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2052 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2056 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2059 struct kvm_mmu_page *sp;
2061 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2063 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2064 hpa_t root = vcpu->arch.mmu.root_hpa;
2065 sp = page_header(root);
2066 mmu_sync_children(vcpu, sp);
2069 for (i = 0; i < 4; ++i) {
2070 hpa_t root = vcpu->arch.mmu.pae_root[i];
2072 if (root && VALID_PAGE(root)) {
2073 root &= PT64_BASE_ADDR_MASK;
2074 sp = page_header(root);
2075 mmu_sync_children(vcpu, sp);
2080 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2082 spin_lock(&vcpu->kvm->mmu_lock);
2083 mmu_sync_roots(vcpu);
2084 spin_unlock(&vcpu->kvm->mmu_lock);
2087 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2092 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2098 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2099 r = mmu_topup_memory_caches(vcpu);
2104 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2106 gfn = gva >> PAGE_SHIFT;
2108 return nonpaging_map(vcpu, gva & PAGE_MASK,
2109 error_code & PFERR_WRITE_MASK, gfn);
2112 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2118 gfn_t gfn = gpa >> PAGE_SHIFT;
2119 unsigned long mmu_seq;
2122 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2124 r = mmu_topup_memory_caches(vcpu);
2128 if (mapping_level(vcpu, gfn) == PT_DIRECTORY_LEVEL) {
2129 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
2132 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2134 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2135 if (is_error_pfn(pfn)) {
2136 kvm_release_pfn_clean(pfn);
2139 spin_lock(&vcpu->kvm->mmu_lock);
2140 if (mmu_notifier_retry(vcpu, mmu_seq))
2142 kvm_mmu_free_some_pages(vcpu);
2143 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2144 largepage, gfn, pfn);
2145 spin_unlock(&vcpu->kvm->mmu_lock);
2150 spin_unlock(&vcpu->kvm->mmu_lock);
2151 kvm_release_pfn_clean(pfn);
2155 static void nonpaging_free(struct kvm_vcpu *vcpu)
2157 mmu_free_roots(vcpu);
2160 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2162 struct kvm_mmu *context = &vcpu->arch.mmu;
2164 context->new_cr3 = nonpaging_new_cr3;
2165 context->page_fault = nonpaging_page_fault;
2166 context->gva_to_gpa = nonpaging_gva_to_gpa;
2167 context->free = nonpaging_free;
2168 context->prefetch_page = nonpaging_prefetch_page;
2169 context->sync_page = nonpaging_sync_page;
2170 context->invlpg = nonpaging_invlpg;
2171 context->root_level = 0;
2172 context->shadow_root_level = PT32E_ROOT_LEVEL;
2173 context->root_hpa = INVALID_PAGE;
2177 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2179 ++vcpu->stat.tlb_flush;
2180 kvm_x86_ops->tlb_flush(vcpu);
2183 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2185 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2186 mmu_free_roots(vcpu);
2189 static void inject_page_fault(struct kvm_vcpu *vcpu,
2193 kvm_inject_page_fault(vcpu, addr, err_code);
2196 static void paging_free(struct kvm_vcpu *vcpu)
2198 nonpaging_free(vcpu);
2201 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2205 bit7 = (gpte >> 7) & 1;
2206 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2210 #include "paging_tmpl.h"
2214 #include "paging_tmpl.h"
2217 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2219 struct kvm_mmu *context = &vcpu->arch.mmu;
2220 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2221 u64 exb_bit_rsvd = 0;
2224 exb_bit_rsvd = rsvd_bits(63, 63);
2226 case PT32_ROOT_LEVEL:
2227 /* no rsvd bits for 2 level 4K page table entries */
2228 context->rsvd_bits_mask[0][1] = 0;
2229 context->rsvd_bits_mask[0][0] = 0;
2230 if (is_cpuid_PSE36())
2231 /* 36bits PSE 4MB page */
2232 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2234 /* 32 bits PSE 4MB page */
2235 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2236 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2238 case PT32E_ROOT_LEVEL:
2239 context->rsvd_bits_mask[0][2] =
2240 rsvd_bits(maxphyaddr, 63) |
2241 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2242 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2243 rsvd_bits(maxphyaddr, 62); /* PDE */
2244 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2245 rsvd_bits(maxphyaddr, 62); /* PTE */
2246 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2247 rsvd_bits(maxphyaddr, 62) |
2248 rsvd_bits(13, 20); /* large page */
2249 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2251 case PT64_ROOT_LEVEL:
2252 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2253 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2254 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2255 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2256 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2257 rsvd_bits(maxphyaddr, 51);
2258 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2259 rsvd_bits(maxphyaddr, 51);
2260 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2261 context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
2262 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2263 rsvd_bits(maxphyaddr, 51) |
2264 rsvd_bits(13, 20); /* large page */
2265 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2270 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2272 struct kvm_mmu *context = &vcpu->arch.mmu;
2274 ASSERT(is_pae(vcpu));
2275 context->new_cr3 = paging_new_cr3;
2276 context->page_fault = paging64_page_fault;
2277 context->gva_to_gpa = paging64_gva_to_gpa;
2278 context->prefetch_page = paging64_prefetch_page;
2279 context->sync_page = paging64_sync_page;
2280 context->invlpg = paging64_invlpg;
2281 context->free = paging_free;
2282 context->root_level = level;
2283 context->shadow_root_level = level;
2284 context->root_hpa = INVALID_PAGE;
2288 static int paging64_init_context(struct kvm_vcpu *vcpu)
2290 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2291 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2294 static int paging32_init_context(struct kvm_vcpu *vcpu)
2296 struct kvm_mmu *context = &vcpu->arch.mmu;
2298 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2299 context->new_cr3 = paging_new_cr3;
2300 context->page_fault = paging32_page_fault;
2301 context->gva_to_gpa = paging32_gva_to_gpa;
2302 context->free = paging_free;
2303 context->prefetch_page = paging32_prefetch_page;
2304 context->sync_page = paging32_sync_page;
2305 context->invlpg = paging32_invlpg;
2306 context->root_level = PT32_ROOT_LEVEL;
2307 context->shadow_root_level = PT32E_ROOT_LEVEL;
2308 context->root_hpa = INVALID_PAGE;
2312 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2314 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2315 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2318 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2320 struct kvm_mmu *context = &vcpu->arch.mmu;
2322 context->new_cr3 = nonpaging_new_cr3;
2323 context->page_fault = tdp_page_fault;
2324 context->free = nonpaging_free;
2325 context->prefetch_page = nonpaging_prefetch_page;
2326 context->sync_page = nonpaging_sync_page;
2327 context->invlpg = nonpaging_invlpg;
2328 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2329 context->root_hpa = INVALID_PAGE;
2331 if (!is_paging(vcpu)) {
2332 context->gva_to_gpa = nonpaging_gva_to_gpa;
2333 context->root_level = 0;
2334 } else if (is_long_mode(vcpu)) {
2335 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2336 context->gva_to_gpa = paging64_gva_to_gpa;
2337 context->root_level = PT64_ROOT_LEVEL;
2338 } else if (is_pae(vcpu)) {
2339 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2340 context->gva_to_gpa = paging64_gva_to_gpa;
2341 context->root_level = PT32E_ROOT_LEVEL;
2343 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2344 context->gva_to_gpa = paging32_gva_to_gpa;
2345 context->root_level = PT32_ROOT_LEVEL;
2351 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2356 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2358 if (!is_paging(vcpu))
2359 r = nonpaging_init_context(vcpu);
2360 else if (is_long_mode(vcpu))
2361 r = paging64_init_context(vcpu);
2362 else if (is_pae(vcpu))
2363 r = paging32E_init_context(vcpu);
2365 r = paging32_init_context(vcpu);
2367 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2372 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2374 vcpu->arch.update_pte.pfn = bad_pfn;
2377 return init_kvm_tdp_mmu(vcpu);
2379 return init_kvm_softmmu(vcpu);
2382 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2385 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2386 vcpu->arch.mmu.free(vcpu);
2387 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2391 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2393 destroy_kvm_mmu(vcpu);
2394 return init_kvm_mmu(vcpu);
2396 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2398 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2402 r = mmu_topup_memory_caches(vcpu);
2405 spin_lock(&vcpu->kvm->mmu_lock);
2406 kvm_mmu_free_some_pages(vcpu);
2407 r = mmu_alloc_roots(vcpu);
2408 mmu_sync_roots(vcpu);
2409 spin_unlock(&vcpu->kvm->mmu_lock);
2412 /* set_cr3() should ensure TLB has been flushed */
2413 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2417 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2419 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2421 mmu_free_roots(vcpu);
2424 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2425 struct kvm_mmu_page *sp,
2429 struct kvm_mmu_page *child;
2432 if (is_shadow_present_pte(pte)) {
2433 if (is_last_spte(pte, sp->role.level))
2434 rmap_remove(vcpu->kvm, spte);
2436 child = page_header(pte & PT64_BASE_ADDR_MASK);
2437 mmu_page_remove_parent_pte(child, spte);
2440 __set_spte(spte, shadow_trap_nonpresent_pte);
2441 if (is_large_pte(pte))
2442 --vcpu->kvm->stat.lpages;
2445 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2446 struct kvm_mmu_page *sp,
2450 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2451 if (!vcpu->arch.update_pte.largepage ||
2452 sp->role.glevels == PT32_ROOT_LEVEL) {
2453 ++vcpu->kvm->stat.mmu_pde_zapped;
2458 ++vcpu->kvm->stat.mmu_pte_updated;
2459 if (sp->role.glevels == PT32_ROOT_LEVEL)
2460 paging32_update_pte(vcpu, sp, spte, new);
2462 paging64_update_pte(vcpu, sp, spte, new);
2465 static bool need_remote_flush(u64 old, u64 new)
2467 if (!is_shadow_present_pte(old))
2469 if (!is_shadow_present_pte(new))
2471 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2473 old ^= PT64_NX_MASK;
2474 new ^= PT64_NX_MASK;
2475 return (old & ~new & PT64_PERM_MASK) != 0;
2478 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2480 if (need_remote_flush(old, new))
2481 kvm_flush_remote_tlbs(vcpu->kvm);
2483 kvm_mmu_flush_tlb(vcpu);
2486 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2488 u64 *spte = vcpu->arch.last_pte_updated;
2490 return !!(spte && (*spte & shadow_accessed_mask));
2493 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2494 const u8 *new, int bytes)
2501 vcpu->arch.update_pte.largepage = 0;
2503 if (bytes != 4 && bytes != 8)
2507 * Assume that the pte write on a page table of the same type
2508 * as the current vcpu paging mode. This is nearly always true
2509 * (might be false while changing modes). Note it is verified later
2513 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2514 if ((bytes == 4) && (gpa % 4 == 0)) {
2515 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2518 memcpy((void *)&gpte + (gpa % 8), new, 4);
2519 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2520 memcpy((void *)&gpte, new, 8);
2523 if ((bytes == 4) && (gpa % 4 == 0))
2524 memcpy((void *)&gpte, new, 4);
2526 if (!is_present_gpte(gpte))
2528 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2530 if (is_large_pte(gpte) &&
2531 (mapping_level(vcpu, gfn) == PT_DIRECTORY_LEVEL)) {
2532 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
2533 vcpu->arch.update_pte.largepage = 1;
2535 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2537 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2539 if (is_error_pfn(pfn)) {
2540 kvm_release_pfn_clean(pfn);
2543 vcpu->arch.update_pte.gfn = gfn;
2544 vcpu->arch.update_pte.pfn = pfn;
2547 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2549 u64 *spte = vcpu->arch.last_pte_updated;
2552 && vcpu->arch.last_pte_gfn == gfn
2553 && shadow_accessed_mask
2554 && !(*spte & shadow_accessed_mask)
2555 && is_shadow_present_pte(*spte))
2556 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2559 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2560 const u8 *new, int bytes,
2561 bool guest_initiated)
2563 gfn_t gfn = gpa >> PAGE_SHIFT;
2564 struct kvm_mmu_page *sp;
2565 struct hlist_node *node, *n;
2566 struct hlist_head *bucket;
2570 unsigned offset = offset_in_page(gpa);
2572 unsigned page_offset;
2573 unsigned misaligned;
2580 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2581 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2582 spin_lock(&vcpu->kvm->mmu_lock);
2583 kvm_mmu_access_page(vcpu, gfn);
2584 kvm_mmu_free_some_pages(vcpu);
2585 ++vcpu->kvm->stat.mmu_pte_write;
2586 kvm_mmu_audit(vcpu, "pre pte write");
2587 if (guest_initiated) {
2588 if (gfn == vcpu->arch.last_pt_write_gfn
2589 && !last_updated_pte_accessed(vcpu)) {
2590 ++vcpu->arch.last_pt_write_count;
2591 if (vcpu->arch.last_pt_write_count >= 3)
2594 vcpu->arch.last_pt_write_gfn = gfn;
2595 vcpu->arch.last_pt_write_count = 1;
2596 vcpu->arch.last_pte_updated = NULL;
2599 index = kvm_page_table_hashfn(gfn);
2600 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2601 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2602 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2604 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2605 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2606 misaligned |= bytes < 4;
2607 if (misaligned || flooded) {
2609 * Misaligned accesses are too much trouble to fix
2610 * up; also, they usually indicate a page is not used
2613 * If we're seeing too many writes to a page,
2614 * it may no longer be a page table, or we may be
2615 * forking, in which case it is better to unmap the
2618 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2619 gpa, bytes, sp->role.word);
2620 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2622 ++vcpu->kvm->stat.mmu_flooded;
2625 page_offset = offset;
2626 level = sp->role.level;
2628 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2629 page_offset <<= 1; /* 32->64 */
2631 * A 32-bit pde maps 4MB while the shadow pdes map
2632 * only 2MB. So we need to double the offset again
2633 * and zap two pdes instead of one.
2635 if (level == PT32_ROOT_LEVEL) {
2636 page_offset &= ~7; /* kill rounding error */
2640 quadrant = page_offset >> PAGE_SHIFT;
2641 page_offset &= ~PAGE_MASK;
2642 if (quadrant != sp->role.quadrant)
2645 spte = &sp->spt[page_offset / sizeof(*spte)];
2646 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2648 r = kvm_read_guest_atomic(vcpu->kvm,
2649 gpa & ~(u64)(pte_size - 1),
2651 new = (const void *)&gentry;
2657 mmu_pte_write_zap_pte(vcpu, sp, spte);
2659 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2660 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2664 kvm_mmu_audit(vcpu, "post pte write");
2665 spin_unlock(&vcpu->kvm->mmu_lock);
2666 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2667 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2668 vcpu->arch.update_pte.pfn = bad_pfn;
2672 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2677 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2679 spin_lock(&vcpu->kvm->mmu_lock);
2680 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2681 spin_unlock(&vcpu->kvm->mmu_lock);
2684 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2686 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2688 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
2689 struct kvm_mmu_page *sp;
2691 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2692 struct kvm_mmu_page, link);
2693 kvm_mmu_zap_page(vcpu->kvm, sp);
2694 ++vcpu->kvm->stat.mmu_recycled;
2698 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2701 enum emulation_result er;
2703 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2712 r = mmu_topup_memory_caches(vcpu);
2716 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
2721 case EMULATE_DO_MMIO:
2722 ++vcpu->stat.mmio_exits;
2725 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2726 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2734 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2736 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2738 vcpu->arch.mmu.invlpg(vcpu, gva);
2739 kvm_mmu_flush_tlb(vcpu);
2740 ++vcpu->stat.invlpg;
2742 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2744 void kvm_enable_tdp(void)
2748 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2750 void kvm_disable_tdp(void)
2752 tdp_enabled = false;
2754 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2756 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2758 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2761 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2768 spin_lock(&vcpu->kvm->mmu_lock);
2769 if (vcpu->kvm->arch.n_requested_mmu_pages)
2770 vcpu->kvm->arch.n_free_mmu_pages =
2771 vcpu->kvm->arch.n_requested_mmu_pages;
2773 vcpu->kvm->arch.n_free_mmu_pages =
2774 vcpu->kvm->arch.n_alloc_mmu_pages;
2775 spin_unlock(&vcpu->kvm->mmu_lock);
2777 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2778 * Therefore we need to allocate shadow page tables in the first
2779 * 4GB of memory, which happens to fit the DMA32 zone.
2781 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2784 vcpu->arch.mmu.pae_root = page_address(page);
2785 for (i = 0; i < 4; ++i)
2786 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2791 free_mmu_pages(vcpu);
2795 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2798 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2800 return alloc_mmu_pages(vcpu);
2803 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2806 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2808 return init_kvm_mmu(vcpu);
2811 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2815 destroy_kvm_mmu(vcpu);
2816 free_mmu_pages(vcpu);
2817 mmu_free_memory_caches(vcpu);
2820 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2822 struct kvm_mmu_page *sp;
2824 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2828 if (!test_bit(slot, sp->slot_bitmap))
2832 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2834 if (pt[i] & PT_WRITABLE_MASK)
2835 pt[i] &= ~PT_WRITABLE_MASK;
2837 kvm_flush_remote_tlbs(kvm);
2840 void kvm_mmu_zap_all(struct kvm *kvm)
2842 struct kvm_mmu_page *sp, *node;
2844 spin_lock(&kvm->mmu_lock);
2845 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2846 if (kvm_mmu_zap_page(kvm, sp))
2847 node = container_of(kvm->arch.active_mmu_pages.next,
2848 struct kvm_mmu_page, link);
2849 spin_unlock(&kvm->mmu_lock);
2851 kvm_flush_remote_tlbs(kvm);
2854 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2856 struct kvm_mmu_page *page;
2858 page = container_of(kvm->arch.active_mmu_pages.prev,
2859 struct kvm_mmu_page, link);
2860 kvm_mmu_zap_page(kvm, page);
2863 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2866 struct kvm *kvm_freed = NULL;
2867 int cache_count = 0;
2869 spin_lock(&kvm_lock);
2871 list_for_each_entry(kvm, &vm_list, vm_list) {
2874 if (!down_read_trylock(&kvm->slots_lock))
2876 spin_lock(&kvm->mmu_lock);
2877 npages = kvm->arch.n_alloc_mmu_pages -
2878 kvm->arch.n_free_mmu_pages;
2879 cache_count += npages;
2880 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2881 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2887 spin_unlock(&kvm->mmu_lock);
2888 up_read(&kvm->slots_lock);
2891 list_move_tail(&kvm_freed->vm_list, &vm_list);
2893 spin_unlock(&kvm_lock);
2898 static struct shrinker mmu_shrinker = {
2899 .shrink = mmu_shrink,
2900 .seeks = DEFAULT_SEEKS * 10,
2903 static void mmu_destroy_caches(void)
2905 if (pte_chain_cache)
2906 kmem_cache_destroy(pte_chain_cache);
2907 if (rmap_desc_cache)
2908 kmem_cache_destroy(rmap_desc_cache);
2909 if (mmu_page_header_cache)
2910 kmem_cache_destroy(mmu_page_header_cache);
2913 void kvm_mmu_module_exit(void)
2915 mmu_destroy_caches();
2916 unregister_shrinker(&mmu_shrinker);
2919 int kvm_mmu_module_init(void)
2921 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2922 sizeof(struct kvm_pte_chain),
2924 if (!pte_chain_cache)
2926 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2927 sizeof(struct kvm_rmap_desc),
2929 if (!rmap_desc_cache)
2932 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2933 sizeof(struct kvm_mmu_page),
2935 if (!mmu_page_header_cache)
2938 register_shrinker(&mmu_shrinker);
2943 mmu_destroy_caches();
2948 * Caculate mmu pages needed for kvm.
2950 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2953 unsigned int nr_mmu_pages;
2954 unsigned int nr_pages = 0;
2956 for (i = 0; i < kvm->nmemslots; i++)
2957 nr_pages += kvm->memslots[i].npages;
2959 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2960 nr_mmu_pages = max(nr_mmu_pages,
2961 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2963 return nr_mmu_pages;
2966 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2969 if (len > buffer->len)
2974 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2979 ret = pv_mmu_peek_buffer(buffer, len);
2984 buffer->processed += len;
2988 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2989 gpa_t addr, gpa_t value)
2994 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2997 r = mmu_topup_memory_caches(vcpu);
3001 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3007 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3009 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3013 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3015 spin_lock(&vcpu->kvm->mmu_lock);
3016 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3017 spin_unlock(&vcpu->kvm->mmu_lock);
3021 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3022 struct kvm_pv_mmu_op_buffer *buffer)
3024 struct kvm_mmu_op_header *header;
3026 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3029 switch (header->op) {
3030 case KVM_MMU_OP_WRITE_PTE: {
3031 struct kvm_mmu_op_write_pte *wpte;
3033 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3036 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3039 case KVM_MMU_OP_FLUSH_TLB: {
3040 struct kvm_mmu_op_flush_tlb *ftlb;
3042 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3045 return kvm_pv_mmu_flush_tlb(vcpu);
3047 case KVM_MMU_OP_RELEASE_PT: {
3048 struct kvm_mmu_op_release_pt *rpt;
3050 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3053 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3059 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3060 gpa_t addr, unsigned long *ret)
3063 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3065 buffer->ptr = buffer->buf;
3066 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3067 buffer->processed = 0;
3069 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3073 while (buffer->len) {
3074 r = kvm_pv_mmu_op_one(vcpu, buffer);
3083 *ret = buffer->processed;
3087 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3089 struct kvm_shadow_walk_iterator iterator;
3092 spin_lock(&vcpu->kvm->mmu_lock);
3093 for_each_shadow_entry(vcpu, addr, iterator) {
3094 sptes[iterator.level-1] = *iterator.sptep;
3096 if (!is_shadow_present_pte(*iterator.sptep))
3099 spin_unlock(&vcpu->kvm->mmu_lock);
3103 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3107 static const char *audit_msg;
3109 static gva_t canonicalize(gva_t gva)
3111 #ifdef CONFIG_X86_64
3112 gva = (long long)(gva << 16) >> 16;
3118 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3121 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3126 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3127 u64 ent = sp->spt[i];
3129 if (is_shadow_present_pte(ent)) {
3130 if (!is_last_spte(ent, sp->role.level)) {
3131 struct kvm_mmu_page *child;
3132 child = page_header(ent & PT64_BASE_ADDR_MASK);
3133 __mmu_spte_walk(kvm, child, fn);
3135 fn(kvm, sp, &sp->spt[i]);
3140 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3143 struct kvm_mmu_page *sp;
3145 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3147 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3148 hpa_t root = vcpu->arch.mmu.root_hpa;
3149 sp = page_header(root);
3150 __mmu_spte_walk(vcpu->kvm, sp, fn);
3153 for (i = 0; i < 4; ++i) {
3154 hpa_t root = vcpu->arch.mmu.pae_root[i];
3156 if (root && VALID_PAGE(root)) {
3157 root &= PT64_BASE_ADDR_MASK;
3158 sp = page_header(root);
3159 __mmu_spte_walk(vcpu->kvm, sp, fn);
3165 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3166 gva_t va, int level)
3168 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3170 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3172 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3175 if (ent == shadow_trap_nonpresent_pte)
3178 va = canonicalize(va);
3179 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3180 audit_mappings_page(vcpu, ent, va, level - 1);
3182 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3183 gfn_t gfn = gpa >> PAGE_SHIFT;
3184 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3185 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3187 if (is_error_pfn(pfn)) {
3188 kvm_release_pfn_clean(pfn);
3192 if (is_shadow_present_pte(ent)
3193 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3194 printk(KERN_ERR "xx audit error: (%s) levels %d"
3195 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3196 audit_msg, vcpu->arch.mmu.root_level,
3198 is_shadow_present_pte(ent));
3199 else if (ent == shadow_notrap_nonpresent_pte
3200 && !is_error_hpa(hpa))
3201 printk(KERN_ERR "audit: (%s) notrap shadow,"
3202 " valid guest gva %lx\n", audit_msg, va);
3203 kvm_release_pfn_clean(pfn);
3209 static void audit_mappings(struct kvm_vcpu *vcpu)
3213 if (vcpu->arch.mmu.root_level == 4)
3214 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3216 for (i = 0; i < 4; ++i)
3217 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3218 audit_mappings_page(vcpu,
3219 vcpu->arch.mmu.pae_root[i],
3224 static int count_rmaps(struct kvm_vcpu *vcpu)
3229 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3230 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3231 struct kvm_rmap_desc *d;
3233 for (j = 0; j < m->npages; ++j) {
3234 unsigned long *rmapp = &m->rmap[j];
3238 if (!(*rmapp & 1)) {
3242 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3244 for (k = 0; k < RMAP_EXT; ++k)
3256 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3258 unsigned long *rmapp;
3259 struct kvm_mmu_page *rev_sp;
3262 if (*sptep & PT_WRITABLE_MASK) {
3263 rev_sp = page_header(__pa(sptep));
3264 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3266 if (!gfn_to_memslot(kvm, gfn)) {
3267 if (!printk_ratelimit())
3269 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3271 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3272 audit_msg, sptep - rev_sp->spt,
3278 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3279 is_large_pte(*sptep));
3281 if (!printk_ratelimit())
3283 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3291 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3293 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3296 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3298 struct kvm_mmu_page *sp;
3301 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3304 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3307 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3310 if (!(ent & PT_PRESENT_MASK))
3312 if (!(ent & PT_WRITABLE_MASK))
3314 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3320 static void audit_rmap(struct kvm_vcpu *vcpu)
3322 check_writable_mappings_rmap(vcpu);
3326 static void audit_write_protection(struct kvm_vcpu *vcpu)
3328 struct kvm_mmu_page *sp;
3329 struct kvm_memory_slot *slot;
3330 unsigned long *rmapp;
3334 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3335 if (sp->role.direct)
3340 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3341 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3342 rmapp = &slot->rmap[gfn - slot->base_gfn];
3344 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3346 if (*spte & PT_WRITABLE_MASK)
3347 printk(KERN_ERR "%s: (%s) shadow page has "
3348 "writable mappings: gfn %lx role %x\n",
3349 __func__, audit_msg, sp->gfn,
3351 spte = rmap_next(vcpu->kvm, rmapp, spte);
3356 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3363 audit_write_protection(vcpu);
3364 if (strcmp("pre pte write", audit_msg) != 0)
3365 audit_mappings(vcpu);
3366 audit_writable_sptes_have_rmaps(vcpu);