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KVM: MMU: Use __set_spte to link shadow pages
[mv-sheeva.git] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  * Copyright 2010 Red Hat, Inc. and/or its affilates.
11  *
12  * Authors:
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Avi Kivity   <avi@qumranet.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include "mmu.h"
22 #include "x86.h"
23 #include "kvm_cache_regs.h"
24
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/mm.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37
38 #include <asm/page.h>
39 #include <asm/cmpxchg.h>
40 #include <asm/io.h>
41 #include <asm/vmx.h>
42
43 /*
44  * When setting this variable to true it enables Two-Dimensional-Paging
45  * where the hardware walks 2 page tables:
46  * 1. the guest-virtual to guest-physical
47  * 2. while doing 1. it walks guest-physical to host-physical
48  * If the hardware supports that we don't need to do shadow paging.
49  */
50 bool tdp_enabled = false;
51
52 #undef MMU_DEBUG
53
54 #undef AUDIT
55
56 #ifdef AUDIT
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 #else
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #endif
61
62 #ifdef MMU_DEBUG
63
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66
67 #else
68
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
71
72 #endif
73
74 #if defined(MMU_DEBUG) || defined(AUDIT)
75 static int dbg = 0;
76 module_param(dbg, bool, 0644);
77 #endif
78
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
81
82 #ifndef MMU_DEBUG
83 #define ASSERT(x) do { } while (0)
84 #else
85 #define ASSERT(x)                                                       \
86         if (!(x)) {                                                     \
87                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
88                        __FILE__, __LINE__, #x);                         \
89         }
90 #endif
91
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116                                                 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127                                                 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130                                                 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137                                             * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140                         | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK    1
145 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
146 #define ACC_USER_MASK    PT_USER_MASK
147 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159         u64 *sptes[RMAP_EXT];
160         struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164         u64 addr;
165         hpa_t shadow_addr;
166         int level;
167         u64 *sptep;
168         unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
172         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
173              shadow_walk_okay(&(_walker));                      \
174              shadow_walk_next(&(_walker)))
175
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
177
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
181
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
190
191 static inline u64 rsvd_bits(int s, int e)
192 {
193         return ((1ULL << (e - s + 1)) - 1) << s;
194 }
195
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
197 {
198         shadow_trap_nonpresent_pte = trap_pte;
199         shadow_notrap_nonpresent_pte = notrap_pte;
200 }
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
202
203 void kvm_mmu_set_base_ptes(u64 base_pte)
204 {
205         shadow_base_present_pte = base_pte;
206 }
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
208
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
211 {
212         shadow_user_mask = user_mask;
213         shadow_accessed_mask = accessed_mask;
214         shadow_dirty_mask = dirty_mask;
215         shadow_nx_mask = nx_mask;
216         shadow_x_mask = x_mask;
217 }
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
219
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
221 {
222         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
223 }
224
225 static int is_cpuid_PSE36(void)
226 {
227         return 1;
228 }
229
230 static int is_nx(struct kvm_vcpu *vcpu)
231 {
232         return vcpu->arch.efer & EFER_NX;
233 }
234
235 static int is_shadow_present_pte(u64 pte)
236 {
237         return pte != shadow_trap_nonpresent_pte
238                 && pte != shadow_notrap_nonpresent_pte;
239 }
240
241 static int is_large_pte(u64 pte)
242 {
243         return pte & PT_PAGE_SIZE_MASK;
244 }
245
246 static int is_writable_pte(unsigned long pte)
247 {
248         return pte & PT_WRITABLE_MASK;
249 }
250
251 static int is_dirty_gpte(unsigned long pte)
252 {
253         return pte & PT_DIRTY_MASK;
254 }
255
256 static int is_rmap_spte(u64 pte)
257 {
258         return is_shadow_present_pte(pte);
259 }
260
261 static int is_last_spte(u64 pte, int level)
262 {
263         if (level == PT_PAGE_TABLE_LEVEL)
264                 return 1;
265         if (is_large_pte(pte))
266                 return 1;
267         return 0;
268 }
269
270 static pfn_t spte_to_pfn(u64 pte)
271 {
272         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
273 }
274
275 static gfn_t pse36_gfn_delta(u32 gpte)
276 {
277         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
278
279         return (gpte & PT32_DIR_PSE36_MASK) << shift;
280 }
281
282 static void __set_spte(u64 *sptep, u64 spte)
283 {
284 #ifdef CONFIG_X86_64
285         set_64bit((unsigned long *)sptep, spte);
286 #else
287         set_64bit((unsigned long long *)sptep, spte);
288 #endif
289 }
290
291 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
292 {
293 #ifdef CONFIG_X86_64
294         return xchg(sptep, new_spte);
295 #else
296         u64 old_spte;
297
298         do {
299                 old_spte = *sptep;
300         } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
301
302         return old_spte;
303 #endif
304 }
305
306 static void update_spte(u64 *sptep, u64 new_spte)
307 {
308         u64 old_spte;
309
310         if (!shadow_accessed_mask || (new_spte & shadow_accessed_mask)) {
311                 __set_spte(sptep, new_spte);
312         } else {
313                 old_spte = __xchg_spte(sptep, new_spte);
314                 if (old_spte & shadow_accessed_mask)
315                         mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
316         }
317 }
318
319 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
320                                   struct kmem_cache *base_cache, int min)
321 {
322         void *obj;
323
324         if (cache->nobjs >= min)
325                 return 0;
326         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
327                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
328                 if (!obj)
329                         return -ENOMEM;
330                 cache->objects[cache->nobjs++] = obj;
331         }
332         return 0;
333 }
334
335 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
336                                   struct kmem_cache *cache)
337 {
338         while (mc->nobjs)
339                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
340 }
341
342 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
343                                        int min)
344 {
345         struct page *page;
346
347         if (cache->nobjs >= min)
348                 return 0;
349         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
350                 page = alloc_page(GFP_KERNEL);
351                 if (!page)
352                         return -ENOMEM;
353                 cache->objects[cache->nobjs++] = page_address(page);
354         }
355         return 0;
356 }
357
358 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
359 {
360         while (mc->nobjs)
361                 free_page((unsigned long)mc->objects[--mc->nobjs]);
362 }
363
364 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
365 {
366         int r;
367
368         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
369                                    pte_chain_cache, 4);
370         if (r)
371                 goto out;
372         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
373                                    rmap_desc_cache, 4);
374         if (r)
375                 goto out;
376         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
377         if (r)
378                 goto out;
379         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
380                                    mmu_page_header_cache, 4);
381 out:
382         return r;
383 }
384
385 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
386 {
387         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
388         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
389         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
390         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
391                                 mmu_page_header_cache);
392 }
393
394 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
395                                     size_t size)
396 {
397         void *p;
398
399         BUG_ON(!mc->nobjs);
400         p = mc->objects[--mc->nobjs];
401         return p;
402 }
403
404 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
405 {
406         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
407                                       sizeof(struct kvm_pte_chain));
408 }
409
410 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
411 {
412         kmem_cache_free(pte_chain_cache, pc);
413 }
414
415 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
416 {
417         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
418                                       sizeof(struct kvm_rmap_desc));
419 }
420
421 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
422 {
423         kmem_cache_free(rmap_desc_cache, rd);
424 }
425
426 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
427 {
428         if (!sp->role.direct)
429                 return sp->gfns[index];
430
431         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
432 }
433
434 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
435 {
436         if (sp->role.direct)
437                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
438         else
439                 sp->gfns[index] = gfn;
440 }
441
442 /*
443  * Return the pointer to the largepage write count for a given
444  * gfn, handling slots that are not large page aligned.
445  */
446 static int *slot_largepage_idx(gfn_t gfn,
447                                struct kvm_memory_slot *slot,
448                                int level)
449 {
450         unsigned long idx;
451
452         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
453               (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
454         return &slot->lpage_info[level - 2][idx].write_count;
455 }
456
457 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
458 {
459         struct kvm_memory_slot *slot;
460         int *write_count;
461         int i;
462
463         slot = gfn_to_memslot(kvm, gfn);
464         for (i = PT_DIRECTORY_LEVEL;
465              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
466                 write_count   = slot_largepage_idx(gfn, slot, i);
467                 *write_count += 1;
468         }
469 }
470
471 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
472 {
473         struct kvm_memory_slot *slot;
474         int *write_count;
475         int i;
476
477         slot = gfn_to_memslot(kvm, gfn);
478         for (i = PT_DIRECTORY_LEVEL;
479              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
480                 write_count   = slot_largepage_idx(gfn, slot, i);
481                 *write_count -= 1;
482                 WARN_ON(*write_count < 0);
483         }
484 }
485
486 static int has_wrprotected_page(struct kvm *kvm,
487                                 gfn_t gfn,
488                                 int level)
489 {
490         struct kvm_memory_slot *slot;
491         int *largepage_idx;
492
493         slot = gfn_to_memslot(kvm, gfn);
494         if (slot) {
495                 largepage_idx = slot_largepage_idx(gfn, slot, level);
496                 return *largepage_idx;
497         }
498
499         return 1;
500 }
501
502 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
503 {
504         unsigned long page_size;
505         int i, ret = 0;
506
507         page_size = kvm_host_page_size(kvm, gfn);
508
509         for (i = PT_PAGE_TABLE_LEVEL;
510              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
511                 if (page_size >= KVM_HPAGE_SIZE(i))
512                         ret = i;
513                 else
514                         break;
515         }
516
517         return ret;
518 }
519
520 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
521 {
522         struct kvm_memory_slot *slot;
523         int host_level, level, max_level;
524
525         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
526         if (slot && slot->dirty_bitmap)
527                 return PT_PAGE_TABLE_LEVEL;
528
529         host_level = host_mapping_level(vcpu->kvm, large_gfn);
530
531         if (host_level == PT_PAGE_TABLE_LEVEL)
532                 return host_level;
533
534         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
535                 kvm_x86_ops->get_lpage_level() : host_level;
536
537         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
538                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
539                         break;
540
541         return level - 1;
542 }
543
544 /*
545  * Take gfn and return the reverse mapping to it.
546  */
547
548 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
549 {
550         struct kvm_memory_slot *slot;
551         unsigned long idx;
552
553         slot = gfn_to_memslot(kvm, gfn);
554         if (likely(level == PT_PAGE_TABLE_LEVEL))
555                 return &slot->rmap[gfn - slot->base_gfn];
556
557         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
558                 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
559
560         return &slot->lpage_info[level - 2][idx].rmap_pde;
561 }
562
563 /*
564  * Reverse mapping data structures:
565  *
566  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
567  * that points to page_address(page).
568  *
569  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
570  * containing more mappings.
571  *
572  * Returns the number of rmap entries before the spte was added or zero if
573  * the spte was not added.
574  *
575  */
576 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
577 {
578         struct kvm_mmu_page *sp;
579         struct kvm_rmap_desc *desc;
580         unsigned long *rmapp;
581         int i, count = 0;
582
583         if (!is_rmap_spte(*spte))
584                 return count;
585         sp = page_header(__pa(spte));
586         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
587         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
588         if (!*rmapp) {
589                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
590                 *rmapp = (unsigned long)spte;
591         } else if (!(*rmapp & 1)) {
592                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
593                 desc = mmu_alloc_rmap_desc(vcpu);
594                 desc->sptes[0] = (u64 *)*rmapp;
595                 desc->sptes[1] = spte;
596                 *rmapp = (unsigned long)desc | 1;
597         } else {
598                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
599                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
600                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
601                         desc = desc->more;
602                         count += RMAP_EXT;
603                 }
604                 if (desc->sptes[RMAP_EXT-1]) {
605                         desc->more = mmu_alloc_rmap_desc(vcpu);
606                         desc = desc->more;
607                 }
608                 for (i = 0; desc->sptes[i]; ++i)
609                         ;
610                 desc->sptes[i] = spte;
611         }
612         return count;
613 }
614
615 static void rmap_desc_remove_entry(unsigned long *rmapp,
616                                    struct kvm_rmap_desc *desc,
617                                    int i,
618                                    struct kvm_rmap_desc *prev_desc)
619 {
620         int j;
621
622         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
623                 ;
624         desc->sptes[i] = desc->sptes[j];
625         desc->sptes[j] = NULL;
626         if (j != 0)
627                 return;
628         if (!prev_desc && !desc->more)
629                 *rmapp = (unsigned long)desc->sptes[0];
630         else
631                 if (prev_desc)
632                         prev_desc->more = desc->more;
633                 else
634                         *rmapp = (unsigned long)desc->more | 1;
635         mmu_free_rmap_desc(desc);
636 }
637
638 static void rmap_remove(struct kvm *kvm, u64 *spte)
639 {
640         struct kvm_rmap_desc *desc;
641         struct kvm_rmap_desc *prev_desc;
642         struct kvm_mmu_page *sp;
643         gfn_t gfn;
644         unsigned long *rmapp;
645         int i;
646
647         sp = page_header(__pa(spte));
648         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
649         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
650         if (!*rmapp) {
651                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
652                 BUG();
653         } else if (!(*rmapp & 1)) {
654                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
655                 if ((u64 *)*rmapp != spte) {
656                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
657                                spte, *spte);
658                         BUG();
659                 }
660                 *rmapp = 0;
661         } else {
662                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
663                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
664                 prev_desc = NULL;
665                 while (desc) {
666                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
667                                 if (desc->sptes[i] == spte) {
668                                         rmap_desc_remove_entry(rmapp,
669                                                                desc, i,
670                                                                prev_desc);
671                                         return;
672                                 }
673                         prev_desc = desc;
674                         desc = desc->more;
675                 }
676                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
677                 BUG();
678         }
679 }
680
681 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
682 {
683         pfn_t pfn;
684         u64 old_spte;
685
686         old_spte = __xchg_spte(sptep, new_spte);
687         if (!is_rmap_spte(old_spte))
688                 return;
689         pfn = spte_to_pfn(old_spte);
690         if (old_spte & shadow_accessed_mask)
691                 kvm_set_pfn_accessed(pfn);
692         if (is_writable_pte(old_spte))
693                 kvm_set_pfn_dirty(pfn);
694         rmap_remove(kvm, sptep);
695 }
696
697 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
698 {
699         struct kvm_rmap_desc *desc;
700         u64 *prev_spte;
701         int i;
702
703         if (!*rmapp)
704                 return NULL;
705         else if (!(*rmapp & 1)) {
706                 if (!spte)
707                         return (u64 *)*rmapp;
708                 return NULL;
709         }
710         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
711         prev_spte = NULL;
712         while (desc) {
713                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
714                         if (prev_spte == spte)
715                                 return desc->sptes[i];
716                         prev_spte = desc->sptes[i];
717                 }
718                 desc = desc->more;
719         }
720         return NULL;
721 }
722
723 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
724 {
725         unsigned long *rmapp;
726         u64 *spte;
727         int i, write_protected = 0;
728
729         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
730
731         spte = rmap_next(kvm, rmapp, NULL);
732         while (spte) {
733                 BUG_ON(!spte);
734                 BUG_ON(!(*spte & PT_PRESENT_MASK));
735                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
736                 if (is_writable_pte(*spte)) {
737                         update_spte(spte, *spte & ~PT_WRITABLE_MASK);
738                         write_protected = 1;
739                 }
740                 spte = rmap_next(kvm, rmapp, spte);
741         }
742         if (write_protected) {
743                 pfn_t pfn;
744
745                 spte = rmap_next(kvm, rmapp, NULL);
746                 pfn = spte_to_pfn(*spte);
747                 kvm_set_pfn_dirty(pfn);
748         }
749
750         /* check for huge page mappings */
751         for (i = PT_DIRECTORY_LEVEL;
752              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
753                 rmapp = gfn_to_rmap(kvm, gfn, i);
754                 spte = rmap_next(kvm, rmapp, NULL);
755                 while (spte) {
756                         BUG_ON(!spte);
757                         BUG_ON(!(*spte & PT_PRESENT_MASK));
758                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
759                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
760                         if (is_writable_pte(*spte)) {
761                                 drop_spte(kvm, spte,
762                                           shadow_trap_nonpresent_pte);
763                                 --kvm->stat.lpages;
764                                 spte = NULL;
765                                 write_protected = 1;
766                         }
767                         spte = rmap_next(kvm, rmapp, spte);
768                 }
769         }
770
771         return write_protected;
772 }
773
774 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
775                            unsigned long data)
776 {
777         u64 *spte;
778         int need_tlb_flush = 0;
779
780         while ((spte = rmap_next(kvm, rmapp, NULL))) {
781                 BUG_ON(!(*spte & PT_PRESENT_MASK));
782                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
783                 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
784                 need_tlb_flush = 1;
785         }
786         return need_tlb_flush;
787 }
788
789 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
790                              unsigned long data)
791 {
792         int need_flush = 0;
793         u64 *spte, new_spte, old_spte;
794         pte_t *ptep = (pte_t *)data;
795         pfn_t new_pfn;
796
797         WARN_ON(pte_huge(*ptep));
798         new_pfn = pte_pfn(*ptep);
799         spte = rmap_next(kvm, rmapp, NULL);
800         while (spte) {
801                 BUG_ON(!is_shadow_present_pte(*spte));
802                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
803                 need_flush = 1;
804                 if (pte_write(*ptep)) {
805                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
806                         spte = rmap_next(kvm, rmapp, NULL);
807                 } else {
808                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
809                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
810
811                         new_spte &= ~PT_WRITABLE_MASK;
812                         new_spte &= ~SPTE_HOST_WRITEABLE;
813                         new_spte &= ~shadow_accessed_mask;
814                         if (is_writable_pte(*spte))
815                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
816                         old_spte = __xchg_spte(spte, new_spte);
817                         if (is_shadow_present_pte(old_spte)
818                             && (old_spte & shadow_accessed_mask))
819                                 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
820                         spte = rmap_next(kvm, rmapp, spte);
821                 }
822         }
823         if (need_flush)
824                 kvm_flush_remote_tlbs(kvm);
825
826         return 0;
827 }
828
829 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
830                           unsigned long data,
831                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
832                                          unsigned long data))
833 {
834         int i, j;
835         int ret;
836         int retval = 0;
837         struct kvm_memslots *slots;
838
839         slots = kvm_memslots(kvm);
840
841         for (i = 0; i < slots->nmemslots; i++) {
842                 struct kvm_memory_slot *memslot = &slots->memslots[i];
843                 unsigned long start = memslot->userspace_addr;
844                 unsigned long end;
845
846                 end = start + (memslot->npages << PAGE_SHIFT);
847                 if (hva >= start && hva < end) {
848                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
849
850                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
851
852                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
853                                 int idx = gfn_offset;
854                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
855                                 ret |= handler(kvm,
856                                         &memslot->lpage_info[j][idx].rmap_pde,
857                                         data);
858                         }
859                         trace_kvm_age_page(hva, memslot, ret);
860                         retval |= ret;
861                 }
862         }
863
864         return retval;
865 }
866
867 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
868 {
869         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
870 }
871
872 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
873 {
874         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
875 }
876
877 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
878                          unsigned long data)
879 {
880         u64 *spte;
881         int young = 0;
882
883         /*
884          * Emulate the accessed bit for EPT, by checking if this page has
885          * an EPT mapping, and clearing it if it does. On the next access,
886          * a new EPT mapping will be established.
887          * This has some overhead, but not as much as the cost of swapping
888          * out actively used pages or breaking up actively used hugepages.
889          */
890         if (!shadow_accessed_mask)
891                 return kvm_unmap_rmapp(kvm, rmapp, data);
892
893         spte = rmap_next(kvm, rmapp, NULL);
894         while (spte) {
895                 int _young;
896                 u64 _spte = *spte;
897                 BUG_ON(!(_spte & PT_PRESENT_MASK));
898                 _young = _spte & PT_ACCESSED_MASK;
899                 if (_young) {
900                         young = 1;
901                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
902                 }
903                 spte = rmap_next(kvm, rmapp, spte);
904         }
905         return young;
906 }
907
908 #define RMAP_RECYCLE_THRESHOLD 1000
909
910 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
911 {
912         unsigned long *rmapp;
913         struct kvm_mmu_page *sp;
914
915         sp = page_header(__pa(spte));
916
917         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
918
919         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
920         kvm_flush_remote_tlbs(vcpu->kvm);
921 }
922
923 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
924 {
925         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
926 }
927
928 #ifdef MMU_DEBUG
929 static int is_empty_shadow_page(u64 *spt)
930 {
931         u64 *pos;
932         u64 *end;
933
934         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
935                 if (is_shadow_present_pte(*pos)) {
936                         printk(KERN_ERR "%s: %p %llx\n", __func__,
937                                pos, *pos);
938                         return 0;
939                 }
940         return 1;
941 }
942 #endif
943
944 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
945 {
946         ASSERT(is_empty_shadow_page(sp->spt));
947         hlist_del(&sp->hash_link);
948         list_del(&sp->link);
949         __free_page(virt_to_page(sp->spt));
950         if (!sp->role.direct)
951                 __free_page(virt_to_page(sp->gfns));
952         kmem_cache_free(mmu_page_header_cache, sp);
953         ++kvm->arch.n_free_mmu_pages;
954 }
955
956 static unsigned kvm_page_table_hashfn(gfn_t gfn)
957 {
958         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
959 }
960
961 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
962                                                u64 *parent_pte, int direct)
963 {
964         struct kvm_mmu_page *sp;
965
966         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
967         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
968         if (!direct)
969                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
970                                                   PAGE_SIZE);
971         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
972         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
973         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
974         sp->multimapped = 0;
975         sp->parent_pte = parent_pte;
976         --vcpu->kvm->arch.n_free_mmu_pages;
977         return sp;
978 }
979
980 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
981                                     struct kvm_mmu_page *sp, u64 *parent_pte)
982 {
983         struct kvm_pte_chain *pte_chain;
984         struct hlist_node *node;
985         int i;
986
987         if (!parent_pte)
988                 return;
989         if (!sp->multimapped) {
990                 u64 *old = sp->parent_pte;
991
992                 if (!old) {
993                         sp->parent_pte = parent_pte;
994                         return;
995                 }
996                 sp->multimapped = 1;
997                 pte_chain = mmu_alloc_pte_chain(vcpu);
998                 INIT_HLIST_HEAD(&sp->parent_ptes);
999                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1000                 pte_chain->parent_ptes[0] = old;
1001         }
1002         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1003                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1004                         continue;
1005                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1006                         if (!pte_chain->parent_ptes[i]) {
1007                                 pte_chain->parent_ptes[i] = parent_pte;
1008                                 return;
1009                         }
1010         }
1011         pte_chain = mmu_alloc_pte_chain(vcpu);
1012         BUG_ON(!pte_chain);
1013         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1014         pte_chain->parent_ptes[0] = parent_pte;
1015 }
1016
1017 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1018                                        u64 *parent_pte)
1019 {
1020         struct kvm_pte_chain *pte_chain;
1021         struct hlist_node *node;
1022         int i;
1023
1024         if (!sp->multimapped) {
1025                 BUG_ON(sp->parent_pte != parent_pte);
1026                 sp->parent_pte = NULL;
1027                 return;
1028         }
1029         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1030                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1031                         if (!pte_chain->parent_ptes[i])
1032                                 break;
1033                         if (pte_chain->parent_ptes[i] != parent_pte)
1034                                 continue;
1035                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
1036                                 && pte_chain->parent_ptes[i + 1]) {
1037                                 pte_chain->parent_ptes[i]
1038                                         = pte_chain->parent_ptes[i + 1];
1039                                 ++i;
1040                         }
1041                         pte_chain->parent_ptes[i] = NULL;
1042                         if (i == 0) {
1043                                 hlist_del(&pte_chain->link);
1044                                 mmu_free_pte_chain(pte_chain);
1045                                 if (hlist_empty(&sp->parent_ptes)) {
1046                                         sp->multimapped = 0;
1047                                         sp->parent_pte = NULL;
1048                                 }
1049                         }
1050                         return;
1051                 }
1052         BUG();
1053 }
1054
1055 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1056 {
1057         struct kvm_pte_chain *pte_chain;
1058         struct hlist_node *node;
1059         struct kvm_mmu_page *parent_sp;
1060         int i;
1061
1062         if (!sp->multimapped && sp->parent_pte) {
1063                 parent_sp = page_header(__pa(sp->parent_pte));
1064                 fn(parent_sp, sp->parent_pte);
1065                 return;
1066         }
1067
1068         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1069                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1070                         u64 *spte = pte_chain->parent_ptes[i];
1071
1072                         if (!spte)
1073                                 break;
1074                         parent_sp = page_header(__pa(spte));
1075                         fn(parent_sp, spte);
1076                 }
1077 }
1078
1079 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1080 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1081 {
1082         mmu_parent_walk(sp, mark_unsync);
1083 }
1084
1085 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1086 {
1087         unsigned int index;
1088
1089         index = spte - sp->spt;
1090         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1091                 return;
1092         if (sp->unsync_children++)
1093                 return;
1094         kvm_mmu_mark_parents_unsync(sp);
1095 }
1096
1097 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1098                                     struct kvm_mmu_page *sp)
1099 {
1100         int i;
1101
1102         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1103                 sp->spt[i] = shadow_trap_nonpresent_pte;
1104 }
1105
1106 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1107                                struct kvm_mmu_page *sp, bool clear_unsync)
1108 {
1109         return 1;
1110 }
1111
1112 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1113 {
1114 }
1115
1116 #define KVM_PAGE_ARRAY_NR 16
1117
1118 struct kvm_mmu_pages {
1119         struct mmu_page_and_offset {
1120                 struct kvm_mmu_page *sp;
1121                 unsigned int idx;
1122         } page[KVM_PAGE_ARRAY_NR];
1123         unsigned int nr;
1124 };
1125
1126 #define for_each_unsync_children(bitmap, idx)           \
1127         for (idx = find_first_bit(bitmap, 512);         \
1128              idx < 512;                                 \
1129              idx = find_next_bit(bitmap, 512, idx+1))
1130
1131 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1132                          int idx)
1133 {
1134         int i;
1135
1136         if (sp->unsync)
1137                 for (i=0; i < pvec->nr; i++)
1138                         if (pvec->page[i].sp == sp)
1139                                 return 0;
1140
1141         pvec->page[pvec->nr].sp = sp;
1142         pvec->page[pvec->nr].idx = idx;
1143         pvec->nr++;
1144         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1145 }
1146
1147 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1148                            struct kvm_mmu_pages *pvec)
1149 {
1150         int i, ret, nr_unsync_leaf = 0;
1151
1152         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1153                 struct kvm_mmu_page *child;
1154                 u64 ent = sp->spt[i];
1155
1156                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1157                         goto clear_child_bitmap;
1158
1159                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1160
1161                 if (child->unsync_children) {
1162                         if (mmu_pages_add(pvec, child, i))
1163                                 return -ENOSPC;
1164
1165                         ret = __mmu_unsync_walk(child, pvec);
1166                         if (!ret)
1167                                 goto clear_child_bitmap;
1168                         else if (ret > 0)
1169                                 nr_unsync_leaf += ret;
1170                         else
1171                                 return ret;
1172                 } else if (child->unsync) {
1173                         nr_unsync_leaf++;
1174                         if (mmu_pages_add(pvec, child, i))
1175                                 return -ENOSPC;
1176                 } else
1177                          goto clear_child_bitmap;
1178
1179                 continue;
1180
1181 clear_child_bitmap:
1182                 __clear_bit(i, sp->unsync_child_bitmap);
1183                 sp->unsync_children--;
1184                 WARN_ON((int)sp->unsync_children < 0);
1185         }
1186
1187
1188         return nr_unsync_leaf;
1189 }
1190
1191 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1192                            struct kvm_mmu_pages *pvec)
1193 {
1194         if (!sp->unsync_children)
1195                 return 0;
1196
1197         mmu_pages_add(pvec, sp, 0);
1198         return __mmu_unsync_walk(sp, pvec);
1199 }
1200
1201 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1202 {
1203         WARN_ON(!sp->unsync);
1204         trace_kvm_mmu_sync_page(sp);
1205         sp->unsync = 0;
1206         --kvm->stat.mmu_unsync;
1207 }
1208
1209 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1210                                     struct list_head *invalid_list);
1211 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1212                                     struct list_head *invalid_list);
1213
1214 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1215   hlist_for_each_entry(sp, pos,                                         \
1216    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1217         if ((sp)->gfn != (gfn)) {} else
1218
1219 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1220   hlist_for_each_entry(sp, pos,                                         \
1221    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1222                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1223                         (sp)->role.invalid) {} else
1224
1225 /* @sp->gfn should be write-protected at the call site */
1226 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1227                            struct list_head *invalid_list, bool clear_unsync)
1228 {
1229         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1230                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1231                 return 1;
1232         }
1233
1234         if (clear_unsync)
1235                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1236
1237         if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1238                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1239                 return 1;
1240         }
1241
1242         kvm_mmu_flush_tlb(vcpu);
1243         return 0;
1244 }
1245
1246 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1247                                    struct kvm_mmu_page *sp)
1248 {
1249         LIST_HEAD(invalid_list);
1250         int ret;
1251
1252         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1253         if (ret)
1254                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1255
1256         return ret;
1257 }
1258
1259 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1260                          struct list_head *invalid_list)
1261 {
1262         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1263 }
1264
1265 /* @gfn should be write-protected at the call site */
1266 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1267 {
1268         struct kvm_mmu_page *s;
1269         struct hlist_node *node;
1270         LIST_HEAD(invalid_list);
1271         bool flush = false;
1272
1273         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1274                 if (!s->unsync)
1275                         continue;
1276
1277                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1278                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1279                         (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1280                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1281                         continue;
1282                 }
1283                 kvm_unlink_unsync_page(vcpu->kvm, s);
1284                 flush = true;
1285         }
1286
1287         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1288         if (flush)
1289                 kvm_mmu_flush_tlb(vcpu);
1290 }
1291
1292 struct mmu_page_path {
1293         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1294         unsigned int idx[PT64_ROOT_LEVEL-1];
1295 };
1296
1297 #define for_each_sp(pvec, sp, parents, i)                       \
1298                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1299                         sp = pvec.page[i].sp;                   \
1300                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1301                         i = mmu_pages_next(&pvec, &parents, i))
1302
1303 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1304                           struct mmu_page_path *parents,
1305                           int i)
1306 {
1307         int n;
1308
1309         for (n = i+1; n < pvec->nr; n++) {
1310                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1311
1312                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1313                         parents->idx[0] = pvec->page[n].idx;
1314                         return n;
1315                 }
1316
1317                 parents->parent[sp->role.level-2] = sp;
1318                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1319         }
1320
1321         return n;
1322 }
1323
1324 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1325 {
1326         struct kvm_mmu_page *sp;
1327         unsigned int level = 0;
1328
1329         do {
1330                 unsigned int idx = parents->idx[level];
1331
1332                 sp = parents->parent[level];
1333                 if (!sp)
1334                         return;
1335
1336                 --sp->unsync_children;
1337                 WARN_ON((int)sp->unsync_children < 0);
1338                 __clear_bit(idx, sp->unsync_child_bitmap);
1339                 level++;
1340         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1341 }
1342
1343 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1344                                struct mmu_page_path *parents,
1345                                struct kvm_mmu_pages *pvec)
1346 {
1347         parents->parent[parent->role.level-1] = NULL;
1348         pvec->nr = 0;
1349 }
1350
1351 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1352                               struct kvm_mmu_page *parent)
1353 {
1354         int i;
1355         struct kvm_mmu_page *sp;
1356         struct mmu_page_path parents;
1357         struct kvm_mmu_pages pages;
1358         LIST_HEAD(invalid_list);
1359
1360         kvm_mmu_pages_init(parent, &parents, &pages);
1361         while (mmu_unsync_walk(parent, &pages)) {
1362                 int protected = 0;
1363
1364                 for_each_sp(pages, sp, parents, i)
1365                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1366
1367                 if (protected)
1368                         kvm_flush_remote_tlbs(vcpu->kvm);
1369
1370                 for_each_sp(pages, sp, parents, i) {
1371                         kvm_sync_page(vcpu, sp, &invalid_list);
1372                         mmu_pages_clear_parents(&parents);
1373                 }
1374                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1375                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1376                 kvm_mmu_pages_init(parent, &parents, &pages);
1377         }
1378 }
1379
1380 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1381                                              gfn_t gfn,
1382                                              gva_t gaddr,
1383                                              unsigned level,
1384                                              int direct,
1385                                              unsigned access,
1386                                              u64 *parent_pte)
1387 {
1388         union kvm_mmu_page_role role;
1389         unsigned quadrant;
1390         struct kvm_mmu_page *sp;
1391         struct hlist_node *node;
1392         bool need_sync = false;
1393
1394         role = vcpu->arch.mmu.base_role;
1395         role.level = level;
1396         role.direct = direct;
1397         if (role.direct)
1398                 role.cr4_pae = 0;
1399         role.access = access;
1400         if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1401                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1402                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1403                 role.quadrant = quadrant;
1404         }
1405         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1406                 if (!need_sync && sp->unsync)
1407                         need_sync = true;
1408
1409                 if (sp->role.word != role.word)
1410                         continue;
1411
1412                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1413                         break;
1414
1415                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1416                 if (sp->unsync_children) {
1417                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1418                         kvm_mmu_mark_parents_unsync(sp);
1419                 } else if (sp->unsync)
1420                         kvm_mmu_mark_parents_unsync(sp);
1421
1422                 trace_kvm_mmu_get_page(sp, false);
1423                 return sp;
1424         }
1425         ++vcpu->kvm->stat.mmu_cache_miss;
1426         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1427         if (!sp)
1428                 return sp;
1429         sp->gfn = gfn;
1430         sp->role = role;
1431         hlist_add_head(&sp->hash_link,
1432                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1433         if (!direct) {
1434                 if (rmap_write_protect(vcpu->kvm, gfn))
1435                         kvm_flush_remote_tlbs(vcpu->kvm);
1436                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1437                         kvm_sync_pages(vcpu, gfn);
1438
1439                 account_shadowed(vcpu->kvm, gfn);
1440         }
1441         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1442                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1443         else
1444                 nonpaging_prefetch_page(vcpu, sp);
1445         trace_kvm_mmu_get_page(sp, true);
1446         return sp;
1447 }
1448
1449 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1450                              struct kvm_vcpu *vcpu, u64 addr)
1451 {
1452         iterator->addr = addr;
1453         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1454         iterator->level = vcpu->arch.mmu.shadow_root_level;
1455         if (iterator->level == PT32E_ROOT_LEVEL) {
1456                 iterator->shadow_addr
1457                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1458                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1459                 --iterator->level;
1460                 if (!iterator->shadow_addr)
1461                         iterator->level = 0;
1462         }
1463 }
1464
1465 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1466 {
1467         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1468                 return false;
1469
1470         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1471                 if (is_large_pte(*iterator->sptep))
1472                         return false;
1473
1474         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1475         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1476         return true;
1477 }
1478
1479 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1480 {
1481         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1482         --iterator->level;
1483 }
1484
1485 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1486 {
1487         u64 spte;
1488
1489         spte = __pa(sp->spt)
1490                 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1491                 | PT_WRITABLE_MASK | PT_USER_MASK;
1492         __set_spte(sptep, spte);
1493 }
1494
1495 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1496                                          struct kvm_mmu_page *sp)
1497 {
1498         unsigned i;
1499         u64 *pt;
1500         u64 ent;
1501
1502         pt = sp->spt;
1503
1504         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1505                 ent = pt[i];
1506
1507                 if (is_shadow_present_pte(ent)) {
1508                         if (!is_last_spte(ent, sp->role.level)) {
1509                                 ent &= PT64_BASE_ADDR_MASK;
1510                                 mmu_page_remove_parent_pte(page_header(ent),
1511                                                            &pt[i]);
1512                         } else {
1513                                 if (is_large_pte(ent))
1514                                         --kvm->stat.lpages;
1515                                 drop_spte(kvm, &pt[i],
1516                                           shadow_trap_nonpresent_pte);
1517                         }
1518                 }
1519                 pt[i] = shadow_trap_nonpresent_pte;
1520         }
1521 }
1522
1523 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1524 {
1525         mmu_page_remove_parent_pte(sp, parent_pte);
1526 }
1527
1528 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1529 {
1530         int i;
1531         struct kvm_vcpu *vcpu;
1532
1533         kvm_for_each_vcpu(i, vcpu, kvm)
1534                 vcpu->arch.last_pte_updated = NULL;
1535 }
1536
1537 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1538 {
1539         u64 *parent_pte;
1540
1541         while (sp->multimapped || sp->parent_pte) {
1542                 if (!sp->multimapped)
1543                         parent_pte = sp->parent_pte;
1544                 else {
1545                         struct kvm_pte_chain *chain;
1546
1547                         chain = container_of(sp->parent_ptes.first,
1548                                              struct kvm_pte_chain, link);
1549                         parent_pte = chain->parent_ptes[0];
1550                 }
1551                 BUG_ON(!parent_pte);
1552                 kvm_mmu_put_page(sp, parent_pte);
1553                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1554         }
1555 }
1556
1557 static int mmu_zap_unsync_children(struct kvm *kvm,
1558                                    struct kvm_mmu_page *parent,
1559                                    struct list_head *invalid_list)
1560 {
1561         int i, zapped = 0;
1562         struct mmu_page_path parents;
1563         struct kvm_mmu_pages pages;
1564
1565         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1566                 return 0;
1567
1568         kvm_mmu_pages_init(parent, &parents, &pages);
1569         while (mmu_unsync_walk(parent, &pages)) {
1570                 struct kvm_mmu_page *sp;
1571
1572                 for_each_sp(pages, sp, parents, i) {
1573                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1574                         mmu_pages_clear_parents(&parents);
1575                         zapped++;
1576                 }
1577                 kvm_mmu_pages_init(parent, &parents, &pages);
1578         }
1579
1580         return zapped;
1581 }
1582
1583 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1584                                     struct list_head *invalid_list)
1585 {
1586         int ret;
1587
1588         trace_kvm_mmu_prepare_zap_page(sp);
1589         ++kvm->stat.mmu_shadow_zapped;
1590         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1591         kvm_mmu_page_unlink_children(kvm, sp);
1592         kvm_mmu_unlink_parents(kvm, sp);
1593         if (!sp->role.invalid && !sp->role.direct)
1594                 unaccount_shadowed(kvm, sp->gfn);
1595         if (sp->unsync)
1596                 kvm_unlink_unsync_page(kvm, sp);
1597         if (!sp->root_count) {
1598                 /* Count self */
1599                 ret++;
1600                 list_move(&sp->link, invalid_list);
1601         } else {
1602                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1603                 kvm_reload_remote_mmus(kvm);
1604         }
1605
1606         sp->role.invalid = 1;
1607         kvm_mmu_reset_last_pte_updated(kvm);
1608         return ret;
1609 }
1610
1611 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1612                                     struct list_head *invalid_list)
1613 {
1614         struct kvm_mmu_page *sp;
1615
1616         if (list_empty(invalid_list))
1617                 return;
1618
1619         kvm_flush_remote_tlbs(kvm);
1620
1621         do {
1622                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1623                 WARN_ON(!sp->role.invalid || sp->root_count);
1624                 kvm_mmu_free_page(kvm, sp);
1625         } while (!list_empty(invalid_list));
1626
1627 }
1628
1629 /*
1630  * Changing the number of mmu pages allocated to the vm
1631  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1632  */
1633 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1634 {
1635         int used_pages;
1636         LIST_HEAD(invalid_list);
1637
1638         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1639         used_pages = max(0, used_pages);
1640
1641         /*
1642          * If we set the number of mmu pages to be smaller be than the
1643          * number of actived pages , we must to free some mmu pages before we
1644          * change the value
1645          */
1646
1647         if (used_pages > kvm_nr_mmu_pages) {
1648                 while (used_pages > kvm_nr_mmu_pages &&
1649                         !list_empty(&kvm->arch.active_mmu_pages)) {
1650                         struct kvm_mmu_page *page;
1651
1652                         page = container_of(kvm->arch.active_mmu_pages.prev,
1653                                             struct kvm_mmu_page, link);
1654                         used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1655                                                                &invalid_list);
1656                 }
1657                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1658                 kvm_nr_mmu_pages = used_pages;
1659                 kvm->arch.n_free_mmu_pages = 0;
1660         }
1661         else
1662                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1663                                          - kvm->arch.n_alloc_mmu_pages;
1664
1665         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1666 }
1667
1668 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1669 {
1670         struct kvm_mmu_page *sp;
1671         struct hlist_node *node;
1672         LIST_HEAD(invalid_list);
1673         int r;
1674
1675         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1676         r = 0;
1677
1678         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1679                 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1680                          sp->role.word);
1681                 r = 1;
1682                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1683         }
1684         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1685         return r;
1686 }
1687
1688 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1689 {
1690         struct kvm_mmu_page *sp;
1691         struct hlist_node *node;
1692         LIST_HEAD(invalid_list);
1693
1694         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1695                 pgprintk("%s: zap %lx %x\n",
1696                          __func__, gfn, sp->role.word);
1697                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1698         }
1699         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1700 }
1701
1702 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1703 {
1704         int slot = memslot_id(kvm, gfn);
1705         struct kvm_mmu_page *sp = page_header(__pa(pte));
1706
1707         __set_bit(slot, sp->slot_bitmap);
1708 }
1709
1710 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1711 {
1712         int i;
1713         u64 *pt = sp->spt;
1714
1715         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1716                 return;
1717
1718         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1719                 if (pt[i] == shadow_notrap_nonpresent_pte)
1720                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1721         }
1722 }
1723
1724 /*
1725  * The function is based on mtrr_type_lookup() in
1726  * arch/x86/kernel/cpu/mtrr/generic.c
1727  */
1728 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1729                          u64 start, u64 end)
1730 {
1731         int i;
1732         u64 base, mask;
1733         u8 prev_match, curr_match;
1734         int num_var_ranges = KVM_NR_VAR_MTRR;
1735
1736         if (!mtrr_state->enabled)
1737                 return 0xFF;
1738
1739         /* Make end inclusive end, instead of exclusive */
1740         end--;
1741
1742         /* Look in fixed ranges. Just return the type as per start */
1743         if (mtrr_state->have_fixed && (start < 0x100000)) {
1744                 int idx;
1745
1746                 if (start < 0x80000) {
1747                         idx = 0;
1748                         idx += (start >> 16);
1749                         return mtrr_state->fixed_ranges[idx];
1750                 } else if (start < 0xC0000) {
1751                         idx = 1 * 8;
1752                         idx += ((start - 0x80000) >> 14);
1753                         return mtrr_state->fixed_ranges[idx];
1754                 } else if (start < 0x1000000) {
1755                         idx = 3 * 8;
1756                         idx += ((start - 0xC0000) >> 12);
1757                         return mtrr_state->fixed_ranges[idx];
1758                 }
1759         }
1760
1761         /*
1762          * Look in variable ranges
1763          * Look of multiple ranges matching this address and pick type
1764          * as per MTRR precedence
1765          */
1766         if (!(mtrr_state->enabled & 2))
1767                 return mtrr_state->def_type;
1768
1769         prev_match = 0xFF;
1770         for (i = 0; i < num_var_ranges; ++i) {
1771                 unsigned short start_state, end_state;
1772
1773                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1774                         continue;
1775
1776                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1777                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1778                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1779                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1780
1781                 start_state = ((start & mask) == (base & mask));
1782                 end_state = ((end & mask) == (base & mask));
1783                 if (start_state != end_state)
1784                         return 0xFE;
1785
1786                 if ((start & mask) != (base & mask))
1787                         continue;
1788
1789                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1790                 if (prev_match == 0xFF) {
1791                         prev_match = curr_match;
1792                         continue;
1793                 }
1794
1795                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1796                     curr_match == MTRR_TYPE_UNCACHABLE)
1797                         return MTRR_TYPE_UNCACHABLE;
1798
1799                 if ((prev_match == MTRR_TYPE_WRBACK &&
1800                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1801                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1802                      curr_match == MTRR_TYPE_WRBACK)) {
1803                         prev_match = MTRR_TYPE_WRTHROUGH;
1804                         curr_match = MTRR_TYPE_WRTHROUGH;
1805                 }
1806
1807                 if (prev_match != curr_match)
1808                         return MTRR_TYPE_UNCACHABLE;
1809         }
1810
1811         if (prev_match != 0xFF)
1812                 return prev_match;
1813
1814         return mtrr_state->def_type;
1815 }
1816
1817 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1818 {
1819         u8 mtrr;
1820
1821         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1822                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1823         if (mtrr == 0xfe || mtrr == 0xff)
1824                 mtrr = MTRR_TYPE_WRBACK;
1825         return mtrr;
1826 }
1827 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1828
1829 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1830 {
1831         trace_kvm_mmu_unsync_page(sp);
1832         ++vcpu->kvm->stat.mmu_unsync;
1833         sp->unsync = 1;
1834
1835         kvm_mmu_mark_parents_unsync(sp);
1836         mmu_convert_notrap(sp);
1837 }
1838
1839 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1840 {
1841         struct kvm_mmu_page *s;
1842         struct hlist_node *node;
1843
1844         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1845                 if (s->unsync)
1846                         continue;
1847                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1848                 __kvm_unsync_page(vcpu, s);
1849         }
1850 }
1851
1852 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1853                                   bool can_unsync)
1854 {
1855         struct kvm_mmu_page *s;
1856         struct hlist_node *node;
1857         bool need_unsync = false;
1858
1859         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1860                 if (!can_unsync)
1861                         return 1;
1862
1863                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1864                         return 1;
1865
1866                 if (!need_unsync && !s->unsync) {
1867                         if (!oos_shadow)
1868                                 return 1;
1869                         need_unsync = true;
1870                 }
1871         }
1872         if (need_unsync)
1873                 kvm_unsync_pages(vcpu, gfn);
1874         return 0;
1875 }
1876
1877 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1878                     unsigned pte_access, int user_fault,
1879                     int write_fault, int dirty, int level,
1880                     gfn_t gfn, pfn_t pfn, bool speculative,
1881                     bool can_unsync, bool reset_host_protection)
1882 {
1883         u64 spte;
1884         int ret = 0;
1885
1886         /*
1887          * We don't set the accessed bit, since we sometimes want to see
1888          * whether the guest actually used the pte (in order to detect
1889          * demand paging).
1890          */
1891         spte = shadow_base_present_pte | shadow_dirty_mask;
1892         if (!speculative)
1893                 spte |= shadow_accessed_mask;
1894         if (!dirty)
1895                 pte_access &= ~ACC_WRITE_MASK;
1896         if (pte_access & ACC_EXEC_MASK)
1897                 spte |= shadow_x_mask;
1898         else
1899                 spte |= shadow_nx_mask;
1900         if (pte_access & ACC_USER_MASK)
1901                 spte |= shadow_user_mask;
1902         if (level > PT_PAGE_TABLE_LEVEL)
1903                 spte |= PT_PAGE_SIZE_MASK;
1904         if (tdp_enabled)
1905                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1906                         kvm_is_mmio_pfn(pfn));
1907
1908         if (reset_host_protection)
1909                 spte |= SPTE_HOST_WRITEABLE;
1910
1911         spte |= (u64)pfn << PAGE_SHIFT;
1912
1913         if ((pte_access & ACC_WRITE_MASK)
1914             || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1915                 && !user_fault)) {
1916
1917                 if (level > PT_PAGE_TABLE_LEVEL &&
1918                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1919                         ret = 1;
1920                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1921                         goto done;
1922                 }
1923
1924                 spte |= PT_WRITABLE_MASK;
1925
1926                 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1927                         spte &= ~PT_USER_MASK;
1928
1929                 /*
1930                  * Optimization: for pte sync, if spte was writable the hash
1931                  * lookup is unnecessary (and expensive). Write protection
1932                  * is responsibility of mmu_get_page / kvm_sync_page.
1933                  * Same reasoning can be applied to dirty page accounting.
1934                  */
1935                 if (!can_unsync && is_writable_pte(*sptep))
1936                         goto set_pte;
1937
1938                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1939                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1940                                  __func__, gfn);
1941                         ret = 1;
1942                         pte_access &= ~ACC_WRITE_MASK;
1943                         if (is_writable_pte(spte))
1944                                 spte &= ~PT_WRITABLE_MASK;
1945                 }
1946         }
1947
1948         if (pte_access & ACC_WRITE_MASK)
1949                 mark_page_dirty(vcpu->kvm, gfn);
1950
1951 set_pte:
1952         update_spte(sptep, spte);
1953 done:
1954         return ret;
1955 }
1956
1957 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1958                          unsigned pt_access, unsigned pte_access,
1959                          int user_fault, int write_fault, int dirty,
1960                          int *ptwrite, int level, gfn_t gfn,
1961                          pfn_t pfn, bool speculative,
1962                          bool reset_host_protection)
1963 {
1964         int was_rmapped = 0;
1965         int was_writable = is_writable_pte(*sptep);
1966         int rmap_count;
1967
1968         pgprintk("%s: spte %llx access %x write_fault %d"
1969                  " user_fault %d gfn %lx\n",
1970                  __func__, *sptep, pt_access,
1971                  write_fault, user_fault, gfn);
1972
1973         if (is_rmap_spte(*sptep)) {
1974                 /*
1975                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1976                  * the parent of the now unreachable PTE.
1977                  */
1978                 if (level > PT_PAGE_TABLE_LEVEL &&
1979                     !is_large_pte(*sptep)) {
1980                         struct kvm_mmu_page *child;
1981                         u64 pte = *sptep;
1982
1983                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1984                         mmu_page_remove_parent_pte(child, sptep);
1985                         __set_spte(sptep, shadow_trap_nonpresent_pte);
1986                         kvm_flush_remote_tlbs(vcpu->kvm);
1987                 } else if (pfn != spte_to_pfn(*sptep)) {
1988                         pgprintk("hfn old %lx new %lx\n",
1989                                  spte_to_pfn(*sptep), pfn);
1990                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1991                         kvm_flush_remote_tlbs(vcpu->kvm);
1992                 } else
1993                         was_rmapped = 1;
1994         }
1995
1996         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1997                       dirty, level, gfn, pfn, speculative, true,
1998                       reset_host_protection)) {
1999                 if (write_fault)
2000                         *ptwrite = 1;
2001                 kvm_mmu_flush_tlb(vcpu);
2002         }
2003
2004         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2005         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
2006                  is_large_pte(*sptep)? "2MB" : "4kB",
2007                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2008                  *sptep, sptep);
2009         if (!was_rmapped && is_large_pte(*sptep))
2010                 ++vcpu->kvm->stat.lpages;
2011
2012         page_header_update_slot(vcpu->kvm, sptep, gfn);
2013         if (!was_rmapped) {
2014                 rmap_count = rmap_add(vcpu, sptep, gfn);
2015                 kvm_release_pfn_clean(pfn);
2016                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2017                         rmap_recycle(vcpu, sptep, gfn);
2018         } else {
2019                 if (was_writable)
2020                         kvm_release_pfn_dirty(pfn);
2021                 else
2022                         kvm_release_pfn_clean(pfn);
2023         }
2024         if (speculative) {
2025                 vcpu->arch.last_pte_updated = sptep;
2026                 vcpu->arch.last_pte_gfn = gfn;
2027         }
2028 }
2029
2030 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2031 {
2032 }
2033
2034 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2035                         int level, gfn_t gfn, pfn_t pfn)
2036 {
2037         struct kvm_shadow_walk_iterator iterator;
2038         struct kvm_mmu_page *sp;
2039         int pt_write = 0;
2040         gfn_t pseudo_gfn;
2041
2042         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2043                 if (iterator.level == level) {
2044                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2045                                      0, write, 1, &pt_write,
2046                                      level, gfn, pfn, false, true);
2047                         ++vcpu->stat.pf_fixed;
2048                         break;
2049                 }
2050
2051                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2052                         u64 base_addr = iterator.addr;
2053
2054                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2055                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2056                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2057                                               iterator.level - 1,
2058                                               1, ACC_ALL, iterator.sptep);
2059                         if (!sp) {
2060                                 pgprintk("nonpaging_map: ENOMEM\n");
2061                                 kvm_release_pfn_clean(pfn);
2062                                 return -ENOMEM;
2063                         }
2064
2065                         __set_spte(iterator.sptep,
2066                                    __pa(sp->spt)
2067                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2068                                    | shadow_user_mask | shadow_x_mask);
2069                 }
2070         }
2071         return pt_write;
2072 }
2073
2074 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2075 {
2076         char buf[1];
2077         void __user *hva;
2078         int r;
2079
2080         /* Touch the page, so send SIGBUS */
2081         hva = (void __user *)gfn_to_hva(kvm, gfn);
2082         r = copy_from_user(buf, hva, 1);
2083 }
2084
2085 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2086 {
2087         kvm_release_pfn_clean(pfn);
2088         if (is_hwpoison_pfn(pfn)) {
2089                 kvm_send_hwpoison_signal(kvm, gfn);
2090                 return 0;
2091         } else if (is_fault_pfn(pfn))
2092                 return -EFAULT;
2093
2094         return 1;
2095 }
2096
2097 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2098 {
2099         int r;
2100         int level;
2101         pfn_t pfn;
2102         unsigned long mmu_seq;
2103
2104         level = mapping_level(vcpu, gfn);
2105
2106         /*
2107          * This path builds a PAE pagetable - so we can map 2mb pages at
2108          * maximum. Therefore check if the level is larger than that.
2109          */
2110         if (level > PT_DIRECTORY_LEVEL)
2111                 level = PT_DIRECTORY_LEVEL;
2112
2113         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2114
2115         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2116         smp_rmb();
2117         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2118
2119         /* mmio */
2120         if (is_error_pfn(pfn))
2121                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2122
2123         spin_lock(&vcpu->kvm->mmu_lock);
2124         if (mmu_notifier_retry(vcpu, mmu_seq))
2125                 goto out_unlock;
2126         kvm_mmu_free_some_pages(vcpu);
2127         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2128         spin_unlock(&vcpu->kvm->mmu_lock);
2129
2130
2131         return r;
2132
2133 out_unlock:
2134         spin_unlock(&vcpu->kvm->mmu_lock);
2135         kvm_release_pfn_clean(pfn);
2136         return 0;
2137 }
2138
2139
2140 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2141 {
2142         int i;
2143         struct kvm_mmu_page *sp;
2144         LIST_HEAD(invalid_list);
2145
2146         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2147                 return;
2148         spin_lock(&vcpu->kvm->mmu_lock);
2149         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2150                 hpa_t root = vcpu->arch.mmu.root_hpa;
2151
2152                 sp = page_header(root);
2153                 --sp->root_count;
2154                 if (!sp->root_count && sp->role.invalid) {
2155                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2156                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2157                 }
2158                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2159                 spin_unlock(&vcpu->kvm->mmu_lock);
2160                 return;
2161         }
2162         for (i = 0; i < 4; ++i) {
2163                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2164
2165                 if (root) {
2166                         root &= PT64_BASE_ADDR_MASK;
2167                         sp = page_header(root);
2168                         --sp->root_count;
2169                         if (!sp->root_count && sp->role.invalid)
2170                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2171                                                          &invalid_list);
2172                 }
2173                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2174         }
2175         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2176         spin_unlock(&vcpu->kvm->mmu_lock);
2177         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2178 }
2179
2180 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2181 {
2182         int ret = 0;
2183
2184         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2185                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2186                 ret = 1;
2187         }
2188
2189         return ret;
2190 }
2191
2192 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2193 {
2194         int i;
2195         gfn_t root_gfn;
2196         struct kvm_mmu_page *sp;
2197         int direct = 0;
2198         u64 pdptr;
2199
2200         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2201
2202         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2203                 hpa_t root = vcpu->arch.mmu.root_hpa;
2204
2205                 ASSERT(!VALID_PAGE(root));
2206                 if (mmu_check_root(vcpu, root_gfn))
2207                         return 1;
2208                 if (tdp_enabled) {
2209                         direct = 1;
2210                         root_gfn = 0;
2211                 }
2212                 spin_lock(&vcpu->kvm->mmu_lock);
2213                 kvm_mmu_free_some_pages(vcpu);
2214                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2215                                       PT64_ROOT_LEVEL, direct,
2216                                       ACC_ALL, NULL);
2217                 root = __pa(sp->spt);
2218                 ++sp->root_count;
2219                 spin_unlock(&vcpu->kvm->mmu_lock);
2220                 vcpu->arch.mmu.root_hpa = root;
2221                 return 0;
2222         }
2223         direct = !is_paging(vcpu);
2224         for (i = 0; i < 4; ++i) {
2225                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2226
2227                 ASSERT(!VALID_PAGE(root));
2228                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2229                         pdptr = kvm_pdptr_read(vcpu, i);
2230                         if (!is_present_gpte(pdptr)) {
2231                                 vcpu->arch.mmu.pae_root[i] = 0;
2232                                 continue;
2233                         }
2234                         root_gfn = pdptr >> PAGE_SHIFT;
2235                 } else if (vcpu->arch.mmu.root_level == 0)
2236                         root_gfn = 0;
2237                 if (mmu_check_root(vcpu, root_gfn))
2238                         return 1;
2239                 if (tdp_enabled) {
2240                         direct = 1;
2241                         root_gfn = i << 30;
2242                 }
2243                 spin_lock(&vcpu->kvm->mmu_lock);
2244                 kvm_mmu_free_some_pages(vcpu);
2245                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2246                                       PT32_ROOT_LEVEL, direct,
2247                                       ACC_ALL, NULL);
2248                 root = __pa(sp->spt);
2249                 ++sp->root_count;
2250                 spin_unlock(&vcpu->kvm->mmu_lock);
2251
2252                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2253         }
2254         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2255         return 0;
2256 }
2257
2258 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2259 {
2260         int i;
2261         struct kvm_mmu_page *sp;
2262
2263         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2264                 return;
2265         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2266                 hpa_t root = vcpu->arch.mmu.root_hpa;
2267                 sp = page_header(root);
2268                 mmu_sync_children(vcpu, sp);
2269                 return;
2270         }
2271         for (i = 0; i < 4; ++i) {
2272                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2273
2274                 if (root && VALID_PAGE(root)) {
2275                         root &= PT64_BASE_ADDR_MASK;
2276                         sp = page_header(root);
2277                         mmu_sync_children(vcpu, sp);
2278                 }
2279         }
2280 }
2281
2282 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2283 {
2284         spin_lock(&vcpu->kvm->mmu_lock);
2285         mmu_sync_roots(vcpu);
2286         spin_unlock(&vcpu->kvm->mmu_lock);
2287 }
2288
2289 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2290                                   u32 access, u32 *error)
2291 {
2292         if (error)
2293                 *error = 0;
2294         return vaddr;
2295 }
2296
2297 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2298                                 u32 error_code)
2299 {
2300         gfn_t gfn;
2301         int r;
2302
2303         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2304         r = mmu_topup_memory_caches(vcpu);
2305         if (r)
2306                 return r;
2307
2308         ASSERT(vcpu);
2309         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2310
2311         gfn = gva >> PAGE_SHIFT;
2312
2313         return nonpaging_map(vcpu, gva & PAGE_MASK,
2314                              error_code & PFERR_WRITE_MASK, gfn);
2315 }
2316
2317 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2318                                 u32 error_code)
2319 {
2320         pfn_t pfn;
2321         int r;
2322         int level;
2323         gfn_t gfn = gpa >> PAGE_SHIFT;
2324         unsigned long mmu_seq;
2325
2326         ASSERT(vcpu);
2327         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2328
2329         r = mmu_topup_memory_caches(vcpu);
2330         if (r)
2331                 return r;
2332
2333         level = mapping_level(vcpu, gfn);
2334
2335         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2336
2337         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2338         smp_rmb();
2339         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2340         if (is_error_pfn(pfn))
2341                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2342         spin_lock(&vcpu->kvm->mmu_lock);
2343         if (mmu_notifier_retry(vcpu, mmu_seq))
2344                 goto out_unlock;
2345         kvm_mmu_free_some_pages(vcpu);
2346         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2347                          level, gfn, pfn);
2348         spin_unlock(&vcpu->kvm->mmu_lock);
2349
2350         return r;
2351
2352 out_unlock:
2353         spin_unlock(&vcpu->kvm->mmu_lock);
2354         kvm_release_pfn_clean(pfn);
2355         return 0;
2356 }
2357
2358 static void nonpaging_free(struct kvm_vcpu *vcpu)
2359 {
2360         mmu_free_roots(vcpu);
2361 }
2362
2363 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2364 {
2365         struct kvm_mmu *context = &vcpu->arch.mmu;
2366
2367         context->new_cr3 = nonpaging_new_cr3;
2368         context->page_fault = nonpaging_page_fault;
2369         context->gva_to_gpa = nonpaging_gva_to_gpa;
2370         context->free = nonpaging_free;
2371         context->prefetch_page = nonpaging_prefetch_page;
2372         context->sync_page = nonpaging_sync_page;
2373         context->invlpg = nonpaging_invlpg;
2374         context->root_level = 0;
2375         context->shadow_root_level = PT32E_ROOT_LEVEL;
2376         context->root_hpa = INVALID_PAGE;
2377         return 0;
2378 }
2379
2380 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2381 {
2382         ++vcpu->stat.tlb_flush;
2383         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2384 }
2385
2386 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2387 {
2388         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2389         mmu_free_roots(vcpu);
2390 }
2391
2392 static void inject_page_fault(struct kvm_vcpu *vcpu,
2393                               u64 addr,
2394                               u32 err_code)
2395 {
2396         kvm_inject_page_fault(vcpu, addr, err_code);
2397 }
2398
2399 static void paging_free(struct kvm_vcpu *vcpu)
2400 {
2401         nonpaging_free(vcpu);
2402 }
2403
2404 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2405 {
2406         int bit7;
2407
2408         bit7 = (gpte >> 7) & 1;
2409         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2410 }
2411
2412 #define PTTYPE 64
2413 #include "paging_tmpl.h"
2414 #undef PTTYPE
2415
2416 #define PTTYPE 32
2417 #include "paging_tmpl.h"
2418 #undef PTTYPE
2419
2420 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2421 {
2422         struct kvm_mmu *context = &vcpu->arch.mmu;
2423         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2424         u64 exb_bit_rsvd = 0;
2425
2426         if (!is_nx(vcpu))
2427                 exb_bit_rsvd = rsvd_bits(63, 63);
2428         switch (level) {
2429         case PT32_ROOT_LEVEL:
2430                 /* no rsvd bits for 2 level 4K page table entries */
2431                 context->rsvd_bits_mask[0][1] = 0;
2432                 context->rsvd_bits_mask[0][0] = 0;
2433                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2434
2435                 if (!is_pse(vcpu)) {
2436                         context->rsvd_bits_mask[1][1] = 0;
2437                         break;
2438                 }
2439
2440                 if (is_cpuid_PSE36())
2441                         /* 36bits PSE 4MB page */
2442                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2443                 else
2444                         /* 32 bits PSE 4MB page */
2445                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2446                 break;
2447         case PT32E_ROOT_LEVEL:
2448                 context->rsvd_bits_mask[0][2] =
2449                         rsvd_bits(maxphyaddr, 63) |
2450                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2451                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2452                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2453                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2454                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2455                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2456                         rsvd_bits(maxphyaddr, 62) |
2457                         rsvd_bits(13, 20);              /* large page */
2458                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2459                 break;
2460         case PT64_ROOT_LEVEL:
2461                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2462                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2463                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2464                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2465                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2466                         rsvd_bits(maxphyaddr, 51);
2467                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2468                         rsvd_bits(maxphyaddr, 51);
2469                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2470                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2471                         rsvd_bits(maxphyaddr, 51) |
2472                         rsvd_bits(13, 29);
2473                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2474                         rsvd_bits(maxphyaddr, 51) |
2475                         rsvd_bits(13, 20);              /* large page */
2476                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2477                 break;
2478         }
2479 }
2480
2481 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2482 {
2483         struct kvm_mmu *context = &vcpu->arch.mmu;
2484
2485         ASSERT(is_pae(vcpu));
2486         context->new_cr3 = paging_new_cr3;
2487         context->page_fault = paging64_page_fault;
2488         context->gva_to_gpa = paging64_gva_to_gpa;
2489         context->prefetch_page = paging64_prefetch_page;
2490         context->sync_page = paging64_sync_page;
2491         context->invlpg = paging64_invlpg;
2492         context->free = paging_free;
2493         context->root_level = level;
2494         context->shadow_root_level = level;
2495         context->root_hpa = INVALID_PAGE;
2496         return 0;
2497 }
2498
2499 static int paging64_init_context(struct kvm_vcpu *vcpu)
2500 {
2501         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2502         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2503 }
2504
2505 static int paging32_init_context(struct kvm_vcpu *vcpu)
2506 {
2507         struct kvm_mmu *context = &vcpu->arch.mmu;
2508
2509         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2510         context->new_cr3 = paging_new_cr3;
2511         context->page_fault = paging32_page_fault;
2512         context->gva_to_gpa = paging32_gva_to_gpa;
2513         context->free = paging_free;
2514         context->prefetch_page = paging32_prefetch_page;
2515         context->sync_page = paging32_sync_page;
2516         context->invlpg = paging32_invlpg;
2517         context->root_level = PT32_ROOT_LEVEL;
2518         context->shadow_root_level = PT32E_ROOT_LEVEL;
2519         context->root_hpa = INVALID_PAGE;
2520         return 0;
2521 }
2522
2523 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2524 {
2525         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2526         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2527 }
2528
2529 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2530 {
2531         struct kvm_mmu *context = &vcpu->arch.mmu;
2532
2533         context->new_cr3 = nonpaging_new_cr3;
2534         context->page_fault = tdp_page_fault;
2535         context->free = nonpaging_free;
2536         context->prefetch_page = nonpaging_prefetch_page;
2537         context->sync_page = nonpaging_sync_page;
2538         context->invlpg = nonpaging_invlpg;
2539         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2540         context->root_hpa = INVALID_PAGE;
2541
2542         if (!is_paging(vcpu)) {
2543                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2544                 context->root_level = 0;
2545         } else if (is_long_mode(vcpu)) {
2546                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2547                 context->gva_to_gpa = paging64_gva_to_gpa;
2548                 context->root_level = PT64_ROOT_LEVEL;
2549         } else if (is_pae(vcpu)) {
2550                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2551                 context->gva_to_gpa = paging64_gva_to_gpa;
2552                 context->root_level = PT32E_ROOT_LEVEL;
2553         } else {
2554                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2555                 context->gva_to_gpa = paging32_gva_to_gpa;
2556                 context->root_level = PT32_ROOT_LEVEL;
2557         }
2558
2559         return 0;
2560 }
2561
2562 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2563 {
2564         int r;
2565
2566         ASSERT(vcpu);
2567         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2568
2569         if (!is_paging(vcpu))
2570                 r = nonpaging_init_context(vcpu);
2571         else if (is_long_mode(vcpu))
2572                 r = paging64_init_context(vcpu);
2573         else if (is_pae(vcpu))
2574                 r = paging32E_init_context(vcpu);
2575         else
2576                 r = paging32_init_context(vcpu);
2577
2578         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2579         vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2580
2581         return r;
2582 }
2583
2584 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2585 {
2586         vcpu->arch.update_pte.pfn = bad_pfn;
2587
2588         if (tdp_enabled)
2589                 return init_kvm_tdp_mmu(vcpu);
2590         else
2591                 return init_kvm_softmmu(vcpu);
2592 }
2593
2594 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2595 {
2596         ASSERT(vcpu);
2597         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2598                 /* mmu.free() should set root_hpa = INVALID_PAGE */
2599                 vcpu->arch.mmu.free(vcpu);
2600 }
2601
2602 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2603 {
2604         destroy_kvm_mmu(vcpu);
2605         return init_kvm_mmu(vcpu);
2606 }
2607 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2608
2609 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2610 {
2611         int r;
2612
2613         r = mmu_topup_memory_caches(vcpu);
2614         if (r)
2615                 goto out;
2616         r = mmu_alloc_roots(vcpu);
2617         spin_lock(&vcpu->kvm->mmu_lock);
2618         mmu_sync_roots(vcpu);
2619         spin_unlock(&vcpu->kvm->mmu_lock);
2620         if (r)
2621                 goto out;
2622         /* set_cr3() should ensure TLB has been flushed */
2623         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2624 out:
2625         return r;
2626 }
2627 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2628
2629 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2630 {
2631         mmu_free_roots(vcpu);
2632 }
2633
2634 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2635                                   struct kvm_mmu_page *sp,
2636                                   u64 *spte)
2637 {
2638         u64 pte;
2639         struct kvm_mmu_page *child;
2640
2641         pte = *spte;
2642         if (is_shadow_present_pte(pte)) {
2643                 if (is_last_spte(pte, sp->role.level))
2644                         drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2645                 else {
2646                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2647                         mmu_page_remove_parent_pte(child, spte);
2648                 }
2649         }
2650         __set_spte(spte, shadow_trap_nonpresent_pte);
2651         if (is_large_pte(pte))
2652                 --vcpu->kvm->stat.lpages;
2653 }
2654
2655 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2656                                   struct kvm_mmu_page *sp,
2657                                   u64 *spte,
2658                                   const void *new)
2659 {
2660         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2661                 ++vcpu->kvm->stat.mmu_pde_zapped;
2662                 return;
2663         }
2664
2665         ++vcpu->kvm->stat.mmu_pte_updated;
2666         if (!sp->role.cr4_pae)
2667                 paging32_update_pte(vcpu, sp, spte, new);
2668         else
2669                 paging64_update_pte(vcpu, sp, spte, new);
2670 }
2671
2672 static bool need_remote_flush(u64 old, u64 new)
2673 {
2674         if (!is_shadow_present_pte(old))
2675                 return false;
2676         if (!is_shadow_present_pte(new))
2677                 return true;
2678         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2679                 return true;
2680         old ^= PT64_NX_MASK;
2681         new ^= PT64_NX_MASK;
2682         return (old & ~new & PT64_PERM_MASK) != 0;
2683 }
2684
2685 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2686                                     bool remote_flush, bool local_flush)
2687 {
2688         if (zap_page)
2689                 return;
2690
2691         if (remote_flush)
2692                 kvm_flush_remote_tlbs(vcpu->kvm);
2693         else if (local_flush)
2694                 kvm_mmu_flush_tlb(vcpu);
2695 }
2696
2697 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2698 {
2699         u64 *spte = vcpu->arch.last_pte_updated;
2700
2701         return !!(spte && (*spte & shadow_accessed_mask));
2702 }
2703
2704 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2705                                           u64 gpte)
2706 {
2707         gfn_t gfn;
2708         pfn_t pfn;
2709
2710         if (!is_present_gpte(gpte))
2711                 return;
2712         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2713
2714         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2715         smp_rmb();
2716         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2717
2718         if (is_error_pfn(pfn)) {
2719                 kvm_release_pfn_clean(pfn);
2720                 return;
2721         }
2722         vcpu->arch.update_pte.gfn = gfn;
2723         vcpu->arch.update_pte.pfn = pfn;
2724 }
2725
2726 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2727 {
2728         u64 *spte = vcpu->arch.last_pte_updated;
2729
2730         if (spte
2731             && vcpu->arch.last_pte_gfn == gfn
2732             && shadow_accessed_mask
2733             && !(*spte & shadow_accessed_mask)
2734             && is_shadow_present_pte(*spte))
2735                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2736 }
2737
2738 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2739                        const u8 *new, int bytes,
2740                        bool guest_initiated)
2741 {
2742         gfn_t gfn = gpa >> PAGE_SHIFT;
2743         struct kvm_mmu_page *sp;
2744         struct hlist_node *node;
2745         LIST_HEAD(invalid_list);
2746         u64 entry, gentry;
2747         u64 *spte;
2748         unsigned offset = offset_in_page(gpa);
2749         unsigned pte_size;
2750         unsigned page_offset;
2751         unsigned misaligned;
2752         unsigned quadrant;
2753         int level;
2754         int flooded = 0;
2755         int npte;
2756         int r;
2757         int invlpg_counter;
2758         bool remote_flush, local_flush, zap_page;
2759
2760         zap_page = remote_flush = local_flush = false;
2761
2762         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2763
2764         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2765
2766         /*
2767          * Assume that the pte write on a page table of the same type
2768          * as the current vcpu paging mode.  This is nearly always true
2769          * (might be false while changing modes).  Note it is verified later
2770          * by update_pte().
2771          */
2772         if ((is_pae(vcpu) && bytes == 4) || !new) {
2773                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2774                 if (is_pae(vcpu)) {
2775                         gpa &= ~(gpa_t)7;
2776                         bytes = 8;
2777                 }
2778                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2779                 if (r)
2780                         gentry = 0;
2781                 new = (const u8 *)&gentry;
2782         }
2783
2784         switch (bytes) {
2785         case 4:
2786                 gentry = *(const u32 *)new;
2787                 break;
2788         case 8:
2789                 gentry = *(const u64 *)new;
2790                 break;
2791         default:
2792                 gentry = 0;
2793                 break;
2794         }
2795
2796         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2797         spin_lock(&vcpu->kvm->mmu_lock);
2798         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2799                 gentry = 0;
2800         kvm_mmu_access_page(vcpu, gfn);
2801         kvm_mmu_free_some_pages(vcpu);
2802         ++vcpu->kvm->stat.mmu_pte_write;
2803         kvm_mmu_audit(vcpu, "pre pte write");
2804         if (guest_initiated) {
2805                 if (gfn == vcpu->arch.last_pt_write_gfn
2806                     && !last_updated_pte_accessed(vcpu)) {
2807                         ++vcpu->arch.last_pt_write_count;
2808                         if (vcpu->arch.last_pt_write_count >= 3)
2809                                 flooded = 1;
2810                 } else {
2811                         vcpu->arch.last_pt_write_gfn = gfn;
2812                         vcpu->arch.last_pt_write_count = 1;
2813                         vcpu->arch.last_pte_updated = NULL;
2814                 }
2815         }
2816
2817         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2818                 pte_size = sp->role.cr4_pae ? 8 : 4;
2819                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2820                 misaligned |= bytes < 4;
2821                 if (misaligned || flooded) {
2822                         /*
2823                          * Misaligned accesses are too much trouble to fix
2824                          * up; also, they usually indicate a page is not used
2825                          * as a page table.
2826                          *
2827                          * If we're seeing too many writes to a page,
2828                          * it may no longer be a page table, or we may be
2829                          * forking, in which case it is better to unmap the
2830                          * page.
2831                          */
2832                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2833                                  gpa, bytes, sp->role.word);
2834                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2835                                                      &invalid_list);
2836                         ++vcpu->kvm->stat.mmu_flooded;
2837                         continue;
2838                 }
2839                 page_offset = offset;
2840                 level = sp->role.level;
2841                 npte = 1;
2842                 if (!sp->role.cr4_pae) {
2843                         page_offset <<= 1;      /* 32->64 */
2844                         /*
2845                          * A 32-bit pde maps 4MB while the shadow pdes map
2846                          * only 2MB.  So we need to double the offset again
2847                          * and zap two pdes instead of one.
2848                          */
2849                         if (level == PT32_ROOT_LEVEL) {
2850                                 page_offset &= ~7; /* kill rounding error */
2851                                 page_offset <<= 1;
2852                                 npte = 2;
2853                         }
2854                         quadrant = page_offset >> PAGE_SHIFT;
2855                         page_offset &= ~PAGE_MASK;
2856                         if (quadrant != sp->role.quadrant)
2857                                 continue;
2858                 }
2859                 local_flush = true;
2860                 spte = &sp->spt[page_offset / sizeof(*spte)];
2861                 while (npte--) {
2862                         entry = *spte;
2863                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2864                         if (gentry)
2865                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2866                         if (!remote_flush && need_remote_flush(entry, *spte))
2867                                 remote_flush = true;
2868                         ++spte;
2869                 }
2870         }
2871         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2872         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2873         kvm_mmu_audit(vcpu, "post pte write");
2874         spin_unlock(&vcpu->kvm->mmu_lock);
2875         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2876                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2877                 vcpu->arch.update_pte.pfn = bad_pfn;
2878         }
2879 }
2880
2881 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2882 {
2883         gpa_t gpa;
2884         int r;
2885
2886         if (tdp_enabled)
2887                 return 0;
2888
2889         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2890
2891         spin_lock(&vcpu->kvm->mmu_lock);
2892         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2893         spin_unlock(&vcpu->kvm->mmu_lock);
2894         return r;
2895 }
2896 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2897
2898 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2899 {
2900         int free_pages;
2901         LIST_HEAD(invalid_list);
2902
2903         free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2904         while (free_pages < KVM_REFILL_PAGES &&
2905                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2906                 struct kvm_mmu_page *sp;
2907
2908                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2909                                   struct kvm_mmu_page, link);
2910                 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2911                                                        &invalid_list);
2912                 ++vcpu->kvm->stat.mmu_recycled;
2913         }
2914         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2915 }
2916
2917 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2918 {
2919         int r;
2920         enum emulation_result er;
2921
2922         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2923         if (r < 0)
2924                 goto out;
2925
2926         if (!r) {
2927                 r = 1;
2928                 goto out;
2929         }
2930
2931         r = mmu_topup_memory_caches(vcpu);
2932         if (r)
2933                 goto out;
2934
2935         er = emulate_instruction(vcpu, cr2, error_code, 0);
2936
2937         switch (er) {
2938         case EMULATE_DONE:
2939                 return 1;
2940         case EMULATE_DO_MMIO:
2941                 ++vcpu->stat.mmio_exits;
2942                 /* fall through */
2943         case EMULATE_FAIL:
2944                 return 0;
2945         default:
2946                 BUG();
2947         }
2948 out:
2949         return r;
2950 }
2951 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2952
2953 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2954 {
2955         vcpu->arch.mmu.invlpg(vcpu, gva);
2956         kvm_mmu_flush_tlb(vcpu);
2957         ++vcpu->stat.invlpg;
2958 }
2959 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2960
2961 void kvm_enable_tdp(void)
2962 {
2963         tdp_enabled = true;
2964 }
2965 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2966
2967 void kvm_disable_tdp(void)
2968 {
2969         tdp_enabled = false;
2970 }
2971 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2972
2973 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2974 {
2975         free_page((unsigned long)vcpu->arch.mmu.pae_root);
2976 }
2977
2978 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2979 {
2980         struct page *page;
2981         int i;
2982
2983         ASSERT(vcpu);
2984
2985         /*
2986          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2987          * Therefore we need to allocate shadow page tables in the first
2988          * 4GB of memory, which happens to fit the DMA32 zone.
2989          */
2990         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2991         if (!page)
2992                 return -ENOMEM;
2993
2994         vcpu->arch.mmu.pae_root = page_address(page);
2995         for (i = 0; i < 4; ++i)
2996                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2997
2998         return 0;
2999 }
3000
3001 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3002 {
3003         ASSERT(vcpu);
3004         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3005
3006         return alloc_mmu_pages(vcpu);
3007 }
3008
3009 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3010 {
3011         ASSERT(vcpu);
3012         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3013
3014         return init_kvm_mmu(vcpu);
3015 }
3016
3017 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3018 {
3019         ASSERT(vcpu);
3020
3021         destroy_kvm_mmu(vcpu);
3022         free_mmu_pages(vcpu);
3023         mmu_free_memory_caches(vcpu);
3024 }
3025
3026 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3027 {
3028         struct kvm_mmu_page *sp;
3029
3030         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3031                 int i;
3032                 u64 *pt;
3033
3034                 if (!test_bit(slot, sp->slot_bitmap))
3035                         continue;
3036
3037                 pt = sp->spt;
3038                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3039                         /* avoid RMW */
3040                         if (is_writable_pte(pt[i]))
3041                                 pt[i] &= ~PT_WRITABLE_MASK;
3042         }
3043         kvm_flush_remote_tlbs(kvm);
3044 }
3045
3046 void kvm_mmu_zap_all(struct kvm *kvm)
3047 {
3048         struct kvm_mmu_page *sp, *node;
3049         LIST_HEAD(invalid_list);
3050
3051         spin_lock(&kvm->mmu_lock);
3052 restart:
3053         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3054                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3055                         goto restart;
3056
3057         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3058         spin_unlock(&kvm->mmu_lock);
3059 }
3060
3061 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3062                                                struct list_head *invalid_list)
3063 {
3064         struct kvm_mmu_page *page;
3065
3066         page = container_of(kvm->arch.active_mmu_pages.prev,
3067                             struct kvm_mmu_page, link);
3068         return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3069 }
3070
3071 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3072 {
3073         struct kvm *kvm;
3074         struct kvm *kvm_freed = NULL;
3075         int cache_count = 0;
3076
3077         spin_lock(&kvm_lock);
3078
3079         list_for_each_entry(kvm, &vm_list, vm_list) {
3080                 int npages, idx, freed_pages;
3081                 LIST_HEAD(invalid_list);
3082
3083                 idx = srcu_read_lock(&kvm->srcu);
3084                 spin_lock(&kvm->mmu_lock);
3085                 npages = kvm->arch.n_alloc_mmu_pages -
3086                          kvm->arch.n_free_mmu_pages;
3087                 cache_count += npages;
3088                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3089                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3090                                                           &invalid_list);
3091                         cache_count -= freed_pages;
3092                         kvm_freed = kvm;
3093                 }
3094                 nr_to_scan--;
3095
3096                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3097                 spin_unlock(&kvm->mmu_lock);
3098                 srcu_read_unlock(&kvm->srcu, idx);
3099         }
3100         if (kvm_freed)
3101                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3102
3103         spin_unlock(&kvm_lock);
3104
3105         return cache_count;
3106 }
3107
3108 static struct shrinker mmu_shrinker = {
3109         .shrink = mmu_shrink,
3110         .seeks = DEFAULT_SEEKS * 10,
3111 };
3112
3113 static void mmu_destroy_caches(void)
3114 {
3115         if (pte_chain_cache)
3116                 kmem_cache_destroy(pte_chain_cache);
3117         if (rmap_desc_cache)
3118                 kmem_cache_destroy(rmap_desc_cache);
3119         if (mmu_page_header_cache)
3120                 kmem_cache_destroy(mmu_page_header_cache);
3121 }
3122
3123 void kvm_mmu_module_exit(void)
3124 {
3125         mmu_destroy_caches();
3126         unregister_shrinker(&mmu_shrinker);
3127 }
3128
3129 int kvm_mmu_module_init(void)
3130 {
3131         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3132                                             sizeof(struct kvm_pte_chain),
3133                                             0, 0, NULL);
3134         if (!pte_chain_cache)
3135                 goto nomem;
3136         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3137                                             sizeof(struct kvm_rmap_desc),
3138                                             0, 0, NULL);
3139         if (!rmap_desc_cache)
3140                 goto nomem;
3141
3142         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3143                                                   sizeof(struct kvm_mmu_page),
3144                                                   0, 0, NULL);
3145         if (!mmu_page_header_cache)
3146                 goto nomem;
3147
3148         register_shrinker(&mmu_shrinker);
3149
3150         return 0;
3151
3152 nomem:
3153         mmu_destroy_caches();
3154         return -ENOMEM;
3155 }
3156
3157 /*
3158  * Caculate mmu pages needed for kvm.
3159  */
3160 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3161 {
3162         int i;
3163         unsigned int nr_mmu_pages;
3164         unsigned int  nr_pages = 0;
3165         struct kvm_memslots *slots;
3166
3167         slots = kvm_memslots(kvm);
3168
3169         for (i = 0; i < slots->nmemslots; i++)
3170                 nr_pages += slots->memslots[i].npages;
3171
3172         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3173         nr_mmu_pages = max(nr_mmu_pages,
3174                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3175
3176         return nr_mmu_pages;
3177 }
3178
3179 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3180                                 unsigned len)
3181 {
3182         if (len > buffer->len)
3183                 return NULL;
3184         return buffer->ptr;
3185 }
3186
3187 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3188                                 unsigned len)
3189 {
3190         void *ret;
3191
3192         ret = pv_mmu_peek_buffer(buffer, len);
3193         if (!ret)
3194                 return ret;
3195         buffer->ptr += len;
3196         buffer->len -= len;
3197         buffer->processed += len;
3198         return ret;
3199 }
3200
3201 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3202                              gpa_t addr, gpa_t value)
3203 {
3204         int bytes = 8;
3205         int r;
3206
3207         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3208                 bytes = 4;
3209
3210         r = mmu_topup_memory_caches(vcpu);
3211         if (r)
3212                 return r;
3213
3214         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3215                 return -EFAULT;
3216
3217         return 1;
3218 }
3219
3220 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3221 {
3222         (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3223         return 1;
3224 }
3225
3226 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3227 {
3228         spin_lock(&vcpu->kvm->mmu_lock);
3229         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3230         spin_unlock(&vcpu->kvm->mmu_lock);
3231         return 1;
3232 }
3233
3234 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3235                              struct kvm_pv_mmu_op_buffer *buffer)
3236 {
3237         struct kvm_mmu_op_header *header;
3238
3239         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3240         if (!header)
3241                 return 0;
3242         switch (header->op) {
3243         case KVM_MMU_OP_WRITE_PTE: {
3244                 struct kvm_mmu_op_write_pte *wpte;
3245
3246                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3247                 if (!wpte)
3248                         return 0;
3249                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3250                                         wpte->pte_val);
3251         }
3252         case KVM_MMU_OP_FLUSH_TLB: {
3253                 struct kvm_mmu_op_flush_tlb *ftlb;
3254
3255                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3256                 if (!ftlb)
3257                         return 0;
3258                 return kvm_pv_mmu_flush_tlb(vcpu);
3259         }
3260         case KVM_MMU_OP_RELEASE_PT: {
3261                 struct kvm_mmu_op_release_pt *rpt;
3262
3263                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3264                 if (!rpt)
3265                         return 0;
3266                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3267         }
3268         default: return 0;
3269         }
3270 }
3271
3272 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3273                   gpa_t addr, unsigned long *ret)
3274 {
3275         int r;
3276         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3277
3278         buffer->ptr = buffer->buf;
3279         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3280         buffer->processed = 0;
3281
3282         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3283         if (r)
3284                 goto out;
3285
3286         while (buffer->len) {
3287                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3288                 if (r < 0)
3289                         goto out;
3290                 if (r == 0)
3291                         break;
3292         }
3293
3294         r = 1;
3295 out:
3296         *ret = buffer->processed;
3297         return r;
3298 }
3299
3300 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3301 {
3302         struct kvm_shadow_walk_iterator iterator;
3303         int nr_sptes = 0;
3304
3305         spin_lock(&vcpu->kvm->mmu_lock);
3306         for_each_shadow_entry(vcpu, addr, iterator) {
3307                 sptes[iterator.level-1] = *iterator.sptep;
3308                 nr_sptes++;
3309                 if (!is_shadow_present_pte(*iterator.sptep))
3310                         break;
3311         }
3312         spin_unlock(&vcpu->kvm->mmu_lock);
3313
3314         return nr_sptes;
3315 }
3316 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3317
3318 #ifdef AUDIT
3319
3320 static const char *audit_msg;
3321
3322 static gva_t canonicalize(gva_t gva)
3323 {
3324 #ifdef CONFIG_X86_64
3325         gva = (long long)(gva << 16) >> 16;
3326 #endif
3327         return gva;
3328 }
3329
3330
3331 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3332
3333 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3334                             inspect_spte_fn fn)
3335 {
3336         int i;
3337
3338         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3339                 u64 ent = sp->spt[i];
3340
3341                 if (is_shadow_present_pte(ent)) {
3342                         if (!is_last_spte(ent, sp->role.level)) {
3343                                 struct kvm_mmu_page *child;
3344                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3345                                 __mmu_spte_walk(kvm, child, fn);
3346                         } else
3347                                 fn(kvm, &sp->spt[i]);
3348                 }
3349         }
3350 }
3351
3352 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3353 {
3354         int i;
3355         struct kvm_mmu_page *sp;
3356
3357         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3358                 return;
3359         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3360                 hpa_t root = vcpu->arch.mmu.root_hpa;
3361                 sp = page_header(root);
3362                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3363                 return;
3364         }
3365         for (i = 0; i < 4; ++i) {
3366                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3367
3368                 if (root && VALID_PAGE(root)) {
3369                         root &= PT64_BASE_ADDR_MASK;
3370                         sp = page_header(root);
3371                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3372                 }
3373         }
3374         return;
3375 }
3376
3377 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3378                                 gva_t va, int level)
3379 {
3380         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3381         int i;
3382         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3383
3384         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3385                 u64 ent = pt[i];
3386
3387                 if (ent == shadow_trap_nonpresent_pte)
3388                         continue;
3389
3390                 va = canonicalize(va);
3391                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3392                         audit_mappings_page(vcpu, ent, va, level - 1);
3393                 else {
3394                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3395                         gfn_t gfn = gpa >> PAGE_SHIFT;
3396                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3397                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3398
3399                         if (is_error_pfn(pfn)) {
3400                                 kvm_release_pfn_clean(pfn);
3401                                 continue;
3402                         }
3403
3404                         if (is_shadow_present_pte(ent)
3405                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3406                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3407                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3408                                        audit_msg, vcpu->arch.mmu.root_level,
3409                                        va, gpa, hpa, ent,
3410                                        is_shadow_present_pte(ent));
3411                         else if (ent == shadow_notrap_nonpresent_pte
3412                                  && !is_error_hpa(hpa))
3413                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3414                                        " valid guest gva %lx\n", audit_msg, va);
3415                         kvm_release_pfn_clean(pfn);
3416
3417                 }
3418         }
3419 }
3420
3421 static void audit_mappings(struct kvm_vcpu *vcpu)
3422 {
3423         unsigned i;
3424
3425         if (vcpu->arch.mmu.root_level == 4)
3426                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3427         else
3428                 for (i = 0; i < 4; ++i)
3429                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3430                                 audit_mappings_page(vcpu,
3431                                                     vcpu->arch.mmu.pae_root[i],
3432                                                     i << 30,
3433                                                     2);
3434 }
3435
3436 static int count_rmaps(struct kvm_vcpu *vcpu)
3437 {
3438         struct kvm *kvm = vcpu->kvm;
3439         struct kvm_memslots *slots;
3440         int nmaps = 0;
3441         int i, j, k, idx;
3442
3443         idx = srcu_read_lock(&kvm->srcu);
3444         slots = kvm_memslots(kvm);
3445         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3446                 struct kvm_memory_slot *m = &slots->memslots[i];
3447                 struct kvm_rmap_desc *d;
3448
3449                 for (j = 0; j < m->npages; ++j) {
3450                         unsigned long *rmapp = &m->rmap[j];
3451
3452                         if (!*rmapp)
3453                                 continue;
3454                         if (!(*rmapp & 1)) {
3455                                 ++nmaps;
3456                                 continue;
3457                         }
3458                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3459                         while (d) {
3460                                 for (k = 0; k < RMAP_EXT; ++k)
3461                                         if (d->sptes[k])
3462                                                 ++nmaps;
3463                                         else
3464                                                 break;
3465                                 d = d->more;
3466                         }
3467                 }
3468         }
3469         srcu_read_unlock(&kvm->srcu, idx);
3470         return nmaps;
3471 }
3472
3473 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3474 {
3475         unsigned long *rmapp;
3476         struct kvm_mmu_page *rev_sp;
3477         gfn_t gfn;
3478
3479         if (is_writable_pte(*sptep)) {
3480                 rev_sp = page_header(__pa(sptep));
3481                 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3482
3483                 if (!gfn_to_memslot(kvm, gfn)) {
3484                         if (!printk_ratelimit())
3485                                 return;
3486                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3487                                          audit_msg, gfn);
3488                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3489                                audit_msg, (long int)(sptep - rev_sp->spt),
3490                                         rev_sp->gfn);
3491                         dump_stack();
3492                         return;
3493                 }
3494
3495                 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3496                 if (!*rmapp) {
3497                         if (!printk_ratelimit())
3498                                 return;
3499                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3500                                          audit_msg, *sptep);
3501                         dump_stack();
3502                 }
3503         }
3504
3505 }
3506
3507 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3508 {
3509         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3510 }
3511
3512 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3513 {
3514         struct kvm_mmu_page *sp;
3515         int i;
3516
3517         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3518                 u64 *pt = sp->spt;
3519
3520                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3521                         continue;
3522
3523                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3524                         u64 ent = pt[i];
3525
3526                         if (!(ent & PT_PRESENT_MASK))
3527                                 continue;
3528                         if (!is_writable_pte(ent))
3529                                 continue;
3530                         inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3531                 }
3532         }
3533         return;
3534 }
3535
3536 static void audit_rmap(struct kvm_vcpu *vcpu)
3537 {
3538         check_writable_mappings_rmap(vcpu);
3539         count_rmaps(vcpu);
3540 }
3541
3542 static void audit_write_protection(struct kvm_vcpu *vcpu)
3543 {
3544         struct kvm_mmu_page *sp;
3545         struct kvm_memory_slot *slot;
3546         unsigned long *rmapp;
3547         u64 *spte;
3548         gfn_t gfn;
3549
3550         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3551                 if (sp->role.direct)
3552                         continue;
3553                 if (sp->unsync)
3554                         continue;
3555
3556                 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3557                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3558
3559                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3560                 while (spte) {
3561                         if (is_writable_pte(*spte))
3562                                 printk(KERN_ERR "%s: (%s) shadow page has "
3563                                 "writable mappings: gfn %lx role %x\n",
3564                                __func__, audit_msg, sp->gfn,
3565                                sp->role.word);
3566                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3567                 }
3568         }
3569 }
3570
3571 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3572 {
3573         int olddbg = dbg;
3574
3575         dbg = 0;
3576         audit_msg = msg;
3577         audit_rmap(vcpu);
3578         audit_write_protection(vcpu);
3579         if (strcmp("pre pte write", audit_msg) != 0)
3580                 audit_mappings(vcpu);
3581         audit_writable_sptes_have_rmaps(vcpu);
3582         dbg = olddbg;
3583 }
3584
3585 #endif