2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
23 #include "kvm_cache_regs.h"
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
39 #include <asm/cmpxchg.h>
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
50 bool tdp_enabled = false;
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
74 #if defined(MMU_DEBUG) || defined(AUDIT)
76 module_param(dbg, bool, 0644);
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
83 #define ASSERT(x) do { } while (0)
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
95 #define PT64_LEVEL_BITS 9
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
107 #define PT32_LEVEL_BITS 10
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
149 #include <trace/events/kvm.h>
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
163 struct kvm_shadow_walk_iterator {
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
191 static inline u64 rsvd_bits(int s, int e)
193 return ((1ULL << (e - s + 1)) - 1) << s;
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
198 shadow_trap_nonpresent_pte = trap_pte;
199 shadow_notrap_nonpresent_pte = notrap_pte;
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
203 void kvm_mmu_set_base_ptes(u64 base_pte)
205 shadow_base_present_pte = base_pte;
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210 u64 dirty_mask, u64 nx_mask, u64 x_mask)
212 shadow_user_mask = user_mask;
213 shadow_accessed_mask = accessed_mask;
214 shadow_dirty_mask = dirty_mask;
215 shadow_nx_mask = nx_mask;
216 shadow_x_mask = x_mask;
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
222 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
225 static int is_cpuid_PSE36(void)
230 static int is_nx(struct kvm_vcpu *vcpu)
232 return vcpu->arch.efer & EFER_NX;
235 static int is_shadow_present_pte(u64 pte)
237 return pte != shadow_trap_nonpresent_pte
238 && pte != shadow_notrap_nonpresent_pte;
241 static int is_large_pte(u64 pte)
243 return pte & PT_PAGE_SIZE_MASK;
246 static int is_writable_pte(unsigned long pte)
248 return pte & PT_WRITABLE_MASK;
251 static int is_dirty_gpte(unsigned long pte)
253 return pte & PT_DIRTY_MASK;
256 static int is_rmap_spte(u64 pte)
258 return is_shadow_present_pte(pte);
261 static int is_last_spte(u64 pte, int level)
263 if (level == PT_PAGE_TABLE_LEVEL)
265 if (is_large_pte(pte))
270 static pfn_t spte_to_pfn(u64 pte)
272 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
275 static gfn_t pse36_gfn_delta(u32 gpte)
277 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
279 return (gpte & PT32_DIR_PSE36_MASK) << shift;
282 static void __set_spte(u64 *sptep, u64 spte)
285 set_64bit((unsigned long *)sptep, spte);
287 set_64bit((unsigned long long *)sptep, spte);
291 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
294 return xchg(sptep, new_spte);
300 } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
306 static void update_spte(u64 *sptep, u64 new_spte)
310 if (!shadow_accessed_mask || (new_spte & shadow_accessed_mask)) {
311 __set_spte(sptep, new_spte);
313 old_spte = __xchg_spte(sptep, new_spte);
314 if (old_spte & shadow_accessed_mask)
315 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
319 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
320 struct kmem_cache *base_cache, int min)
324 if (cache->nobjs >= min)
326 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
327 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
330 cache->objects[cache->nobjs++] = obj;
335 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
336 struct kmem_cache *cache)
339 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
342 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
347 if (cache->nobjs >= min)
349 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
350 page = alloc_page(GFP_KERNEL);
353 cache->objects[cache->nobjs++] = page_address(page);
358 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
361 free_page((unsigned long)mc->objects[--mc->nobjs]);
364 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
368 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
372 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
376 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
379 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
380 mmu_page_header_cache, 4);
385 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
387 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
388 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
389 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
390 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
391 mmu_page_header_cache);
394 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
400 p = mc->objects[--mc->nobjs];
404 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
406 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
407 sizeof(struct kvm_pte_chain));
410 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
412 kmem_cache_free(pte_chain_cache, pc);
415 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
417 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
418 sizeof(struct kvm_rmap_desc));
421 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
423 kmem_cache_free(rmap_desc_cache, rd);
426 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
428 if (!sp->role.direct)
429 return sp->gfns[index];
431 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
434 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
437 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
439 sp->gfns[index] = gfn;
443 * Return the pointer to the largepage write count for a given
444 * gfn, handling slots that are not large page aligned.
446 static int *slot_largepage_idx(gfn_t gfn,
447 struct kvm_memory_slot *slot,
452 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
453 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
454 return &slot->lpage_info[level - 2][idx].write_count;
457 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
459 struct kvm_memory_slot *slot;
463 slot = gfn_to_memslot(kvm, gfn);
464 for (i = PT_DIRECTORY_LEVEL;
465 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
466 write_count = slot_largepage_idx(gfn, slot, i);
471 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
473 struct kvm_memory_slot *slot;
477 slot = gfn_to_memslot(kvm, gfn);
478 for (i = PT_DIRECTORY_LEVEL;
479 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
480 write_count = slot_largepage_idx(gfn, slot, i);
482 WARN_ON(*write_count < 0);
486 static int has_wrprotected_page(struct kvm *kvm,
490 struct kvm_memory_slot *slot;
493 slot = gfn_to_memslot(kvm, gfn);
495 largepage_idx = slot_largepage_idx(gfn, slot, level);
496 return *largepage_idx;
502 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
504 unsigned long page_size;
507 page_size = kvm_host_page_size(kvm, gfn);
509 for (i = PT_PAGE_TABLE_LEVEL;
510 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
511 if (page_size >= KVM_HPAGE_SIZE(i))
520 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
522 struct kvm_memory_slot *slot;
523 int host_level, level, max_level;
525 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
526 if (slot && slot->dirty_bitmap)
527 return PT_PAGE_TABLE_LEVEL;
529 host_level = host_mapping_level(vcpu->kvm, large_gfn);
531 if (host_level == PT_PAGE_TABLE_LEVEL)
534 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
535 kvm_x86_ops->get_lpage_level() : host_level;
537 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
538 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
545 * Take gfn and return the reverse mapping to it.
548 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
550 struct kvm_memory_slot *slot;
553 slot = gfn_to_memslot(kvm, gfn);
554 if (likely(level == PT_PAGE_TABLE_LEVEL))
555 return &slot->rmap[gfn - slot->base_gfn];
557 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
558 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
560 return &slot->lpage_info[level - 2][idx].rmap_pde;
564 * Reverse mapping data structures:
566 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
567 * that points to page_address(page).
569 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
570 * containing more mappings.
572 * Returns the number of rmap entries before the spte was added or zero if
573 * the spte was not added.
576 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
578 struct kvm_mmu_page *sp;
579 struct kvm_rmap_desc *desc;
580 unsigned long *rmapp;
583 if (!is_rmap_spte(*spte))
585 sp = page_header(__pa(spte));
586 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
587 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
589 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
590 *rmapp = (unsigned long)spte;
591 } else if (!(*rmapp & 1)) {
592 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
593 desc = mmu_alloc_rmap_desc(vcpu);
594 desc->sptes[0] = (u64 *)*rmapp;
595 desc->sptes[1] = spte;
596 *rmapp = (unsigned long)desc | 1;
598 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
599 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
600 while (desc->sptes[RMAP_EXT-1] && desc->more) {
604 if (desc->sptes[RMAP_EXT-1]) {
605 desc->more = mmu_alloc_rmap_desc(vcpu);
608 for (i = 0; desc->sptes[i]; ++i)
610 desc->sptes[i] = spte;
615 static void rmap_desc_remove_entry(unsigned long *rmapp,
616 struct kvm_rmap_desc *desc,
618 struct kvm_rmap_desc *prev_desc)
622 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
624 desc->sptes[i] = desc->sptes[j];
625 desc->sptes[j] = NULL;
628 if (!prev_desc && !desc->more)
629 *rmapp = (unsigned long)desc->sptes[0];
632 prev_desc->more = desc->more;
634 *rmapp = (unsigned long)desc->more | 1;
635 mmu_free_rmap_desc(desc);
638 static void rmap_remove(struct kvm *kvm, u64 *spte)
640 struct kvm_rmap_desc *desc;
641 struct kvm_rmap_desc *prev_desc;
642 struct kvm_mmu_page *sp;
644 unsigned long *rmapp;
647 sp = page_header(__pa(spte));
648 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
649 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
651 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
653 } else if (!(*rmapp & 1)) {
654 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
655 if ((u64 *)*rmapp != spte) {
656 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
662 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
663 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
666 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
667 if (desc->sptes[i] == spte) {
668 rmap_desc_remove_entry(rmapp,
676 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
681 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
686 old_spte = __xchg_spte(sptep, new_spte);
687 if (!is_rmap_spte(old_spte))
689 pfn = spte_to_pfn(old_spte);
690 if (old_spte & shadow_accessed_mask)
691 kvm_set_pfn_accessed(pfn);
692 if (is_writable_pte(old_spte))
693 kvm_set_pfn_dirty(pfn);
694 rmap_remove(kvm, sptep);
697 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
699 struct kvm_rmap_desc *desc;
705 else if (!(*rmapp & 1)) {
707 return (u64 *)*rmapp;
710 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
713 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
714 if (prev_spte == spte)
715 return desc->sptes[i];
716 prev_spte = desc->sptes[i];
723 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
725 unsigned long *rmapp;
727 int i, write_protected = 0;
729 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
731 spte = rmap_next(kvm, rmapp, NULL);
734 BUG_ON(!(*spte & PT_PRESENT_MASK));
735 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
736 if (is_writable_pte(*spte)) {
737 update_spte(spte, *spte & ~PT_WRITABLE_MASK);
740 spte = rmap_next(kvm, rmapp, spte);
742 if (write_protected) {
745 spte = rmap_next(kvm, rmapp, NULL);
746 pfn = spte_to_pfn(*spte);
747 kvm_set_pfn_dirty(pfn);
750 /* check for huge page mappings */
751 for (i = PT_DIRECTORY_LEVEL;
752 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
753 rmapp = gfn_to_rmap(kvm, gfn, i);
754 spte = rmap_next(kvm, rmapp, NULL);
757 BUG_ON(!(*spte & PT_PRESENT_MASK));
758 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
759 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
760 if (is_writable_pte(*spte)) {
762 shadow_trap_nonpresent_pte);
767 spte = rmap_next(kvm, rmapp, spte);
771 return write_protected;
774 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
778 int need_tlb_flush = 0;
780 while ((spte = rmap_next(kvm, rmapp, NULL))) {
781 BUG_ON(!(*spte & PT_PRESENT_MASK));
782 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
783 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
786 return need_tlb_flush;
789 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
793 u64 *spte, new_spte, old_spte;
794 pte_t *ptep = (pte_t *)data;
797 WARN_ON(pte_huge(*ptep));
798 new_pfn = pte_pfn(*ptep);
799 spte = rmap_next(kvm, rmapp, NULL);
801 BUG_ON(!is_shadow_present_pte(*spte));
802 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
804 if (pte_write(*ptep)) {
805 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
806 spte = rmap_next(kvm, rmapp, NULL);
808 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
809 new_spte |= (u64)new_pfn << PAGE_SHIFT;
811 new_spte &= ~PT_WRITABLE_MASK;
812 new_spte &= ~SPTE_HOST_WRITEABLE;
813 new_spte &= ~shadow_accessed_mask;
814 if (is_writable_pte(*spte))
815 kvm_set_pfn_dirty(spte_to_pfn(*spte));
816 old_spte = __xchg_spte(spte, new_spte);
817 if (is_shadow_present_pte(old_spte)
818 && (old_spte & shadow_accessed_mask))
819 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
820 spte = rmap_next(kvm, rmapp, spte);
824 kvm_flush_remote_tlbs(kvm);
829 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
831 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
837 struct kvm_memslots *slots;
839 slots = kvm_memslots(kvm);
841 for (i = 0; i < slots->nmemslots; i++) {
842 struct kvm_memory_slot *memslot = &slots->memslots[i];
843 unsigned long start = memslot->userspace_addr;
846 end = start + (memslot->npages << PAGE_SHIFT);
847 if (hva >= start && hva < end) {
848 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
850 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
852 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
853 int idx = gfn_offset;
854 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
856 &memslot->lpage_info[j][idx].rmap_pde,
859 trace_kvm_age_page(hva, memslot, ret);
867 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
869 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
872 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
874 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
877 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
884 * Emulate the accessed bit for EPT, by checking if this page has
885 * an EPT mapping, and clearing it if it does. On the next access,
886 * a new EPT mapping will be established.
887 * This has some overhead, but not as much as the cost of swapping
888 * out actively used pages or breaking up actively used hugepages.
890 if (!shadow_accessed_mask)
891 return kvm_unmap_rmapp(kvm, rmapp, data);
893 spte = rmap_next(kvm, rmapp, NULL);
897 BUG_ON(!(_spte & PT_PRESENT_MASK));
898 _young = _spte & PT_ACCESSED_MASK;
901 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
903 spte = rmap_next(kvm, rmapp, spte);
908 #define RMAP_RECYCLE_THRESHOLD 1000
910 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
912 unsigned long *rmapp;
913 struct kvm_mmu_page *sp;
915 sp = page_header(__pa(spte));
917 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
919 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
920 kvm_flush_remote_tlbs(vcpu->kvm);
923 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
925 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
929 static int is_empty_shadow_page(u64 *spt)
934 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
935 if (is_shadow_present_pte(*pos)) {
936 printk(KERN_ERR "%s: %p %llx\n", __func__,
944 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
946 ASSERT(is_empty_shadow_page(sp->spt));
947 hlist_del(&sp->hash_link);
949 __free_page(virt_to_page(sp->spt));
950 if (!sp->role.direct)
951 __free_page(virt_to_page(sp->gfns));
952 kmem_cache_free(mmu_page_header_cache, sp);
953 ++kvm->arch.n_free_mmu_pages;
956 static unsigned kvm_page_table_hashfn(gfn_t gfn)
958 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
961 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
962 u64 *parent_pte, int direct)
964 struct kvm_mmu_page *sp;
966 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
967 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
969 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
971 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
972 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
973 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
975 sp->parent_pte = parent_pte;
976 --vcpu->kvm->arch.n_free_mmu_pages;
980 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
981 struct kvm_mmu_page *sp, u64 *parent_pte)
983 struct kvm_pte_chain *pte_chain;
984 struct hlist_node *node;
989 if (!sp->multimapped) {
990 u64 *old = sp->parent_pte;
993 sp->parent_pte = parent_pte;
997 pte_chain = mmu_alloc_pte_chain(vcpu);
998 INIT_HLIST_HEAD(&sp->parent_ptes);
999 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1000 pte_chain->parent_ptes[0] = old;
1002 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1003 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1005 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1006 if (!pte_chain->parent_ptes[i]) {
1007 pte_chain->parent_ptes[i] = parent_pte;
1011 pte_chain = mmu_alloc_pte_chain(vcpu);
1013 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1014 pte_chain->parent_ptes[0] = parent_pte;
1017 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1020 struct kvm_pte_chain *pte_chain;
1021 struct hlist_node *node;
1024 if (!sp->multimapped) {
1025 BUG_ON(sp->parent_pte != parent_pte);
1026 sp->parent_pte = NULL;
1029 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1030 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1031 if (!pte_chain->parent_ptes[i])
1033 if (pte_chain->parent_ptes[i] != parent_pte)
1035 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1036 && pte_chain->parent_ptes[i + 1]) {
1037 pte_chain->parent_ptes[i]
1038 = pte_chain->parent_ptes[i + 1];
1041 pte_chain->parent_ptes[i] = NULL;
1043 hlist_del(&pte_chain->link);
1044 mmu_free_pte_chain(pte_chain);
1045 if (hlist_empty(&sp->parent_ptes)) {
1046 sp->multimapped = 0;
1047 sp->parent_pte = NULL;
1055 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1057 struct kvm_pte_chain *pte_chain;
1058 struct hlist_node *node;
1059 struct kvm_mmu_page *parent_sp;
1062 if (!sp->multimapped && sp->parent_pte) {
1063 parent_sp = page_header(__pa(sp->parent_pte));
1064 fn(parent_sp, sp->parent_pte);
1068 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1069 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1070 u64 *spte = pte_chain->parent_ptes[i];
1074 parent_sp = page_header(__pa(spte));
1075 fn(parent_sp, spte);
1079 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1080 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1082 mmu_parent_walk(sp, mark_unsync);
1085 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1089 index = spte - sp->spt;
1090 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1092 if (sp->unsync_children++)
1094 kvm_mmu_mark_parents_unsync(sp);
1097 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1098 struct kvm_mmu_page *sp)
1102 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1103 sp->spt[i] = shadow_trap_nonpresent_pte;
1106 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1107 struct kvm_mmu_page *sp, bool clear_unsync)
1112 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1116 #define KVM_PAGE_ARRAY_NR 16
1118 struct kvm_mmu_pages {
1119 struct mmu_page_and_offset {
1120 struct kvm_mmu_page *sp;
1122 } page[KVM_PAGE_ARRAY_NR];
1126 #define for_each_unsync_children(bitmap, idx) \
1127 for (idx = find_first_bit(bitmap, 512); \
1129 idx = find_next_bit(bitmap, 512, idx+1))
1131 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1137 for (i=0; i < pvec->nr; i++)
1138 if (pvec->page[i].sp == sp)
1141 pvec->page[pvec->nr].sp = sp;
1142 pvec->page[pvec->nr].idx = idx;
1144 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1147 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1148 struct kvm_mmu_pages *pvec)
1150 int i, ret, nr_unsync_leaf = 0;
1152 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1153 struct kvm_mmu_page *child;
1154 u64 ent = sp->spt[i];
1156 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1157 goto clear_child_bitmap;
1159 child = page_header(ent & PT64_BASE_ADDR_MASK);
1161 if (child->unsync_children) {
1162 if (mmu_pages_add(pvec, child, i))
1165 ret = __mmu_unsync_walk(child, pvec);
1167 goto clear_child_bitmap;
1169 nr_unsync_leaf += ret;
1172 } else if (child->unsync) {
1174 if (mmu_pages_add(pvec, child, i))
1177 goto clear_child_bitmap;
1182 __clear_bit(i, sp->unsync_child_bitmap);
1183 sp->unsync_children--;
1184 WARN_ON((int)sp->unsync_children < 0);
1188 return nr_unsync_leaf;
1191 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1192 struct kvm_mmu_pages *pvec)
1194 if (!sp->unsync_children)
1197 mmu_pages_add(pvec, sp, 0);
1198 return __mmu_unsync_walk(sp, pvec);
1201 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1203 WARN_ON(!sp->unsync);
1204 trace_kvm_mmu_sync_page(sp);
1206 --kvm->stat.mmu_unsync;
1209 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1210 struct list_head *invalid_list);
1211 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1212 struct list_head *invalid_list);
1214 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1215 hlist_for_each_entry(sp, pos, \
1216 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1217 if ((sp)->gfn != (gfn)) {} else
1219 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1220 hlist_for_each_entry(sp, pos, \
1221 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1222 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1223 (sp)->role.invalid) {} else
1225 /* @sp->gfn should be write-protected at the call site */
1226 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1227 struct list_head *invalid_list, bool clear_unsync)
1229 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1230 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1235 kvm_unlink_unsync_page(vcpu->kvm, sp);
1237 if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1238 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1242 kvm_mmu_flush_tlb(vcpu);
1246 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1247 struct kvm_mmu_page *sp)
1249 LIST_HEAD(invalid_list);
1252 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1254 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1259 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1260 struct list_head *invalid_list)
1262 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1265 /* @gfn should be write-protected at the call site */
1266 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1268 struct kvm_mmu_page *s;
1269 struct hlist_node *node;
1270 LIST_HEAD(invalid_list);
1273 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1277 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1278 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1279 (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1280 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1283 kvm_unlink_unsync_page(vcpu->kvm, s);
1287 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1289 kvm_mmu_flush_tlb(vcpu);
1292 struct mmu_page_path {
1293 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1294 unsigned int idx[PT64_ROOT_LEVEL-1];
1297 #define for_each_sp(pvec, sp, parents, i) \
1298 for (i = mmu_pages_next(&pvec, &parents, -1), \
1299 sp = pvec.page[i].sp; \
1300 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1301 i = mmu_pages_next(&pvec, &parents, i))
1303 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1304 struct mmu_page_path *parents,
1309 for (n = i+1; n < pvec->nr; n++) {
1310 struct kvm_mmu_page *sp = pvec->page[n].sp;
1312 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1313 parents->idx[0] = pvec->page[n].idx;
1317 parents->parent[sp->role.level-2] = sp;
1318 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1324 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1326 struct kvm_mmu_page *sp;
1327 unsigned int level = 0;
1330 unsigned int idx = parents->idx[level];
1332 sp = parents->parent[level];
1336 --sp->unsync_children;
1337 WARN_ON((int)sp->unsync_children < 0);
1338 __clear_bit(idx, sp->unsync_child_bitmap);
1340 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1343 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1344 struct mmu_page_path *parents,
1345 struct kvm_mmu_pages *pvec)
1347 parents->parent[parent->role.level-1] = NULL;
1351 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1352 struct kvm_mmu_page *parent)
1355 struct kvm_mmu_page *sp;
1356 struct mmu_page_path parents;
1357 struct kvm_mmu_pages pages;
1358 LIST_HEAD(invalid_list);
1360 kvm_mmu_pages_init(parent, &parents, &pages);
1361 while (mmu_unsync_walk(parent, &pages)) {
1364 for_each_sp(pages, sp, parents, i)
1365 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1368 kvm_flush_remote_tlbs(vcpu->kvm);
1370 for_each_sp(pages, sp, parents, i) {
1371 kvm_sync_page(vcpu, sp, &invalid_list);
1372 mmu_pages_clear_parents(&parents);
1374 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1375 cond_resched_lock(&vcpu->kvm->mmu_lock);
1376 kvm_mmu_pages_init(parent, &parents, &pages);
1380 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1388 union kvm_mmu_page_role role;
1390 struct kvm_mmu_page *sp;
1391 struct hlist_node *node;
1392 bool need_sync = false;
1394 role = vcpu->arch.mmu.base_role;
1396 role.direct = direct;
1399 role.access = access;
1400 if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1401 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1402 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1403 role.quadrant = quadrant;
1405 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1406 if (!need_sync && sp->unsync)
1409 if (sp->role.word != role.word)
1412 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1415 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1416 if (sp->unsync_children) {
1417 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1418 kvm_mmu_mark_parents_unsync(sp);
1419 } else if (sp->unsync)
1420 kvm_mmu_mark_parents_unsync(sp);
1422 trace_kvm_mmu_get_page(sp, false);
1425 ++vcpu->kvm->stat.mmu_cache_miss;
1426 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1431 hlist_add_head(&sp->hash_link,
1432 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1434 if (rmap_write_protect(vcpu->kvm, gfn))
1435 kvm_flush_remote_tlbs(vcpu->kvm);
1436 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1437 kvm_sync_pages(vcpu, gfn);
1439 account_shadowed(vcpu->kvm, gfn);
1441 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1442 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1444 nonpaging_prefetch_page(vcpu, sp);
1445 trace_kvm_mmu_get_page(sp, true);
1449 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1450 struct kvm_vcpu *vcpu, u64 addr)
1452 iterator->addr = addr;
1453 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1454 iterator->level = vcpu->arch.mmu.shadow_root_level;
1455 if (iterator->level == PT32E_ROOT_LEVEL) {
1456 iterator->shadow_addr
1457 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1458 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1460 if (!iterator->shadow_addr)
1461 iterator->level = 0;
1465 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1467 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1470 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1471 if (is_large_pte(*iterator->sptep))
1474 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1475 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1479 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1481 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1485 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1489 spte = __pa(sp->spt)
1490 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1491 | PT_WRITABLE_MASK | PT_USER_MASK;
1492 __set_spte(sptep, spte);
1495 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1496 struct kvm_mmu_page *sp)
1504 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1507 if (is_shadow_present_pte(ent)) {
1508 if (!is_last_spte(ent, sp->role.level)) {
1509 ent &= PT64_BASE_ADDR_MASK;
1510 mmu_page_remove_parent_pte(page_header(ent),
1513 if (is_large_pte(ent))
1515 drop_spte(kvm, &pt[i],
1516 shadow_trap_nonpresent_pte);
1519 pt[i] = shadow_trap_nonpresent_pte;
1523 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1525 mmu_page_remove_parent_pte(sp, parent_pte);
1528 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1531 struct kvm_vcpu *vcpu;
1533 kvm_for_each_vcpu(i, vcpu, kvm)
1534 vcpu->arch.last_pte_updated = NULL;
1537 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1541 while (sp->multimapped || sp->parent_pte) {
1542 if (!sp->multimapped)
1543 parent_pte = sp->parent_pte;
1545 struct kvm_pte_chain *chain;
1547 chain = container_of(sp->parent_ptes.first,
1548 struct kvm_pte_chain, link);
1549 parent_pte = chain->parent_ptes[0];
1551 BUG_ON(!parent_pte);
1552 kvm_mmu_put_page(sp, parent_pte);
1553 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1557 static int mmu_zap_unsync_children(struct kvm *kvm,
1558 struct kvm_mmu_page *parent,
1559 struct list_head *invalid_list)
1562 struct mmu_page_path parents;
1563 struct kvm_mmu_pages pages;
1565 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1568 kvm_mmu_pages_init(parent, &parents, &pages);
1569 while (mmu_unsync_walk(parent, &pages)) {
1570 struct kvm_mmu_page *sp;
1572 for_each_sp(pages, sp, parents, i) {
1573 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1574 mmu_pages_clear_parents(&parents);
1577 kvm_mmu_pages_init(parent, &parents, &pages);
1583 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1584 struct list_head *invalid_list)
1588 trace_kvm_mmu_prepare_zap_page(sp);
1589 ++kvm->stat.mmu_shadow_zapped;
1590 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1591 kvm_mmu_page_unlink_children(kvm, sp);
1592 kvm_mmu_unlink_parents(kvm, sp);
1593 if (!sp->role.invalid && !sp->role.direct)
1594 unaccount_shadowed(kvm, sp->gfn);
1596 kvm_unlink_unsync_page(kvm, sp);
1597 if (!sp->root_count) {
1600 list_move(&sp->link, invalid_list);
1602 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1603 kvm_reload_remote_mmus(kvm);
1606 sp->role.invalid = 1;
1607 kvm_mmu_reset_last_pte_updated(kvm);
1611 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1612 struct list_head *invalid_list)
1614 struct kvm_mmu_page *sp;
1616 if (list_empty(invalid_list))
1619 kvm_flush_remote_tlbs(kvm);
1622 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1623 WARN_ON(!sp->role.invalid || sp->root_count);
1624 kvm_mmu_free_page(kvm, sp);
1625 } while (!list_empty(invalid_list));
1630 * Changing the number of mmu pages allocated to the vm
1631 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1633 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1636 LIST_HEAD(invalid_list);
1638 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1639 used_pages = max(0, used_pages);
1642 * If we set the number of mmu pages to be smaller be than the
1643 * number of actived pages , we must to free some mmu pages before we
1647 if (used_pages > kvm_nr_mmu_pages) {
1648 while (used_pages > kvm_nr_mmu_pages &&
1649 !list_empty(&kvm->arch.active_mmu_pages)) {
1650 struct kvm_mmu_page *page;
1652 page = container_of(kvm->arch.active_mmu_pages.prev,
1653 struct kvm_mmu_page, link);
1654 used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1657 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1658 kvm_nr_mmu_pages = used_pages;
1659 kvm->arch.n_free_mmu_pages = 0;
1662 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1663 - kvm->arch.n_alloc_mmu_pages;
1665 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1668 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1670 struct kvm_mmu_page *sp;
1671 struct hlist_node *node;
1672 LIST_HEAD(invalid_list);
1675 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1678 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1679 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1682 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1684 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1688 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1690 struct kvm_mmu_page *sp;
1691 struct hlist_node *node;
1692 LIST_HEAD(invalid_list);
1694 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1695 pgprintk("%s: zap %lx %x\n",
1696 __func__, gfn, sp->role.word);
1697 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1699 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1702 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1704 int slot = memslot_id(kvm, gfn);
1705 struct kvm_mmu_page *sp = page_header(__pa(pte));
1707 __set_bit(slot, sp->slot_bitmap);
1710 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1715 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1718 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1719 if (pt[i] == shadow_notrap_nonpresent_pte)
1720 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1725 * The function is based on mtrr_type_lookup() in
1726 * arch/x86/kernel/cpu/mtrr/generic.c
1728 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1733 u8 prev_match, curr_match;
1734 int num_var_ranges = KVM_NR_VAR_MTRR;
1736 if (!mtrr_state->enabled)
1739 /* Make end inclusive end, instead of exclusive */
1742 /* Look in fixed ranges. Just return the type as per start */
1743 if (mtrr_state->have_fixed && (start < 0x100000)) {
1746 if (start < 0x80000) {
1748 idx += (start >> 16);
1749 return mtrr_state->fixed_ranges[idx];
1750 } else if (start < 0xC0000) {
1752 idx += ((start - 0x80000) >> 14);
1753 return mtrr_state->fixed_ranges[idx];
1754 } else if (start < 0x1000000) {
1756 idx += ((start - 0xC0000) >> 12);
1757 return mtrr_state->fixed_ranges[idx];
1762 * Look in variable ranges
1763 * Look of multiple ranges matching this address and pick type
1764 * as per MTRR precedence
1766 if (!(mtrr_state->enabled & 2))
1767 return mtrr_state->def_type;
1770 for (i = 0; i < num_var_ranges; ++i) {
1771 unsigned short start_state, end_state;
1773 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1776 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1777 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1778 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1779 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1781 start_state = ((start & mask) == (base & mask));
1782 end_state = ((end & mask) == (base & mask));
1783 if (start_state != end_state)
1786 if ((start & mask) != (base & mask))
1789 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1790 if (prev_match == 0xFF) {
1791 prev_match = curr_match;
1795 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1796 curr_match == MTRR_TYPE_UNCACHABLE)
1797 return MTRR_TYPE_UNCACHABLE;
1799 if ((prev_match == MTRR_TYPE_WRBACK &&
1800 curr_match == MTRR_TYPE_WRTHROUGH) ||
1801 (prev_match == MTRR_TYPE_WRTHROUGH &&
1802 curr_match == MTRR_TYPE_WRBACK)) {
1803 prev_match = MTRR_TYPE_WRTHROUGH;
1804 curr_match = MTRR_TYPE_WRTHROUGH;
1807 if (prev_match != curr_match)
1808 return MTRR_TYPE_UNCACHABLE;
1811 if (prev_match != 0xFF)
1814 return mtrr_state->def_type;
1817 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1821 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1822 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1823 if (mtrr == 0xfe || mtrr == 0xff)
1824 mtrr = MTRR_TYPE_WRBACK;
1827 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1829 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1831 trace_kvm_mmu_unsync_page(sp);
1832 ++vcpu->kvm->stat.mmu_unsync;
1835 kvm_mmu_mark_parents_unsync(sp);
1836 mmu_convert_notrap(sp);
1839 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1841 struct kvm_mmu_page *s;
1842 struct hlist_node *node;
1844 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1847 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1848 __kvm_unsync_page(vcpu, s);
1852 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1855 struct kvm_mmu_page *s;
1856 struct hlist_node *node;
1857 bool need_unsync = false;
1859 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1863 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1866 if (!need_unsync && !s->unsync) {
1873 kvm_unsync_pages(vcpu, gfn);
1877 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1878 unsigned pte_access, int user_fault,
1879 int write_fault, int dirty, int level,
1880 gfn_t gfn, pfn_t pfn, bool speculative,
1881 bool can_unsync, bool reset_host_protection)
1887 * We don't set the accessed bit, since we sometimes want to see
1888 * whether the guest actually used the pte (in order to detect
1891 spte = shadow_base_present_pte | shadow_dirty_mask;
1893 spte |= shadow_accessed_mask;
1895 pte_access &= ~ACC_WRITE_MASK;
1896 if (pte_access & ACC_EXEC_MASK)
1897 spte |= shadow_x_mask;
1899 spte |= shadow_nx_mask;
1900 if (pte_access & ACC_USER_MASK)
1901 spte |= shadow_user_mask;
1902 if (level > PT_PAGE_TABLE_LEVEL)
1903 spte |= PT_PAGE_SIZE_MASK;
1905 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1906 kvm_is_mmio_pfn(pfn));
1908 if (reset_host_protection)
1909 spte |= SPTE_HOST_WRITEABLE;
1911 spte |= (u64)pfn << PAGE_SHIFT;
1913 if ((pte_access & ACC_WRITE_MASK)
1914 || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1917 if (level > PT_PAGE_TABLE_LEVEL &&
1918 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1920 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1924 spte |= PT_WRITABLE_MASK;
1926 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1927 spte &= ~PT_USER_MASK;
1930 * Optimization: for pte sync, if spte was writable the hash
1931 * lookup is unnecessary (and expensive). Write protection
1932 * is responsibility of mmu_get_page / kvm_sync_page.
1933 * Same reasoning can be applied to dirty page accounting.
1935 if (!can_unsync && is_writable_pte(*sptep))
1938 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1939 pgprintk("%s: found shadow page for %lx, marking ro\n",
1942 pte_access &= ~ACC_WRITE_MASK;
1943 if (is_writable_pte(spte))
1944 spte &= ~PT_WRITABLE_MASK;
1948 if (pte_access & ACC_WRITE_MASK)
1949 mark_page_dirty(vcpu->kvm, gfn);
1952 update_spte(sptep, spte);
1957 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1958 unsigned pt_access, unsigned pte_access,
1959 int user_fault, int write_fault, int dirty,
1960 int *ptwrite, int level, gfn_t gfn,
1961 pfn_t pfn, bool speculative,
1962 bool reset_host_protection)
1964 int was_rmapped = 0;
1965 int was_writable = is_writable_pte(*sptep);
1968 pgprintk("%s: spte %llx access %x write_fault %d"
1969 " user_fault %d gfn %lx\n",
1970 __func__, *sptep, pt_access,
1971 write_fault, user_fault, gfn);
1973 if (is_rmap_spte(*sptep)) {
1975 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1976 * the parent of the now unreachable PTE.
1978 if (level > PT_PAGE_TABLE_LEVEL &&
1979 !is_large_pte(*sptep)) {
1980 struct kvm_mmu_page *child;
1983 child = page_header(pte & PT64_BASE_ADDR_MASK);
1984 mmu_page_remove_parent_pte(child, sptep);
1985 __set_spte(sptep, shadow_trap_nonpresent_pte);
1986 kvm_flush_remote_tlbs(vcpu->kvm);
1987 } else if (pfn != spte_to_pfn(*sptep)) {
1988 pgprintk("hfn old %lx new %lx\n",
1989 spte_to_pfn(*sptep), pfn);
1990 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1991 kvm_flush_remote_tlbs(vcpu->kvm);
1996 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1997 dirty, level, gfn, pfn, speculative, true,
1998 reset_host_protection)) {
2001 kvm_mmu_flush_tlb(vcpu);
2004 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2005 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
2006 is_large_pte(*sptep)? "2MB" : "4kB",
2007 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2009 if (!was_rmapped && is_large_pte(*sptep))
2010 ++vcpu->kvm->stat.lpages;
2012 page_header_update_slot(vcpu->kvm, sptep, gfn);
2014 rmap_count = rmap_add(vcpu, sptep, gfn);
2015 kvm_release_pfn_clean(pfn);
2016 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2017 rmap_recycle(vcpu, sptep, gfn);
2020 kvm_release_pfn_dirty(pfn);
2022 kvm_release_pfn_clean(pfn);
2025 vcpu->arch.last_pte_updated = sptep;
2026 vcpu->arch.last_pte_gfn = gfn;
2030 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2034 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2035 int level, gfn_t gfn, pfn_t pfn)
2037 struct kvm_shadow_walk_iterator iterator;
2038 struct kvm_mmu_page *sp;
2042 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2043 if (iterator.level == level) {
2044 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2045 0, write, 1, &pt_write,
2046 level, gfn, pfn, false, true);
2047 ++vcpu->stat.pf_fixed;
2051 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2052 u64 base_addr = iterator.addr;
2054 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2055 pseudo_gfn = base_addr >> PAGE_SHIFT;
2056 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2058 1, ACC_ALL, iterator.sptep);
2060 pgprintk("nonpaging_map: ENOMEM\n");
2061 kvm_release_pfn_clean(pfn);
2065 __set_spte(iterator.sptep,
2067 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2068 | shadow_user_mask | shadow_x_mask);
2074 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2080 /* Touch the page, so send SIGBUS */
2081 hva = (void __user *)gfn_to_hva(kvm, gfn);
2082 r = copy_from_user(buf, hva, 1);
2085 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2087 kvm_release_pfn_clean(pfn);
2088 if (is_hwpoison_pfn(pfn)) {
2089 kvm_send_hwpoison_signal(kvm, gfn);
2091 } else if (is_fault_pfn(pfn))
2097 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2102 unsigned long mmu_seq;
2104 level = mapping_level(vcpu, gfn);
2107 * This path builds a PAE pagetable - so we can map 2mb pages at
2108 * maximum. Therefore check if the level is larger than that.
2110 if (level > PT_DIRECTORY_LEVEL)
2111 level = PT_DIRECTORY_LEVEL;
2113 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2115 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2117 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2120 if (is_error_pfn(pfn))
2121 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2123 spin_lock(&vcpu->kvm->mmu_lock);
2124 if (mmu_notifier_retry(vcpu, mmu_seq))
2126 kvm_mmu_free_some_pages(vcpu);
2127 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2128 spin_unlock(&vcpu->kvm->mmu_lock);
2134 spin_unlock(&vcpu->kvm->mmu_lock);
2135 kvm_release_pfn_clean(pfn);
2140 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2143 struct kvm_mmu_page *sp;
2144 LIST_HEAD(invalid_list);
2146 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2148 spin_lock(&vcpu->kvm->mmu_lock);
2149 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2150 hpa_t root = vcpu->arch.mmu.root_hpa;
2152 sp = page_header(root);
2154 if (!sp->root_count && sp->role.invalid) {
2155 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2156 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2158 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2159 spin_unlock(&vcpu->kvm->mmu_lock);
2162 for (i = 0; i < 4; ++i) {
2163 hpa_t root = vcpu->arch.mmu.pae_root[i];
2166 root &= PT64_BASE_ADDR_MASK;
2167 sp = page_header(root);
2169 if (!sp->root_count && sp->role.invalid)
2170 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2173 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2175 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2176 spin_unlock(&vcpu->kvm->mmu_lock);
2177 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2180 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2184 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2185 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2192 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2196 struct kvm_mmu_page *sp;
2200 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2202 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2203 hpa_t root = vcpu->arch.mmu.root_hpa;
2205 ASSERT(!VALID_PAGE(root));
2206 if (mmu_check_root(vcpu, root_gfn))
2212 spin_lock(&vcpu->kvm->mmu_lock);
2213 kvm_mmu_free_some_pages(vcpu);
2214 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2215 PT64_ROOT_LEVEL, direct,
2217 root = __pa(sp->spt);
2219 spin_unlock(&vcpu->kvm->mmu_lock);
2220 vcpu->arch.mmu.root_hpa = root;
2223 direct = !is_paging(vcpu);
2224 for (i = 0; i < 4; ++i) {
2225 hpa_t root = vcpu->arch.mmu.pae_root[i];
2227 ASSERT(!VALID_PAGE(root));
2228 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2229 pdptr = kvm_pdptr_read(vcpu, i);
2230 if (!is_present_gpte(pdptr)) {
2231 vcpu->arch.mmu.pae_root[i] = 0;
2234 root_gfn = pdptr >> PAGE_SHIFT;
2235 } else if (vcpu->arch.mmu.root_level == 0)
2237 if (mmu_check_root(vcpu, root_gfn))
2243 spin_lock(&vcpu->kvm->mmu_lock);
2244 kvm_mmu_free_some_pages(vcpu);
2245 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2246 PT32_ROOT_LEVEL, direct,
2248 root = __pa(sp->spt);
2250 spin_unlock(&vcpu->kvm->mmu_lock);
2252 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2254 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2258 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2261 struct kvm_mmu_page *sp;
2263 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2265 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2266 hpa_t root = vcpu->arch.mmu.root_hpa;
2267 sp = page_header(root);
2268 mmu_sync_children(vcpu, sp);
2271 for (i = 0; i < 4; ++i) {
2272 hpa_t root = vcpu->arch.mmu.pae_root[i];
2274 if (root && VALID_PAGE(root)) {
2275 root &= PT64_BASE_ADDR_MASK;
2276 sp = page_header(root);
2277 mmu_sync_children(vcpu, sp);
2282 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2284 spin_lock(&vcpu->kvm->mmu_lock);
2285 mmu_sync_roots(vcpu);
2286 spin_unlock(&vcpu->kvm->mmu_lock);
2289 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2290 u32 access, u32 *error)
2297 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2303 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2304 r = mmu_topup_memory_caches(vcpu);
2309 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2311 gfn = gva >> PAGE_SHIFT;
2313 return nonpaging_map(vcpu, gva & PAGE_MASK,
2314 error_code & PFERR_WRITE_MASK, gfn);
2317 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2323 gfn_t gfn = gpa >> PAGE_SHIFT;
2324 unsigned long mmu_seq;
2327 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2329 r = mmu_topup_memory_caches(vcpu);
2333 level = mapping_level(vcpu, gfn);
2335 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2337 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2339 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2340 if (is_error_pfn(pfn))
2341 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2342 spin_lock(&vcpu->kvm->mmu_lock);
2343 if (mmu_notifier_retry(vcpu, mmu_seq))
2345 kvm_mmu_free_some_pages(vcpu);
2346 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2348 spin_unlock(&vcpu->kvm->mmu_lock);
2353 spin_unlock(&vcpu->kvm->mmu_lock);
2354 kvm_release_pfn_clean(pfn);
2358 static void nonpaging_free(struct kvm_vcpu *vcpu)
2360 mmu_free_roots(vcpu);
2363 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2365 struct kvm_mmu *context = &vcpu->arch.mmu;
2367 context->new_cr3 = nonpaging_new_cr3;
2368 context->page_fault = nonpaging_page_fault;
2369 context->gva_to_gpa = nonpaging_gva_to_gpa;
2370 context->free = nonpaging_free;
2371 context->prefetch_page = nonpaging_prefetch_page;
2372 context->sync_page = nonpaging_sync_page;
2373 context->invlpg = nonpaging_invlpg;
2374 context->root_level = 0;
2375 context->shadow_root_level = PT32E_ROOT_LEVEL;
2376 context->root_hpa = INVALID_PAGE;
2380 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2382 ++vcpu->stat.tlb_flush;
2383 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2386 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2388 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2389 mmu_free_roots(vcpu);
2392 static void inject_page_fault(struct kvm_vcpu *vcpu,
2396 kvm_inject_page_fault(vcpu, addr, err_code);
2399 static void paging_free(struct kvm_vcpu *vcpu)
2401 nonpaging_free(vcpu);
2404 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2408 bit7 = (gpte >> 7) & 1;
2409 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2413 #include "paging_tmpl.h"
2417 #include "paging_tmpl.h"
2420 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2422 struct kvm_mmu *context = &vcpu->arch.mmu;
2423 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2424 u64 exb_bit_rsvd = 0;
2427 exb_bit_rsvd = rsvd_bits(63, 63);
2429 case PT32_ROOT_LEVEL:
2430 /* no rsvd bits for 2 level 4K page table entries */
2431 context->rsvd_bits_mask[0][1] = 0;
2432 context->rsvd_bits_mask[0][0] = 0;
2433 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2435 if (!is_pse(vcpu)) {
2436 context->rsvd_bits_mask[1][1] = 0;
2440 if (is_cpuid_PSE36())
2441 /* 36bits PSE 4MB page */
2442 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2444 /* 32 bits PSE 4MB page */
2445 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2447 case PT32E_ROOT_LEVEL:
2448 context->rsvd_bits_mask[0][2] =
2449 rsvd_bits(maxphyaddr, 63) |
2450 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2451 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2452 rsvd_bits(maxphyaddr, 62); /* PDE */
2453 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2454 rsvd_bits(maxphyaddr, 62); /* PTE */
2455 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2456 rsvd_bits(maxphyaddr, 62) |
2457 rsvd_bits(13, 20); /* large page */
2458 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2460 case PT64_ROOT_LEVEL:
2461 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2462 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2463 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2464 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2465 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2466 rsvd_bits(maxphyaddr, 51);
2467 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2468 rsvd_bits(maxphyaddr, 51);
2469 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2470 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2471 rsvd_bits(maxphyaddr, 51) |
2473 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2474 rsvd_bits(maxphyaddr, 51) |
2475 rsvd_bits(13, 20); /* large page */
2476 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2481 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2483 struct kvm_mmu *context = &vcpu->arch.mmu;
2485 ASSERT(is_pae(vcpu));
2486 context->new_cr3 = paging_new_cr3;
2487 context->page_fault = paging64_page_fault;
2488 context->gva_to_gpa = paging64_gva_to_gpa;
2489 context->prefetch_page = paging64_prefetch_page;
2490 context->sync_page = paging64_sync_page;
2491 context->invlpg = paging64_invlpg;
2492 context->free = paging_free;
2493 context->root_level = level;
2494 context->shadow_root_level = level;
2495 context->root_hpa = INVALID_PAGE;
2499 static int paging64_init_context(struct kvm_vcpu *vcpu)
2501 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2502 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2505 static int paging32_init_context(struct kvm_vcpu *vcpu)
2507 struct kvm_mmu *context = &vcpu->arch.mmu;
2509 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2510 context->new_cr3 = paging_new_cr3;
2511 context->page_fault = paging32_page_fault;
2512 context->gva_to_gpa = paging32_gva_to_gpa;
2513 context->free = paging_free;
2514 context->prefetch_page = paging32_prefetch_page;
2515 context->sync_page = paging32_sync_page;
2516 context->invlpg = paging32_invlpg;
2517 context->root_level = PT32_ROOT_LEVEL;
2518 context->shadow_root_level = PT32E_ROOT_LEVEL;
2519 context->root_hpa = INVALID_PAGE;
2523 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2525 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2526 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2529 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2531 struct kvm_mmu *context = &vcpu->arch.mmu;
2533 context->new_cr3 = nonpaging_new_cr3;
2534 context->page_fault = tdp_page_fault;
2535 context->free = nonpaging_free;
2536 context->prefetch_page = nonpaging_prefetch_page;
2537 context->sync_page = nonpaging_sync_page;
2538 context->invlpg = nonpaging_invlpg;
2539 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2540 context->root_hpa = INVALID_PAGE;
2542 if (!is_paging(vcpu)) {
2543 context->gva_to_gpa = nonpaging_gva_to_gpa;
2544 context->root_level = 0;
2545 } else if (is_long_mode(vcpu)) {
2546 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2547 context->gva_to_gpa = paging64_gva_to_gpa;
2548 context->root_level = PT64_ROOT_LEVEL;
2549 } else if (is_pae(vcpu)) {
2550 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2551 context->gva_to_gpa = paging64_gva_to_gpa;
2552 context->root_level = PT32E_ROOT_LEVEL;
2554 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2555 context->gva_to_gpa = paging32_gva_to_gpa;
2556 context->root_level = PT32_ROOT_LEVEL;
2562 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2567 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2569 if (!is_paging(vcpu))
2570 r = nonpaging_init_context(vcpu);
2571 else if (is_long_mode(vcpu))
2572 r = paging64_init_context(vcpu);
2573 else if (is_pae(vcpu))
2574 r = paging32E_init_context(vcpu);
2576 r = paging32_init_context(vcpu);
2578 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2579 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2584 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2586 vcpu->arch.update_pte.pfn = bad_pfn;
2589 return init_kvm_tdp_mmu(vcpu);
2591 return init_kvm_softmmu(vcpu);
2594 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2597 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2598 /* mmu.free() should set root_hpa = INVALID_PAGE */
2599 vcpu->arch.mmu.free(vcpu);
2602 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2604 destroy_kvm_mmu(vcpu);
2605 return init_kvm_mmu(vcpu);
2607 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2609 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2613 r = mmu_topup_memory_caches(vcpu);
2616 r = mmu_alloc_roots(vcpu);
2617 spin_lock(&vcpu->kvm->mmu_lock);
2618 mmu_sync_roots(vcpu);
2619 spin_unlock(&vcpu->kvm->mmu_lock);
2622 /* set_cr3() should ensure TLB has been flushed */
2623 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2627 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2629 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2631 mmu_free_roots(vcpu);
2634 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2635 struct kvm_mmu_page *sp,
2639 struct kvm_mmu_page *child;
2642 if (is_shadow_present_pte(pte)) {
2643 if (is_last_spte(pte, sp->role.level))
2644 drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2646 child = page_header(pte & PT64_BASE_ADDR_MASK);
2647 mmu_page_remove_parent_pte(child, spte);
2650 __set_spte(spte, shadow_trap_nonpresent_pte);
2651 if (is_large_pte(pte))
2652 --vcpu->kvm->stat.lpages;
2655 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2656 struct kvm_mmu_page *sp,
2660 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2661 ++vcpu->kvm->stat.mmu_pde_zapped;
2665 ++vcpu->kvm->stat.mmu_pte_updated;
2666 if (!sp->role.cr4_pae)
2667 paging32_update_pte(vcpu, sp, spte, new);
2669 paging64_update_pte(vcpu, sp, spte, new);
2672 static bool need_remote_flush(u64 old, u64 new)
2674 if (!is_shadow_present_pte(old))
2676 if (!is_shadow_present_pte(new))
2678 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2680 old ^= PT64_NX_MASK;
2681 new ^= PT64_NX_MASK;
2682 return (old & ~new & PT64_PERM_MASK) != 0;
2685 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2686 bool remote_flush, bool local_flush)
2692 kvm_flush_remote_tlbs(vcpu->kvm);
2693 else if (local_flush)
2694 kvm_mmu_flush_tlb(vcpu);
2697 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2699 u64 *spte = vcpu->arch.last_pte_updated;
2701 return !!(spte && (*spte & shadow_accessed_mask));
2704 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2710 if (!is_present_gpte(gpte))
2712 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2714 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2716 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2718 if (is_error_pfn(pfn)) {
2719 kvm_release_pfn_clean(pfn);
2722 vcpu->arch.update_pte.gfn = gfn;
2723 vcpu->arch.update_pte.pfn = pfn;
2726 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2728 u64 *spte = vcpu->arch.last_pte_updated;
2731 && vcpu->arch.last_pte_gfn == gfn
2732 && shadow_accessed_mask
2733 && !(*spte & shadow_accessed_mask)
2734 && is_shadow_present_pte(*spte))
2735 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2738 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2739 const u8 *new, int bytes,
2740 bool guest_initiated)
2742 gfn_t gfn = gpa >> PAGE_SHIFT;
2743 struct kvm_mmu_page *sp;
2744 struct hlist_node *node;
2745 LIST_HEAD(invalid_list);
2748 unsigned offset = offset_in_page(gpa);
2750 unsigned page_offset;
2751 unsigned misaligned;
2758 bool remote_flush, local_flush, zap_page;
2760 zap_page = remote_flush = local_flush = false;
2762 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2764 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2767 * Assume that the pte write on a page table of the same type
2768 * as the current vcpu paging mode. This is nearly always true
2769 * (might be false while changing modes). Note it is verified later
2772 if ((is_pae(vcpu) && bytes == 4) || !new) {
2773 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2778 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2781 new = (const u8 *)&gentry;
2786 gentry = *(const u32 *)new;
2789 gentry = *(const u64 *)new;
2796 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2797 spin_lock(&vcpu->kvm->mmu_lock);
2798 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2800 kvm_mmu_access_page(vcpu, gfn);
2801 kvm_mmu_free_some_pages(vcpu);
2802 ++vcpu->kvm->stat.mmu_pte_write;
2803 kvm_mmu_audit(vcpu, "pre pte write");
2804 if (guest_initiated) {
2805 if (gfn == vcpu->arch.last_pt_write_gfn
2806 && !last_updated_pte_accessed(vcpu)) {
2807 ++vcpu->arch.last_pt_write_count;
2808 if (vcpu->arch.last_pt_write_count >= 3)
2811 vcpu->arch.last_pt_write_gfn = gfn;
2812 vcpu->arch.last_pt_write_count = 1;
2813 vcpu->arch.last_pte_updated = NULL;
2817 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2818 pte_size = sp->role.cr4_pae ? 8 : 4;
2819 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2820 misaligned |= bytes < 4;
2821 if (misaligned || flooded) {
2823 * Misaligned accesses are too much trouble to fix
2824 * up; also, they usually indicate a page is not used
2827 * If we're seeing too many writes to a page,
2828 * it may no longer be a page table, or we may be
2829 * forking, in which case it is better to unmap the
2832 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2833 gpa, bytes, sp->role.word);
2834 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2836 ++vcpu->kvm->stat.mmu_flooded;
2839 page_offset = offset;
2840 level = sp->role.level;
2842 if (!sp->role.cr4_pae) {
2843 page_offset <<= 1; /* 32->64 */
2845 * A 32-bit pde maps 4MB while the shadow pdes map
2846 * only 2MB. So we need to double the offset again
2847 * and zap two pdes instead of one.
2849 if (level == PT32_ROOT_LEVEL) {
2850 page_offset &= ~7; /* kill rounding error */
2854 quadrant = page_offset >> PAGE_SHIFT;
2855 page_offset &= ~PAGE_MASK;
2856 if (quadrant != sp->role.quadrant)
2860 spte = &sp->spt[page_offset / sizeof(*spte)];
2863 mmu_pte_write_zap_pte(vcpu, sp, spte);
2865 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2866 if (!remote_flush && need_remote_flush(entry, *spte))
2867 remote_flush = true;
2871 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2872 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2873 kvm_mmu_audit(vcpu, "post pte write");
2874 spin_unlock(&vcpu->kvm->mmu_lock);
2875 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2876 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2877 vcpu->arch.update_pte.pfn = bad_pfn;
2881 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2889 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2891 spin_lock(&vcpu->kvm->mmu_lock);
2892 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2893 spin_unlock(&vcpu->kvm->mmu_lock);
2896 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2898 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2901 LIST_HEAD(invalid_list);
2903 free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2904 while (free_pages < KVM_REFILL_PAGES &&
2905 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2906 struct kvm_mmu_page *sp;
2908 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2909 struct kvm_mmu_page, link);
2910 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2912 ++vcpu->kvm->stat.mmu_recycled;
2914 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2917 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2920 enum emulation_result er;
2922 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2931 r = mmu_topup_memory_caches(vcpu);
2935 er = emulate_instruction(vcpu, cr2, error_code, 0);
2940 case EMULATE_DO_MMIO:
2941 ++vcpu->stat.mmio_exits;
2951 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2953 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2955 vcpu->arch.mmu.invlpg(vcpu, gva);
2956 kvm_mmu_flush_tlb(vcpu);
2957 ++vcpu->stat.invlpg;
2959 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2961 void kvm_enable_tdp(void)
2965 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2967 void kvm_disable_tdp(void)
2969 tdp_enabled = false;
2971 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2973 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2975 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2978 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2986 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2987 * Therefore we need to allocate shadow page tables in the first
2988 * 4GB of memory, which happens to fit the DMA32 zone.
2990 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2994 vcpu->arch.mmu.pae_root = page_address(page);
2995 for (i = 0; i < 4; ++i)
2996 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3001 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3004 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3006 return alloc_mmu_pages(vcpu);
3009 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3012 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3014 return init_kvm_mmu(vcpu);
3017 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3021 destroy_kvm_mmu(vcpu);
3022 free_mmu_pages(vcpu);
3023 mmu_free_memory_caches(vcpu);
3026 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3028 struct kvm_mmu_page *sp;
3030 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3034 if (!test_bit(slot, sp->slot_bitmap))
3038 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3040 if (is_writable_pte(pt[i]))
3041 pt[i] &= ~PT_WRITABLE_MASK;
3043 kvm_flush_remote_tlbs(kvm);
3046 void kvm_mmu_zap_all(struct kvm *kvm)
3048 struct kvm_mmu_page *sp, *node;
3049 LIST_HEAD(invalid_list);
3051 spin_lock(&kvm->mmu_lock);
3053 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3054 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3057 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3058 spin_unlock(&kvm->mmu_lock);
3061 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3062 struct list_head *invalid_list)
3064 struct kvm_mmu_page *page;
3066 page = container_of(kvm->arch.active_mmu_pages.prev,
3067 struct kvm_mmu_page, link);
3068 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3071 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3074 struct kvm *kvm_freed = NULL;
3075 int cache_count = 0;
3077 spin_lock(&kvm_lock);
3079 list_for_each_entry(kvm, &vm_list, vm_list) {
3080 int npages, idx, freed_pages;
3081 LIST_HEAD(invalid_list);
3083 idx = srcu_read_lock(&kvm->srcu);
3084 spin_lock(&kvm->mmu_lock);
3085 npages = kvm->arch.n_alloc_mmu_pages -
3086 kvm->arch.n_free_mmu_pages;
3087 cache_count += npages;
3088 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3089 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3091 cache_count -= freed_pages;
3096 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3097 spin_unlock(&kvm->mmu_lock);
3098 srcu_read_unlock(&kvm->srcu, idx);
3101 list_move_tail(&kvm_freed->vm_list, &vm_list);
3103 spin_unlock(&kvm_lock);
3108 static struct shrinker mmu_shrinker = {
3109 .shrink = mmu_shrink,
3110 .seeks = DEFAULT_SEEKS * 10,
3113 static void mmu_destroy_caches(void)
3115 if (pte_chain_cache)
3116 kmem_cache_destroy(pte_chain_cache);
3117 if (rmap_desc_cache)
3118 kmem_cache_destroy(rmap_desc_cache);
3119 if (mmu_page_header_cache)
3120 kmem_cache_destroy(mmu_page_header_cache);
3123 void kvm_mmu_module_exit(void)
3125 mmu_destroy_caches();
3126 unregister_shrinker(&mmu_shrinker);
3129 int kvm_mmu_module_init(void)
3131 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3132 sizeof(struct kvm_pte_chain),
3134 if (!pte_chain_cache)
3136 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3137 sizeof(struct kvm_rmap_desc),
3139 if (!rmap_desc_cache)
3142 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3143 sizeof(struct kvm_mmu_page),
3145 if (!mmu_page_header_cache)
3148 register_shrinker(&mmu_shrinker);
3153 mmu_destroy_caches();
3158 * Caculate mmu pages needed for kvm.
3160 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3163 unsigned int nr_mmu_pages;
3164 unsigned int nr_pages = 0;
3165 struct kvm_memslots *slots;
3167 slots = kvm_memslots(kvm);
3169 for (i = 0; i < slots->nmemslots; i++)
3170 nr_pages += slots->memslots[i].npages;
3172 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3173 nr_mmu_pages = max(nr_mmu_pages,
3174 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3176 return nr_mmu_pages;
3179 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3182 if (len > buffer->len)
3187 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3192 ret = pv_mmu_peek_buffer(buffer, len);
3197 buffer->processed += len;
3201 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3202 gpa_t addr, gpa_t value)
3207 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3210 r = mmu_topup_memory_caches(vcpu);
3214 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3220 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3222 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3226 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3228 spin_lock(&vcpu->kvm->mmu_lock);
3229 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3230 spin_unlock(&vcpu->kvm->mmu_lock);
3234 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3235 struct kvm_pv_mmu_op_buffer *buffer)
3237 struct kvm_mmu_op_header *header;
3239 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3242 switch (header->op) {
3243 case KVM_MMU_OP_WRITE_PTE: {
3244 struct kvm_mmu_op_write_pte *wpte;
3246 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3249 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3252 case KVM_MMU_OP_FLUSH_TLB: {
3253 struct kvm_mmu_op_flush_tlb *ftlb;
3255 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3258 return kvm_pv_mmu_flush_tlb(vcpu);
3260 case KVM_MMU_OP_RELEASE_PT: {
3261 struct kvm_mmu_op_release_pt *rpt;
3263 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3266 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3272 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3273 gpa_t addr, unsigned long *ret)
3276 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3278 buffer->ptr = buffer->buf;
3279 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3280 buffer->processed = 0;
3282 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3286 while (buffer->len) {
3287 r = kvm_pv_mmu_op_one(vcpu, buffer);
3296 *ret = buffer->processed;
3300 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3302 struct kvm_shadow_walk_iterator iterator;
3305 spin_lock(&vcpu->kvm->mmu_lock);
3306 for_each_shadow_entry(vcpu, addr, iterator) {
3307 sptes[iterator.level-1] = *iterator.sptep;
3309 if (!is_shadow_present_pte(*iterator.sptep))
3312 spin_unlock(&vcpu->kvm->mmu_lock);
3316 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3320 static const char *audit_msg;
3322 static gva_t canonicalize(gva_t gva)
3324 #ifdef CONFIG_X86_64
3325 gva = (long long)(gva << 16) >> 16;
3331 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3333 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3338 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3339 u64 ent = sp->spt[i];
3341 if (is_shadow_present_pte(ent)) {
3342 if (!is_last_spte(ent, sp->role.level)) {
3343 struct kvm_mmu_page *child;
3344 child = page_header(ent & PT64_BASE_ADDR_MASK);
3345 __mmu_spte_walk(kvm, child, fn);
3347 fn(kvm, &sp->spt[i]);
3352 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3355 struct kvm_mmu_page *sp;
3357 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3359 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3360 hpa_t root = vcpu->arch.mmu.root_hpa;
3361 sp = page_header(root);
3362 __mmu_spte_walk(vcpu->kvm, sp, fn);
3365 for (i = 0; i < 4; ++i) {
3366 hpa_t root = vcpu->arch.mmu.pae_root[i];
3368 if (root && VALID_PAGE(root)) {
3369 root &= PT64_BASE_ADDR_MASK;
3370 sp = page_header(root);
3371 __mmu_spte_walk(vcpu->kvm, sp, fn);
3377 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3378 gva_t va, int level)
3380 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3382 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3384 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3387 if (ent == shadow_trap_nonpresent_pte)
3390 va = canonicalize(va);
3391 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3392 audit_mappings_page(vcpu, ent, va, level - 1);
3394 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3395 gfn_t gfn = gpa >> PAGE_SHIFT;
3396 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3397 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3399 if (is_error_pfn(pfn)) {
3400 kvm_release_pfn_clean(pfn);
3404 if (is_shadow_present_pte(ent)
3405 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3406 printk(KERN_ERR "xx audit error: (%s) levels %d"
3407 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3408 audit_msg, vcpu->arch.mmu.root_level,
3410 is_shadow_present_pte(ent));
3411 else if (ent == shadow_notrap_nonpresent_pte
3412 && !is_error_hpa(hpa))
3413 printk(KERN_ERR "audit: (%s) notrap shadow,"
3414 " valid guest gva %lx\n", audit_msg, va);
3415 kvm_release_pfn_clean(pfn);
3421 static void audit_mappings(struct kvm_vcpu *vcpu)
3425 if (vcpu->arch.mmu.root_level == 4)
3426 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3428 for (i = 0; i < 4; ++i)
3429 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3430 audit_mappings_page(vcpu,
3431 vcpu->arch.mmu.pae_root[i],
3436 static int count_rmaps(struct kvm_vcpu *vcpu)
3438 struct kvm *kvm = vcpu->kvm;
3439 struct kvm_memslots *slots;
3443 idx = srcu_read_lock(&kvm->srcu);
3444 slots = kvm_memslots(kvm);
3445 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3446 struct kvm_memory_slot *m = &slots->memslots[i];
3447 struct kvm_rmap_desc *d;
3449 for (j = 0; j < m->npages; ++j) {
3450 unsigned long *rmapp = &m->rmap[j];
3454 if (!(*rmapp & 1)) {
3458 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3460 for (k = 0; k < RMAP_EXT; ++k)
3469 srcu_read_unlock(&kvm->srcu, idx);
3473 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3475 unsigned long *rmapp;
3476 struct kvm_mmu_page *rev_sp;
3479 if (is_writable_pte(*sptep)) {
3480 rev_sp = page_header(__pa(sptep));
3481 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3483 if (!gfn_to_memslot(kvm, gfn)) {
3484 if (!printk_ratelimit())
3486 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3488 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3489 audit_msg, (long int)(sptep - rev_sp->spt),
3495 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3497 if (!printk_ratelimit())
3499 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3507 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3509 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3512 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3514 struct kvm_mmu_page *sp;
3517 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3520 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3523 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3526 if (!(ent & PT_PRESENT_MASK))
3528 if (!is_writable_pte(ent))
3530 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3536 static void audit_rmap(struct kvm_vcpu *vcpu)
3538 check_writable_mappings_rmap(vcpu);
3542 static void audit_write_protection(struct kvm_vcpu *vcpu)
3544 struct kvm_mmu_page *sp;
3545 struct kvm_memory_slot *slot;
3546 unsigned long *rmapp;
3550 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3551 if (sp->role.direct)
3556 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3557 rmapp = &slot->rmap[gfn - slot->base_gfn];
3559 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3561 if (is_writable_pte(*spte))
3562 printk(KERN_ERR "%s: (%s) shadow page has "
3563 "writable mappings: gfn %lx role %x\n",
3564 __func__, audit_msg, sp->gfn,
3566 spte = rmap_next(vcpu->kvm, rmapp, spte);
3571 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3578 audit_write_protection(vcpu);
3579 if (strcmp("pre pte write", audit_msg) != 0)
3580 audit_mappings(vcpu);
3581 audit_writable_sptes_have_rmaps(vcpu);