]> git.karo-electronics.de Git - mv-sheeva.git/blob - arch/x86/kvm/mmu.c
KVM: x86: Clean up duplicate assignment
[mv-sheeva.git] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  *
11  * Authors:
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Avi Kivity   <avi@qumranet.com>
14  *
15  * This work is licensed under the terms of the GNU GPL, version 2.  See
16  * the COPYING file in the top-level directory.
17  *
18  */
19
20 #include "mmu.h"
21 #include "x86.h"
22 #include "kvm_cache_regs.h"
23
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
35 #include <linux/uaccess.h>
36
37 #include <asm/page.h>
38 #include <asm/cmpxchg.h>
39 #include <asm/io.h>
40 #include <asm/vmx.h>
41
42 /*
43  * When setting this variable to true it enables Two-Dimensional-Paging
44  * where the hardware walks 2 page tables:
45  * 1. the guest-virtual to guest-physical
46  * 2. while doing 1. it walks guest-physical to host-physical
47  * If the hardware supports that we don't need to do shadow paging.
48  */
49 bool tdp_enabled = false;
50
51 #undef MMU_DEBUG
52
53 #undef AUDIT
54
55 #ifdef AUDIT
56 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
57 #else
58 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
59 #endif
60
61 #ifdef MMU_DEBUG
62
63 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
64 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
65
66 #else
67
68 #define pgprintk(x...) do { } while (0)
69 #define rmap_printk(x...) do { } while (0)
70
71 #endif
72
73 #if defined(MMU_DEBUG) || defined(AUDIT)
74 static int dbg = 0;
75 module_param(dbg, bool, 0644);
76 #endif
77
78 static int oos_shadow = 1;
79 module_param(oos_shadow, bool, 0644);
80
81 #ifndef MMU_DEBUG
82 #define ASSERT(x) do { } while (0)
83 #else
84 #define ASSERT(x)                                                       \
85         if (!(x)) {                                                     \
86                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
87                        __FILE__, __LINE__, #x);                         \
88         }
89 #endif
90
91 #define PT_FIRST_AVAIL_BITS_SHIFT 9
92 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
93
94 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
95
96 #define PT64_LEVEL_BITS 9
97
98 #define PT64_LEVEL_SHIFT(level) \
99                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
100
101 #define PT64_LEVEL_MASK(level) \
102                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
103
104 #define PT64_INDEX(address, level)\
105         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
106
107
108 #define PT32_LEVEL_BITS 10
109
110 #define PT32_LEVEL_SHIFT(level) \
111                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
112
113 #define PT32_LEVEL_MASK(level) \
114                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
115 #define PT32_LVL_OFFSET_MASK(level) \
116         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
117                                                 * PT32_LEVEL_BITS))) - 1))
118
119 #define PT32_INDEX(address, level)\
120         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
121
122
123 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
124 #define PT64_DIR_BASE_ADDR_MASK \
125         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
126 #define PT64_LVL_ADDR_MASK(level) \
127         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
128                                                 * PT64_LEVEL_BITS))) - 1))
129 #define PT64_LVL_OFFSET_MASK(level) \
130         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
131                                                 * PT64_LEVEL_BITS))) - 1))
132
133 #define PT32_BASE_ADDR_MASK PAGE_MASK
134 #define PT32_DIR_BASE_ADDR_MASK \
135         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
136 #define PT32_LVL_ADDR_MASK(level) \
137         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
138                                             * PT32_LEVEL_BITS))) - 1))
139
140 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
141                         | PT64_NX_MASK)
142
143 #define RMAP_EXT 4
144
145 #define ACC_EXEC_MASK    1
146 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
147 #define ACC_USER_MASK    PT_USER_MASK
148 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
149
150 #include <trace/events/kvm.h>
151
152 #define CREATE_TRACE_POINTS
153 #include "mmutrace.h"
154
155 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156
157 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158
159 struct kvm_rmap_desc {
160         u64 *sptes[RMAP_EXT];
161         struct kvm_rmap_desc *more;
162 };
163
164 struct kvm_shadow_walk_iterator {
165         u64 addr;
166         hpa_t shadow_addr;
167         int level;
168         u64 *sptep;
169         unsigned index;
170 };
171
172 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
173         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
174              shadow_walk_okay(&(_walker));                      \
175              shadow_walk_next(&(_walker)))
176
177 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
178
179 static struct kmem_cache *pte_chain_cache;
180 static struct kmem_cache *rmap_desc_cache;
181 static struct kmem_cache *mmu_page_header_cache;
182
183 static u64 __read_mostly shadow_trap_nonpresent_pte;
184 static u64 __read_mostly shadow_notrap_nonpresent_pte;
185 static u64 __read_mostly shadow_base_present_pte;
186 static u64 __read_mostly shadow_nx_mask;
187 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
188 static u64 __read_mostly shadow_user_mask;
189 static u64 __read_mostly shadow_accessed_mask;
190 static u64 __read_mostly shadow_dirty_mask;
191
192 static inline u64 rsvd_bits(int s, int e)
193 {
194         return ((1ULL << (e - s + 1)) - 1) << s;
195 }
196
197 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
198 {
199         shadow_trap_nonpresent_pte = trap_pte;
200         shadow_notrap_nonpresent_pte = notrap_pte;
201 }
202 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
203
204 void kvm_mmu_set_base_ptes(u64 base_pte)
205 {
206         shadow_base_present_pte = base_pte;
207 }
208 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
209
210 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
211                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
212 {
213         shadow_user_mask = user_mask;
214         shadow_accessed_mask = accessed_mask;
215         shadow_dirty_mask = dirty_mask;
216         shadow_nx_mask = nx_mask;
217         shadow_x_mask = x_mask;
218 }
219 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
220
221 static bool is_write_protection(struct kvm_vcpu *vcpu)
222 {
223         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
224 }
225
226 static int is_cpuid_PSE36(void)
227 {
228         return 1;
229 }
230
231 static int is_nx(struct kvm_vcpu *vcpu)
232 {
233         return vcpu->arch.efer & EFER_NX;
234 }
235
236 static int is_shadow_present_pte(u64 pte)
237 {
238         return pte != shadow_trap_nonpresent_pte
239                 && pte != shadow_notrap_nonpresent_pte;
240 }
241
242 static int is_large_pte(u64 pte)
243 {
244         return pte & PT_PAGE_SIZE_MASK;
245 }
246
247 static int is_writable_pte(unsigned long pte)
248 {
249         return pte & PT_WRITABLE_MASK;
250 }
251
252 static int is_dirty_gpte(unsigned long pte)
253 {
254         return pte & PT_DIRTY_MASK;
255 }
256
257 static int is_rmap_spte(u64 pte)
258 {
259         return is_shadow_present_pte(pte);
260 }
261
262 static int is_last_spte(u64 pte, int level)
263 {
264         if (level == PT_PAGE_TABLE_LEVEL)
265                 return 1;
266         if (is_large_pte(pte))
267                 return 1;
268         return 0;
269 }
270
271 static pfn_t spte_to_pfn(u64 pte)
272 {
273         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
274 }
275
276 static gfn_t pse36_gfn_delta(u32 gpte)
277 {
278         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
279
280         return (gpte & PT32_DIR_PSE36_MASK) << shift;
281 }
282
283 static void __set_spte(u64 *sptep, u64 spte)
284 {
285 #ifdef CONFIG_X86_64
286         set_64bit((unsigned long *)sptep, spte);
287 #else
288         set_64bit((unsigned long long *)sptep, spte);
289 #endif
290 }
291
292 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
293                                   struct kmem_cache *base_cache, int min)
294 {
295         void *obj;
296
297         if (cache->nobjs >= min)
298                 return 0;
299         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
300                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
301                 if (!obj)
302                         return -ENOMEM;
303                 cache->objects[cache->nobjs++] = obj;
304         }
305         return 0;
306 }
307
308 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
309 {
310         while (mc->nobjs)
311                 kfree(mc->objects[--mc->nobjs]);
312 }
313
314 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
315                                        int min)
316 {
317         struct page *page;
318
319         if (cache->nobjs >= min)
320                 return 0;
321         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
322                 page = alloc_page(GFP_KERNEL);
323                 if (!page)
324                         return -ENOMEM;
325                 cache->objects[cache->nobjs++] = page_address(page);
326         }
327         return 0;
328 }
329
330 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
331 {
332         while (mc->nobjs)
333                 free_page((unsigned long)mc->objects[--mc->nobjs]);
334 }
335
336 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
337 {
338         int r;
339
340         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
341                                    pte_chain_cache, 4);
342         if (r)
343                 goto out;
344         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
345                                    rmap_desc_cache, 4);
346         if (r)
347                 goto out;
348         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
349         if (r)
350                 goto out;
351         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
352                                    mmu_page_header_cache, 4);
353 out:
354         return r;
355 }
356
357 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
358 {
359         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
360         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
361         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
362         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
363 }
364
365 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
366                                     size_t size)
367 {
368         void *p;
369
370         BUG_ON(!mc->nobjs);
371         p = mc->objects[--mc->nobjs];
372         return p;
373 }
374
375 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
376 {
377         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
378                                       sizeof(struct kvm_pte_chain));
379 }
380
381 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
382 {
383         kfree(pc);
384 }
385
386 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
387 {
388         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
389                                       sizeof(struct kvm_rmap_desc));
390 }
391
392 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
393 {
394         kfree(rd);
395 }
396
397 /*
398  * Return the pointer to the largepage write count for a given
399  * gfn, handling slots that are not large page aligned.
400  */
401 static int *slot_largepage_idx(gfn_t gfn,
402                                struct kvm_memory_slot *slot,
403                                int level)
404 {
405         unsigned long idx;
406
407         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
408               (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
409         return &slot->lpage_info[level - 2][idx].write_count;
410 }
411
412 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
413 {
414         struct kvm_memory_slot *slot;
415         int *write_count;
416         int i;
417
418         gfn = unalias_gfn(kvm, gfn);
419
420         slot = gfn_to_memslot_unaliased(kvm, gfn);
421         for (i = PT_DIRECTORY_LEVEL;
422              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
423                 write_count   = slot_largepage_idx(gfn, slot, i);
424                 *write_count += 1;
425         }
426 }
427
428 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
429 {
430         struct kvm_memory_slot *slot;
431         int *write_count;
432         int i;
433
434         gfn = unalias_gfn(kvm, gfn);
435         slot = gfn_to_memslot_unaliased(kvm, gfn);
436         for (i = PT_DIRECTORY_LEVEL;
437              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
438                 write_count   = slot_largepage_idx(gfn, slot, i);
439                 *write_count -= 1;
440                 WARN_ON(*write_count < 0);
441         }
442 }
443
444 static int has_wrprotected_page(struct kvm *kvm,
445                                 gfn_t gfn,
446                                 int level)
447 {
448         struct kvm_memory_slot *slot;
449         int *largepage_idx;
450
451         gfn = unalias_gfn(kvm, gfn);
452         slot = gfn_to_memslot_unaliased(kvm, gfn);
453         if (slot) {
454                 largepage_idx = slot_largepage_idx(gfn, slot, level);
455                 return *largepage_idx;
456         }
457
458         return 1;
459 }
460
461 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
462 {
463         unsigned long page_size;
464         int i, ret = 0;
465
466         page_size = kvm_host_page_size(kvm, gfn);
467
468         for (i = PT_PAGE_TABLE_LEVEL;
469              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
470                 if (page_size >= KVM_HPAGE_SIZE(i))
471                         ret = i;
472                 else
473                         break;
474         }
475
476         return ret;
477 }
478
479 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
480 {
481         struct kvm_memory_slot *slot;
482         int host_level, level, max_level;
483
484         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
485         if (slot && slot->dirty_bitmap)
486                 return PT_PAGE_TABLE_LEVEL;
487
488         host_level = host_mapping_level(vcpu->kvm, large_gfn);
489
490         if (host_level == PT_PAGE_TABLE_LEVEL)
491                 return host_level;
492
493         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
494                 kvm_x86_ops->get_lpage_level() : host_level;
495
496         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
497                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
498                         break;
499
500         return level - 1;
501 }
502
503 /*
504  * Take gfn and return the reverse mapping to it.
505  * Note: gfn must be unaliased before this function get called
506  */
507
508 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
509 {
510         struct kvm_memory_slot *slot;
511         unsigned long idx;
512
513         slot = gfn_to_memslot(kvm, gfn);
514         if (likely(level == PT_PAGE_TABLE_LEVEL))
515                 return &slot->rmap[gfn - slot->base_gfn];
516
517         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
518                 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
519
520         return &slot->lpage_info[level - 2][idx].rmap_pde;
521 }
522
523 /*
524  * Reverse mapping data structures:
525  *
526  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
527  * that points to page_address(page).
528  *
529  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
530  * containing more mappings.
531  *
532  * Returns the number of rmap entries before the spte was added or zero if
533  * the spte was not added.
534  *
535  */
536 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
537 {
538         struct kvm_mmu_page *sp;
539         struct kvm_rmap_desc *desc;
540         unsigned long *rmapp;
541         int i, count = 0;
542
543         if (!is_rmap_spte(*spte))
544                 return count;
545         gfn = unalias_gfn(vcpu->kvm, gfn);
546         sp = page_header(__pa(spte));
547         sp->gfns[spte - sp->spt] = gfn;
548         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
549         if (!*rmapp) {
550                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
551                 *rmapp = (unsigned long)spte;
552         } else if (!(*rmapp & 1)) {
553                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
554                 desc = mmu_alloc_rmap_desc(vcpu);
555                 desc->sptes[0] = (u64 *)*rmapp;
556                 desc->sptes[1] = spte;
557                 *rmapp = (unsigned long)desc | 1;
558         } else {
559                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
560                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
561                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
562                         desc = desc->more;
563                         count += RMAP_EXT;
564                 }
565                 if (desc->sptes[RMAP_EXT-1]) {
566                         desc->more = mmu_alloc_rmap_desc(vcpu);
567                         desc = desc->more;
568                 }
569                 for (i = 0; desc->sptes[i]; ++i)
570                         ;
571                 desc->sptes[i] = spte;
572         }
573         return count;
574 }
575
576 static void rmap_desc_remove_entry(unsigned long *rmapp,
577                                    struct kvm_rmap_desc *desc,
578                                    int i,
579                                    struct kvm_rmap_desc *prev_desc)
580 {
581         int j;
582
583         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
584                 ;
585         desc->sptes[i] = desc->sptes[j];
586         desc->sptes[j] = NULL;
587         if (j != 0)
588                 return;
589         if (!prev_desc && !desc->more)
590                 *rmapp = (unsigned long)desc->sptes[0];
591         else
592                 if (prev_desc)
593                         prev_desc->more = desc->more;
594                 else
595                         *rmapp = (unsigned long)desc->more | 1;
596         mmu_free_rmap_desc(desc);
597 }
598
599 static void rmap_remove(struct kvm *kvm, u64 *spte)
600 {
601         struct kvm_rmap_desc *desc;
602         struct kvm_rmap_desc *prev_desc;
603         struct kvm_mmu_page *sp;
604         pfn_t pfn;
605         unsigned long *rmapp;
606         int i;
607
608         if (!is_rmap_spte(*spte))
609                 return;
610         sp = page_header(__pa(spte));
611         pfn = spte_to_pfn(*spte);
612         if (*spte & shadow_accessed_mask)
613                 kvm_set_pfn_accessed(pfn);
614         if (is_writable_pte(*spte))
615                 kvm_set_pfn_dirty(pfn);
616         rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
617         if (!*rmapp) {
618                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
619                 BUG();
620         } else if (!(*rmapp & 1)) {
621                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
622                 if ((u64 *)*rmapp != spte) {
623                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
624                                spte, *spte);
625                         BUG();
626                 }
627                 *rmapp = 0;
628         } else {
629                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
630                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
631                 prev_desc = NULL;
632                 while (desc) {
633                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
634                                 if (desc->sptes[i] == spte) {
635                                         rmap_desc_remove_entry(rmapp,
636                                                                desc, i,
637                                                                prev_desc);
638                                         return;
639                                 }
640                         prev_desc = desc;
641                         desc = desc->more;
642                 }
643                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
644                 BUG();
645         }
646 }
647
648 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
649 {
650         struct kvm_rmap_desc *desc;
651         u64 *prev_spte;
652         int i;
653
654         if (!*rmapp)
655                 return NULL;
656         else if (!(*rmapp & 1)) {
657                 if (!spte)
658                         return (u64 *)*rmapp;
659                 return NULL;
660         }
661         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
662         prev_spte = NULL;
663         while (desc) {
664                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
665                         if (prev_spte == spte)
666                                 return desc->sptes[i];
667                         prev_spte = desc->sptes[i];
668                 }
669                 desc = desc->more;
670         }
671         return NULL;
672 }
673
674 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
675 {
676         unsigned long *rmapp;
677         u64 *spte;
678         int i, write_protected = 0;
679
680         gfn = unalias_gfn(kvm, gfn);
681         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
682
683         spte = rmap_next(kvm, rmapp, NULL);
684         while (spte) {
685                 BUG_ON(!spte);
686                 BUG_ON(!(*spte & PT_PRESENT_MASK));
687                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
688                 if (is_writable_pte(*spte)) {
689                         __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
690                         write_protected = 1;
691                 }
692                 spte = rmap_next(kvm, rmapp, spte);
693         }
694         if (write_protected) {
695                 pfn_t pfn;
696
697                 spte = rmap_next(kvm, rmapp, NULL);
698                 pfn = spte_to_pfn(*spte);
699                 kvm_set_pfn_dirty(pfn);
700         }
701
702         /* check for huge page mappings */
703         for (i = PT_DIRECTORY_LEVEL;
704              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
705                 rmapp = gfn_to_rmap(kvm, gfn, i);
706                 spte = rmap_next(kvm, rmapp, NULL);
707                 while (spte) {
708                         BUG_ON(!spte);
709                         BUG_ON(!(*spte & PT_PRESENT_MASK));
710                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
711                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
712                         if (is_writable_pte(*spte)) {
713                                 rmap_remove(kvm, spte);
714                                 --kvm->stat.lpages;
715                                 __set_spte(spte, shadow_trap_nonpresent_pte);
716                                 spte = NULL;
717                                 write_protected = 1;
718                         }
719                         spte = rmap_next(kvm, rmapp, spte);
720                 }
721         }
722
723         return write_protected;
724 }
725
726 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
727                            unsigned long data)
728 {
729         u64 *spte;
730         int need_tlb_flush = 0;
731
732         while ((spte = rmap_next(kvm, rmapp, NULL))) {
733                 BUG_ON(!(*spte & PT_PRESENT_MASK));
734                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
735                 rmap_remove(kvm, spte);
736                 __set_spte(spte, shadow_trap_nonpresent_pte);
737                 need_tlb_flush = 1;
738         }
739         return need_tlb_flush;
740 }
741
742 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
743                              unsigned long data)
744 {
745         int need_flush = 0;
746         u64 *spte, new_spte;
747         pte_t *ptep = (pte_t *)data;
748         pfn_t new_pfn;
749
750         WARN_ON(pte_huge(*ptep));
751         new_pfn = pte_pfn(*ptep);
752         spte = rmap_next(kvm, rmapp, NULL);
753         while (spte) {
754                 BUG_ON(!is_shadow_present_pte(*spte));
755                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
756                 need_flush = 1;
757                 if (pte_write(*ptep)) {
758                         rmap_remove(kvm, spte);
759                         __set_spte(spte, shadow_trap_nonpresent_pte);
760                         spte = rmap_next(kvm, rmapp, NULL);
761                 } else {
762                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
763                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
764
765                         new_spte &= ~PT_WRITABLE_MASK;
766                         new_spte &= ~SPTE_HOST_WRITEABLE;
767                         if (is_writable_pte(*spte))
768                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
769                         __set_spte(spte, new_spte);
770                         spte = rmap_next(kvm, rmapp, spte);
771                 }
772         }
773         if (need_flush)
774                 kvm_flush_remote_tlbs(kvm);
775
776         return 0;
777 }
778
779 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
780                           unsigned long data,
781                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
782                                          unsigned long data))
783 {
784         int i, j;
785         int ret;
786         int retval = 0;
787         struct kvm_memslots *slots;
788
789         slots = kvm_memslots(kvm);
790
791         for (i = 0; i < slots->nmemslots; i++) {
792                 struct kvm_memory_slot *memslot = &slots->memslots[i];
793                 unsigned long start = memslot->userspace_addr;
794                 unsigned long end;
795
796                 end = start + (memslot->npages << PAGE_SHIFT);
797                 if (hva >= start && hva < end) {
798                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
799
800                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
801
802                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
803                                 int idx = gfn_offset;
804                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
805                                 ret |= handler(kvm,
806                                         &memslot->lpage_info[j][idx].rmap_pde,
807                                         data);
808                         }
809                         trace_kvm_age_page(hva, memslot, ret);
810                         retval |= ret;
811                 }
812         }
813
814         return retval;
815 }
816
817 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
818 {
819         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
820 }
821
822 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
823 {
824         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
825 }
826
827 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
828                          unsigned long data)
829 {
830         u64 *spte;
831         int young = 0;
832
833         /*
834          * Emulate the accessed bit for EPT, by checking if this page has
835          * an EPT mapping, and clearing it if it does. On the next access,
836          * a new EPT mapping will be established.
837          * This has some overhead, but not as much as the cost of swapping
838          * out actively used pages or breaking up actively used hugepages.
839          */
840         if (!shadow_accessed_mask)
841                 return kvm_unmap_rmapp(kvm, rmapp, data);
842
843         spte = rmap_next(kvm, rmapp, NULL);
844         while (spte) {
845                 int _young;
846                 u64 _spte = *spte;
847                 BUG_ON(!(_spte & PT_PRESENT_MASK));
848                 _young = _spte & PT_ACCESSED_MASK;
849                 if (_young) {
850                         young = 1;
851                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
852                 }
853                 spte = rmap_next(kvm, rmapp, spte);
854         }
855         return young;
856 }
857
858 #define RMAP_RECYCLE_THRESHOLD 1000
859
860 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
861 {
862         unsigned long *rmapp;
863         struct kvm_mmu_page *sp;
864
865         sp = page_header(__pa(spte));
866
867         gfn = unalias_gfn(vcpu->kvm, gfn);
868         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
869
870         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
871         kvm_flush_remote_tlbs(vcpu->kvm);
872 }
873
874 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
875 {
876         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
877 }
878
879 #ifdef MMU_DEBUG
880 static int is_empty_shadow_page(u64 *spt)
881 {
882         u64 *pos;
883         u64 *end;
884
885         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
886                 if (is_shadow_present_pte(*pos)) {
887                         printk(KERN_ERR "%s: %p %llx\n", __func__,
888                                pos, *pos);
889                         return 0;
890                 }
891         return 1;
892 }
893 #endif
894
895 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
896 {
897         ASSERT(is_empty_shadow_page(sp->spt));
898         list_del(&sp->link);
899         __free_page(virt_to_page(sp->spt));
900         __free_page(virt_to_page(sp->gfns));
901         kfree(sp);
902         ++kvm->arch.n_free_mmu_pages;
903 }
904
905 static unsigned kvm_page_table_hashfn(gfn_t gfn)
906 {
907         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
908 }
909
910 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
911                                                u64 *parent_pte)
912 {
913         struct kvm_mmu_page *sp;
914
915         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
916         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
917         sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
918         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
919         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
920         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
921         sp->multimapped = 0;
922         sp->parent_pte = parent_pte;
923         --vcpu->kvm->arch.n_free_mmu_pages;
924         return sp;
925 }
926
927 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
928                                     struct kvm_mmu_page *sp, u64 *parent_pte)
929 {
930         struct kvm_pte_chain *pte_chain;
931         struct hlist_node *node;
932         int i;
933
934         if (!parent_pte)
935                 return;
936         if (!sp->multimapped) {
937                 u64 *old = sp->parent_pte;
938
939                 if (!old) {
940                         sp->parent_pte = parent_pte;
941                         return;
942                 }
943                 sp->multimapped = 1;
944                 pte_chain = mmu_alloc_pte_chain(vcpu);
945                 INIT_HLIST_HEAD(&sp->parent_ptes);
946                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
947                 pte_chain->parent_ptes[0] = old;
948         }
949         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
950                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
951                         continue;
952                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
953                         if (!pte_chain->parent_ptes[i]) {
954                                 pte_chain->parent_ptes[i] = parent_pte;
955                                 return;
956                         }
957         }
958         pte_chain = mmu_alloc_pte_chain(vcpu);
959         BUG_ON(!pte_chain);
960         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
961         pte_chain->parent_ptes[0] = parent_pte;
962 }
963
964 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
965                                        u64 *parent_pte)
966 {
967         struct kvm_pte_chain *pte_chain;
968         struct hlist_node *node;
969         int i;
970
971         if (!sp->multimapped) {
972                 BUG_ON(sp->parent_pte != parent_pte);
973                 sp->parent_pte = NULL;
974                 return;
975         }
976         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
977                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
978                         if (!pte_chain->parent_ptes[i])
979                                 break;
980                         if (pte_chain->parent_ptes[i] != parent_pte)
981                                 continue;
982                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
983                                 && pte_chain->parent_ptes[i + 1]) {
984                                 pte_chain->parent_ptes[i]
985                                         = pte_chain->parent_ptes[i + 1];
986                                 ++i;
987                         }
988                         pte_chain->parent_ptes[i] = NULL;
989                         if (i == 0) {
990                                 hlist_del(&pte_chain->link);
991                                 mmu_free_pte_chain(pte_chain);
992                                 if (hlist_empty(&sp->parent_ptes)) {
993                                         sp->multimapped = 0;
994                                         sp->parent_pte = NULL;
995                                 }
996                         }
997                         return;
998                 }
999         BUG();
1000 }
1001
1002
1003 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1004 {
1005         struct kvm_pte_chain *pte_chain;
1006         struct hlist_node *node;
1007         struct kvm_mmu_page *parent_sp;
1008         int i;
1009
1010         if (!sp->multimapped && sp->parent_pte) {
1011                 parent_sp = page_header(__pa(sp->parent_pte));
1012                 fn(parent_sp);
1013                 mmu_parent_walk(parent_sp, fn);
1014                 return;
1015         }
1016         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1017                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1018                         if (!pte_chain->parent_ptes[i])
1019                                 break;
1020                         parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1021                         fn(parent_sp);
1022                         mmu_parent_walk(parent_sp, fn);
1023                 }
1024 }
1025
1026 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1027 {
1028         unsigned int index;
1029         struct kvm_mmu_page *sp = page_header(__pa(spte));
1030
1031         index = spte - sp->spt;
1032         if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1033                 sp->unsync_children++;
1034         WARN_ON(!sp->unsync_children);
1035 }
1036
1037 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1038 {
1039         struct kvm_pte_chain *pte_chain;
1040         struct hlist_node *node;
1041         int i;
1042
1043         if (!sp->parent_pte)
1044                 return;
1045
1046         if (!sp->multimapped) {
1047                 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1048                 return;
1049         }
1050
1051         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1052                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1053                         if (!pte_chain->parent_ptes[i])
1054                                 break;
1055                         kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1056                 }
1057 }
1058
1059 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1060 {
1061         kvm_mmu_update_parents_unsync(sp);
1062         return 1;
1063 }
1064
1065 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1066 {
1067         mmu_parent_walk(sp, unsync_walk_fn);
1068         kvm_mmu_update_parents_unsync(sp);
1069 }
1070
1071 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1072                                     struct kvm_mmu_page *sp)
1073 {
1074         int i;
1075
1076         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1077                 sp->spt[i] = shadow_trap_nonpresent_pte;
1078 }
1079
1080 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1081                                struct kvm_mmu_page *sp)
1082 {
1083         return 1;
1084 }
1085
1086 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1087 {
1088 }
1089
1090 #define KVM_PAGE_ARRAY_NR 16
1091
1092 struct kvm_mmu_pages {
1093         struct mmu_page_and_offset {
1094                 struct kvm_mmu_page *sp;
1095                 unsigned int idx;
1096         } page[KVM_PAGE_ARRAY_NR];
1097         unsigned int nr;
1098 };
1099
1100 #define for_each_unsync_children(bitmap, idx)           \
1101         for (idx = find_first_bit(bitmap, 512);         \
1102              idx < 512;                                 \
1103              idx = find_next_bit(bitmap, 512, idx+1))
1104
1105 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1106                          int idx)
1107 {
1108         int i;
1109
1110         if (sp->unsync)
1111                 for (i=0; i < pvec->nr; i++)
1112                         if (pvec->page[i].sp == sp)
1113                                 return 0;
1114
1115         pvec->page[pvec->nr].sp = sp;
1116         pvec->page[pvec->nr].idx = idx;
1117         pvec->nr++;
1118         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1119 }
1120
1121 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1122                            struct kvm_mmu_pages *pvec)
1123 {
1124         int i, ret, nr_unsync_leaf = 0;
1125
1126         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1127                 u64 ent = sp->spt[i];
1128
1129                 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1130                         struct kvm_mmu_page *child;
1131                         child = page_header(ent & PT64_BASE_ADDR_MASK);
1132
1133                         if (child->unsync_children) {
1134                                 if (mmu_pages_add(pvec, child, i))
1135                                         return -ENOSPC;
1136
1137                                 ret = __mmu_unsync_walk(child, pvec);
1138                                 if (!ret)
1139                                         __clear_bit(i, sp->unsync_child_bitmap);
1140                                 else if (ret > 0)
1141                                         nr_unsync_leaf += ret;
1142                                 else
1143                                         return ret;
1144                         }
1145
1146                         if (child->unsync) {
1147                                 nr_unsync_leaf++;
1148                                 if (mmu_pages_add(pvec, child, i))
1149                                         return -ENOSPC;
1150                         }
1151                 }
1152         }
1153
1154         if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1155                 sp->unsync_children = 0;
1156
1157         return nr_unsync_leaf;
1158 }
1159
1160 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1161                            struct kvm_mmu_pages *pvec)
1162 {
1163         if (!sp->unsync_children)
1164                 return 0;
1165
1166         mmu_pages_add(pvec, sp, 0);
1167         return __mmu_unsync_walk(sp, pvec);
1168 }
1169
1170 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1171 {
1172         unsigned index;
1173         struct hlist_head *bucket;
1174         struct kvm_mmu_page *sp;
1175         struct hlist_node *node;
1176
1177         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1178         index = kvm_page_table_hashfn(gfn);
1179         bucket = &kvm->arch.mmu_page_hash[index];
1180         hlist_for_each_entry(sp, node, bucket, hash_link)
1181                 if (sp->gfn == gfn && !sp->role.direct
1182                     && !sp->role.invalid) {
1183                         pgprintk("%s: found role %x\n",
1184                                  __func__, sp->role.word);
1185                         return sp;
1186                 }
1187         return NULL;
1188 }
1189
1190 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1191 {
1192         WARN_ON(!sp->unsync);
1193         trace_kvm_mmu_sync_page(sp);
1194         sp->unsync = 0;
1195         --kvm->stat.mmu_unsync;
1196 }
1197
1198 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1199
1200 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1201 {
1202         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1203                 kvm_mmu_zap_page(vcpu->kvm, sp);
1204                 return 1;
1205         }
1206
1207         if (rmap_write_protect(vcpu->kvm, sp->gfn))
1208                 kvm_flush_remote_tlbs(vcpu->kvm);
1209         kvm_unlink_unsync_page(vcpu->kvm, sp);
1210         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1211                 kvm_mmu_zap_page(vcpu->kvm, sp);
1212                 return 1;
1213         }
1214
1215         kvm_mmu_flush_tlb(vcpu);
1216         return 0;
1217 }
1218
1219 struct mmu_page_path {
1220         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1221         unsigned int idx[PT64_ROOT_LEVEL-1];
1222 };
1223
1224 #define for_each_sp(pvec, sp, parents, i)                       \
1225                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1226                         sp = pvec.page[i].sp;                   \
1227                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1228                         i = mmu_pages_next(&pvec, &parents, i))
1229
1230 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1231                           struct mmu_page_path *parents,
1232                           int i)
1233 {
1234         int n;
1235
1236         for (n = i+1; n < pvec->nr; n++) {
1237                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1238
1239                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1240                         parents->idx[0] = pvec->page[n].idx;
1241                         return n;
1242                 }
1243
1244                 parents->parent[sp->role.level-2] = sp;
1245                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1246         }
1247
1248         return n;
1249 }
1250
1251 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1252 {
1253         struct kvm_mmu_page *sp;
1254         unsigned int level = 0;
1255
1256         do {
1257                 unsigned int idx = parents->idx[level];
1258
1259                 sp = parents->parent[level];
1260                 if (!sp)
1261                         return;
1262
1263                 --sp->unsync_children;
1264                 WARN_ON((int)sp->unsync_children < 0);
1265                 __clear_bit(idx, sp->unsync_child_bitmap);
1266                 level++;
1267         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1268 }
1269
1270 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1271                                struct mmu_page_path *parents,
1272                                struct kvm_mmu_pages *pvec)
1273 {
1274         parents->parent[parent->role.level-1] = NULL;
1275         pvec->nr = 0;
1276 }
1277
1278 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1279                               struct kvm_mmu_page *parent)
1280 {
1281         int i;
1282         struct kvm_mmu_page *sp;
1283         struct mmu_page_path parents;
1284         struct kvm_mmu_pages pages;
1285
1286         kvm_mmu_pages_init(parent, &parents, &pages);
1287         while (mmu_unsync_walk(parent, &pages)) {
1288                 int protected = 0;
1289
1290                 for_each_sp(pages, sp, parents, i)
1291                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1292
1293                 if (protected)
1294                         kvm_flush_remote_tlbs(vcpu->kvm);
1295
1296                 for_each_sp(pages, sp, parents, i) {
1297                         kvm_sync_page(vcpu, sp);
1298                         mmu_pages_clear_parents(&parents);
1299                 }
1300                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1301                 kvm_mmu_pages_init(parent, &parents, &pages);
1302         }
1303 }
1304
1305 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1306                                              gfn_t gfn,
1307                                              gva_t gaddr,
1308                                              unsigned level,
1309                                              int direct,
1310                                              unsigned access,
1311                                              u64 *parent_pte)
1312 {
1313         union kvm_mmu_page_role role;
1314         unsigned index;
1315         unsigned quadrant;
1316         struct hlist_head *bucket;
1317         struct kvm_mmu_page *sp;
1318         struct hlist_node *node, *tmp;
1319
1320         role = vcpu->arch.mmu.base_role;
1321         role.level = level;
1322         role.direct = direct;
1323         if (role.direct)
1324                 role.cr4_pae = 0;
1325         role.access = access;
1326         if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1327                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1328                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1329                 role.quadrant = quadrant;
1330         }
1331         index = kvm_page_table_hashfn(gfn);
1332         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1333         hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1334                 if (sp->gfn == gfn) {
1335                         if (sp->unsync)
1336                                 if (kvm_sync_page(vcpu, sp))
1337                                         continue;
1338
1339                         if (sp->role.word != role.word)
1340                                 continue;
1341
1342                         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1343                         if (sp->unsync_children) {
1344                                 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1345                                 kvm_mmu_mark_parents_unsync(sp);
1346                         }
1347                         trace_kvm_mmu_get_page(sp, false);
1348                         return sp;
1349                 }
1350         ++vcpu->kvm->stat.mmu_cache_miss;
1351         sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1352         if (!sp)
1353                 return sp;
1354         sp->gfn = gfn;
1355         sp->role = role;
1356         hlist_add_head(&sp->hash_link, bucket);
1357         if (!direct) {
1358                 if (rmap_write_protect(vcpu->kvm, gfn))
1359                         kvm_flush_remote_tlbs(vcpu->kvm);
1360                 account_shadowed(vcpu->kvm, gfn);
1361         }
1362         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1363                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1364         else
1365                 nonpaging_prefetch_page(vcpu, sp);
1366         trace_kvm_mmu_get_page(sp, true);
1367         return sp;
1368 }
1369
1370 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1371                              struct kvm_vcpu *vcpu, u64 addr)
1372 {
1373         iterator->addr = addr;
1374         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1375         iterator->level = vcpu->arch.mmu.shadow_root_level;
1376         if (iterator->level == PT32E_ROOT_LEVEL) {
1377                 iterator->shadow_addr
1378                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1379                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1380                 --iterator->level;
1381                 if (!iterator->shadow_addr)
1382                         iterator->level = 0;
1383         }
1384 }
1385
1386 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1387 {
1388         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1389                 return false;
1390
1391         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1392                 if (is_large_pte(*iterator->sptep))
1393                         return false;
1394
1395         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1396         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1397         return true;
1398 }
1399
1400 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1401 {
1402         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1403         --iterator->level;
1404 }
1405
1406 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1407                                          struct kvm_mmu_page *sp)
1408 {
1409         unsigned i;
1410         u64 *pt;
1411         u64 ent;
1412
1413         pt = sp->spt;
1414
1415         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1416                 ent = pt[i];
1417
1418                 if (is_shadow_present_pte(ent)) {
1419                         if (!is_last_spte(ent, sp->role.level)) {
1420                                 ent &= PT64_BASE_ADDR_MASK;
1421                                 mmu_page_remove_parent_pte(page_header(ent),
1422                                                            &pt[i]);
1423                         } else {
1424                                 if (is_large_pte(ent))
1425                                         --kvm->stat.lpages;
1426                                 rmap_remove(kvm, &pt[i]);
1427                         }
1428                 }
1429                 pt[i] = shadow_trap_nonpresent_pte;
1430         }
1431 }
1432
1433 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1434 {
1435         mmu_page_remove_parent_pte(sp, parent_pte);
1436 }
1437
1438 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1439 {
1440         int i;
1441         struct kvm_vcpu *vcpu;
1442
1443         kvm_for_each_vcpu(i, vcpu, kvm)
1444                 vcpu->arch.last_pte_updated = NULL;
1445 }
1446
1447 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1448 {
1449         u64 *parent_pte;
1450
1451         while (sp->multimapped || sp->parent_pte) {
1452                 if (!sp->multimapped)
1453                         parent_pte = sp->parent_pte;
1454                 else {
1455                         struct kvm_pte_chain *chain;
1456
1457                         chain = container_of(sp->parent_ptes.first,
1458                                              struct kvm_pte_chain, link);
1459                         parent_pte = chain->parent_ptes[0];
1460                 }
1461                 BUG_ON(!parent_pte);
1462                 kvm_mmu_put_page(sp, parent_pte);
1463                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1464         }
1465 }
1466
1467 static int mmu_zap_unsync_children(struct kvm *kvm,
1468                                    struct kvm_mmu_page *parent)
1469 {
1470         int i, zapped = 0;
1471         struct mmu_page_path parents;
1472         struct kvm_mmu_pages pages;
1473
1474         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1475                 return 0;
1476
1477         kvm_mmu_pages_init(parent, &parents, &pages);
1478         while (mmu_unsync_walk(parent, &pages)) {
1479                 struct kvm_mmu_page *sp;
1480
1481                 for_each_sp(pages, sp, parents, i) {
1482                         kvm_mmu_zap_page(kvm, sp);
1483                         mmu_pages_clear_parents(&parents);
1484                         zapped++;
1485                 }
1486                 kvm_mmu_pages_init(parent, &parents, &pages);
1487         }
1488
1489         return zapped;
1490 }
1491
1492 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1493 {
1494         int ret;
1495
1496         trace_kvm_mmu_zap_page(sp);
1497         ++kvm->stat.mmu_shadow_zapped;
1498         ret = mmu_zap_unsync_children(kvm, sp);
1499         kvm_mmu_page_unlink_children(kvm, sp);
1500         kvm_mmu_unlink_parents(kvm, sp);
1501         kvm_flush_remote_tlbs(kvm);
1502         if (!sp->role.invalid && !sp->role.direct)
1503                 unaccount_shadowed(kvm, sp->gfn);
1504         if (sp->unsync)
1505                 kvm_unlink_unsync_page(kvm, sp);
1506         if (!sp->root_count) {
1507                 /* Count self */
1508                 ret++;
1509                 hlist_del(&sp->hash_link);
1510                 kvm_mmu_free_page(kvm, sp);
1511         } else {
1512                 sp->role.invalid = 1;
1513                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1514                 kvm_reload_remote_mmus(kvm);
1515         }
1516         kvm_mmu_reset_last_pte_updated(kvm);
1517         return ret;
1518 }
1519
1520 /*
1521  * Changing the number of mmu pages allocated to the vm
1522  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1523  */
1524 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1525 {
1526         int used_pages;
1527
1528         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1529         used_pages = max(0, used_pages);
1530
1531         /*
1532          * If we set the number of mmu pages to be smaller be than the
1533          * number of actived pages , we must to free some mmu pages before we
1534          * change the value
1535          */
1536
1537         if (used_pages > kvm_nr_mmu_pages) {
1538                 while (used_pages > kvm_nr_mmu_pages &&
1539                         !list_empty(&kvm->arch.active_mmu_pages)) {
1540                         struct kvm_mmu_page *page;
1541
1542                         page = container_of(kvm->arch.active_mmu_pages.prev,
1543                                             struct kvm_mmu_page, link);
1544                         used_pages -= kvm_mmu_zap_page(kvm, page);
1545                 }
1546                 kvm_nr_mmu_pages = used_pages;
1547                 kvm->arch.n_free_mmu_pages = 0;
1548         }
1549         else
1550                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1551                                          - kvm->arch.n_alloc_mmu_pages;
1552
1553         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1554 }
1555
1556 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1557 {
1558         unsigned index;
1559         struct hlist_head *bucket;
1560         struct kvm_mmu_page *sp;
1561         struct hlist_node *node, *n;
1562         int r;
1563
1564         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1565         r = 0;
1566         index = kvm_page_table_hashfn(gfn);
1567         bucket = &kvm->arch.mmu_page_hash[index];
1568 restart:
1569         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1570                 if (sp->gfn == gfn && !sp->role.direct) {
1571                         pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1572                                  sp->role.word);
1573                         r = 1;
1574                         if (kvm_mmu_zap_page(kvm, sp))
1575                                 goto restart;
1576                 }
1577         return r;
1578 }
1579
1580 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1581 {
1582         unsigned index;
1583         struct hlist_head *bucket;
1584         struct kvm_mmu_page *sp;
1585         struct hlist_node *node, *nn;
1586
1587         index = kvm_page_table_hashfn(gfn);
1588         bucket = &kvm->arch.mmu_page_hash[index];
1589 restart:
1590         hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1591                 if (sp->gfn == gfn && !sp->role.direct
1592                     && !sp->role.invalid) {
1593                         pgprintk("%s: zap %lx %x\n",
1594                                  __func__, gfn, sp->role.word);
1595                         if (kvm_mmu_zap_page(kvm, sp))
1596                                 goto restart;
1597                 }
1598         }
1599 }
1600
1601 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1602 {
1603         int slot = memslot_id(kvm, gfn);
1604         struct kvm_mmu_page *sp = page_header(__pa(pte));
1605
1606         __set_bit(slot, sp->slot_bitmap);
1607 }
1608
1609 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1610 {
1611         int i;
1612         u64 *pt = sp->spt;
1613
1614         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1615                 return;
1616
1617         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1618                 if (pt[i] == shadow_notrap_nonpresent_pte)
1619                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1620         }
1621 }
1622
1623 /*
1624  * The function is based on mtrr_type_lookup() in
1625  * arch/x86/kernel/cpu/mtrr/generic.c
1626  */
1627 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1628                          u64 start, u64 end)
1629 {
1630         int i;
1631         u64 base, mask;
1632         u8 prev_match, curr_match;
1633         int num_var_ranges = KVM_NR_VAR_MTRR;
1634
1635         if (!mtrr_state->enabled)
1636                 return 0xFF;
1637
1638         /* Make end inclusive end, instead of exclusive */
1639         end--;
1640
1641         /* Look in fixed ranges. Just return the type as per start */
1642         if (mtrr_state->have_fixed && (start < 0x100000)) {
1643                 int idx;
1644
1645                 if (start < 0x80000) {
1646                         idx = 0;
1647                         idx += (start >> 16);
1648                         return mtrr_state->fixed_ranges[idx];
1649                 } else if (start < 0xC0000) {
1650                         idx = 1 * 8;
1651                         idx += ((start - 0x80000) >> 14);
1652                         return mtrr_state->fixed_ranges[idx];
1653                 } else if (start < 0x1000000) {
1654                         idx = 3 * 8;
1655                         idx += ((start - 0xC0000) >> 12);
1656                         return mtrr_state->fixed_ranges[idx];
1657                 }
1658         }
1659
1660         /*
1661          * Look in variable ranges
1662          * Look of multiple ranges matching this address and pick type
1663          * as per MTRR precedence
1664          */
1665         if (!(mtrr_state->enabled & 2))
1666                 return mtrr_state->def_type;
1667
1668         prev_match = 0xFF;
1669         for (i = 0; i < num_var_ranges; ++i) {
1670                 unsigned short start_state, end_state;
1671
1672                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1673                         continue;
1674
1675                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1676                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1677                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1678                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1679
1680                 start_state = ((start & mask) == (base & mask));
1681                 end_state = ((end & mask) == (base & mask));
1682                 if (start_state != end_state)
1683                         return 0xFE;
1684
1685                 if ((start & mask) != (base & mask))
1686                         continue;
1687
1688                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1689                 if (prev_match == 0xFF) {
1690                         prev_match = curr_match;
1691                         continue;
1692                 }
1693
1694                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1695                     curr_match == MTRR_TYPE_UNCACHABLE)
1696                         return MTRR_TYPE_UNCACHABLE;
1697
1698                 if ((prev_match == MTRR_TYPE_WRBACK &&
1699                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1700                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1701                      curr_match == MTRR_TYPE_WRBACK)) {
1702                         prev_match = MTRR_TYPE_WRTHROUGH;
1703                         curr_match = MTRR_TYPE_WRTHROUGH;
1704                 }
1705
1706                 if (prev_match != curr_match)
1707                         return MTRR_TYPE_UNCACHABLE;
1708         }
1709
1710         if (prev_match != 0xFF)
1711                 return prev_match;
1712
1713         return mtrr_state->def_type;
1714 }
1715
1716 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1717 {
1718         u8 mtrr;
1719
1720         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1721                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1722         if (mtrr == 0xfe || mtrr == 0xff)
1723                 mtrr = MTRR_TYPE_WRBACK;
1724         return mtrr;
1725 }
1726 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1727
1728 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1729 {
1730         unsigned index;
1731         struct hlist_head *bucket;
1732         struct kvm_mmu_page *s;
1733         struct hlist_node *node, *n;
1734
1735         index = kvm_page_table_hashfn(sp->gfn);
1736         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1737         /* don't unsync if pagetable is shadowed with multiple roles */
1738         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1739                 if (s->gfn != sp->gfn || s->role.direct)
1740                         continue;
1741                 if (s->role.word != sp->role.word)
1742                         return 1;
1743         }
1744         trace_kvm_mmu_unsync_page(sp);
1745         ++vcpu->kvm->stat.mmu_unsync;
1746         sp->unsync = 1;
1747
1748         kvm_mmu_mark_parents_unsync(sp);
1749
1750         mmu_convert_notrap(sp);
1751         return 0;
1752 }
1753
1754 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1755                                   bool can_unsync)
1756 {
1757         struct kvm_mmu_page *shadow;
1758
1759         shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1760         if (shadow) {
1761                 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1762                         return 1;
1763                 if (shadow->unsync)
1764                         return 0;
1765                 if (can_unsync && oos_shadow)
1766                         return kvm_unsync_page(vcpu, shadow);
1767                 return 1;
1768         }
1769         return 0;
1770 }
1771
1772 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1773                     unsigned pte_access, int user_fault,
1774                     int write_fault, int dirty, int level,
1775                     gfn_t gfn, pfn_t pfn, bool speculative,
1776                     bool can_unsync, bool reset_host_protection)
1777 {
1778         u64 spte;
1779         int ret = 0;
1780
1781         /*
1782          * We don't set the accessed bit, since we sometimes want to see
1783          * whether the guest actually used the pte (in order to detect
1784          * demand paging).
1785          */
1786         spte = shadow_base_present_pte | shadow_dirty_mask;
1787         if (!speculative)
1788                 spte |= shadow_accessed_mask;
1789         if (!dirty)
1790                 pte_access &= ~ACC_WRITE_MASK;
1791         if (pte_access & ACC_EXEC_MASK)
1792                 spte |= shadow_x_mask;
1793         else
1794                 spte |= shadow_nx_mask;
1795         if (pte_access & ACC_USER_MASK)
1796                 spte |= shadow_user_mask;
1797         if (level > PT_PAGE_TABLE_LEVEL)
1798                 spte |= PT_PAGE_SIZE_MASK;
1799         if (tdp_enabled)
1800                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1801                         kvm_is_mmio_pfn(pfn));
1802
1803         if (reset_host_protection)
1804                 spte |= SPTE_HOST_WRITEABLE;
1805
1806         spte |= (u64)pfn << PAGE_SHIFT;
1807
1808         if ((pte_access & ACC_WRITE_MASK)
1809             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1810
1811                 if (level > PT_PAGE_TABLE_LEVEL &&
1812                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1813                         ret = 1;
1814                         spte = shadow_trap_nonpresent_pte;
1815                         goto set_pte;
1816                 }
1817
1818                 spte |= PT_WRITABLE_MASK;
1819
1820                 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1821                         spte &= ~PT_USER_MASK;
1822
1823                 /*
1824                  * Optimization: for pte sync, if spte was writable the hash
1825                  * lookup is unnecessary (and expensive). Write protection
1826                  * is responsibility of mmu_get_page / kvm_sync_page.
1827                  * Same reasoning can be applied to dirty page accounting.
1828                  */
1829                 if (!can_unsync && is_writable_pte(*sptep))
1830                         goto set_pte;
1831
1832                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1833                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1834                                  __func__, gfn);
1835                         ret = 1;
1836                         pte_access &= ~ACC_WRITE_MASK;
1837                         if (is_writable_pte(spte))
1838                                 spte &= ~PT_WRITABLE_MASK;
1839                 }
1840         }
1841
1842         if (pte_access & ACC_WRITE_MASK)
1843                 mark_page_dirty(vcpu->kvm, gfn);
1844
1845 set_pte:
1846         __set_spte(sptep, spte);
1847         return ret;
1848 }
1849
1850 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1851                          unsigned pt_access, unsigned pte_access,
1852                          int user_fault, int write_fault, int dirty,
1853                          int *ptwrite, int level, gfn_t gfn,
1854                          pfn_t pfn, bool speculative,
1855                          bool reset_host_protection)
1856 {
1857         int was_rmapped = 0;
1858         int was_writable = is_writable_pte(*sptep);
1859         int rmap_count;
1860
1861         pgprintk("%s: spte %llx access %x write_fault %d"
1862                  " user_fault %d gfn %lx\n",
1863                  __func__, *sptep, pt_access,
1864                  write_fault, user_fault, gfn);
1865
1866         if (is_rmap_spte(*sptep)) {
1867                 /*
1868                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1869                  * the parent of the now unreachable PTE.
1870                  */
1871                 if (level > PT_PAGE_TABLE_LEVEL &&
1872                     !is_large_pte(*sptep)) {
1873                         struct kvm_mmu_page *child;
1874                         u64 pte = *sptep;
1875
1876                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1877                         mmu_page_remove_parent_pte(child, sptep);
1878                         __set_spte(sptep, shadow_trap_nonpresent_pte);
1879                         kvm_flush_remote_tlbs(vcpu->kvm);
1880                 } else if (pfn != spte_to_pfn(*sptep)) {
1881                         pgprintk("hfn old %lx new %lx\n",
1882                                  spte_to_pfn(*sptep), pfn);
1883                         rmap_remove(vcpu->kvm, sptep);
1884                         __set_spte(sptep, shadow_trap_nonpresent_pte);
1885                         kvm_flush_remote_tlbs(vcpu->kvm);
1886                 } else
1887                         was_rmapped = 1;
1888         }
1889
1890         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1891                       dirty, level, gfn, pfn, speculative, true,
1892                       reset_host_protection)) {
1893                 if (write_fault)
1894                         *ptwrite = 1;
1895                 kvm_x86_ops->tlb_flush(vcpu);
1896         }
1897
1898         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1899         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1900                  is_large_pte(*sptep)? "2MB" : "4kB",
1901                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1902                  *sptep, sptep);
1903         if (!was_rmapped && is_large_pte(*sptep))
1904                 ++vcpu->kvm->stat.lpages;
1905
1906         page_header_update_slot(vcpu->kvm, sptep, gfn);
1907         if (!was_rmapped) {
1908                 rmap_count = rmap_add(vcpu, sptep, gfn);
1909                 kvm_release_pfn_clean(pfn);
1910                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1911                         rmap_recycle(vcpu, sptep, gfn);
1912         } else {
1913                 if (was_writable)
1914                         kvm_release_pfn_dirty(pfn);
1915                 else
1916                         kvm_release_pfn_clean(pfn);
1917         }
1918         if (speculative) {
1919                 vcpu->arch.last_pte_updated = sptep;
1920                 vcpu->arch.last_pte_gfn = gfn;
1921         }
1922 }
1923
1924 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1925 {
1926 }
1927
1928 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1929                         int level, gfn_t gfn, pfn_t pfn)
1930 {
1931         struct kvm_shadow_walk_iterator iterator;
1932         struct kvm_mmu_page *sp;
1933         int pt_write = 0;
1934         gfn_t pseudo_gfn;
1935
1936         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1937                 if (iterator.level == level) {
1938                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1939                                      0, write, 1, &pt_write,
1940                                      level, gfn, pfn, false, true);
1941                         ++vcpu->stat.pf_fixed;
1942                         break;
1943                 }
1944
1945                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1946                         pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1947                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1948                                               iterator.level - 1,
1949                                               1, ACC_ALL, iterator.sptep);
1950                         if (!sp) {
1951                                 pgprintk("nonpaging_map: ENOMEM\n");
1952                                 kvm_release_pfn_clean(pfn);
1953                                 return -ENOMEM;
1954                         }
1955
1956                         __set_spte(iterator.sptep,
1957                                    __pa(sp->spt)
1958                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
1959                                    | shadow_user_mask | shadow_x_mask);
1960                 }
1961         }
1962         return pt_write;
1963 }
1964
1965 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
1966 {
1967         char buf[1];
1968         void __user *hva;
1969         int r;
1970
1971         /* Touch the page, so send SIGBUS */
1972         hva = (void __user *)gfn_to_hva(kvm, gfn);
1973         r = copy_from_user(buf, hva, 1);
1974 }
1975
1976 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
1977 {
1978         kvm_release_pfn_clean(pfn);
1979         if (is_hwpoison_pfn(pfn)) {
1980                 kvm_send_hwpoison_signal(kvm, gfn);
1981                 return 0;
1982         }
1983         return 1;
1984 }
1985
1986 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1987 {
1988         int r;
1989         int level;
1990         pfn_t pfn;
1991         unsigned long mmu_seq;
1992
1993         level = mapping_level(vcpu, gfn);
1994
1995         /*
1996          * This path builds a PAE pagetable - so we can map 2mb pages at
1997          * maximum. Therefore check if the level is larger than that.
1998          */
1999         if (level > PT_DIRECTORY_LEVEL)
2000                 level = PT_DIRECTORY_LEVEL;
2001
2002         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2003
2004         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2005         smp_rmb();
2006         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2007
2008         /* mmio */
2009         if (is_error_pfn(pfn))
2010                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2011
2012         spin_lock(&vcpu->kvm->mmu_lock);
2013         if (mmu_notifier_retry(vcpu, mmu_seq))
2014                 goto out_unlock;
2015         kvm_mmu_free_some_pages(vcpu);
2016         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2017         spin_unlock(&vcpu->kvm->mmu_lock);
2018
2019
2020         return r;
2021
2022 out_unlock:
2023         spin_unlock(&vcpu->kvm->mmu_lock);
2024         kvm_release_pfn_clean(pfn);
2025         return 0;
2026 }
2027
2028
2029 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2030 {
2031         int i;
2032         struct kvm_mmu_page *sp;
2033
2034         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2035                 return;
2036         spin_lock(&vcpu->kvm->mmu_lock);
2037         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2038                 hpa_t root = vcpu->arch.mmu.root_hpa;
2039
2040                 sp = page_header(root);
2041                 --sp->root_count;
2042                 if (!sp->root_count && sp->role.invalid)
2043                         kvm_mmu_zap_page(vcpu->kvm, sp);
2044                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2045                 spin_unlock(&vcpu->kvm->mmu_lock);
2046                 return;
2047         }
2048         for (i = 0; i < 4; ++i) {
2049                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2050
2051                 if (root) {
2052                         root &= PT64_BASE_ADDR_MASK;
2053                         sp = page_header(root);
2054                         --sp->root_count;
2055                         if (!sp->root_count && sp->role.invalid)
2056                                 kvm_mmu_zap_page(vcpu->kvm, sp);
2057                 }
2058                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2059         }
2060         spin_unlock(&vcpu->kvm->mmu_lock);
2061         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2062 }
2063
2064 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2065 {
2066         int ret = 0;
2067
2068         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2069                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2070                 ret = 1;
2071         }
2072
2073         return ret;
2074 }
2075
2076 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2077 {
2078         int i;
2079         gfn_t root_gfn;
2080         struct kvm_mmu_page *sp;
2081         int direct = 0;
2082         u64 pdptr;
2083
2084         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2085
2086         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2087                 hpa_t root = vcpu->arch.mmu.root_hpa;
2088
2089                 ASSERT(!VALID_PAGE(root));
2090                 if (mmu_check_root(vcpu, root_gfn))
2091                         return 1;
2092                 if (tdp_enabled) {
2093                         direct = 1;
2094                         root_gfn = 0;
2095                 }
2096                 spin_lock(&vcpu->kvm->mmu_lock);
2097                 kvm_mmu_free_some_pages(vcpu);
2098                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2099                                       PT64_ROOT_LEVEL, direct,
2100                                       ACC_ALL, NULL);
2101                 root = __pa(sp->spt);
2102                 ++sp->root_count;
2103                 spin_unlock(&vcpu->kvm->mmu_lock);
2104                 vcpu->arch.mmu.root_hpa = root;
2105                 return 0;
2106         }
2107         direct = !is_paging(vcpu);
2108         for (i = 0; i < 4; ++i) {
2109                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2110
2111                 ASSERT(!VALID_PAGE(root));
2112                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2113                         pdptr = kvm_pdptr_read(vcpu, i);
2114                         if (!is_present_gpte(pdptr)) {
2115                                 vcpu->arch.mmu.pae_root[i] = 0;
2116                                 continue;
2117                         }
2118                         root_gfn = pdptr >> PAGE_SHIFT;
2119                 } else if (vcpu->arch.mmu.root_level == 0)
2120                         root_gfn = 0;
2121                 if (mmu_check_root(vcpu, root_gfn))
2122                         return 1;
2123                 if (tdp_enabled) {
2124                         direct = 1;
2125                         root_gfn = i << 30;
2126                 }
2127                 spin_lock(&vcpu->kvm->mmu_lock);
2128                 kvm_mmu_free_some_pages(vcpu);
2129                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2130                                       PT32_ROOT_LEVEL, direct,
2131                                       ACC_ALL, NULL);
2132                 root = __pa(sp->spt);
2133                 ++sp->root_count;
2134                 spin_unlock(&vcpu->kvm->mmu_lock);
2135
2136                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2137         }
2138         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2139         return 0;
2140 }
2141
2142 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2143 {
2144         int i;
2145         struct kvm_mmu_page *sp;
2146
2147         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2148                 return;
2149         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2150                 hpa_t root = vcpu->arch.mmu.root_hpa;
2151                 sp = page_header(root);
2152                 mmu_sync_children(vcpu, sp);
2153                 return;
2154         }
2155         for (i = 0; i < 4; ++i) {
2156                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2157
2158                 if (root && VALID_PAGE(root)) {
2159                         root &= PT64_BASE_ADDR_MASK;
2160                         sp = page_header(root);
2161                         mmu_sync_children(vcpu, sp);
2162                 }
2163         }
2164 }
2165
2166 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2167 {
2168         spin_lock(&vcpu->kvm->mmu_lock);
2169         mmu_sync_roots(vcpu);
2170         spin_unlock(&vcpu->kvm->mmu_lock);
2171 }
2172
2173 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2174                                   u32 access, u32 *error)
2175 {
2176         if (error)
2177                 *error = 0;
2178         return vaddr;
2179 }
2180
2181 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2182                                 u32 error_code)
2183 {
2184         gfn_t gfn;
2185         int r;
2186
2187         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2188         r = mmu_topup_memory_caches(vcpu);
2189         if (r)
2190                 return r;
2191
2192         ASSERT(vcpu);
2193         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2194
2195         gfn = gva >> PAGE_SHIFT;
2196
2197         return nonpaging_map(vcpu, gva & PAGE_MASK,
2198                              error_code & PFERR_WRITE_MASK, gfn);
2199 }
2200
2201 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2202                                 u32 error_code)
2203 {
2204         pfn_t pfn;
2205         int r;
2206         int level;
2207         gfn_t gfn = gpa >> PAGE_SHIFT;
2208         unsigned long mmu_seq;
2209
2210         ASSERT(vcpu);
2211         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2212
2213         r = mmu_topup_memory_caches(vcpu);
2214         if (r)
2215                 return r;
2216
2217         level = mapping_level(vcpu, gfn);
2218
2219         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2220
2221         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2222         smp_rmb();
2223         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2224         if (is_error_pfn(pfn))
2225                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2226         spin_lock(&vcpu->kvm->mmu_lock);
2227         if (mmu_notifier_retry(vcpu, mmu_seq))
2228                 goto out_unlock;
2229         kvm_mmu_free_some_pages(vcpu);
2230         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2231                          level, gfn, pfn);
2232         spin_unlock(&vcpu->kvm->mmu_lock);
2233
2234         return r;
2235
2236 out_unlock:
2237         spin_unlock(&vcpu->kvm->mmu_lock);
2238         kvm_release_pfn_clean(pfn);
2239         return 0;
2240 }
2241
2242 static void nonpaging_free(struct kvm_vcpu *vcpu)
2243 {
2244         mmu_free_roots(vcpu);
2245 }
2246
2247 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2248 {
2249         struct kvm_mmu *context = &vcpu->arch.mmu;
2250
2251         context->new_cr3 = nonpaging_new_cr3;
2252         context->page_fault = nonpaging_page_fault;
2253         context->gva_to_gpa = nonpaging_gva_to_gpa;
2254         context->free = nonpaging_free;
2255         context->prefetch_page = nonpaging_prefetch_page;
2256         context->sync_page = nonpaging_sync_page;
2257         context->invlpg = nonpaging_invlpg;
2258         context->root_level = 0;
2259         context->shadow_root_level = PT32E_ROOT_LEVEL;
2260         context->root_hpa = INVALID_PAGE;
2261         return 0;
2262 }
2263
2264 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2265 {
2266         ++vcpu->stat.tlb_flush;
2267         kvm_x86_ops->tlb_flush(vcpu);
2268 }
2269
2270 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2271 {
2272         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2273         mmu_free_roots(vcpu);
2274 }
2275
2276 static void inject_page_fault(struct kvm_vcpu *vcpu,
2277                               u64 addr,
2278                               u32 err_code)
2279 {
2280         kvm_inject_page_fault(vcpu, addr, err_code);
2281 }
2282
2283 static void paging_free(struct kvm_vcpu *vcpu)
2284 {
2285         nonpaging_free(vcpu);
2286 }
2287
2288 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2289 {
2290         int bit7;
2291
2292         bit7 = (gpte >> 7) & 1;
2293         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2294 }
2295
2296 #define PTTYPE 64
2297 #include "paging_tmpl.h"
2298 #undef PTTYPE
2299
2300 #define PTTYPE 32
2301 #include "paging_tmpl.h"
2302 #undef PTTYPE
2303
2304 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2305 {
2306         struct kvm_mmu *context = &vcpu->arch.mmu;
2307         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2308         u64 exb_bit_rsvd = 0;
2309
2310         if (!is_nx(vcpu))
2311                 exb_bit_rsvd = rsvd_bits(63, 63);
2312         switch (level) {
2313         case PT32_ROOT_LEVEL:
2314                 /* no rsvd bits for 2 level 4K page table entries */
2315                 context->rsvd_bits_mask[0][1] = 0;
2316                 context->rsvd_bits_mask[0][0] = 0;
2317                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2318
2319                 if (!is_pse(vcpu)) {
2320                         context->rsvd_bits_mask[1][1] = 0;
2321                         break;
2322                 }
2323
2324                 if (is_cpuid_PSE36())
2325                         /* 36bits PSE 4MB page */
2326                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2327                 else
2328                         /* 32 bits PSE 4MB page */
2329                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2330                 break;
2331         case PT32E_ROOT_LEVEL:
2332                 context->rsvd_bits_mask[0][2] =
2333                         rsvd_bits(maxphyaddr, 63) |
2334                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2335                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2336                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2337                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2338                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2339                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2340                         rsvd_bits(maxphyaddr, 62) |
2341                         rsvd_bits(13, 20);              /* large page */
2342                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2343                 break;
2344         case PT64_ROOT_LEVEL:
2345                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2346                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2347                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2348                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2349                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2350                         rsvd_bits(maxphyaddr, 51);
2351                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2352                         rsvd_bits(maxphyaddr, 51);
2353                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2354                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2355                         rsvd_bits(maxphyaddr, 51) |
2356                         rsvd_bits(13, 29);
2357                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2358                         rsvd_bits(maxphyaddr, 51) |
2359                         rsvd_bits(13, 20);              /* large page */
2360                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2361                 break;
2362         }
2363 }
2364
2365 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2366 {
2367         struct kvm_mmu *context = &vcpu->arch.mmu;
2368
2369         ASSERT(is_pae(vcpu));
2370         context->new_cr3 = paging_new_cr3;
2371         context->page_fault = paging64_page_fault;
2372         context->gva_to_gpa = paging64_gva_to_gpa;
2373         context->prefetch_page = paging64_prefetch_page;
2374         context->sync_page = paging64_sync_page;
2375         context->invlpg = paging64_invlpg;
2376         context->free = paging_free;
2377         context->root_level = level;
2378         context->shadow_root_level = level;
2379         context->root_hpa = INVALID_PAGE;
2380         return 0;
2381 }
2382
2383 static int paging64_init_context(struct kvm_vcpu *vcpu)
2384 {
2385         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2386         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2387 }
2388
2389 static int paging32_init_context(struct kvm_vcpu *vcpu)
2390 {
2391         struct kvm_mmu *context = &vcpu->arch.mmu;
2392
2393         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2394         context->new_cr3 = paging_new_cr3;
2395         context->page_fault = paging32_page_fault;
2396         context->gva_to_gpa = paging32_gva_to_gpa;
2397         context->free = paging_free;
2398         context->prefetch_page = paging32_prefetch_page;
2399         context->sync_page = paging32_sync_page;
2400         context->invlpg = paging32_invlpg;
2401         context->root_level = PT32_ROOT_LEVEL;
2402         context->shadow_root_level = PT32E_ROOT_LEVEL;
2403         context->root_hpa = INVALID_PAGE;
2404         return 0;
2405 }
2406
2407 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2408 {
2409         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2410         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2411 }
2412
2413 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2414 {
2415         struct kvm_mmu *context = &vcpu->arch.mmu;
2416
2417         context->new_cr3 = nonpaging_new_cr3;
2418         context->page_fault = tdp_page_fault;
2419         context->free = nonpaging_free;
2420         context->prefetch_page = nonpaging_prefetch_page;
2421         context->sync_page = nonpaging_sync_page;
2422         context->invlpg = nonpaging_invlpg;
2423         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2424         context->root_hpa = INVALID_PAGE;
2425
2426         if (!is_paging(vcpu)) {
2427                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2428                 context->root_level = 0;
2429         } else if (is_long_mode(vcpu)) {
2430                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2431                 context->gva_to_gpa = paging64_gva_to_gpa;
2432                 context->root_level = PT64_ROOT_LEVEL;
2433         } else if (is_pae(vcpu)) {
2434                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2435                 context->gva_to_gpa = paging64_gva_to_gpa;
2436                 context->root_level = PT32E_ROOT_LEVEL;
2437         } else {
2438                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2439                 context->gva_to_gpa = paging32_gva_to_gpa;
2440                 context->root_level = PT32_ROOT_LEVEL;
2441         }
2442
2443         return 0;
2444 }
2445
2446 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2447 {
2448         int r;
2449
2450         ASSERT(vcpu);
2451         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2452
2453         if (!is_paging(vcpu))
2454                 r = nonpaging_init_context(vcpu);
2455         else if (is_long_mode(vcpu))
2456                 r = paging64_init_context(vcpu);
2457         else if (is_pae(vcpu))
2458                 r = paging32E_init_context(vcpu);
2459         else
2460                 r = paging32_init_context(vcpu);
2461
2462         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2463         vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2464
2465         return r;
2466 }
2467
2468 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2469 {
2470         vcpu->arch.update_pte.pfn = bad_pfn;
2471
2472         if (tdp_enabled)
2473                 return init_kvm_tdp_mmu(vcpu);
2474         else
2475                 return init_kvm_softmmu(vcpu);
2476 }
2477
2478 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2479 {
2480         ASSERT(vcpu);
2481         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2482                 /* mmu.free() should set root_hpa = INVALID_PAGE */
2483                 vcpu->arch.mmu.free(vcpu);
2484 }
2485
2486 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2487 {
2488         destroy_kvm_mmu(vcpu);
2489         return init_kvm_mmu(vcpu);
2490 }
2491 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2492
2493 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2494 {
2495         int r;
2496
2497         r = mmu_topup_memory_caches(vcpu);
2498         if (r)
2499                 goto out;
2500         r = mmu_alloc_roots(vcpu);
2501         spin_lock(&vcpu->kvm->mmu_lock);
2502         mmu_sync_roots(vcpu);
2503         spin_unlock(&vcpu->kvm->mmu_lock);
2504         if (r)
2505                 goto out;
2506         /* set_cr3() should ensure TLB has been flushed */
2507         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2508 out:
2509         return r;
2510 }
2511 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2512
2513 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2514 {
2515         mmu_free_roots(vcpu);
2516 }
2517
2518 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2519                                   struct kvm_mmu_page *sp,
2520                                   u64 *spte)
2521 {
2522         u64 pte;
2523         struct kvm_mmu_page *child;
2524
2525         pte = *spte;
2526         if (is_shadow_present_pte(pte)) {
2527                 if (is_last_spte(pte, sp->role.level))
2528                         rmap_remove(vcpu->kvm, spte);
2529                 else {
2530                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2531                         mmu_page_remove_parent_pte(child, spte);
2532                 }
2533         }
2534         __set_spte(spte, shadow_trap_nonpresent_pte);
2535         if (is_large_pte(pte))
2536                 --vcpu->kvm->stat.lpages;
2537 }
2538
2539 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2540                                   struct kvm_mmu_page *sp,
2541                                   u64 *spte,
2542                                   const void *new)
2543 {
2544         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2545                 ++vcpu->kvm->stat.mmu_pde_zapped;
2546                 return;
2547         }
2548
2549         ++vcpu->kvm->stat.mmu_pte_updated;
2550         if (!sp->role.cr4_pae)
2551                 paging32_update_pte(vcpu, sp, spte, new);
2552         else
2553                 paging64_update_pte(vcpu, sp, spte, new);
2554 }
2555
2556 static bool need_remote_flush(u64 old, u64 new)
2557 {
2558         if (!is_shadow_present_pte(old))
2559                 return false;
2560         if (!is_shadow_present_pte(new))
2561                 return true;
2562         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2563                 return true;
2564         old ^= PT64_NX_MASK;
2565         new ^= PT64_NX_MASK;
2566         return (old & ~new & PT64_PERM_MASK) != 0;
2567 }
2568
2569 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2570 {
2571         if (need_remote_flush(old, new))
2572                 kvm_flush_remote_tlbs(vcpu->kvm);
2573         else
2574                 kvm_mmu_flush_tlb(vcpu);
2575 }
2576
2577 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2578 {
2579         u64 *spte = vcpu->arch.last_pte_updated;
2580
2581         return !!(spte && (*spte & shadow_accessed_mask));
2582 }
2583
2584 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2585                                           u64 gpte)
2586 {
2587         gfn_t gfn;
2588         pfn_t pfn;
2589
2590         if (!is_present_gpte(gpte))
2591                 return;
2592         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2593
2594         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2595         smp_rmb();
2596         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2597
2598         if (is_error_pfn(pfn)) {
2599                 kvm_release_pfn_clean(pfn);
2600                 return;
2601         }
2602         vcpu->arch.update_pte.gfn = gfn;
2603         vcpu->arch.update_pte.pfn = pfn;
2604 }
2605
2606 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2607 {
2608         u64 *spte = vcpu->arch.last_pte_updated;
2609
2610         if (spte
2611             && vcpu->arch.last_pte_gfn == gfn
2612             && shadow_accessed_mask
2613             && !(*spte & shadow_accessed_mask)
2614             && is_shadow_present_pte(*spte))
2615                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2616 }
2617
2618 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2619                        const u8 *new, int bytes,
2620                        bool guest_initiated)
2621 {
2622         gfn_t gfn = gpa >> PAGE_SHIFT;
2623         struct kvm_mmu_page *sp;
2624         struct hlist_node *node, *n;
2625         struct hlist_head *bucket;
2626         unsigned index;
2627         u64 entry, gentry;
2628         u64 *spte;
2629         unsigned offset = offset_in_page(gpa);
2630         unsigned pte_size;
2631         unsigned page_offset;
2632         unsigned misaligned;
2633         unsigned quadrant;
2634         int level;
2635         int flooded = 0;
2636         int npte;
2637         int r;
2638         int invlpg_counter;
2639
2640         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2641
2642         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2643
2644         /*
2645          * Assume that the pte write on a page table of the same type
2646          * as the current vcpu paging mode.  This is nearly always true
2647          * (might be false while changing modes).  Note it is verified later
2648          * by update_pte().
2649          */
2650         if ((is_pae(vcpu) && bytes == 4) || !new) {
2651                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2652                 if (is_pae(vcpu)) {
2653                         gpa &= ~(gpa_t)7;
2654                         bytes = 8;
2655                 }
2656                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2657                 if (r)
2658                         gentry = 0;
2659                 new = (const u8 *)&gentry;
2660         }
2661
2662         switch (bytes) {
2663         case 4:
2664                 gentry = *(const u32 *)new;
2665                 break;
2666         case 8:
2667                 gentry = *(const u64 *)new;
2668                 break;
2669         default:
2670                 gentry = 0;
2671                 break;
2672         }
2673
2674         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2675         spin_lock(&vcpu->kvm->mmu_lock);
2676         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2677                 gentry = 0;
2678         kvm_mmu_access_page(vcpu, gfn);
2679         kvm_mmu_free_some_pages(vcpu);
2680         ++vcpu->kvm->stat.mmu_pte_write;
2681         kvm_mmu_audit(vcpu, "pre pte write");
2682         if (guest_initiated) {
2683                 if (gfn == vcpu->arch.last_pt_write_gfn
2684                     && !last_updated_pte_accessed(vcpu)) {
2685                         ++vcpu->arch.last_pt_write_count;
2686                         if (vcpu->arch.last_pt_write_count >= 3)
2687                                 flooded = 1;
2688                 } else {
2689                         vcpu->arch.last_pt_write_gfn = gfn;
2690                         vcpu->arch.last_pt_write_count = 1;
2691                         vcpu->arch.last_pte_updated = NULL;
2692                 }
2693         }
2694         index = kvm_page_table_hashfn(gfn);
2695         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2696
2697 restart:
2698         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2699                 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2700                         continue;
2701                 pte_size = sp->role.cr4_pae ? 8 : 4;
2702                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2703                 misaligned |= bytes < 4;
2704                 if (misaligned || flooded) {
2705                         /*
2706                          * Misaligned accesses are too much trouble to fix
2707                          * up; also, they usually indicate a page is not used
2708                          * as a page table.
2709                          *
2710                          * If we're seeing too many writes to a page,
2711                          * it may no longer be a page table, or we may be
2712                          * forking, in which case it is better to unmap the
2713                          * page.
2714                          */
2715                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2716                                  gpa, bytes, sp->role.word);
2717                         if (kvm_mmu_zap_page(vcpu->kvm, sp))
2718                                 goto restart;
2719                         ++vcpu->kvm->stat.mmu_flooded;
2720                         continue;
2721                 }
2722                 page_offset = offset;
2723                 level = sp->role.level;
2724                 npte = 1;
2725                 if (!sp->role.cr4_pae) {
2726                         page_offset <<= 1;      /* 32->64 */
2727                         /*
2728                          * A 32-bit pde maps 4MB while the shadow pdes map
2729                          * only 2MB.  So we need to double the offset again
2730                          * and zap two pdes instead of one.
2731                          */
2732                         if (level == PT32_ROOT_LEVEL) {
2733                                 page_offset &= ~7; /* kill rounding error */
2734                                 page_offset <<= 1;
2735                                 npte = 2;
2736                         }
2737                         quadrant = page_offset >> PAGE_SHIFT;
2738                         page_offset &= ~PAGE_MASK;
2739                         if (quadrant != sp->role.quadrant)
2740                                 continue;
2741                 }
2742                 spte = &sp->spt[page_offset / sizeof(*spte)];
2743                 while (npte--) {
2744                         entry = *spte;
2745                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2746                         if (gentry)
2747                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2748                         mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2749                         ++spte;
2750                 }
2751         }
2752         kvm_mmu_audit(vcpu, "post pte write");
2753         spin_unlock(&vcpu->kvm->mmu_lock);
2754         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2755                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2756                 vcpu->arch.update_pte.pfn = bad_pfn;
2757         }
2758 }
2759
2760 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2761 {
2762         gpa_t gpa;
2763         int r;
2764
2765         if (tdp_enabled)
2766                 return 0;
2767
2768         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2769
2770         spin_lock(&vcpu->kvm->mmu_lock);
2771         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2772         spin_unlock(&vcpu->kvm->mmu_lock);
2773         return r;
2774 }
2775 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2776
2777 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2778 {
2779         while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2780                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2781                 struct kvm_mmu_page *sp;
2782
2783                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2784                                   struct kvm_mmu_page, link);
2785                 kvm_mmu_zap_page(vcpu->kvm, sp);
2786                 ++vcpu->kvm->stat.mmu_recycled;
2787         }
2788 }
2789
2790 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2791 {
2792         int r;
2793         enum emulation_result er;
2794
2795         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2796         if (r < 0)
2797                 goto out;
2798
2799         if (!r) {
2800                 r = 1;
2801                 goto out;
2802         }
2803
2804         r = mmu_topup_memory_caches(vcpu);
2805         if (r)
2806                 goto out;
2807
2808         er = emulate_instruction(vcpu, cr2, error_code, 0);
2809
2810         switch (er) {
2811         case EMULATE_DONE:
2812                 return 1;
2813         case EMULATE_DO_MMIO:
2814                 ++vcpu->stat.mmio_exits;
2815                 /* fall through */
2816         case EMULATE_FAIL:
2817                 return 0;
2818         default:
2819                 BUG();
2820         }
2821 out:
2822         return r;
2823 }
2824 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2825
2826 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2827 {
2828         vcpu->arch.mmu.invlpg(vcpu, gva);
2829         kvm_mmu_flush_tlb(vcpu);
2830         ++vcpu->stat.invlpg;
2831 }
2832 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2833
2834 void kvm_enable_tdp(void)
2835 {
2836         tdp_enabled = true;
2837 }
2838 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2839
2840 void kvm_disable_tdp(void)
2841 {
2842         tdp_enabled = false;
2843 }
2844 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2845
2846 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2847 {
2848         free_page((unsigned long)vcpu->arch.mmu.pae_root);
2849 }
2850
2851 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2852 {
2853         struct page *page;
2854         int i;
2855
2856         ASSERT(vcpu);
2857
2858         /*
2859          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2860          * Therefore we need to allocate shadow page tables in the first
2861          * 4GB of memory, which happens to fit the DMA32 zone.
2862          */
2863         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2864         if (!page)
2865                 return -ENOMEM;
2866
2867         vcpu->arch.mmu.pae_root = page_address(page);
2868         for (i = 0; i < 4; ++i)
2869                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2870
2871         return 0;
2872 }
2873
2874 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2875 {
2876         ASSERT(vcpu);
2877         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2878
2879         return alloc_mmu_pages(vcpu);
2880 }
2881
2882 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2883 {
2884         ASSERT(vcpu);
2885         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2886
2887         return init_kvm_mmu(vcpu);
2888 }
2889
2890 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2891 {
2892         ASSERT(vcpu);
2893
2894         destroy_kvm_mmu(vcpu);
2895         free_mmu_pages(vcpu);
2896         mmu_free_memory_caches(vcpu);
2897 }
2898
2899 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2900 {
2901         struct kvm_mmu_page *sp;
2902
2903         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2904                 int i;
2905                 u64 *pt;
2906
2907                 if (!test_bit(slot, sp->slot_bitmap))
2908                         continue;
2909
2910                 pt = sp->spt;
2911                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2912                         /* avoid RMW */
2913                         if (pt[i] & PT_WRITABLE_MASK)
2914                                 pt[i] &= ~PT_WRITABLE_MASK;
2915         }
2916         kvm_flush_remote_tlbs(kvm);
2917 }
2918
2919 void kvm_mmu_zap_all(struct kvm *kvm)
2920 {
2921         struct kvm_mmu_page *sp, *node;
2922
2923         spin_lock(&kvm->mmu_lock);
2924 restart:
2925         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2926                 if (kvm_mmu_zap_page(kvm, sp))
2927                         goto restart;
2928
2929         spin_unlock(&kvm->mmu_lock);
2930
2931         kvm_flush_remote_tlbs(kvm);
2932 }
2933
2934 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
2935 {
2936         struct kvm_mmu_page *page;
2937
2938         page = container_of(kvm->arch.active_mmu_pages.prev,
2939                             struct kvm_mmu_page, link);
2940         return kvm_mmu_zap_page(kvm, page);
2941 }
2942
2943 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
2944 {
2945         struct kvm *kvm;
2946         struct kvm *kvm_freed = NULL;
2947         int cache_count = 0;
2948
2949         spin_lock(&kvm_lock);
2950
2951         list_for_each_entry(kvm, &vm_list, vm_list) {
2952                 int npages, idx, freed_pages;
2953
2954                 idx = srcu_read_lock(&kvm->srcu);
2955                 spin_lock(&kvm->mmu_lock);
2956                 npages = kvm->arch.n_alloc_mmu_pages -
2957                          kvm->arch.n_free_mmu_pages;
2958                 cache_count += npages;
2959                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2960                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
2961                         cache_count -= freed_pages;
2962                         kvm_freed = kvm;
2963                 }
2964                 nr_to_scan--;
2965
2966                 spin_unlock(&kvm->mmu_lock);
2967                 srcu_read_unlock(&kvm->srcu, idx);
2968         }
2969         if (kvm_freed)
2970                 list_move_tail(&kvm_freed->vm_list, &vm_list);
2971
2972         spin_unlock(&kvm_lock);
2973
2974         return cache_count;
2975 }
2976
2977 static struct shrinker mmu_shrinker = {
2978         .shrink = mmu_shrink,
2979         .seeks = DEFAULT_SEEKS * 10,
2980 };
2981
2982 static void mmu_destroy_caches(void)
2983 {
2984         if (pte_chain_cache)
2985                 kmem_cache_destroy(pte_chain_cache);
2986         if (rmap_desc_cache)
2987                 kmem_cache_destroy(rmap_desc_cache);
2988         if (mmu_page_header_cache)
2989                 kmem_cache_destroy(mmu_page_header_cache);
2990 }
2991
2992 void kvm_mmu_module_exit(void)
2993 {
2994         mmu_destroy_caches();
2995         unregister_shrinker(&mmu_shrinker);
2996 }
2997
2998 int kvm_mmu_module_init(void)
2999 {
3000         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3001                                             sizeof(struct kvm_pte_chain),
3002                                             0, 0, NULL);
3003         if (!pte_chain_cache)
3004                 goto nomem;
3005         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3006                                             sizeof(struct kvm_rmap_desc),
3007                                             0, 0, NULL);
3008         if (!rmap_desc_cache)
3009                 goto nomem;
3010
3011         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3012                                                   sizeof(struct kvm_mmu_page),
3013                                                   0, 0, NULL);
3014         if (!mmu_page_header_cache)
3015                 goto nomem;
3016
3017         register_shrinker(&mmu_shrinker);
3018
3019         return 0;
3020
3021 nomem:
3022         mmu_destroy_caches();
3023         return -ENOMEM;
3024 }
3025
3026 /*
3027  * Caculate mmu pages needed for kvm.
3028  */
3029 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3030 {
3031         int i;
3032         unsigned int nr_mmu_pages;
3033         unsigned int  nr_pages = 0;
3034         struct kvm_memslots *slots;
3035
3036         slots = kvm_memslots(kvm);
3037
3038         for (i = 0; i < slots->nmemslots; i++)
3039                 nr_pages += slots->memslots[i].npages;
3040
3041         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3042         nr_mmu_pages = max(nr_mmu_pages,
3043                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3044
3045         return nr_mmu_pages;
3046 }
3047
3048 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3049                                 unsigned len)
3050 {
3051         if (len > buffer->len)
3052                 return NULL;
3053         return buffer->ptr;
3054 }
3055
3056 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3057                                 unsigned len)
3058 {
3059         void *ret;
3060
3061         ret = pv_mmu_peek_buffer(buffer, len);
3062         if (!ret)
3063                 return ret;
3064         buffer->ptr += len;
3065         buffer->len -= len;
3066         buffer->processed += len;
3067         return ret;
3068 }
3069
3070 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3071                              gpa_t addr, gpa_t value)
3072 {
3073         int bytes = 8;
3074         int r;
3075
3076         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3077                 bytes = 4;
3078
3079         r = mmu_topup_memory_caches(vcpu);
3080         if (r)
3081                 return r;
3082
3083         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3084                 return -EFAULT;
3085
3086         return 1;
3087 }
3088
3089 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3090 {
3091         kvm_set_cr3(vcpu, vcpu->arch.cr3);
3092         return 1;
3093 }
3094
3095 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3096 {
3097         spin_lock(&vcpu->kvm->mmu_lock);
3098         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3099         spin_unlock(&vcpu->kvm->mmu_lock);
3100         return 1;
3101 }
3102
3103 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3104                              struct kvm_pv_mmu_op_buffer *buffer)
3105 {
3106         struct kvm_mmu_op_header *header;
3107
3108         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3109         if (!header)
3110                 return 0;
3111         switch (header->op) {
3112         case KVM_MMU_OP_WRITE_PTE: {
3113                 struct kvm_mmu_op_write_pte *wpte;
3114
3115                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3116                 if (!wpte)
3117                         return 0;
3118                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3119                                         wpte->pte_val);
3120         }
3121         case KVM_MMU_OP_FLUSH_TLB: {
3122                 struct kvm_mmu_op_flush_tlb *ftlb;
3123
3124                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3125                 if (!ftlb)
3126                         return 0;
3127                 return kvm_pv_mmu_flush_tlb(vcpu);
3128         }
3129         case KVM_MMU_OP_RELEASE_PT: {
3130                 struct kvm_mmu_op_release_pt *rpt;
3131
3132                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3133                 if (!rpt)
3134                         return 0;
3135                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3136         }
3137         default: return 0;
3138         }
3139 }
3140
3141 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3142                   gpa_t addr, unsigned long *ret)
3143 {
3144         int r;
3145         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3146
3147         buffer->ptr = buffer->buf;
3148         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3149         buffer->processed = 0;
3150
3151         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3152         if (r)
3153                 goto out;
3154
3155         while (buffer->len) {
3156                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3157                 if (r < 0)
3158                         goto out;
3159                 if (r == 0)
3160                         break;
3161         }
3162
3163         r = 1;
3164 out:
3165         *ret = buffer->processed;
3166         return r;
3167 }
3168
3169 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3170 {
3171         struct kvm_shadow_walk_iterator iterator;
3172         int nr_sptes = 0;
3173
3174         spin_lock(&vcpu->kvm->mmu_lock);
3175         for_each_shadow_entry(vcpu, addr, iterator) {
3176                 sptes[iterator.level-1] = *iterator.sptep;
3177                 nr_sptes++;
3178                 if (!is_shadow_present_pte(*iterator.sptep))
3179                         break;
3180         }
3181         spin_unlock(&vcpu->kvm->mmu_lock);
3182
3183         return nr_sptes;
3184 }
3185 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3186
3187 #ifdef AUDIT
3188
3189 static const char *audit_msg;
3190
3191 static gva_t canonicalize(gva_t gva)
3192 {
3193 #ifdef CONFIG_X86_64
3194         gva = (long long)(gva << 16) >> 16;
3195 #endif
3196         return gva;
3197 }
3198
3199
3200 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3201
3202 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3203                             inspect_spte_fn fn)
3204 {
3205         int i;
3206
3207         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3208                 u64 ent = sp->spt[i];
3209
3210                 if (is_shadow_present_pte(ent)) {
3211                         if (!is_last_spte(ent, sp->role.level)) {
3212                                 struct kvm_mmu_page *child;
3213                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3214                                 __mmu_spte_walk(kvm, child, fn);
3215                         } else
3216                                 fn(kvm, &sp->spt[i]);
3217                 }
3218         }
3219 }
3220
3221 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3222 {
3223         int i;
3224         struct kvm_mmu_page *sp;
3225
3226         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3227                 return;
3228         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3229                 hpa_t root = vcpu->arch.mmu.root_hpa;
3230                 sp = page_header(root);
3231                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3232                 return;
3233         }
3234         for (i = 0; i < 4; ++i) {
3235                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3236
3237                 if (root && VALID_PAGE(root)) {
3238                         root &= PT64_BASE_ADDR_MASK;
3239                         sp = page_header(root);
3240                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3241                 }
3242         }
3243         return;
3244 }
3245
3246 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3247                                 gva_t va, int level)
3248 {
3249         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3250         int i;
3251         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3252
3253         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3254                 u64 ent = pt[i];
3255
3256                 if (ent == shadow_trap_nonpresent_pte)
3257                         continue;
3258
3259                 va = canonicalize(va);
3260                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3261                         audit_mappings_page(vcpu, ent, va, level - 1);
3262                 else {
3263                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3264                         gfn_t gfn = gpa >> PAGE_SHIFT;
3265                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3266                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3267
3268                         if (is_error_pfn(pfn)) {
3269                                 kvm_release_pfn_clean(pfn);
3270                                 continue;
3271                         }
3272
3273                         if (is_shadow_present_pte(ent)
3274                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3275                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3276                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3277                                        audit_msg, vcpu->arch.mmu.root_level,
3278                                        va, gpa, hpa, ent,
3279                                        is_shadow_present_pte(ent));
3280                         else if (ent == shadow_notrap_nonpresent_pte
3281                                  && !is_error_hpa(hpa))
3282                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3283                                        " valid guest gva %lx\n", audit_msg, va);
3284                         kvm_release_pfn_clean(pfn);
3285
3286                 }
3287         }
3288 }
3289
3290 static void audit_mappings(struct kvm_vcpu *vcpu)
3291 {
3292         unsigned i;
3293
3294         if (vcpu->arch.mmu.root_level == 4)
3295                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3296         else
3297                 for (i = 0; i < 4; ++i)
3298                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3299                                 audit_mappings_page(vcpu,
3300                                                     vcpu->arch.mmu.pae_root[i],
3301                                                     i << 30,
3302                                                     2);
3303 }
3304
3305 static int count_rmaps(struct kvm_vcpu *vcpu)
3306 {
3307         struct kvm *kvm = vcpu->kvm;
3308         struct kvm_memslots *slots;
3309         int nmaps = 0;
3310         int i, j, k, idx;
3311
3312         idx = srcu_read_lock(&kvm->srcu);
3313         slots = kvm_memslots(kvm);
3314         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3315                 struct kvm_memory_slot *m = &slots->memslots[i];
3316                 struct kvm_rmap_desc *d;
3317
3318                 for (j = 0; j < m->npages; ++j) {
3319                         unsigned long *rmapp = &m->rmap[j];
3320
3321                         if (!*rmapp)
3322                                 continue;
3323                         if (!(*rmapp & 1)) {
3324                                 ++nmaps;
3325                                 continue;
3326                         }
3327                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3328                         while (d) {
3329                                 for (k = 0; k < RMAP_EXT; ++k)
3330                                         if (d->sptes[k])
3331                                                 ++nmaps;
3332                                         else
3333                                                 break;
3334                                 d = d->more;
3335                         }
3336                 }
3337         }
3338         srcu_read_unlock(&kvm->srcu, idx);
3339         return nmaps;
3340 }
3341
3342 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3343 {
3344         unsigned long *rmapp;
3345         struct kvm_mmu_page *rev_sp;
3346         gfn_t gfn;
3347
3348         if (*sptep & PT_WRITABLE_MASK) {
3349                 rev_sp = page_header(__pa(sptep));
3350                 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3351
3352                 if (!gfn_to_memslot(kvm, gfn)) {
3353                         if (!printk_ratelimit())
3354                                 return;
3355                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3356                                          audit_msg, gfn);
3357                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3358                                audit_msg, (long int)(sptep - rev_sp->spt),
3359                                         rev_sp->gfn);
3360                         dump_stack();
3361                         return;
3362                 }
3363
3364                 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3365                                     rev_sp->role.level);
3366                 if (!*rmapp) {
3367                         if (!printk_ratelimit())
3368                                 return;
3369                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3370                                          audit_msg, *sptep);
3371                         dump_stack();
3372                 }
3373         }
3374
3375 }
3376
3377 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3378 {
3379         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3380 }
3381
3382 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3383 {
3384         struct kvm_mmu_page *sp;
3385         int i;
3386
3387         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3388                 u64 *pt = sp->spt;
3389
3390                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3391                         continue;
3392
3393                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3394                         u64 ent = pt[i];
3395
3396                         if (!(ent & PT_PRESENT_MASK))
3397                                 continue;
3398                         if (!(ent & PT_WRITABLE_MASK))
3399                                 continue;
3400                         inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3401                 }
3402         }
3403         return;
3404 }
3405
3406 static void audit_rmap(struct kvm_vcpu *vcpu)
3407 {
3408         check_writable_mappings_rmap(vcpu);
3409         count_rmaps(vcpu);
3410 }
3411
3412 static void audit_write_protection(struct kvm_vcpu *vcpu)
3413 {
3414         struct kvm_mmu_page *sp;
3415         struct kvm_memory_slot *slot;
3416         unsigned long *rmapp;
3417         u64 *spte;
3418         gfn_t gfn;
3419
3420         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3421                 if (sp->role.direct)
3422                         continue;
3423                 if (sp->unsync)
3424                         continue;
3425
3426                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3427                 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3428                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3429
3430                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3431                 while (spte) {
3432                         if (*spte & PT_WRITABLE_MASK)
3433                                 printk(KERN_ERR "%s: (%s) shadow page has "
3434                                 "writable mappings: gfn %lx role %x\n",
3435                                __func__, audit_msg, sp->gfn,
3436                                sp->role.word);
3437                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3438                 }
3439         }
3440 }
3441
3442 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3443 {
3444         int olddbg = dbg;
3445
3446         dbg = 0;
3447         audit_msg = msg;
3448         audit_rmap(vcpu);
3449         audit_write_protection(vcpu);
3450         if (strcmp("pre pte write", audit_msg) != 0)
3451                 audit_mappings(vcpu);
3452         audit_writable_sptes_have_rmaps(vcpu);
3453         dbg = olddbg;
3454 }
3455
3456 #endif