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KVM: MMU: Don't drop accessed bit while updating an spte
[mv-sheeva.git] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  * Copyright 2010 Red Hat, Inc. and/or its affilates.
11  *
12  * Authors:
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Avi Kivity   <avi@qumranet.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include "mmu.h"
22 #include "x86.h"
23 #include "kvm_cache_regs.h"
24
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/mm.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37
38 #include <asm/page.h>
39 #include <asm/cmpxchg.h>
40 #include <asm/io.h>
41 #include <asm/vmx.h>
42
43 /*
44  * When setting this variable to true it enables Two-Dimensional-Paging
45  * where the hardware walks 2 page tables:
46  * 1. the guest-virtual to guest-physical
47  * 2. while doing 1. it walks guest-physical to host-physical
48  * If the hardware supports that we don't need to do shadow paging.
49  */
50 bool tdp_enabled = false;
51
52 #undef MMU_DEBUG
53
54 #undef AUDIT
55
56 #ifdef AUDIT
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 #else
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #endif
61
62 #ifdef MMU_DEBUG
63
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66
67 #else
68
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
71
72 #endif
73
74 #if defined(MMU_DEBUG) || defined(AUDIT)
75 static int dbg = 0;
76 module_param(dbg, bool, 0644);
77 #endif
78
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
81
82 #ifndef MMU_DEBUG
83 #define ASSERT(x) do { } while (0)
84 #else
85 #define ASSERT(x)                                                       \
86         if (!(x)) {                                                     \
87                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
88                        __FILE__, __LINE__, #x);                         \
89         }
90 #endif
91
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116                                                 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127                                                 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130                                                 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137                                             * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140                         | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK    1
145 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
146 #define ACC_USER_MASK    PT_USER_MASK
147 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159         u64 *sptes[RMAP_EXT];
160         struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164         u64 addr;
165         hpa_t shadow_addr;
166         int level;
167         u64 *sptep;
168         unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
172         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
173              shadow_walk_okay(&(_walker));                      \
174              shadow_walk_next(&(_walker)))
175
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
177
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
181
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
190
191 static inline u64 rsvd_bits(int s, int e)
192 {
193         return ((1ULL << (e - s + 1)) - 1) << s;
194 }
195
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
197 {
198         shadow_trap_nonpresent_pte = trap_pte;
199         shadow_notrap_nonpresent_pte = notrap_pte;
200 }
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
202
203 void kvm_mmu_set_base_ptes(u64 base_pte)
204 {
205         shadow_base_present_pte = base_pte;
206 }
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
208
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
211 {
212         shadow_user_mask = user_mask;
213         shadow_accessed_mask = accessed_mask;
214         shadow_dirty_mask = dirty_mask;
215         shadow_nx_mask = nx_mask;
216         shadow_x_mask = x_mask;
217 }
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
219
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
221 {
222         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
223 }
224
225 static int is_cpuid_PSE36(void)
226 {
227         return 1;
228 }
229
230 static int is_nx(struct kvm_vcpu *vcpu)
231 {
232         return vcpu->arch.efer & EFER_NX;
233 }
234
235 static int is_shadow_present_pte(u64 pte)
236 {
237         return pte != shadow_trap_nonpresent_pte
238                 && pte != shadow_notrap_nonpresent_pte;
239 }
240
241 static int is_large_pte(u64 pte)
242 {
243         return pte & PT_PAGE_SIZE_MASK;
244 }
245
246 static int is_writable_pte(unsigned long pte)
247 {
248         return pte & PT_WRITABLE_MASK;
249 }
250
251 static int is_dirty_gpte(unsigned long pte)
252 {
253         return pte & PT_DIRTY_MASK;
254 }
255
256 static int is_rmap_spte(u64 pte)
257 {
258         return is_shadow_present_pte(pte);
259 }
260
261 static int is_last_spte(u64 pte, int level)
262 {
263         if (level == PT_PAGE_TABLE_LEVEL)
264                 return 1;
265         if (is_large_pte(pte))
266                 return 1;
267         return 0;
268 }
269
270 static pfn_t spte_to_pfn(u64 pte)
271 {
272         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
273 }
274
275 static gfn_t pse36_gfn_delta(u32 gpte)
276 {
277         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
278
279         return (gpte & PT32_DIR_PSE36_MASK) << shift;
280 }
281
282 static void __set_spte(u64 *sptep, u64 spte)
283 {
284 #ifdef CONFIG_X86_64
285         set_64bit((unsigned long *)sptep, spte);
286 #else
287         set_64bit((unsigned long long *)sptep, spte);
288 #endif
289 }
290
291 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
292 {
293 #ifdef CONFIG_X86_64
294         return xchg(sptep, new_spte);
295 #else
296         u64 old_spte;
297
298         do {
299                 old_spte = *sptep;
300         } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
301
302         return old_spte;
303 #endif
304 }
305
306 static void update_spte(u64 *sptep, u64 new_spte)
307 {
308         u64 old_spte;
309
310         if (!shadow_accessed_mask || (new_spte & shadow_accessed_mask)) {
311                 __set_spte(sptep, new_spte);
312         } else {
313                 old_spte = __xchg_spte(sptep, new_spte);
314                 if (old_spte & shadow_accessed_mask)
315                         mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
316         }
317 }
318
319 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
320                                   struct kmem_cache *base_cache, int min)
321 {
322         void *obj;
323
324         if (cache->nobjs >= min)
325                 return 0;
326         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
327                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
328                 if (!obj)
329                         return -ENOMEM;
330                 cache->objects[cache->nobjs++] = obj;
331         }
332         return 0;
333 }
334
335 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
336                                   struct kmem_cache *cache)
337 {
338         while (mc->nobjs)
339                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
340 }
341
342 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
343                                        int min)
344 {
345         struct page *page;
346
347         if (cache->nobjs >= min)
348                 return 0;
349         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
350                 page = alloc_page(GFP_KERNEL);
351                 if (!page)
352                         return -ENOMEM;
353                 cache->objects[cache->nobjs++] = page_address(page);
354         }
355         return 0;
356 }
357
358 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
359 {
360         while (mc->nobjs)
361                 free_page((unsigned long)mc->objects[--mc->nobjs]);
362 }
363
364 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
365 {
366         int r;
367
368         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
369                                    pte_chain_cache, 4);
370         if (r)
371                 goto out;
372         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
373                                    rmap_desc_cache, 4);
374         if (r)
375                 goto out;
376         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
377         if (r)
378                 goto out;
379         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
380                                    mmu_page_header_cache, 4);
381 out:
382         return r;
383 }
384
385 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
386 {
387         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
388         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
389         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
390         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
391                                 mmu_page_header_cache);
392 }
393
394 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
395                                     size_t size)
396 {
397         void *p;
398
399         BUG_ON(!mc->nobjs);
400         p = mc->objects[--mc->nobjs];
401         return p;
402 }
403
404 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
405 {
406         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
407                                       sizeof(struct kvm_pte_chain));
408 }
409
410 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
411 {
412         kmem_cache_free(pte_chain_cache, pc);
413 }
414
415 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
416 {
417         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
418                                       sizeof(struct kvm_rmap_desc));
419 }
420
421 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
422 {
423         kmem_cache_free(rmap_desc_cache, rd);
424 }
425
426 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
427 {
428         if (!sp->role.direct)
429                 return sp->gfns[index];
430
431         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
432 }
433
434 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
435 {
436         if (sp->role.direct)
437                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
438         else
439                 sp->gfns[index] = gfn;
440 }
441
442 /*
443  * Return the pointer to the largepage write count for a given
444  * gfn, handling slots that are not large page aligned.
445  */
446 static int *slot_largepage_idx(gfn_t gfn,
447                                struct kvm_memory_slot *slot,
448                                int level)
449 {
450         unsigned long idx;
451
452         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
453               (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
454         return &slot->lpage_info[level - 2][idx].write_count;
455 }
456
457 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
458 {
459         struct kvm_memory_slot *slot;
460         int *write_count;
461         int i;
462
463         slot = gfn_to_memslot(kvm, gfn);
464         for (i = PT_DIRECTORY_LEVEL;
465              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
466                 write_count   = slot_largepage_idx(gfn, slot, i);
467                 *write_count += 1;
468         }
469 }
470
471 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
472 {
473         struct kvm_memory_slot *slot;
474         int *write_count;
475         int i;
476
477         slot = gfn_to_memslot(kvm, gfn);
478         for (i = PT_DIRECTORY_LEVEL;
479              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
480                 write_count   = slot_largepage_idx(gfn, slot, i);
481                 *write_count -= 1;
482                 WARN_ON(*write_count < 0);
483         }
484 }
485
486 static int has_wrprotected_page(struct kvm *kvm,
487                                 gfn_t gfn,
488                                 int level)
489 {
490         struct kvm_memory_slot *slot;
491         int *largepage_idx;
492
493         slot = gfn_to_memslot(kvm, gfn);
494         if (slot) {
495                 largepage_idx = slot_largepage_idx(gfn, slot, level);
496                 return *largepage_idx;
497         }
498
499         return 1;
500 }
501
502 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
503 {
504         unsigned long page_size;
505         int i, ret = 0;
506
507         page_size = kvm_host_page_size(kvm, gfn);
508
509         for (i = PT_PAGE_TABLE_LEVEL;
510              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
511                 if (page_size >= KVM_HPAGE_SIZE(i))
512                         ret = i;
513                 else
514                         break;
515         }
516
517         return ret;
518 }
519
520 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
521 {
522         struct kvm_memory_slot *slot;
523         int host_level, level, max_level;
524
525         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
526         if (slot && slot->dirty_bitmap)
527                 return PT_PAGE_TABLE_LEVEL;
528
529         host_level = host_mapping_level(vcpu->kvm, large_gfn);
530
531         if (host_level == PT_PAGE_TABLE_LEVEL)
532                 return host_level;
533
534         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
535                 kvm_x86_ops->get_lpage_level() : host_level;
536
537         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
538                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
539                         break;
540
541         return level - 1;
542 }
543
544 /*
545  * Take gfn and return the reverse mapping to it.
546  */
547
548 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
549 {
550         struct kvm_memory_slot *slot;
551         unsigned long idx;
552
553         slot = gfn_to_memslot(kvm, gfn);
554         if (likely(level == PT_PAGE_TABLE_LEVEL))
555                 return &slot->rmap[gfn - slot->base_gfn];
556
557         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
558                 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
559
560         return &slot->lpage_info[level - 2][idx].rmap_pde;
561 }
562
563 /*
564  * Reverse mapping data structures:
565  *
566  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
567  * that points to page_address(page).
568  *
569  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
570  * containing more mappings.
571  *
572  * Returns the number of rmap entries before the spte was added or zero if
573  * the spte was not added.
574  *
575  */
576 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
577 {
578         struct kvm_mmu_page *sp;
579         struct kvm_rmap_desc *desc;
580         unsigned long *rmapp;
581         int i, count = 0;
582
583         if (!is_rmap_spte(*spte))
584                 return count;
585         sp = page_header(__pa(spte));
586         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
587         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
588         if (!*rmapp) {
589                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
590                 *rmapp = (unsigned long)spte;
591         } else if (!(*rmapp & 1)) {
592                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
593                 desc = mmu_alloc_rmap_desc(vcpu);
594                 desc->sptes[0] = (u64 *)*rmapp;
595                 desc->sptes[1] = spte;
596                 *rmapp = (unsigned long)desc | 1;
597         } else {
598                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
599                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
600                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
601                         desc = desc->more;
602                         count += RMAP_EXT;
603                 }
604                 if (desc->sptes[RMAP_EXT-1]) {
605                         desc->more = mmu_alloc_rmap_desc(vcpu);
606                         desc = desc->more;
607                 }
608                 for (i = 0; desc->sptes[i]; ++i)
609                         ;
610                 desc->sptes[i] = spte;
611         }
612         return count;
613 }
614
615 static void rmap_desc_remove_entry(unsigned long *rmapp,
616                                    struct kvm_rmap_desc *desc,
617                                    int i,
618                                    struct kvm_rmap_desc *prev_desc)
619 {
620         int j;
621
622         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
623                 ;
624         desc->sptes[i] = desc->sptes[j];
625         desc->sptes[j] = NULL;
626         if (j != 0)
627                 return;
628         if (!prev_desc && !desc->more)
629                 *rmapp = (unsigned long)desc->sptes[0];
630         else
631                 if (prev_desc)
632                         prev_desc->more = desc->more;
633                 else
634                         *rmapp = (unsigned long)desc->more | 1;
635         mmu_free_rmap_desc(desc);
636 }
637
638 static void rmap_remove(struct kvm *kvm, u64 *spte)
639 {
640         struct kvm_rmap_desc *desc;
641         struct kvm_rmap_desc *prev_desc;
642         struct kvm_mmu_page *sp;
643         gfn_t gfn;
644         unsigned long *rmapp;
645         int i;
646
647         sp = page_header(__pa(spte));
648         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
649         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
650         if (!*rmapp) {
651                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
652                 BUG();
653         } else if (!(*rmapp & 1)) {
654                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
655                 if ((u64 *)*rmapp != spte) {
656                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
657                                spte, *spte);
658                         BUG();
659                 }
660                 *rmapp = 0;
661         } else {
662                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
663                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
664                 prev_desc = NULL;
665                 while (desc) {
666                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
667                                 if (desc->sptes[i] == spte) {
668                                         rmap_desc_remove_entry(rmapp,
669                                                                desc, i,
670                                                                prev_desc);
671                                         return;
672                                 }
673                         prev_desc = desc;
674                         desc = desc->more;
675                 }
676                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
677                 BUG();
678         }
679 }
680
681 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
682 {
683         pfn_t pfn;
684         u64 old_spte;
685
686         old_spte = __xchg_spte(sptep, new_spte);
687         if (!is_rmap_spte(old_spte))
688                 return;
689         pfn = spte_to_pfn(old_spte);
690         if (old_spte & shadow_accessed_mask)
691                 kvm_set_pfn_accessed(pfn);
692         if (is_writable_pte(old_spte))
693                 kvm_set_pfn_dirty(pfn);
694         rmap_remove(kvm, sptep);
695 }
696
697 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
698 {
699         struct kvm_rmap_desc *desc;
700         u64 *prev_spte;
701         int i;
702
703         if (!*rmapp)
704                 return NULL;
705         else if (!(*rmapp & 1)) {
706                 if (!spte)
707                         return (u64 *)*rmapp;
708                 return NULL;
709         }
710         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
711         prev_spte = NULL;
712         while (desc) {
713                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
714                         if (prev_spte == spte)
715                                 return desc->sptes[i];
716                         prev_spte = desc->sptes[i];
717                 }
718                 desc = desc->more;
719         }
720         return NULL;
721 }
722
723 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
724 {
725         unsigned long *rmapp;
726         u64 *spte;
727         int i, write_protected = 0;
728
729         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
730
731         spte = rmap_next(kvm, rmapp, NULL);
732         while (spte) {
733                 BUG_ON(!spte);
734                 BUG_ON(!(*spte & PT_PRESENT_MASK));
735                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
736                 if (is_writable_pte(*spte)) {
737                         update_spte(spte, *spte & ~PT_WRITABLE_MASK);
738                         write_protected = 1;
739                 }
740                 spte = rmap_next(kvm, rmapp, spte);
741         }
742         if (write_protected) {
743                 pfn_t pfn;
744
745                 spte = rmap_next(kvm, rmapp, NULL);
746                 pfn = spte_to_pfn(*spte);
747                 kvm_set_pfn_dirty(pfn);
748         }
749
750         /* check for huge page mappings */
751         for (i = PT_DIRECTORY_LEVEL;
752              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
753                 rmapp = gfn_to_rmap(kvm, gfn, i);
754                 spte = rmap_next(kvm, rmapp, NULL);
755                 while (spte) {
756                         BUG_ON(!spte);
757                         BUG_ON(!(*spte & PT_PRESENT_MASK));
758                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
759                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
760                         if (is_writable_pte(*spte)) {
761                                 drop_spte(kvm, spte,
762                                           shadow_trap_nonpresent_pte);
763                                 --kvm->stat.lpages;
764                                 spte = NULL;
765                                 write_protected = 1;
766                         }
767                         spte = rmap_next(kvm, rmapp, spte);
768                 }
769         }
770
771         return write_protected;
772 }
773
774 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
775                            unsigned long data)
776 {
777         u64 *spte;
778         int need_tlb_flush = 0;
779
780         while ((spte = rmap_next(kvm, rmapp, NULL))) {
781                 BUG_ON(!(*spte & PT_PRESENT_MASK));
782                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
783                 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
784                 need_tlb_flush = 1;
785         }
786         return need_tlb_flush;
787 }
788
789 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
790                              unsigned long data)
791 {
792         int need_flush = 0;
793         u64 *spte, new_spte, old_spte;
794         pte_t *ptep = (pte_t *)data;
795         pfn_t new_pfn;
796
797         WARN_ON(pte_huge(*ptep));
798         new_pfn = pte_pfn(*ptep);
799         spte = rmap_next(kvm, rmapp, NULL);
800         while (spte) {
801                 BUG_ON(!is_shadow_present_pte(*spte));
802                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
803                 need_flush = 1;
804                 if (pte_write(*ptep)) {
805                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
806                         spte = rmap_next(kvm, rmapp, NULL);
807                 } else {
808                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
809                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
810
811                         new_spte &= ~PT_WRITABLE_MASK;
812                         new_spte &= ~SPTE_HOST_WRITEABLE;
813                         new_spte &= ~shadow_accessed_mask;
814                         if (is_writable_pte(*spte))
815                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
816                         old_spte = __xchg_spte(spte, new_spte);
817                         if (is_shadow_present_pte(old_spte)
818                             && (old_spte & shadow_accessed_mask))
819                                 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
820                         spte = rmap_next(kvm, rmapp, spte);
821                 }
822         }
823         if (need_flush)
824                 kvm_flush_remote_tlbs(kvm);
825
826         return 0;
827 }
828
829 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
830                           unsigned long data,
831                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
832                                          unsigned long data))
833 {
834         int i, j;
835         int ret;
836         int retval = 0;
837         struct kvm_memslots *slots;
838
839         slots = kvm_memslots(kvm);
840
841         for (i = 0; i < slots->nmemslots; i++) {
842                 struct kvm_memory_slot *memslot = &slots->memslots[i];
843                 unsigned long start = memslot->userspace_addr;
844                 unsigned long end;
845
846                 end = start + (memslot->npages << PAGE_SHIFT);
847                 if (hva >= start && hva < end) {
848                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
849
850                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
851
852                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
853                                 int idx = gfn_offset;
854                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
855                                 ret |= handler(kvm,
856                                         &memslot->lpage_info[j][idx].rmap_pde,
857                                         data);
858                         }
859                         trace_kvm_age_page(hva, memslot, ret);
860                         retval |= ret;
861                 }
862         }
863
864         return retval;
865 }
866
867 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
868 {
869         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
870 }
871
872 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
873 {
874         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
875 }
876
877 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
878                          unsigned long data)
879 {
880         u64 *spte;
881         int young = 0;
882
883         /*
884          * Emulate the accessed bit for EPT, by checking if this page has
885          * an EPT mapping, and clearing it if it does. On the next access,
886          * a new EPT mapping will be established.
887          * This has some overhead, but not as much as the cost of swapping
888          * out actively used pages or breaking up actively used hugepages.
889          */
890         if (!shadow_accessed_mask)
891                 return kvm_unmap_rmapp(kvm, rmapp, data);
892
893         spte = rmap_next(kvm, rmapp, NULL);
894         while (spte) {
895                 int _young;
896                 u64 _spte = *spte;
897                 BUG_ON(!(_spte & PT_PRESENT_MASK));
898                 _young = _spte & PT_ACCESSED_MASK;
899                 if (_young) {
900                         young = 1;
901                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
902                 }
903                 spte = rmap_next(kvm, rmapp, spte);
904         }
905         return young;
906 }
907
908 #define RMAP_RECYCLE_THRESHOLD 1000
909
910 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
911 {
912         unsigned long *rmapp;
913         struct kvm_mmu_page *sp;
914
915         sp = page_header(__pa(spte));
916
917         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
918
919         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
920         kvm_flush_remote_tlbs(vcpu->kvm);
921 }
922
923 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
924 {
925         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
926 }
927
928 #ifdef MMU_DEBUG
929 static int is_empty_shadow_page(u64 *spt)
930 {
931         u64 *pos;
932         u64 *end;
933
934         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
935                 if (is_shadow_present_pte(*pos)) {
936                         printk(KERN_ERR "%s: %p %llx\n", __func__,
937                                pos, *pos);
938                         return 0;
939                 }
940         return 1;
941 }
942 #endif
943
944 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
945 {
946         ASSERT(is_empty_shadow_page(sp->spt));
947         hlist_del(&sp->hash_link);
948         list_del(&sp->link);
949         __free_page(virt_to_page(sp->spt));
950         if (!sp->role.direct)
951                 __free_page(virt_to_page(sp->gfns));
952         kmem_cache_free(mmu_page_header_cache, sp);
953         ++kvm->arch.n_free_mmu_pages;
954 }
955
956 static unsigned kvm_page_table_hashfn(gfn_t gfn)
957 {
958         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
959 }
960
961 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
962                                                u64 *parent_pte, int direct)
963 {
964         struct kvm_mmu_page *sp;
965
966         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
967         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
968         if (!direct)
969                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
970                                                   PAGE_SIZE);
971         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
972         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
973         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
974         sp->multimapped = 0;
975         sp->parent_pte = parent_pte;
976         --vcpu->kvm->arch.n_free_mmu_pages;
977         return sp;
978 }
979
980 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
981                                     struct kvm_mmu_page *sp, u64 *parent_pte)
982 {
983         struct kvm_pte_chain *pte_chain;
984         struct hlist_node *node;
985         int i;
986
987         if (!parent_pte)
988                 return;
989         if (!sp->multimapped) {
990                 u64 *old = sp->parent_pte;
991
992                 if (!old) {
993                         sp->parent_pte = parent_pte;
994                         return;
995                 }
996                 sp->multimapped = 1;
997                 pte_chain = mmu_alloc_pte_chain(vcpu);
998                 INIT_HLIST_HEAD(&sp->parent_ptes);
999                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1000                 pte_chain->parent_ptes[0] = old;
1001         }
1002         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1003                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1004                         continue;
1005                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1006                         if (!pte_chain->parent_ptes[i]) {
1007                                 pte_chain->parent_ptes[i] = parent_pte;
1008                                 return;
1009                         }
1010         }
1011         pte_chain = mmu_alloc_pte_chain(vcpu);
1012         BUG_ON(!pte_chain);
1013         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1014         pte_chain->parent_ptes[0] = parent_pte;
1015 }
1016
1017 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1018                                        u64 *parent_pte)
1019 {
1020         struct kvm_pte_chain *pte_chain;
1021         struct hlist_node *node;
1022         int i;
1023
1024         if (!sp->multimapped) {
1025                 BUG_ON(sp->parent_pte != parent_pte);
1026                 sp->parent_pte = NULL;
1027                 return;
1028         }
1029         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1030                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1031                         if (!pte_chain->parent_ptes[i])
1032                                 break;
1033                         if (pte_chain->parent_ptes[i] != parent_pte)
1034                                 continue;
1035                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
1036                                 && pte_chain->parent_ptes[i + 1]) {
1037                                 pte_chain->parent_ptes[i]
1038                                         = pte_chain->parent_ptes[i + 1];
1039                                 ++i;
1040                         }
1041                         pte_chain->parent_ptes[i] = NULL;
1042                         if (i == 0) {
1043                                 hlist_del(&pte_chain->link);
1044                                 mmu_free_pte_chain(pte_chain);
1045                                 if (hlist_empty(&sp->parent_ptes)) {
1046                                         sp->multimapped = 0;
1047                                         sp->parent_pte = NULL;
1048                                 }
1049                         }
1050                         return;
1051                 }
1052         BUG();
1053 }
1054
1055 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1056 {
1057         struct kvm_pte_chain *pte_chain;
1058         struct hlist_node *node;
1059         struct kvm_mmu_page *parent_sp;
1060         int i;
1061
1062         if (!sp->multimapped && sp->parent_pte) {
1063                 parent_sp = page_header(__pa(sp->parent_pte));
1064                 fn(parent_sp, sp->parent_pte);
1065                 return;
1066         }
1067
1068         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1069                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1070                         u64 *spte = pte_chain->parent_ptes[i];
1071
1072                         if (!spte)
1073                                 break;
1074                         parent_sp = page_header(__pa(spte));
1075                         fn(parent_sp, spte);
1076                 }
1077 }
1078
1079 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1080 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1081 {
1082         mmu_parent_walk(sp, mark_unsync);
1083 }
1084
1085 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1086 {
1087         unsigned int index;
1088
1089         index = spte - sp->spt;
1090         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1091                 return;
1092         if (sp->unsync_children++)
1093                 return;
1094         kvm_mmu_mark_parents_unsync(sp);
1095 }
1096
1097 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1098                                     struct kvm_mmu_page *sp)
1099 {
1100         int i;
1101
1102         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1103                 sp->spt[i] = shadow_trap_nonpresent_pte;
1104 }
1105
1106 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1107                                struct kvm_mmu_page *sp, bool clear_unsync)
1108 {
1109         return 1;
1110 }
1111
1112 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1113 {
1114 }
1115
1116 #define KVM_PAGE_ARRAY_NR 16
1117
1118 struct kvm_mmu_pages {
1119         struct mmu_page_and_offset {
1120                 struct kvm_mmu_page *sp;
1121                 unsigned int idx;
1122         } page[KVM_PAGE_ARRAY_NR];
1123         unsigned int nr;
1124 };
1125
1126 #define for_each_unsync_children(bitmap, idx)           \
1127         for (idx = find_first_bit(bitmap, 512);         \
1128              idx < 512;                                 \
1129              idx = find_next_bit(bitmap, 512, idx+1))
1130
1131 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1132                          int idx)
1133 {
1134         int i;
1135
1136         if (sp->unsync)
1137                 for (i=0; i < pvec->nr; i++)
1138                         if (pvec->page[i].sp == sp)
1139                                 return 0;
1140
1141         pvec->page[pvec->nr].sp = sp;
1142         pvec->page[pvec->nr].idx = idx;
1143         pvec->nr++;
1144         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1145 }
1146
1147 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1148                            struct kvm_mmu_pages *pvec)
1149 {
1150         int i, ret, nr_unsync_leaf = 0;
1151
1152         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1153                 struct kvm_mmu_page *child;
1154                 u64 ent = sp->spt[i];
1155
1156                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1157                         goto clear_child_bitmap;
1158
1159                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1160
1161                 if (child->unsync_children) {
1162                         if (mmu_pages_add(pvec, child, i))
1163                                 return -ENOSPC;
1164
1165                         ret = __mmu_unsync_walk(child, pvec);
1166                         if (!ret)
1167                                 goto clear_child_bitmap;
1168                         else if (ret > 0)
1169                                 nr_unsync_leaf += ret;
1170                         else
1171                                 return ret;
1172                 } else if (child->unsync) {
1173                         nr_unsync_leaf++;
1174                         if (mmu_pages_add(pvec, child, i))
1175                                 return -ENOSPC;
1176                 } else
1177                          goto clear_child_bitmap;
1178
1179                 continue;
1180
1181 clear_child_bitmap:
1182                 __clear_bit(i, sp->unsync_child_bitmap);
1183                 sp->unsync_children--;
1184                 WARN_ON((int)sp->unsync_children < 0);
1185         }
1186
1187
1188         return nr_unsync_leaf;
1189 }
1190
1191 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1192                            struct kvm_mmu_pages *pvec)
1193 {
1194         if (!sp->unsync_children)
1195                 return 0;
1196
1197         mmu_pages_add(pvec, sp, 0);
1198         return __mmu_unsync_walk(sp, pvec);
1199 }
1200
1201 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1202 {
1203         WARN_ON(!sp->unsync);
1204         trace_kvm_mmu_sync_page(sp);
1205         sp->unsync = 0;
1206         --kvm->stat.mmu_unsync;
1207 }
1208
1209 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1210                                     struct list_head *invalid_list);
1211 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1212                                     struct list_head *invalid_list);
1213
1214 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1215   hlist_for_each_entry(sp, pos,                                         \
1216    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1217         if ((sp)->gfn != (gfn)) {} else
1218
1219 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1220   hlist_for_each_entry(sp, pos,                                         \
1221    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1222                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1223                         (sp)->role.invalid) {} else
1224
1225 /* @sp->gfn should be write-protected at the call site */
1226 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1227                            struct list_head *invalid_list, bool clear_unsync)
1228 {
1229         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1230                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1231                 return 1;
1232         }
1233
1234         if (clear_unsync)
1235                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1236
1237         if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1238                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1239                 return 1;
1240         }
1241
1242         kvm_mmu_flush_tlb(vcpu);
1243         return 0;
1244 }
1245
1246 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1247                                    struct kvm_mmu_page *sp)
1248 {
1249         LIST_HEAD(invalid_list);
1250         int ret;
1251
1252         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1253         if (ret)
1254                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1255
1256         return ret;
1257 }
1258
1259 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1260                          struct list_head *invalid_list)
1261 {
1262         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1263 }
1264
1265 /* @gfn should be write-protected at the call site */
1266 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1267 {
1268         struct kvm_mmu_page *s;
1269         struct hlist_node *node;
1270         LIST_HEAD(invalid_list);
1271         bool flush = false;
1272
1273         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1274                 if (!s->unsync)
1275                         continue;
1276
1277                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1278                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1279                         (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1280                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1281                         continue;
1282                 }
1283                 kvm_unlink_unsync_page(vcpu->kvm, s);
1284                 flush = true;
1285         }
1286
1287         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1288         if (flush)
1289                 kvm_mmu_flush_tlb(vcpu);
1290 }
1291
1292 struct mmu_page_path {
1293         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1294         unsigned int idx[PT64_ROOT_LEVEL-1];
1295 };
1296
1297 #define for_each_sp(pvec, sp, parents, i)                       \
1298                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1299                         sp = pvec.page[i].sp;                   \
1300                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1301                         i = mmu_pages_next(&pvec, &parents, i))
1302
1303 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1304                           struct mmu_page_path *parents,
1305                           int i)
1306 {
1307         int n;
1308
1309         for (n = i+1; n < pvec->nr; n++) {
1310                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1311
1312                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1313                         parents->idx[0] = pvec->page[n].idx;
1314                         return n;
1315                 }
1316
1317                 parents->parent[sp->role.level-2] = sp;
1318                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1319         }
1320
1321         return n;
1322 }
1323
1324 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1325 {
1326         struct kvm_mmu_page *sp;
1327         unsigned int level = 0;
1328
1329         do {
1330                 unsigned int idx = parents->idx[level];
1331
1332                 sp = parents->parent[level];
1333                 if (!sp)
1334                         return;
1335
1336                 --sp->unsync_children;
1337                 WARN_ON((int)sp->unsync_children < 0);
1338                 __clear_bit(idx, sp->unsync_child_bitmap);
1339                 level++;
1340         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1341 }
1342
1343 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1344                                struct mmu_page_path *parents,
1345                                struct kvm_mmu_pages *pvec)
1346 {
1347         parents->parent[parent->role.level-1] = NULL;
1348         pvec->nr = 0;
1349 }
1350
1351 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1352                               struct kvm_mmu_page *parent)
1353 {
1354         int i;
1355         struct kvm_mmu_page *sp;
1356         struct mmu_page_path parents;
1357         struct kvm_mmu_pages pages;
1358         LIST_HEAD(invalid_list);
1359
1360         kvm_mmu_pages_init(parent, &parents, &pages);
1361         while (mmu_unsync_walk(parent, &pages)) {
1362                 int protected = 0;
1363
1364                 for_each_sp(pages, sp, parents, i)
1365                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1366
1367                 if (protected)
1368                         kvm_flush_remote_tlbs(vcpu->kvm);
1369
1370                 for_each_sp(pages, sp, parents, i) {
1371                         kvm_sync_page(vcpu, sp, &invalid_list);
1372                         mmu_pages_clear_parents(&parents);
1373                 }
1374                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1375                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1376                 kvm_mmu_pages_init(parent, &parents, &pages);
1377         }
1378 }
1379
1380 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1381                                              gfn_t gfn,
1382                                              gva_t gaddr,
1383                                              unsigned level,
1384                                              int direct,
1385                                              unsigned access,
1386                                              u64 *parent_pte)
1387 {
1388         union kvm_mmu_page_role role;
1389         unsigned quadrant;
1390         struct kvm_mmu_page *sp;
1391         struct hlist_node *node;
1392         bool need_sync = false;
1393
1394         role = vcpu->arch.mmu.base_role;
1395         role.level = level;
1396         role.direct = direct;
1397         if (role.direct)
1398                 role.cr4_pae = 0;
1399         role.access = access;
1400         if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1401                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1402                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1403                 role.quadrant = quadrant;
1404         }
1405         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1406                 if (!need_sync && sp->unsync)
1407                         need_sync = true;
1408
1409                 if (sp->role.word != role.word)
1410                         continue;
1411
1412                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1413                         break;
1414
1415                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1416                 if (sp->unsync_children) {
1417                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1418                         kvm_mmu_mark_parents_unsync(sp);
1419                 } else if (sp->unsync)
1420                         kvm_mmu_mark_parents_unsync(sp);
1421
1422                 trace_kvm_mmu_get_page(sp, false);
1423                 return sp;
1424         }
1425         ++vcpu->kvm->stat.mmu_cache_miss;
1426         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1427         if (!sp)
1428                 return sp;
1429         sp->gfn = gfn;
1430         sp->role = role;
1431         hlist_add_head(&sp->hash_link,
1432                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1433         if (!direct) {
1434                 if (rmap_write_protect(vcpu->kvm, gfn))
1435                         kvm_flush_remote_tlbs(vcpu->kvm);
1436                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1437                         kvm_sync_pages(vcpu, gfn);
1438
1439                 account_shadowed(vcpu->kvm, gfn);
1440         }
1441         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1442                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1443         else
1444                 nonpaging_prefetch_page(vcpu, sp);
1445         trace_kvm_mmu_get_page(sp, true);
1446         return sp;
1447 }
1448
1449 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1450                              struct kvm_vcpu *vcpu, u64 addr)
1451 {
1452         iterator->addr = addr;
1453         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1454         iterator->level = vcpu->arch.mmu.shadow_root_level;
1455         if (iterator->level == PT32E_ROOT_LEVEL) {
1456                 iterator->shadow_addr
1457                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1458                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1459                 --iterator->level;
1460                 if (!iterator->shadow_addr)
1461                         iterator->level = 0;
1462         }
1463 }
1464
1465 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1466 {
1467         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1468                 return false;
1469
1470         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1471                 if (is_large_pte(*iterator->sptep))
1472                         return false;
1473
1474         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1475         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1476         return true;
1477 }
1478
1479 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1480 {
1481         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1482         --iterator->level;
1483 }
1484
1485 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1486                                          struct kvm_mmu_page *sp)
1487 {
1488         unsigned i;
1489         u64 *pt;
1490         u64 ent;
1491
1492         pt = sp->spt;
1493
1494         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1495                 ent = pt[i];
1496
1497                 if (is_shadow_present_pte(ent)) {
1498                         if (!is_last_spte(ent, sp->role.level)) {
1499                                 ent &= PT64_BASE_ADDR_MASK;
1500                                 mmu_page_remove_parent_pte(page_header(ent),
1501                                                            &pt[i]);
1502                         } else {
1503                                 if (is_large_pte(ent))
1504                                         --kvm->stat.lpages;
1505                                 drop_spte(kvm, &pt[i],
1506                                           shadow_trap_nonpresent_pte);
1507                         }
1508                 }
1509                 pt[i] = shadow_trap_nonpresent_pte;
1510         }
1511 }
1512
1513 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1514 {
1515         mmu_page_remove_parent_pte(sp, parent_pte);
1516 }
1517
1518 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1519 {
1520         int i;
1521         struct kvm_vcpu *vcpu;
1522
1523         kvm_for_each_vcpu(i, vcpu, kvm)
1524                 vcpu->arch.last_pte_updated = NULL;
1525 }
1526
1527 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1528 {
1529         u64 *parent_pte;
1530
1531         while (sp->multimapped || sp->parent_pte) {
1532                 if (!sp->multimapped)
1533                         parent_pte = sp->parent_pte;
1534                 else {
1535                         struct kvm_pte_chain *chain;
1536
1537                         chain = container_of(sp->parent_ptes.first,
1538                                              struct kvm_pte_chain, link);
1539                         parent_pte = chain->parent_ptes[0];
1540                 }
1541                 BUG_ON(!parent_pte);
1542                 kvm_mmu_put_page(sp, parent_pte);
1543                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1544         }
1545 }
1546
1547 static int mmu_zap_unsync_children(struct kvm *kvm,
1548                                    struct kvm_mmu_page *parent,
1549                                    struct list_head *invalid_list)
1550 {
1551         int i, zapped = 0;
1552         struct mmu_page_path parents;
1553         struct kvm_mmu_pages pages;
1554
1555         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1556                 return 0;
1557
1558         kvm_mmu_pages_init(parent, &parents, &pages);
1559         while (mmu_unsync_walk(parent, &pages)) {
1560                 struct kvm_mmu_page *sp;
1561
1562                 for_each_sp(pages, sp, parents, i) {
1563                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1564                         mmu_pages_clear_parents(&parents);
1565                         zapped++;
1566                 }
1567                 kvm_mmu_pages_init(parent, &parents, &pages);
1568         }
1569
1570         return zapped;
1571 }
1572
1573 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1574                                     struct list_head *invalid_list)
1575 {
1576         int ret;
1577
1578         trace_kvm_mmu_prepare_zap_page(sp);
1579         ++kvm->stat.mmu_shadow_zapped;
1580         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1581         kvm_mmu_page_unlink_children(kvm, sp);
1582         kvm_mmu_unlink_parents(kvm, sp);
1583         if (!sp->role.invalid && !sp->role.direct)
1584                 unaccount_shadowed(kvm, sp->gfn);
1585         if (sp->unsync)
1586                 kvm_unlink_unsync_page(kvm, sp);
1587         if (!sp->root_count) {
1588                 /* Count self */
1589                 ret++;
1590                 list_move(&sp->link, invalid_list);
1591         } else {
1592                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1593                 kvm_reload_remote_mmus(kvm);
1594         }
1595
1596         sp->role.invalid = 1;
1597         kvm_mmu_reset_last_pte_updated(kvm);
1598         return ret;
1599 }
1600
1601 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1602                                     struct list_head *invalid_list)
1603 {
1604         struct kvm_mmu_page *sp;
1605
1606         if (list_empty(invalid_list))
1607                 return;
1608
1609         kvm_flush_remote_tlbs(kvm);
1610
1611         do {
1612                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1613                 WARN_ON(!sp->role.invalid || sp->root_count);
1614                 kvm_mmu_free_page(kvm, sp);
1615         } while (!list_empty(invalid_list));
1616
1617 }
1618
1619 /*
1620  * Changing the number of mmu pages allocated to the vm
1621  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1622  */
1623 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1624 {
1625         int used_pages;
1626         LIST_HEAD(invalid_list);
1627
1628         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1629         used_pages = max(0, used_pages);
1630
1631         /*
1632          * If we set the number of mmu pages to be smaller be than the
1633          * number of actived pages , we must to free some mmu pages before we
1634          * change the value
1635          */
1636
1637         if (used_pages > kvm_nr_mmu_pages) {
1638                 while (used_pages > kvm_nr_mmu_pages &&
1639                         !list_empty(&kvm->arch.active_mmu_pages)) {
1640                         struct kvm_mmu_page *page;
1641
1642                         page = container_of(kvm->arch.active_mmu_pages.prev,
1643                                             struct kvm_mmu_page, link);
1644                         used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1645                                                                &invalid_list);
1646                 }
1647                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1648                 kvm_nr_mmu_pages = used_pages;
1649                 kvm->arch.n_free_mmu_pages = 0;
1650         }
1651         else
1652                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1653                                          - kvm->arch.n_alloc_mmu_pages;
1654
1655         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1656 }
1657
1658 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1659 {
1660         struct kvm_mmu_page *sp;
1661         struct hlist_node *node;
1662         LIST_HEAD(invalid_list);
1663         int r;
1664
1665         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1666         r = 0;
1667
1668         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1669                 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1670                          sp->role.word);
1671                 r = 1;
1672                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1673         }
1674         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1675         return r;
1676 }
1677
1678 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1679 {
1680         struct kvm_mmu_page *sp;
1681         struct hlist_node *node;
1682         LIST_HEAD(invalid_list);
1683
1684         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1685                 pgprintk("%s: zap %lx %x\n",
1686                          __func__, gfn, sp->role.word);
1687                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1688         }
1689         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1690 }
1691
1692 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1693 {
1694         int slot = memslot_id(kvm, gfn);
1695         struct kvm_mmu_page *sp = page_header(__pa(pte));
1696
1697         __set_bit(slot, sp->slot_bitmap);
1698 }
1699
1700 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1701 {
1702         int i;
1703         u64 *pt = sp->spt;
1704
1705         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1706                 return;
1707
1708         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1709                 if (pt[i] == shadow_notrap_nonpresent_pte)
1710                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1711         }
1712 }
1713
1714 /*
1715  * The function is based on mtrr_type_lookup() in
1716  * arch/x86/kernel/cpu/mtrr/generic.c
1717  */
1718 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1719                          u64 start, u64 end)
1720 {
1721         int i;
1722         u64 base, mask;
1723         u8 prev_match, curr_match;
1724         int num_var_ranges = KVM_NR_VAR_MTRR;
1725
1726         if (!mtrr_state->enabled)
1727                 return 0xFF;
1728
1729         /* Make end inclusive end, instead of exclusive */
1730         end--;
1731
1732         /* Look in fixed ranges. Just return the type as per start */
1733         if (mtrr_state->have_fixed && (start < 0x100000)) {
1734                 int idx;
1735
1736                 if (start < 0x80000) {
1737                         idx = 0;
1738                         idx += (start >> 16);
1739                         return mtrr_state->fixed_ranges[idx];
1740                 } else if (start < 0xC0000) {
1741                         idx = 1 * 8;
1742                         idx += ((start - 0x80000) >> 14);
1743                         return mtrr_state->fixed_ranges[idx];
1744                 } else if (start < 0x1000000) {
1745                         idx = 3 * 8;
1746                         idx += ((start - 0xC0000) >> 12);
1747                         return mtrr_state->fixed_ranges[idx];
1748                 }
1749         }
1750
1751         /*
1752          * Look in variable ranges
1753          * Look of multiple ranges matching this address and pick type
1754          * as per MTRR precedence
1755          */
1756         if (!(mtrr_state->enabled & 2))
1757                 return mtrr_state->def_type;
1758
1759         prev_match = 0xFF;
1760         for (i = 0; i < num_var_ranges; ++i) {
1761                 unsigned short start_state, end_state;
1762
1763                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1764                         continue;
1765
1766                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1767                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1768                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1769                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1770
1771                 start_state = ((start & mask) == (base & mask));
1772                 end_state = ((end & mask) == (base & mask));
1773                 if (start_state != end_state)
1774                         return 0xFE;
1775
1776                 if ((start & mask) != (base & mask))
1777                         continue;
1778
1779                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1780                 if (prev_match == 0xFF) {
1781                         prev_match = curr_match;
1782                         continue;
1783                 }
1784
1785                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1786                     curr_match == MTRR_TYPE_UNCACHABLE)
1787                         return MTRR_TYPE_UNCACHABLE;
1788
1789                 if ((prev_match == MTRR_TYPE_WRBACK &&
1790                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1791                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1792                      curr_match == MTRR_TYPE_WRBACK)) {
1793                         prev_match = MTRR_TYPE_WRTHROUGH;
1794                         curr_match = MTRR_TYPE_WRTHROUGH;
1795                 }
1796
1797                 if (prev_match != curr_match)
1798                         return MTRR_TYPE_UNCACHABLE;
1799         }
1800
1801         if (prev_match != 0xFF)
1802                 return prev_match;
1803
1804         return mtrr_state->def_type;
1805 }
1806
1807 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1808 {
1809         u8 mtrr;
1810
1811         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1812                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1813         if (mtrr == 0xfe || mtrr == 0xff)
1814                 mtrr = MTRR_TYPE_WRBACK;
1815         return mtrr;
1816 }
1817 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1818
1819 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1820 {
1821         trace_kvm_mmu_unsync_page(sp);
1822         ++vcpu->kvm->stat.mmu_unsync;
1823         sp->unsync = 1;
1824
1825         kvm_mmu_mark_parents_unsync(sp);
1826         mmu_convert_notrap(sp);
1827 }
1828
1829 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1830 {
1831         struct kvm_mmu_page *s;
1832         struct hlist_node *node;
1833
1834         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1835                 if (s->unsync)
1836                         continue;
1837                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1838                 __kvm_unsync_page(vcpu, s);
1839         }
1840 }
1841
1842 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1843                                   bool can_unsync)
1844 {
1845         struct kvm_mmu_page *s;
1846         struct hlist_node *node;
1847         bool need_unsync = false;
1848
1849         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1850                 if (!can_unsync)
1851                         return 1;
1852
1853                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1854                         return 1;
1855
1856                 if (!need_unsync && !s->unsync) {
1857                         if (!oos_shadow)
1858                                 return 1;
1859                         need_unsync = true;
1860                 }
1861         }
1862         if (need_unsync)
1863                 kvm_unsync_pages(vcpu, gfn);
1864         return 0;
1865 }
1866
1867 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1868                     unsigned pte_access, int user_fault,
1869                     int write_fault, int dirty, int level,
1870                     gfn_t gfn, pfn_t pfn, bool speculative,
1871                     bool can_unsync, bool reset_host_protection)
1872 {
1873         u64 spte;
1874         int ret = 0;
1875
1876         /*
1877          * We don't set the accessed bit, since we sometimes want to see
1878          * whether the guest actually used the pte (in order to detect
1879          * demand paging).
1880          */
1881         spte = shadow_base_present_pte | shadow_dirty_mask;
1882         if (!speculative)
1883                 spte |= shadow_accessed_mask;
1884         if (!dirty)
1885                 pte_access &= ~ACC_WRITE_MASK;
1886         if (pte_access & ACC_EXEC_MASK)
1887                 spte |= shadow_x_mask;
1888         else
1889                 spte |= shadow_nx_mask;
1890         if (pte_access & ACC_USER_MASK)
1891                 spte |= shadow_user_mask;
1892         if (level > PT_PAGE_TABLE_LEVEL)
1893                 spte |= PT_PAGE_SIZE_MASK;
1894         if (tdp_enabled)
1895                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1896                         kvm_is_mmio_pfn(pfn));
1897
1898         if (reset_host_protection)
1899                 spte |= SPTE_HOST_WRITEABLE;
1900
1901         spte |= (u64)pfn << PAGE_SHIFT;
1902
1903         if ((pte_access & ACC_WRITE_MASK)
1904             || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1905                 && !user_fault)) {
1906
1907                 if (level > PT_PAGE_TABLE_LEVEL &&
1908                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1909                         ret = 1;
1910                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1911                         goto done;
1912                 }
1913
1914                 spte |= PT_WRITABLE_MASK;
1915
1916                 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1917                         spte &= ~PT_USER_MASK;
1918
1919                 /*
1920                  * Optimization: for pte sync, if spte was writable the hash
1921                  * lookup is unnecessary (and expensive). Write protection
1922                  * is responsibility of mmu_get_page / kvm_sync_page.
1923                  * Same reasoning can be applied to dirty page accounting.
1924                  */
1925                 if (!can_unsync && is_writable_pte(*sptep))
1926                         goto set_pte;
1927
1928                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1929                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1930                                  __func__, gfn);
1931                         ret = 1;
1932                         pte_access &= ~ACC_WRITE_MASK;
1933                         if (is_writable_pte(spte))
1934                                 spte &= ~PT_WRITABLE_MASK;
1935                 }
1936         }
1937
1938         if (pte_access & ACC_WRITE_MASK)
1939                 mark_page_dirty(vcpu->kvm, gfn);
1940
1941 set_pte:
1942         update_spte(sptep, spte);
1943 done:
1944         return ret;
1945 }
1946
1947 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1948                          unsigned pt_access, unsigned pte_access,
1949                          int user_fault, int write_fault, int dirty,
1950                          int *ptwrite, int level, gfn_t gfn,
1951                          pfn_t pfn, bool speculative,
1952                          bool reset_host_protection)
1953 {
1954         int was_rmapped = 0;
1955         int was_writable = is_writable_pte(*sptep);
1956         int rmap_count;
1957
1958         pgprintk("%s: spte %llx access %x write_fault %d"
1959                  " user_fault %d gfn %lx\n",
1960                  __func__, *sptep, pt_access,
1961                  write_fault, user_fault, gfn);
1962
1963         if (is_rmap_spte(*sptep)) {
1964                 /*
1965                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1966                  * the parent of the now unreachable PTE.
1967                  */
1968                 if (level > PT_PAGE_TABLE_LEVEL &&
1969                     !is_large_pte(*sptep)) {
1970                         struct kvm_mmu_page *child;
1971                         u64 pte = *sptep;
1972
1973                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1974                         mmu_page_remove_parent_pte(child, sptep);
1975                         __set_spte(sptep, shadow_trap_nonpresent_pte);
1976                         kvm_flush_remote_tlbs(vcpu->kvm);
1977                 } else if (pfn != spte_to_pfn(*sptep)) {
1978                         pgprintk("hfn old %lx new %lx\n",
1979                                  spte_to_pfn(*sptep), pfn);
1980                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1981                         kvm_flush_remote_tlbs(vcpu->kvm);
1982                 } else
1983                         was_rmapped = 1;
1984         }
1985
1986         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1987                       dirty, level, gfn, pfn, speculative, true,
1988                       reset_host_protection)) {
1989                 if (write_fault)
1990                         *ptwrite = 1;
1991                 kvm_mmu_flush_tlb(vcpu);
1992         }
1993
1994         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1995         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1996                  is_large_pte(*sptep)? "2MB" : "4kB",
1997                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1998                  *sptep, sptep);
1999         if (!was_rmapped && is_large_pte(*sptep))
2000                 ++vcpu->kvm->stat.lpages;
2001
2002         page_header_update_slot(vcpu->kvm, sptep, gfn);
2003         if (!was_rmapped) {
2004                 rmap_count = rmap_add(vcpu, sptep, gfn);
2005                 kvm_release_pfn_clean(pfn);
2006                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2007                         rmap_recycle(vcpu, sptep, gfn);
2008         } else {
2009                 if (was_writable)
2010                         kvm_release_pfn_dirty(pfn);
2011                 else
2012                         kvm_release_pfn_clean(pfn);
2013         }
2014         if (speculative) {
2015                 vcpu->arch.last_pte_updated = sptep;
2016                 vcpu->arch.last_pte_gfn = gfn;
2017         }
2018 }
2019
2020 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2021 {
2022 }
2023
2024 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2025                         int level, gfn_t gfn, pfn_t pfn)
2026 {
2027         struct kvm_shadow_walk_iterator iterator;
2028         struct kvm_mmu_page *sp;
2029         int pt_write = 0;
2030         gfn_t pseudo_gfn;
2031
2032         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2033                 if (iterator.level == level) {
2034                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2035                                      0, write, 1, &pt_write,
2036                                      level, gfn, pfn, false, true);
2037                         ++vcpu->stat.pf_fixed;
2038                         break;
2039                 }
2040
2041                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2042                         u64 base_addr = iterator.addr;
2043
2044                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2045                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2046                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2047                                               iterator.level - 1,
2048                                               1, ACC_ALL, iterator.sptep);
2049                         if (!sp) {
2050                                 pgprintk("nonpaging_map: ENOMEM\n");
2051                                 kvm_release_pfn_clean(pfn);
2052                                 return -ENOMEM;
2053                         }
2054
2055                         __set_spte(iterator.sptep,
2056                                    __pa(sp->spt)
2057                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2058                                    | shadow_user_mask | shadow_x_mask);
2059                 }
2060         }
2061         return pt_write;
2062 }
2063
2064 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2065 {
2066         char buf[1];
2067         void __user *hva;
2068         int r;
2069
2070         /* Touch the page, so send SIGBUS */
2071         hva = (void __user *)gfn_to_hva(kvm, gfn);
2072         r = copy_from_user(buf, hva, 1);
2073 }
2074
2075 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2076 {
2077         kvm_release_pfn_clean(pfn);
2078         if (is_hwpoison_pfn(pfn)) {
2079                 kvm_send_hwpoison_signal(kvm, gfn);
2080                 return 0;
2081         }
2082         return 1;
2083 }
2084
2085 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2086 {
2087         int r;
2088         int level;
2089         pfn_t pfn;
2090         unsigned long mmu_seq;
2091
2092         level = mapping_level(vcpu, gfn);
2093
2094         /*
2095          * This path builds a PAE pagetable - so we can map 2mb pages at
2096          * maximum. Therefore check if the level is larger than that.
2097          */
2098         if (level > PT_DIRECTORY_LEVEL)
2099                 level = PT_DIRECTORY_LEVEL;
2100
2101         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2102
2103         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2104         smp_rmb();
2105         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2106
2107         /* mmio */
2108         if (is_error_pfn(pfn))
2109                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2110
2111         spin_lock(&vcpu->kvm->mmu_lock);
2112         if (mmu_notifier_retry(vcpu, mmu_seq))
2113                 goto out_unlock;
2114         kvm_mmu_free_some_pages(vcpu);
2115         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2116         spin_unlock(&vcpu->kvm->mmu_lock);
2117
2118
2119         return r;
2120
2121 out_unlock:
2122         spin_unlock(&vcpu->kvm->mmu_lock);
2123         kvm_release_pfn_clean(pfn);
2124         return 0;
2125 }
2126
2127
2128 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2129 {
2130         int i;
2131         struct kvm_mmu_page *sp;
2132         LIST_HEAD(invalid_list);
2133
2134         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2135                 return;
2136         spin_lock(&vcpu->kvm->mmu_lock);
2137         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2138                 hpa_t root = vcpu->arch.mmu.root_hpa;
2139
2140                 sp = page_header(root);
2141                 --sp->root_count;
2142                 if (!sp->root_count && sp->role.invalid) {
2143                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2144                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2145                 }
2146                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2147                 spin_unlock(&vcpu->kvm->mmu_lock);
2148                 return;
2149         }
2150         for (i = 0; i < 4; ++i) {
2151                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2152
2153                 if (root) {
2154                         root &= PT64_BASE_ADDR_MASK;
2155                         sp = page_header(root);
2156                         --sp->root_count;
2157                         if (!sp->root_count && sp->role.invalid)
2158                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2159                                                          &invalid_list);
2160                 }
2161                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2162         }
2163         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2164         spin_unlock(&vcpu->kvm->mmu_lock);
2165         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2166 }
2167
2168 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2169 {
2170         int ret = 0;
2171
2172         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2173                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2174                 ret = 1;
2175         }
2176
2177         return ret;
2178 }
2179
2180 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2181 {
2182         int i;
2183         gfn_t root_gfn;
2184         struct kvm_mmu_page *sp;
2185         int direct = 0;
2186         u64 pdptr;
2187
2188         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2189
2190         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2191                 hpa_t root = vcpu->arch.mmu.root_hpa;
2192
2193                 ASSERT(!VALID_PAGE(root));
2194                 if (mmu_check_root(vcpu, root_gfn))
2195                         return 1;
2196                 if (tdp_enabled) {
2197                         direct = 1;
2198                         root_gfn = 0;
2199                 }
2200                 spin_lock(&vcpu->kvm->mmu_lock);
2201                 kvm_mmu_free_some_pages(vcpu);
2202                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2203                                       PT64_ROOT_LEVEL, direct,
2204                                       ACC_ALL, NULL);
2205                 root = __pa(sp->spt);
2206                 ++sp->root_count;
2207                 spin_unlock(&vcpu->kvm->mmu_lock);
2208                 vcpu->arch.mmu.root_hpa = root;
2209                 return 0;
2210         }
2211         direct = !is_paging(vcpu);
2212         for (i = 0; i < 4; ++i) {
2213                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2214
2215                 ASSERT(!VALID_PAGE(root));
2216                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2217                         pdptr = kvm_pdptr_read(vcpu, i);
2218                         if (!is_present_gpte(pdptr)) {
2219                                 vcpu->arch.mmu.pae_root[i] = 0;
2220                                 continue;
2221                         }
2222                         root_gfn = pdptr >> PAGE_SHIFT;
2223                 } else if (vcpu->arch.mmu.root_level == 0)
2224                         root_gfn = 0;
2225                 if (mmu_check_root(vcpu, root_gfn))
2226                         return 1;
2227                 if (tdp_enabled) {
2228                         direct = 1;
2229                         root_gfn = i << 30;
2230                 }
2231                 spin_lock(&vcpu->kvm->mmu_lock);
2232                 kvm_mmu_free_some_pages(vcpu);
2233                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2234                                       PT32_ROOT_LEVEL, direct,
2235                                       ACC_ALL, NULL);
2236                 root = __pa(sp->spt);
2237                 ++sp->root_count;
2238                 spin_unlock(&vcpu->kvm->mmu_lock);
2239
2240                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2241         }
2242         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2243         return 0;
2244 }
2245
2246 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2247 {
2248         int i;
2249         struct kvm_mmu_page *sp;
2250
2251         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2252                 return;
2253         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2254                 hpa_t root = vcpu->arch.mmu.root_hpa;
2255                 sp = page_header(root);
2256                 mmu_sync_children(vcpu, sp);
2257                 return;
2258         }
2259         for (i = 0; i < 4; ++i) {
2260                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2261
2262                 if (root && VALID_PAGE(root)) {
2263                         root &= PT64_BASE_ADDR_MASK;
2264                         sp = page_header(root);
2265                         mmu_sync_children(vcpu, sp);
2266                 }
2267         }
2268 }
2269
2270 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2271 {
2272         spin_lock(&vcpu->kvm->mmu_lock);
2273         mmu_sync_roots(vcpu);
2274         spin_unlock(&vcpu->kvm->mmu_lock);
2275 }
2276
2277 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2278                                   u32 access, u32 *error)
2279 {
2280         if (error)
2281                 *error = 0;
2282         return vaddr;
2283 }
2284
2285 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2286                                 u32 error_code)
2287 {
2288         gfn_t gfn;
2289         int r;
2290
2291         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2292         r = mmu_topup_memory_caches(vcpu);
2293         if (r)
2294                 return r;
2295
2296         ASSERT(vcpu);
2297         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2298
2299         gfn = gva >> PAGE_SHIFT;
2300
2301         return nonpaging_map(vcpu, gva & PAGE_MASK,
2302                              error_code & PFERR_WRITE_MASK, gfn);
2303 }
2304
2305 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2306                                 u32 error_code)
2307 {
2308         pfn_t pfn;
2309         int r;
2310         int level;
2311         gfn_t gfn = gpa >> PAGE_SHIFT;
2312         unsigned long mmu_seq;
2313
2314         ASSERT(vcpu);
2315         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2316
2317         r = mmu_topup_memory_caches(vcpu);
2318         if (r)
2319                 return r;
2320
2321         level = mapping_level(vcpu, gfn);
2322
2323         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2324
2325         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2326         smp_rmb();
2327         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2328         if (is_error_pfn(pfn))
2329                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2330         spin_lock(&vcpu->kvm->mmu_lock);
2331         if (mmu_notifier_retry(vcpu, mmu_seq))
2332                 goto out_unlock;
2333         kvm_mmu_free_some_pages(vcpu);
2334         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2335                          level, gfn, pfn);
2336         spin_unlock(&vcpu->kvm->mmu_lock);
2337
2338         return r;
2339
2340 out_unlock:
2341         spin_unlock(&vcpu->kvm->mmu_lock);
2342         kvm_release_pfn_clean(pfn);
2343         return 0;
2344 }
2345
2346 static void nonpaging_free(struct kvm_vcpu *vcpu)
2347 {
2348         mmu_free_roots(vcpu);
2349 }
2350
2351 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2352 {
2353         struct kvm_mmu *context = &vcpu->arch.mmu;
2354
2355         context->new_cr3 = nonpaging_new_cr3;
2356         context->page_fault = nonpaging_page_fault;
2357         context->gva_to_gpa = nonpaging_gva_to_gpa;
2358         context->free = nonpaging_free;
2359         context->prefetch_page = nonpaging_prefetch_page;
2360         context->sync_page = nonpaging_sync_page;
2361         context->invlpg = nonpaging_invlpg;
2362         context->root_level = 0;
2363         context->shadow_root_level = PT32E_ROOT_LEVEL;
2364         context->root_hpa = INVALID_PAGE;
2365         return 0;
2366 }
2367
2368 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2369 {
2370         ++vcpu->stat.tlb_flush;
2371         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2372 }
2373
2374 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2375 {
2376         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2377         mmu_free_roots(vcpu);
2378 }
2379
2380 static void inject_page_fault(struct kvm_vcpu *vcpu,
2381                               u64 addr,
2382                               u32 err_code)
2383 {
2384         kvm_inject_page_fault(vcpu, addr, err_code);
2385 }
2386
2387 static void paging_free(struct kvm_vcpu *vcpu)
2388 {
2389         nonpaging_free(vcpu);
2390 }
2391
2392 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2393 {
2394         int bit7;
2395
2396         bit7 = (gpte >> 7) & 1;
2397         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2398 }
2399
2400 #define PTTYPE 64
2401 #include "paging_tmpl.h"
2402 #undef PTTYPE
2403
2404 #define PTTYPE 32
2405 #include "paging_tmpl.h"
2406 #undef PTTYPE
2407
2408 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2409 {
2410         struct kvm_mmu *context = &vcpu->arch.mmu;
2411         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2412         u64 exb_bit_rsvd = 0;
2413
2414         if (!is_nx(vcpu))
2415                 exb_bit_rsvd = rsvd_bits(63, 63);
2416         switch (level) {
2417         case PT32_ROOT_LEVEL:
2418                 /* no rsvd bits for 2 level 4K page table entries */
2419                 context->rsvd_bits_mask[0][1] = 0;
2420                 context->rsvd_bits_mask[0][0] = 0;
2421                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2422
2423                 if (!is_pse(vcpu)) {
2424                         context->rsvd_bits_mask[1][1] = 0;
2425                         break;
2426                 }
2427
2428                 if (is_cpuid_PSE36())
2429                         /* 36bits PSE 4MB page */
2430                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2431                 else
2432                         /* 32 bits PSE 4MB page */
2433                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2434                 break;
2435         case PT32E_ROOT_LEVEL:
2436                 context->rsvd_bits_mask[0][2] =
2437                         rsvd_bits(maxphyaddr, 63) |
2438                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2439                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2440                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2441                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2442                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2443                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2444                         rsvd_bits(maxphyaddr, 62) |
2445                         rsvd_bits(13, 20);              /* large page */
2446                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2447                 break;
2448         case PT64_ROOT_LEVEL:
2449                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2450                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2451                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2452                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2453                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2454                         rsvd_bits(maxphyaddr, 51);
2455                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2456                         rsvd_bits(maxphyaddr, 51);
2457                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2458                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2459                         rsvd_bits(maxphyaddr, 51) |
2460                         rsvd_bits(13, 29);
2461                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2462                         rsvd_bits(maxphyaddr, 51) |
2463                         rsvd_bits(13, 20);              /* large page */
2464                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2465                 break;
2466         }
2467 }
2468
2469 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2470 {
2471         struct kvm_mmu *context = &vcpu->arch.mmu;
2472
2473         ASSERT(is_pae(vcpu));
2474         context->new_cr3 = paging_new_cr3;
2475         context->page_fault = paging64_page_fault;
2476         context->gva_to_gpa = paging64_gva_to_gpa;
2477         context->prefetch_page = paging64_prefetch_page;
2478         context->sync_page = paging64_sync_page;
2479         context->invlpg = paging64_invlpg;
2480         context->free = paging_free;
2481         context->root_level = level;
2482         context->shadow_root_level = level;
2483         context->root_hpa = INVALID_PAGE;
2484         return 0;
2485 }
2486
2487 static int paging64_init_context(struct kvm_vcpu *vcpu)
2488 {
2489         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2490         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2491 }
2492
2493 static int paging32_init_context(struct kvm_vcpu *vcpu)
2494 {
2495         struct kvm_mmu *context = &vcpu->arch.mmu;
2496
2497         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2498         context->new_cr3 = paging_new_cr3;
2499         context->page_fault = paging32_page_fault;
2500         context->gva_to_gpa = paging32_gva_to_gpa;
2501         context->free = paging_free;
2502         context->prefetch_page = paging32_prefetch_page;
2503         context->sync_page = paging32_sync_page;
2504         context->invlpg = paging32_invlpg;
2505         context->root_level = PT32_ROOT_LEVEL;
2506         context->shadow_root_level = PT32E_ROOT_LEVEL;
2507         context->root_hpa = INVALID_PAGE;
2508         return 0;
2509 }
2510
2511 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2512 {
2513         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2514         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2515 }
2516
2517 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2518 {
2519         struct kvm_mmu *context = &vcpu->arch.mmu;
2520
2521         context->new_cr3 = nonpaging_new_cr3;
2522         context->page_fault = tdp_page_fault;
2523         context->free = nonpaging_free;
2524         context->prefetch_page = nonpaging_prefetch_page;
2525         context->sync_page = nonpaging_sync_page;
2526         context->invlpg = nonpaging_invlpg;
2527         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2528         context->root_hpa = INVALID_PAGE;
2529
2530         if (!is_paging(vcpu)) {
2531                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2532                 context->root_level = 0;
2533         } else if (is_long_mode(vcpu)) {
2534                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2535                 context->gva_to_gpa = paging64_gva_to_gpa;
2536                 context->root_level = PT64_ROOT_LEVEL;
2537         } else if (is_pae(vcpu)) {
2538                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2539                 context->gva_to_gpa = paging64_gva_to_gpa;
2540                 context->root_level = PT32E_ROOT_LEVEL;
2541         } else {
2542                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2543                 context->gva_to_gpa = paging32_gva_to_gpa;
2544                 context->root_level = PT32_ROOT_LEVEL;
2545         }
2546
2547         return 0;
2548 }
2549
2550 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2551 {
2552         int r;
2553
2554         ASSERT(vcpu);
2555         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2556
2557         if (!is_paging(vcpu))
2558                 r = nonpaging_init_context(vcpu);
2559         else if (is_long_mode(vcpu))
2560                 r = paging64_init_context(vcpu);
2561         else if (is_pae(vcpu))
2562                 r = paging32E_init_context(vcpu);
2563         else
2564                 r = paging32_init_context(vcpu);
2565
2566         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2567         vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2568
2569         return r;
2570 }
2571
2572 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2573 {
2574         vcpu->arch.update_pte.pfn = bad_pfn;
2575
2576         if (tdp_enabled)
2577                 return init_kvm_tdp_mmu(vcpu);
2578         else
2579                 return init_kvm_softmmu(vcpu);
2580 }
2581
2582 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2583 {
2584         ASSERT(vcpu);
2585         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2586                 /* mmu.free() should set root_hpa = INVALID_PAGE */
2587                 vcpu->arch.mmu.free(vcpu);
2588 }
2589
2590 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2591 {
2592         destroy_kvm_mmu(vcpu);
2593         return init_kvm_mmu(vcpu);
2594 }
2595 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2596
2597 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2598 {
2599         int r;
2600
2601         r = mmu_topup_memory_caches(vcpu);
2602         if (r)
2603                 goto out;
2604         r = mmu_alloc_roots(vcpu);
2605         spin_lock(&vcpu->kvm->mmu_lock);
2606         mmu_sync_roots(vcpu);
2607         spin_unlock(&vcpu->kvm->mmu_lock);
2608         if (r)
2609                 goto out;
2610         /* set_cr3() should ensure TLB has been flushed */
2611         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2612 out:
2613         return r;
2614 }
2615 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2616
2617 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2618 {
2619         mmu_free_roots(vcpu);
2620 }
2621
2622 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2623                                   struct kvm_mmu_page *sp,
2624                                   u64 *spte)
2625 {
2626         u64 pte;
2627         struct kvm_mmu_page *child;
2628
2629         pte = *spte;
2630         if (is_shadow_present_pte(pte)) {
2631                 if (is_last_spte(pte, sp->role.level))
2632                         drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2633                 else {
2634                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2635                         mmu_page_remove_parent_pte(child, spte);
2636                 }
2637         }
2638         __set_spte(spte, shadow_trap_nonpresent_pte);
2639         if (is_large_pte(pte))
2640                 --vcpu->kvm->stat.lpages;
2641 }
2642
2643 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2644                                   struct kvm_mmu_page *sp,
2645                                   u64 *spte,
2646                                   const void *new)
2647 {
2648         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2649                 ++vcpu->kvm->stat.mmu_pde_zapped;
2650                 return;
2651         }
2652
2653         ++vcpu->kvm->stat.mmu_pte_updated;
2654         if (!sp->role.cr4_pae)
2655                 paging32_update_pte(vcpu, sp, spte, new);
2656         else
2657                 paging64_update_pte(vcpu, sp, spte, new);
2658 }
2659
2660 static bool need_remote_flush(u64 old, u64 new)
2661 {
2662         if (!is_shadow_present_pte(old))
2663                 return false;
2664         if (!is_shadow_present_pte(new))
2665                 return true;
2666         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2667                 return true;
2668         old ^= PT64_NX_MASK;
2669         new ^= PT64_NX_MASK;
2670         return (old & ~new & PT64_PERM_MASK) != 0;
2671 }
2672
2673 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2674                                     bool remote_flush, bool local_flush)
2675 {
2676         if (zap_page)
2677                 return;
2678
2679         if (remote_flush)
2680                 kvm_flush_remote_tlbs(vcpu->kvm);
2681         else if (local_flush)
2682                 kvm_mmu_flush_tlb(vcpu);
2683 }
2684
2685 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2686 {
2687         u64 *spte = vcpu->arch.last_pte_updated;
2688
2689         return !!(spte && (*spte & shadow_accessed_mask));
2690 }
2691
2692 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2693                                           u64 gpte)
2694 {
2695         gfn_t gfn;
2696         pfn_t pfn;
2697
2698         if (!is_present_gpte(gpte))
2699                 return;
2700         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2701
2702         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2703         smp_rmb();
2704         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2705
2706         if (is_error_pfn(pfn)) {
2707                 kvm_release_pfn_clean(pfn);
2708                 return;
2709         }
2710         vcpu->arch.update_pte.gfn = gfn;
2711         vcpu->arch.update_pte.pfn = pfn;
2712 }
2713
2714 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2715 {
2716         u64 *spte = vcpu->arch.last_pte_updated;
2717
2718         if (spte
2719             && vcpu->arch.last_pte_gfn == gfn
2720             && shadow_accessed_mask
2721             && !(*spte & shadow_accessed_mask)
2722             && is_shadow_present_pte(*spte))
2723                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2724 }
2725
2726 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2727                        const u8 *new, int bytes,
2728                        bool guest_initiated)
2729 {
2730         gfn_t gfn = gpa >> PAGE_SHIFT;
2731         struct kvm_mmu_page *sp;
2732         struct hlist_node *node;
2733         LIST_HEAD(invalid_list);
2734         u64 entry, gentry;
2735         u64 *spte;
2736         unsigned offset = offset_in_page(gpa);
2737         unsigned pte_size;
2738         unsigned page_offset;
2739         unsigned misaligned;
2740         unsigned quadrant;
2741         int level;
2742         int flooded = 0;
2743         int npte;
2744         int r;
2745         int invlpg_counter;
2746         bool remote_flush, local_flush, zap_page;
2747
2748         zap_page = remote_flush = local_flush = false;
2749
2750         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2751
2752         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2753
2754         /*
2755          * Assume that the pte write on a page table of the same type
2756          * as the current vcpu paging mode.  This is nearly always true
2757          * (might be false while changing modes).  Note it is verified later
2758          * by update_pte().
2759          */
2760         if ((is_pae(vcpu) && bytes == 4) || !new) {
2761                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2762                 if (is_pae(vcpu)) {
2763                         gpa &= ~(gpa_t)7;
2764                         bytes = 8;
2765                 }
2766                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2767                 if (r)
2768                         gentry = 0;
2769                 new = (const u8 *)&gentry;
2770         }
2771
2772         switch (bytes) {
2773         case 4:
2774                 gentry = *(const u32 *)new;
2775                 break;
2776         case 8:
2777                 gentry = *(const u64 *)new;
2778                 break;
2779         default:
2780                 gentry = 0;
2781                 break;
2782         }
2783
2784         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2785         spin_lock(&vcpu->kvm->mmu_lock);
2786         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2787                 gentry = 0;
2788         kvm_mmu_access_page(vcpu, gfn);
2789         kvm_mmu_free_some_pages(vcpu);
2790         ++vcpu->kvm->stat.mmu_pte_write;
2791         kvm_mmu_audit(vcpu, "pre pte write");
2792         if (guest_initiated) {
2793                 if (gfn == vcpu->arch.last_pt_write_gfn
2794                     && !last_updated_pte_accessed(vcpu)) {
2795                         ++vcpu->arch.last_pt_write_count;
2796                         if (vcpu->arch.last_pt_write_count >= 3)
2797                                 flooded = 1;
2798                 } else {
2799                         vcpu->arch.last_pt_write_gfn = gfn;
2800                         vcpu->arch.last_pt_write_count = 1;
2801                         vcpu->arch.last_pte_updated = NULL;
2802                 }
2803         }
2804
2805         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2806                 pte_size = sp->role.cr4_pae ? 8 : 4;
2807                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2808                 misaligned |= bytes < 4;
2809                 if (misaligned || flooded) {
2810                         /*
2811                          * Misaligned accesses are too much trouble to fix
2812                          * up; also, they usually indicate a page is not used
2813                          * as a page table.
2814                          *
2815                          * If we're seeing too many writes to a page,
2816                          * it may no longer be a page table, or we may be
2817                          * forking, in which case it is better to unmap the
2818                          * page.
2819                          */
2820                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2821                                  gpa, bytes, sp->role.word);
2822                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2823                                                      &invalid_list);
2824                         ++vcpu->kvm->stat.mmu_flooded;
2825                         continue;
2826                 }
2827                 page_offset = offset;
2828                 level = sp->role.level;
2829                 npte = 1;
2830                 if (!sp->role.cr4_pae) {
2831                         page_offset <<= 1;      /* 32->64 */
2832                         /*
2833                          * A 32-bit pde maps 4MB while the shadow pdes map
2834                          * only 2MB.  So we need to double the offset again
2835                          * and zap two pdes instead of one.
2836                          */
2837                         if (level == PT32_ROOT_LEVEL) {
2838                                 page_offset &= ~7; /* kill rounding error */
2839                                 page_offset <<= 1;
2840                                 npte = 2;
2841                         }
2842                         quadrant = page_offset >> PAGE_SHIFT;
2843                         page_offset &= ~PAGE_MASK;
2844                         if (quadrant != sp->role.quadrant)
2845                                 continue;
2846                 }
2847                 local_flush = true;
2848                 spte = &sp->spt[page_offset / sizeof(*spte)];
2849                 while (npte--) {
2850                         entry = *spte;
2851                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2852                         if (gentry)
2853                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2854                         if (!remote_flush && need_remote_flush(entry, *spte))
2855                                 remote_flush = true;
2856                         ++spte;
2857                 }
2858         }
2859         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2860         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2861         kvm_mmu_audit(vcpu, "post pte write");
2862         spin_unlock(&vcpu->kvm->mmu_lock);
2863         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2864                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2865                 vcpu->arch.update_pte.pfn = bad_pfn;
2866         }
2867 }
2868
2869 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2870 {
2871         gpa_t gpa;
2872         int r;
2873
2874         if (tdp_enabled)
2875                 return 0;
2876
2877         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2878
2879         spin_lock(&vcpu->kvm->mmu_lock);
2880         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2881         spin_unlock(&vcpu->kvm->mmu_lock);
2882         return r;
2883 }
2884 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2885
2886 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2887 {
2888         int free_pages;
2889         LIST_HEAD(invalid_list);
2890
2891         free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2892         while (free_pages < KVM_REFILL_PAGES &&
2893                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2894                 struct kvm_mmu_page *sp;
2895
2896                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2897                                   struct kvm_mmu_page, link);
2898                 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2899                                                        &invalid_list);
2900                 ++vcpu->kvm->stat.mmu_recycled;
2901         }
2902         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2903 }
2904
2905 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2906 {
2907         int r;
2908         enum emulation_result er;
2909
2910         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2911         if (r < 0)
2912                 goto out;
2913
2914         if (!r) {
2915                 r = 1;
2916                 goto out;
2917         }
2918
2919         r = mmu_topup_memory_caches(vcpu);
2920         if (r)
2921                 goto out;
2922
2923         er = emulate_instruction(vcpu, cr2, error_code, 0);
2924
2925         switch (er) {
2926         case EMULATE_DONE:
2927                 return 1;
2928         case EMULATE_DO_MMIO:
2929                 ++vcpu->stat.mmio_exits;
2930                 /* fall through */
2931         case EMULATE_FAIL:
2932                 return 0;
2933         default:
2934                 BUG();
2935         }
2936 out:
2937         return r;
2938 }
2939 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2940
2941 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2942 {
2943         vcpu->arch.mmu.invlpg(vcpu, gva);
2944         kvm_mmu_flush_tlb(vcpu);
2945         ++vcpu->stat.invlpg;
2946 }
2947 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2948
2949 void kvm_enable_tdp(void)
2950 {
2951         tdp_enabled = true;
2952 }
2953 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2954
2955 void kvm_disable_tdp(void)
2956 {
2957         tdp_enabled = false;
2958 }
2959 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2960
2961 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2962 {
2963         free_page((unsigned long)vcpu->arch.mmu.pae_root);
2964 }
2965
2966 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2967 {
2968         struct page *page;
2969         int i;
2970
2971         ASSERT(vcpu);
2972
2973         /*
2974          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2975          * Therefore we need to allocate shadow page tables in the first
2976          * 4GB of memory, which happens to fit the DMA32 zone.
2977          */
2978         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2979         if (!page)
2980                 return -ENOMEM;
2981
2982         vcpu->arch.mmu.pae_root = page_address(page);
2983         for (i = 0; i < 4; ++i)
2984                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2985
2986         return 0;
2987 }
2988
2989 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2990 {
2991         ASSERT(vcpu);
2992         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2993
2994         return alloc_mmu_pages(vcpu);
2995 }
2996
2997 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2998 {
2999         ASSERT(vcpu);
3000         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3001
3002         return init_kvm_mmu(vcpu);
3003 }
3004
3005 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3006 {
3007         ASSERT(vcpu);
3008
3009         destroy_kvm_mmu(vcpu);
3010         free_mmu_pages(vcpu);
3011         mmu_free_memory_caches(vcpu);
3012 }
3013
3014 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3015 {
3016         struct kvm_mmu_page *sp;
3017
3018         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3019                 int i;
3020                 u64 *pt;
3021
3022                 if (!test_bit(slot, sp->slot_bitmap))
3023                         continue;
3024
3025                 pt = sp->spt;
3026                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3027                         /* avoid RMW */
3028                         if (is_writable_pte(pt[i]))
3029                                 pt[i] &= ~PT_WRITABLE_MASK;
3030         }
3031         kvm_flush_remote_tlbs(kvm);
3032 }
3033
3034 void kvm_mmu_zap_all(struct kvm *kvm)
3035 {
3036         struct kvm_mmu_page *sp, *node;
3037         LIST_HEAD(invalid_list);
3038
3039         spin_lock(&kvm->mmu_lock);
3040 restart:
3041         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3042                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3043                         goto restart;
3044
3045         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3046         spin_unlock(&kvm->mmu_lock);
3047 }
3048
3049 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3050                                                struct list_head *invalid_list)
3051 {
3052         struct kvm_mmu_page *page;
3053
3054         page = container_of(kvm->arch.active_mmu_pages.prev,
3055                             struct kvm_mmu_page, link);
3056         return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3057 }
3058
3059 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3060 {
3061         struct kvm *kvm;
3062         struct kvm *kvm_freed = NULL;
3063         int cache_count = 0;
3064
3065         spin_lock(&kvm_lock);
3066
3067         list_for_each_entry(kvm, &vm_list, vm_list) {
3068                 int npages, idx, freed_pages;
3069                 LIST_HEAD(invalid_list);
3070
3071                 idx = srcu_read_lock(&kvm->srcu);
3072                 spin_lock(&kvm->mmu_lock);
3073                 npages = kvm->arch.n_alloc_mmu_pages -
3074                          kvm->arch.n_free_mmu_pages;
3075                 cache_count += npages;
3076                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3077                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3078                                                           &invalid_list);
3079                         cache_count -= freed_pages;
3080                         kvm_freed = kvm;
3081                 }
3082                 nr_to_scan--;
3083
3084                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3085                 spin_unlock(&kvm->mmu_lock);
3086                 srcu_read_unlock(&kvm->srcu, idx);
3087         }
3088         if (kvm_freed)
3089                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3090
3091         spin_unlock(&kvm_lock);
3092
3093         return cache_count;
3094 }
3095
3096 static struct shrinker mmu_shrinker = {
3097         .shrink = mmu_shrink,
3098         .seeks = DEFAULT_SEEKS * 10,
3099 };
3100
3101 static void mmu_destroy_caches(void)
3102 {
3103         if (pte_chain_cache)
3104                 kmem_cache_destroy(pte_chain_cache);
3105         if (rmap_desc_cache)
3106                 kmem_cache_destroy(rmap_desc_cache);
3107         if (mmu_page_header_cache)
3108                 kmem_cache_destroy(mmu_page_header_cache);
3109 }
3110
3111 void kvm_mmu_module_exit(void)
3112 {
3113         mmu_destroy_caches();
3114         unregister_shrinker(&mmu_shrinker);
3115 }
3116
3117 int kvm_mmu_module_init(void)
3118 {
3119         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3120                                             sizeof(struct kvm_pte_chain),
3121                                             0, 0, NULL);
3122         if (!pte_chain_cache)
3123                 goto nomem;
3124         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3125                                             sizeof(struct kvm_rmap_desc),
3126                                             0, 0, NULL);
3127         if (!rmap_desc_cache)
3128                 goto nomem;
3129
3130         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3131                                                   sizeof(struct kvm_mmu_page),
3132                                                   0, 0, NULL);
3133         if (!mmu_page_header_cache)
3134                 goto nomem;
3135
3136         register_shrinker(&mmu_shrinker);
3137
3138         return 0;
3139
3140 nomem:
3141         mmu_destroy_caches();
3142         return -ENOMEM;
3143 }
3144
3145 /*
3146  * Caculate mmu pages needed for kvm.
3147  */
3148 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3149 {
3150         int i;
3151         unsigned int nr_mmu_pages;
3152         unsigned int  nr_pages = 0;
3153         struct kvm_memslots *slots;
3154
3155         slots = kvm_memslots(kvm);
3156
3157         for (i = 0; i < slots->nmemslots; i++)
3158                 nr_pages += slots->memslots[i].npages;
3159
3160         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3161         nr_mmu_pages = max(nr_mmu_pages,
3162                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3163
3164         return nr_mmu_pages;
3165 }
3166
3167 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3168                                 unsigned len)
3169 {
3170         if (len > buffer->len)
3171                 return NULL;
3172         return buffer->ptr;
3173 }
3174
3175 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3176                                 unsigned len)
3177 {
3178         void *ret;
3179
3180         ret = pv_mmu_peek_buffer(buffer, len);
3181         if (!ret)
3182                 return ret;
3183         buffer->ptr += len;
3184         buffer->len -= len;
3185         buffer->processed += len;
3186         return ret;
3187 }
3188
3189 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3190                              gpa_t addr, gpa_t value)
3191 {
3192         int bytes = 8;
3193         int r;
3194
3195         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3196                 bytes = 4;
3197
3198         r = mmu_topup_memory_caches(vcpu);
3199         if (r)
3200                 return r;
3201
3202         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3203                 return -EFAULT;
3204
3205         return 1;
3206 }
3207
3208 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3209 {
3210         (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3211         return 1;
3212 }
3213
3214 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3215 {
3216         spin_lock(&vcpu->kvm->mmu_lock);
3217         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3218         spin_unlock(&vcpu->kvm->mmu_lock);
3219         return 1;
3220 }
3221
3222 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3223                              struct kvm_pv_mmu_op_buffer *buffer)
3224 {
3225         struct kvm_mmu_op_header *header;
3226
3227         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3228         if (!header)
3229                 return 0;
3230         switch (header->op) {
3231         case KVM_MMU_OP_WRITE_PTE: {
3232                 struct kvm_mmu_op_write_pte *wpte;
3233
3234                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3235                 if (!wpte)
3236                         return 0;
3237                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3238                                         wpte->pte_val);
3239         }
3240         case KVM_MMU_OP_FLUSH_TLB: {
3241                 struct kvm_mmu_op_flush_tlb *ftlb;
3242
3243                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3244                 if (!ftlb)
3245                         return 0;
3246                 return kvm_pv_mmu_flush_tlb(vcpu);
3247         }
3248         case KVM_MMU_OP_RELEASE_PT: {
3249                 struct kvm_mmu_op_release_pt *rpt;
3250
3251                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3252                 if (!rpt)
3253                         return 0;
3254                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3255         }
3256         default: return 0;
3257         }
3258 }
3259
3260 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3261                   gpa_t addr, unsigned long *ret)
3262 {
3263         int r;
3264         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3265
3266         buffer->ptr = buffer->buf;
3267         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3268         buffer->processed = 0;
3269
3270         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3271         if (r)
3272                 goto out;
3273
3274         while (buffer->len) {
3275                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3276                 if (r < 0)
3277                         goto out;
3278                 if (r == 0)
3279                         break;
3280         }
3281
3282         r = 1;
3283 out:
3284         *ret = buffer->processed;
3285         return r;
3286 }
3287
3288 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3289 {
3290         struct kvm_shadow_walk_iterator iterator;
3291         int nr_sptes = 0;
3292
3293         spin_lock(&vcpu->kvm->mmu_lock);
3294         for_each_shadow_entry(vcpu, addr, iterator) {
3295                 sptes[iterator.level-1] = *iterator.sptep;
3296                 nr_sptes++;
3297                 if (!is_shadow_present_pte(*iterator.sptep))
3298                         break;
3299         }
3300         spin_unlock(&vcpu->kvm->mmu_lock);
3301
3302         return nr_sptes;
3303 }
3304 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3305
3306 #ifdef AUDIT
3307
3308 static const char *audit_msg;
3309
3310 static gva_t canonicalize(gva_t gva)
3311 {
3312 #ifdef CONFIG_X86_64
3313         gva = (long long)(gva << 16) >> 16;
3314 #endif
3315         return gva;
3316 }
3317
3318
3319 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3320
3321 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3322                             inspect_spte_fn fn)
3323 {
3324         int i;
3325
3326         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3327                 u64 ent = sp->spt[i];
3328
3329                 if (is_shadow_present_pte(ent)) {
3330                         if (!is_last_spte(ent, sp->role.level)) {
3331                                 struct kvm_mmu_page *child;
3332                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3333                                 __mmu_spte_walk(kvm, child, fn);
3334                         } else
3335                                 fn(kvm, &sp->spt[i]);
3336                 }
3337         }
3338 }
3339
3340 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3341 {
3342         int i;
3343         struct kvm_mmu_page *sp;
3344
3345         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3346                 return;
3347         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3348                 hpa_t root = vcpu->arch.mmu.root_hpa;
3349                 sp = page_header(root);
3350                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3351                 return;
3352         }
3353         for (i = 0; i < 4; ++i) {
3354                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3355
3356                 if (root && VALID_PAGE(root)) {
3357                         root &= PT64_BASE_ADDR_MASK;
3358                         sp = page_header(root);
3359                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3360                 }
3361         }
3362         return;
3363 }
3364
3365 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3366                                 gva_t va, int level)
3367 {
3368         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3369         int i;
3370         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3371
3372         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3373                 u64 ent = pt[i];
3374
3375                 if (ent == shadow_trap_nonpresent_pte)
3376                         continue;
3377
3378                 va = canonicalize(va);
3379                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3380                         audit_mappings_page(vcpu, ent, va, level - 1);
3381                 else {
3382                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3383                         gfn_t gfn = gpa >> PAGE_SHIFT;
3384                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3385                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3386
3387                         if (is_error_pfn(pfn)) {
3388                                 kvm_release_pfn_clean(pfn);
3389                                 continue;
3390                         }
3391
3392                         if (is_shadow_present_pte(ent)
3393                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3394                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3395                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3396                                        audit_msg, vcpu->arch.mmu.root_level,
3397                                        va, gpa, hpa, ent,
3398                                        is_shadow_present_pte(ent));
3399                         else if (ent == shadow_notrap_nonpresent_pte
3400                                  && !is_error_hpa(hpa))
3401                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3402                                        " valid guest gva %lx\n", audit_msg, va);
3403                         kvm_release_pfn_clean(pfn);
3404
3405                 }
3406         }
3407 }
3408
3409 static void audit_mappings(struct kvm_vcpu *vcpu)
3410 {
3411         unsigned i;
3412
3413         if (vcpu->arch.mmu.root_level == 4)
3414                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3415         else
3416                 for (i = 0; i < 4; ++i)
3417                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3418                                 audit_mappings_page(vcpu,
3419                                                     vcpu->arch.mmu.pae_root[i],
3420                                                     i << 30,
3421                                                     2);
3422 }
3423
3424 static int count_rmaps(struct kvm_vcpu *vcpu)
3425 {
3426         struct kvm *kvm = vcpu->kvm;
3427         struct kvm_memslots *slots;
3428         int nmaps = 0;
3429         int i, j, k, idx;
3430
3431         idx = srcu_read_lock(&kvm->srcu);
3432         slots = kvm_memslots(kvm);
3433         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3434                 struct kvm_memory_slot *m = &slots->memslots[i];
3435                 struct kvm_rmap_desc *d;
3436
3437                 for (j = 0; j < m->npages; ++j) {
3438                         unsigned long *rmapp = &m->rmap[j];
3439
3440                         if (!*rmapp)
3441                                 continue;
3442                         if (!(*rmapp & 1)) {
3443                                 ++nmaps;
3444                                 continue;
3445                         }
3446                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3447                         while (d) {
3448                                 for (k = 0; k < RMAP_EXT; ++k)
3449                                         if (d->sptes[k])
3450                                                 ++nmaps;
3451                                         else
3452                                                 break;
3453                                 d = d->more;
3454                         }
3455                 }
3456         }
3457         srcu_read_unlock(&kvm->srcu, idx);
3458         return nmaps;
3459 }
3460
3461 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3462 {
3463         unsigned long *rmapp;
3464         struct kvm_mmu_page *rev_sp;
3465         gfn_t gfn;
3466
3467         if (is_writable_pte(*sptep)) {
3468                 rev_sp = page_header(__pa(sptep));
3469                 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3470
3471                 if (!gfn_to_memslot(kvm, gfn)) {
3472                         if (!printk_ratelimit())
3473                                 return;
3474                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3475                                          audit_msg, gfn);
3476                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3477                                audit_msg, (long int)(sptep - rev_sp->spt),
3478                                         rev_sp->gfn);
3479                         dump_stack();
3480                         return;
3481                 }
3482
3483                 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3484                 if (!*rmapp) {
3485                         if (!printk_ratelimit())
3486                                 return;
3487                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3488                                          audit_msg, *sptep);
3489                         dump_stack();
3490                 }
3491         }
3492
3493 }
3494
3495 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3496 {
3497         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3498 }
3499
3500 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3501 {
3502         struct kvm_mmu_page *sp;
3503         int i;
3504
3505         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3506                 u64 *pt = sp->spt;
3507
3508                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3509                         continue;
3510
3511                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3512                         u64 ent = pt[i];
3513
3514                         if (!(ent & PT_PRESENT_MASK))
3515                                 continue;
3516                         if (!is_writable_pte(ent))
3517                                 continue;
3518                         inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3519                 }
3520         }
3521         return;
3522 }
3523
3524 static void audit_rmap(struct kvm_vcpu *vcpu)
3525 {
3526         check_writable_mappings_rmap(vcpu);
3527         count_rmaps(vcpu);
3528 }
3529
3530 static void audit_write_protection(struct kvm_vcpu *vcpu)
3531 {
3532         struct kvm_mmu_page *sp;
3533         struct kvm_memory_slot *slot;
3534         unsigned long *rmapp;
3535         u64 *spte;
3536         gfn_t gfn;
3537
3538         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3539                 if (sp->role.direct)
3540                         continue;
3541                 if (sp->unsync)
3542                         continue;
3543
3544                 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3545                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3546
3547                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3548                 while (spte) {
3549                         if (is_writable_pte(*spte))
3550                                 printk(KERN_ERR "%s: (%s) shadow page has "
3551                                 "writable mappings: gfn %lx role %x\n",
3552                                __func__, audit_msg, sp->gfn,
3553                                sp->role.word);
3554                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3555                 }
3556         }
3557 }
3558
3559 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3560 {
3561         int olddbg = dbg;
3562
3563         dbg = 0;
3564         audit_msg = msg;
3565         audit_rmap(vcpu);
3566         audit_write_protection(vcpu);
3567         if (strcmp("pre pte write", audit_msg) != 0)
3568                 audit_mappings(vcpu);
3569         audit_writable_sptes_have_rmaps(vcpu);
3570         dbg = olddbg;
3571 }
3572
3573 #endif