2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
22 #include "kvm_cache_regs.h"
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
35 #include <linux/uaccess.h>
38 #include <asm/cmpxchg.h>
43 * When setting this variable to true it enables Two-Dimensional-Paging
44 * where the hardware walks 2 page tables:
45 * 1. the guest-virtual to guest-physical
46 * 2. while doing 1. it walks guest-physical to host-physical
47 * If the hardware supports that we don't need to do shadow paging.
49 bool tdp_enabled = false;
56 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
63 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
64 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
68 #define pgprintk(x...) do { } while (0)
69 #define rmap_printk(x...) do { } while (0)
73 #if defined(MMU_DEBUG) || defined(AUDIT)
75 module_param(dbg, bool, 0644);
78 static int oos_shadow = 1;
79 module_param(oos_shadow, bool, 0644);
82 #define ASSERT(x) do { } while (0)
86 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
87 __FILE__, __LINE__, #x); \
91 #define PT_FIRST_AVAIL_BITS_SHIFT 9
92 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
96 #define PT64_LEVEL_BITS 9
98 #define PT64_LEVEL_SHIFT(level) \
99 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101 #define PT64_LEVEL_MASK(level) \
102 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
104 #define PT64_INDEX(address, level)\
105 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
108 #define PT32_LEVEL_BITS 10
110 #define PT32_LEVEL_SHIFT(level) \
111 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
113 #define PT32_LEVEL_MASK(level) \
114 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
115 #define PT32_LVL_OFFSET_MASK(level) \
116 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
117 * PT32_LEVEL_BITS))) - 1))
119 #define PT32_INDEX(address, level)\
120 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
123 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
124 #define PT64_DIR_BASE_ADDR_MASK \
125 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
126 #define PT64_LVL_ADDR_MASK(level) \
127 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
128 * PT64_LEVEL_BITS))) - 1))
129 #define PT64_LVL_OFFSET_MASK(level) \
130 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
131 * PT64_LEVEL_BITS))) - 1))
133 #define PT32_BASE_ADDR_MASK PAGE_MASK
134 #define PT32_DIR_BASE_ADDR_MASK \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
136 #define PT32_LVL_ADDR_MASK(level) \
137 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
138 * PT32_LEVEL_BITS))) - 1))
140 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
145 #define ACC_EXEC_MASK 1
146 #define ACC_WRITE_MASK PT_WRITABLE_MASK
147 #define ACC_USER_MASK PT_USER_MASK
148 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
150 #include <trace/events/kvm.h>
152 #define CREATE_TRACE_POINTS
153 #include "mmutrace.h"
155 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
157 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
159 struct kvm_rmap_desc {
160 u64 *sptes[RMAP_EXT];
161 struct kvm_rmap_desc *more;
164 struct kvm_shadow_walk_iterator {
172 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
173 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
174 shadow_walk_okay(&(_walker)); \
175 shadow_walk_next(&(_walker)))
177 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
179 static struct kmem_cache *pte_chain_cache;
180 static struct kmem_cache *rmap_desc_cache;
181 static struct kmem_cache *mmu_page_header_cache;
183 static u64 __read_mostly shadow_trap_nonpresent_pte;
184 static u64 __read_mostly shadow_notrap_nonpresent_pte;
185 static u64 __read_mostly shadow_base_present_pte;
186 static u64 __read_mostly shadow_nx_mask;
187 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
188 static u64 __read_mostly shadow_user_mask;
189 static u64 __read_mostly shadow_accessed_mask;
190 static u64 __read_mostly shadow_dirty_mask;
192 static inline u64 rsvd_bits(int s, int e)
194 return ((1ULL << (e - s + 1)) - 1) << s;
197 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
199 shadow_trap_nonpresent_pte = trap_pte;
200 shadow_notrap_nonpresent_pte = notrap_pte;
202 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
204 void kvm_mmu_set_base_ptes(u64 base_pte)
206 shadow_base_present_pte = base_pte;
208 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
210 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
211 u64 dirty_mask, u64 nx_mask, u64 x_mask)
213 shadow_user_mask = user_mask;
214 shadow_accessed_mask = accessed_mask;
215 shadow_dirty_mask = dirty_mask;
216 shadow_nx_mask = nx_mask;
217 shadow_x_mask = x_mask;
219 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
221 static bool is_write_protection(struct kvm_vcpu *vcpu)
223 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
226 static int is_cpuid_PSE36(void)
231 static int is_nx(struct kvm_vcpu *vcpu)
233 return vcpu->arch.efer & EFER_NX;
236 static int is_shadow_present_pte(u64 pte)
238 return pte != shadow_trap_nonpresent_pte
239 && pte != shadow_notrap_nonpresent_pte;
242 static int is_large_pte(u64 pte)
244 return pte & PT_PAGE_SIZE_MASK;
247 static int is_writable_pte(unsigned long pte)
249 return pte & PT_WRITABLE_MASK;
252 static int is_dirty_gpte(unsigned long pte)
254 return pte & PT_DIRTY_MASK;
257 static int is_rmap_spte(u64 pte)
259 return is_shadow_present_pte(pte);
262 static int is_last_spte(u64 pte, int level)
264 if (level == PT_PAGE_TABLE_LEVEL)
266 if (is_large_pte(pte))
271 static pfn_t spte_to_pfn(u64 pte)
273 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
276 static gfn_t pse36_gfn_delta(u32 gpte)
278 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
280 return (gpte & PT32_DIR_PSE36_MASK) << shift;
283 static void __set_spte(u64 *sptep, u64 spte)
286 set_64bit((unsigned long *)sptep, spte);
288 set_64bit((unsigned long long *)sptep, spte);
292 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
293 struct kmem_cache *base_cache, int min)
297 if (cache->nobjs >= min)
299 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
300 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
303 cache->objects[cache->nobjs++] = obj;
308 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
311 kfree(mc->objects[--mc->nobjs]);
314 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
319 if (cache->nobjs >= min)
321 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
322 page = alloc_page(GFP_KERNEL);
325 cache->objects[cache->nobjs++] = page_address(page);
330 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
333 free_page((unsigned long)mc->objects[--mc->nobjs]);
336 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
340 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
344 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
348 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
351 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
352 mmu_page_header_cache, 4);
357 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
359 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
360 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
361 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
362 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
365 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
371 p = mc->objects[--mc->nobjs];
375 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
377 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
378 sizeof(struct kvm_pte_chain));
381 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
386 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
388 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
389 sizeof(struct kvm_rmap_desc));
392 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
398 * Return the pointer to the largepage write count for a given
399 * gfn, handling slots that are not large page aligned.
401 static int *slot_largepage_idx(gfn_t gfn,
402 struct kvm_memory_slot *slot,
407 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
408 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
409 return &slot->lpage_info[level - 2][idx].write_count;
412 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
414 struct kvm_memory_slot *slot;
418 gfn = unalias_gfn(kvm, gfn);
420 slot = gfn_to_memslot_unaliased(kvm, gfn);
421 for (i = PT_DIRECTORY_LEVEL;
422 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
423 write_count = slot_largepage_idx(gfn, slot, i);
428 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
430 struct kvm_memory_slot *slot;
434 gfn = unalias_gfn(kvm, gfn);
435 slot = gfn_to_memslot_unaliased(kvm, gfn);
436 for (i = PT_DIRECTORY_LEVEL;
437 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
438 write_count = slot_largepage_idx(gfn, slot, i);
440 WARN_ON(*write_count < 0);
444 static int has_wrprotected_page(struct kvm *kvm,
448 struct kvm_memory_slot *slot;
451 gfn = unalias_gfn(kvm, gfn);
452 slot = gfn_to_memslot_unaliased(kvm, gfn);
454 largepage_idx = slot_largepage_idx(gfn, slot, level);
455 return *largepage_idx;
461 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
463 unsigned long page_size;
466 page_size = kvm_host_page_size(kvm, gfn);
468 for (i = PT_PAGE_TABLE_LEVEL;
469 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
470 if (page_size >= KVM_HPAGE_SIZE(i))
479 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
481 struct kvm_memory_slot *slot;
482 int host_level, level, max_level;
484 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
485 if (slot && slot->dirty_bitmap)
486 return PT_PAGE_TABLE_LEVEL;
488 host_level = host_mapping_level(vcpu->kvm, large_gfn);
490 if (host_level == PT_PAGE_TABLE_LEVEL)
493 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
494 kvm_x86_ops->get_lpage_level() : host_level;
496 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
497 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
504 * Take gfn and return the reverse mapping to it.
505 * Note: gfn must be unaliased before this function get called
508 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
510 struct kvm_memory_slot *slot;
513 slot = gfn_to_memslot(kvm, gfn);
514 if (likely(level == PT_PAGE_TABLE_LEVEL))
515 return &slot->rmap[gfn - slot->base_gfn];
517 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
518 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
520 return &slot->lpage_info[level - 2][idx].rmap_pde;
524 * Reverse mapping data structures:
526 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
527 * that points to page_address(page).
529 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
530 * containing more mappings.
532 * Returns the number of rmap entries before the spte was added or zero if
533 * the spte was not added.
536 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
538 struct kvm_mmu_page *sp;
539 struct kvm_rmap_desc *desc;
540 unsigned long *rmapp;
543 if (!is_rmap_spte(*spte))
545 gfn = unalias_gfn(vcpu->kvm, gfn);
546 sp = page_header(__pa(spte));
547 sp->gfns[spte - sp->spt] = gfn;
548 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
550 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
551 *rmapp = (unsigned long)spte;
552 } else if (!(*rmapp & 1)) {
553 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
554 desc = mmu_alloc_rmap_desc(vcpu);
555 desc->sptes[0] = (u64 *)*rmapp;
556 desc->sptes[1] = spte;
557 *rmapp = (unsigned long)desc | 1;
559 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
560 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
561 while (desc->sptes[RMAP_EXT-1] && desc->more) {
565 if (desc->sptes[RMAP_EXT-1]) {
566 desc->more = mmu_alloc_rmap_desc(vcpu);
569 for (i = 0; desc->sptes[i]; ++i)
571 desc->sptes[i] = spte;
576 static void rmap_desc_remove_entry(unsigned long *rmapp,
577 struct kvm_rmap_desc *desc,
579 struct kvm_rmap_desc *prev_desc)
583 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
585 desc->sptes[i] = desc->sptes[j];
586 desc->sptes[j] = NULL;
589 if (!prev_desc && !desc->more)
590 *rmapp = (unsigned long)desc->sptes[0];
593 prev_desc->more = desc->more;
595 *rmapp = (unsigned long)desc->more | 1;
596 mmu_free_rmap_desc(desc);
599 static void rmap_remove(struct kvm *kvm, u64 *spte)
601 struct kvm_rmap_desc *desc;
602 struct kvm_rmap_desc *prev_desc;
603 struct kvm_mmu_page *sp;
605 unsigned long *rmapp;
608 if (!is_rmap_spte(*spte))
610 sp = page_header(__pa(spte));
611 pfn = spte_to_pfn(*spte);
612 if (*spte & shadow_accessed_mask)
613 kvm_set_pfn_accessed(pfn);
614 if (is_writable_pte(*spte))
615 kvm_set_pfn_dirty(pfn);
616 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
618 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
620 } else if (!(*rmapp & 1)) {
621 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
622 if ((u64 *)*rmapp != spte) {
623 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
629 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
630 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
633 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
634 if (desc->sptes[i] == spte) {
635 rmap_desc_remove_entry(rmapp,
643 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
648 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
650 struct kvm_rmap_desc *desc;
656 else if (!(*rmapp & 1)) {
658 return (u64 *)*rmapp;
661 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
664 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
665 if (prev_spte == spte)
666 return desc->sptes[i];
667 prev_spte = desc->sptes[i];
674 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
676 unsigned long *rmapp;
678 int i, write_protected = 0;
680 gfn = unalias_gfn(kvm, gfn);
681 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
683 spte = rmap_next(kvm, rmapp, NULL);
686 BUG_ON(!(*spte & PT_PRESENT_MASK));
687 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
688 if (is_writable_pte(*spte)) {
689 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
692 spte = rmap_next(kvm, rmapp, spte);
694 if (write_protected) {
697 spte = rmap_next(kvm, rmapp, NULL);
698 pfn = spte_to_pfn(*spte);
699 kvm_set_pfn_dirty(pfn);
702 /* check for huge page mappings */
703 for (i = PT_DIRECTORY_LEVEL;
704 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
705 rmapp = gfn_to_rmap(kvm, gfn, i);
706 spte = rmap_next(kvm, rmapp, NULL);
709 BUG_ON(!(*spte & PT_PRESENT_MASK));
710 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
711 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
712 if (is_writable_pte(*spte)) {
713 rmap_remove(kvm, spte);
715 __set_spte(spte, shadow_trap_nonpresent_pte);
719 spte = rmap_next(kvm, rmapp, spte);
723 return write_protected;
726 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
730 int need_tlb_flush = 0;
732 while ((spte = rmap_next(kvm, rmapp, NULL))) {
733 BUG_ON(!(*spte & PT_PRESENT_MASK));
734 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
735 rmap_remove(kvm, spte);
736 __set_spte(spte, shadow_trap_nonpresent_pte);
739 return need_tlb_flush;
742 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
747 pte_t *ptep = (pte_t *)data;
750 WARN_ON(pte_huge(*ptep));
751 new_pfn = pte_pfn(*ptep);
752 spte = rmap_next(kvm, rmapp, NULL);
754 BUG_ON(!is_shadow_present_pte(*spte));
755 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
757 if (pte_write(*ptep)) {
758 rmap_remove(kvm, spte);
759 __set_spte(spte, shadow_trap_nonpresent_pte);
760 spte = rmap_next(kvm, rmapp, NULL);
762 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
763 new_spte |= (u64)new_pfn << PAGE_SHIFT;
765 new_spte &= ~PT_WRITABLE_MASK;
766 new_spte &= ~SPTE_HOST_WRITEABLE;
767 if (is_writable_pte(*spte))
768 kvm_set_pfn_dirty(spte_to_pfn(*spte));
769 __set_spte(spte, new_spte);
770 spte = rmap_next(kvm, rmapp, spte);
774 kvm_flush_remote_tlbs(kvm);
779 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
781 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
787 struct kvm_memslots *slots;
789 slots = kvm_memslots(kvm);
791 for (i = 0; i < slots->nmemslots; i++) {
792 struct kvm_memory_slot *memslot = &slots->memslots[i];
793 unsigned long start = memslot->userspace_addr;
796 end = start + (memslot->npages << PAGE_SHIFT);
797 if (hva >= start && hva < end) {
798 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
800 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
802 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
803 int idx = gfn_offset;
804 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
806 &memslot->lpage_info[j][idx].rmap_pde,
809 trace_kvm_age_page(hva, memslot, ret);
817 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
819 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
822 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
824 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
827 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
834 * Emulate the accessed bit for EPT, by checking if this page has
835 * an EPT mapping, and clearing it if it does. On the next access,
836 * a new EPT mapping will be established.
837 * This has some overhead, but not as much as the cost of swapping
838 * out actively used pages or breaking up actively used hugepages.
840 if (!shadow_accessed_mask)
841 return kvm_unmap_rmapp(kvm, rmapp, data);
843 spte = rmap_next(kvm, rmapp, NULL);
847 BUG_ON(!(_spte & PT_PRESENT_MASK));
848 _young = _spte & PT_ACCESSED_MASK;
851 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
853 spte = rmap_next(kvm, rmapp, spte);
858 #define RMAP_RECYCLE_THRESHOLD 1000
860 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
862 unsigned long *rmapp;
863 struct kvm_mmu_page *sp;
865 sp = page_header(__pa(spte));
867 gfn = unalias_gfn(vcpu->kvm, gfn);
868 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
870 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
871 kvm_flush_remote_tlbs(vcpu->kvm);
874 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
876 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
880 static int is_empty_shadow_page(u64 *spt)
885 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
886 if (is_shadow_present_pte(*pos)) {
887 printk(KERN_ERR "%s: %p %llx\n", __func__,
895 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
897 ASSERT(is_empty_shadow_page(sp->spt));
899 __free_page(virt_to_page(sp->spt));
900 __free_page(virt_to_page(sp->gfns));
902 ++kvm->arch.n_free_mmu_pages;
905 static unsigned kvm_page_table_hashfn(gfn_t gfn)
907 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
910 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
913 struct kvm_mmu_page *sp;
915 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
916 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
917 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
918 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
919 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
920 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
922 sp->parent_pte = parent_pte;
923 --vcpu->kvm->arch.n_free_mmu_pages;
927 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
928 struct kvm_mmu_page *sp, u64 *parent_pte)
930 struct kvm_pte_chain *pte_chain;
931 struct hlist_node *node;
936 if (!sp->multimapped) {
937 u64 *old = sp->parent_pte;
940 sp->parent_pte = parent_pte;
944 pte_chain = mmu_alloc_pte_chain(vcpu);
945 INIT_HLIST_HEAD(&sp->parent_ptes);
946 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
947 pte_chain->parent_ptes[0] = old;
949 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
950 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
952 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
953 if (!pte_chain->parent_ptes[i]) {
954 pte_chain->parent_ptes[i] = parent_pte;
958 pte_chain = mmu_alloc_pte_chain(vcpu);
960 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
961 pte_chain->parent_ptes[0] = parent_pte;
964 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
967 struct kvm_pte_chain *pte_chain;
968 struct hlist_node *node;
971 if (!sp->multimapped) {
972 BUG_ON(sp->parent_pte != parent_pte);
973 sp->parent_pte = NULL;
976 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
977 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
978 if (!pte_chain->parent_ptes[i])
980 if (pte_chain->parent_ptes[i] != parent_pte)
982 while (i + 1 < NR_PTE_CHAIN_ENTRIES
983 && pte_chain->parent_ptes[i + 1]) {
984 pte_chain->parent_ptes[i]
985 = pte_chain->parent_ptes[i + 1];
988 pte_chain->parent_ptes[i] = NULL;
990 hlist_del(&pte_chain->link);
991 mmu_free_pte_chain(pte_chain);
992 if (hlist_empty(&sp->parent_ptes)) {
994 sp->parent_pte = NULL;
1003 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1005 struct kvm_pte_chain *pte_chain;
1006 struct hlist_node *node;
1007 struct kvm_mmu_page *parent_sp;
1010 if (!sp->multimapped && sp->parent_pte) {
1011 parent_sp = page_header(__pa(sp->parent_pte));
1013 mmu_parent_walk(parent_sp, fn);
1016 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1017 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1018 if (!pte_chain->parent_ptes[i])
1020 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1022 mmu_parent_walk(parent_sp, fn);
1026 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1029 struct kvm_mmu_page *sp = page_header(__pa(spte));
1031 index = spte - sp->spt;
1032 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1033 sp->unsync_children++;
1034 WARN_ON(!sp->unsync_children);
1037 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1039 struct kvm_pte_chain *pte_chain;
1040 struct hlist_node *node;
1043 if (!sp->parent_pte)
1046 if (!sp->multimapped) {
1047 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1051 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1052 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1053 if (!pte_chain->parent_ptes[i])
1055 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1059 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1061 kvm_mmu_update_parents_unsync(sp);
1065 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1067 mmu_parent_walk(sp, unsync_walk_fn);
1068 kvm_mmu_update_parents_unsync(sp);
1071 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1072 struct kvm_mmu_page *sp)
1076 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1077 sp->spt[i] = shadow_trap_nonpresent_pte;
1080 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1081 struct kvm_mmu_page *sp)
1086 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1090 #define KVM_PAGE_ARRAY_NR 16
1092 struct kvm_mmu_pages {
1093 struct mmu_page_and_offset {
1094 struct kvm_mmu_page *sp;
1096 } page[KVM_PAGE_ARRAY_NR];
1100 #define for_each_unsync_children(bitmap, idx) \
1101 for (idx = find_first_bit(bitmap, 512); \
1103 idx = find_next_bit(bitmap, 512, idx+1))
1105 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1111 for (i=0; i < pvec->nr; i++)
1112 if (pvec->page[i].sp == sp)
1115 pvec->page[pvec->nr].sp = sp;
1116 pvec->page[pvec->nr].idx = idx;
1118 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1121 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1122 struct kvm_mmu_pages *pvec)
1124 int i, ret, nr_unsync_leaf = 0;
1126 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1127 u64 ent = sp->spt[i];
1129 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1130 struct kvm_mmu_page *child;
1131 child = page_header(ent & PT64_BASE_ADDR_MASK);
1133 if (child->unsync_children) {
1134 if (mmu_pages_add(pvec, child, i))
1137 ret = __mmu_unsync_walk(child, pvec);
1139 __clear_bit(i, sp->unsync_child_bitmap);
1141 nr_unsync_leaf += ret;
1146 if (child->unsync) {
1148 if (mmu_pages_add(pvec, child, i))
1154 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1155 sp->unsync_children = 0;
1157 return nr_unsync_leaf;
1160 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1161 struct kvm_mmu_pages *pvec)
1163 if (!sp->unsync_children)
1166 mmu_pages_add(pvec, sp, 0);
1167 return __mmu_unsync_walk(sp, pvec);
1170 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1173 struct hlist_head *bucket;
1174 struct kvm_mmu_page *sp;
1175 struct hlist_node *node;
1177 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1178 index = kvm_page_table_hashfn(gfn);
1179 bucket = &kvm->arch.mmu_page_hash[index];
1180 hlist_for_each_entry(sp, node, bucket, hash_link)
1181 if (sp->gfn == gfn && !sp->role.direct
1182 && !sp->role.invalid) {
1183 pgprintk("%s: found role %x\n",
1184 __func__, sp->role.word);
1190 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1192 WARN_ON(!sp->unsync);
1193 trace_kvm_mmu_sync_page(sp);
1195 --kvm->stat.mmu_unsync;
1198 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1200 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1202 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1203 kvm_mmu_zap_page(vcpu->kvm, sp);
1207 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1208 kvm_flush_remote_tlbs(vcpu->kvm);
1209 kvm_unlink_unsync_page(vcpu->kvm, sp);
1210 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1211 kvm_mmu_zap_page(vcpu->kvm, sp);
1215 kvm_mmu_flush_tlb(vcpu);
1219 struct mmu_page_path {
1220 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1221 unsigned int idx[PT64_ROOT_LEVEL-1];
1224 #define for_each_sp(pvec, sp, parents, i) \
1225 for (i = mmu_pages_next(&pvec, &parents, -1), \
1226 sp = pvec.page[i].sp; \
1227 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1228 i = mmu_pages_next(&pvec, &parents, i))
1230 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1231 struct mmu_page_path *parents,
1236 for (n = i+1; n < pvec->nr; n++) {
1237 struct kvm_mmu_page *sp = pvec->page[n].sp;
1239 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1240 parents->idx[0] = pvec->page[n].idx;
1244 parents->parent[sp->role.level-2] = sp;
1245 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1251 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1253 struct kvm_mmu_page *sp;
1254 unsigned int level = 0;
1257 unsigned int idx = parents->idx[level];
1259 sp = parents->parent[level];
1263 --sp->unsync_children;
1264 WARN_ON((int)sp->unsync_children < 0);
1265 __clear_bit(idx, sp->unsync_child_bitmap);
1267 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1270 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1271 struct mmu_page_path *parents,
1272 struct kvm_mmu_pages *pvec)
1274 parents->parent[parent->role.level-1] = NULL;
1278 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1279 struct kvm_mmu_page *parent)
1282 struct kvm_mmu_page *sp;
1283 struct mmu_page_path parents;
1284 struct kvm_mmu_pages pages;
1286 kvm_mmu_pages_init(parent, &parents, &pages);
1287 while (mmu_unsync_walk(parent, &pages)) {
1290 for_each_sp(pages, sp, parents, i)
1291 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1294 kvm_flush_remote_tlbs(vcpu->kvm);
1296 for_each_sp(pages, sp, parents, i) {
1297 kvm_sync_page(vcpu, sp);
1298 mmu_pages_clear_parents(&parents);
1300 cond_resched_lock(&vcpu->kvm->mmu_lock);
1301 kvm_mmu_pages_init(parent, &parents, &pages);
1305 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1313 union kvm_mmu_page_role role;
1316 struct hlist_head *bucket;
1317 struct kvm_mmu_page *sp;
1318 struct hlist_node *node, *tmp;
1320 role = vcpu->arch.mmu.base_role;
1322 role.direct = direct;
1325 role.access = access;
1326 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1327 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1328 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1329 role.quadrant = quadrant;
1331 index = kvm_page_table_hashfn(gfn);
1332 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1333 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1334 if (sp->gfn == gfn) {
1336 if (kvm_sync_page(vcpu, sp))
1339 if (sp->role.word != role.word)
1342 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1343 if (sp->unsync_children) {
1344 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1345 kvm_mmu_mark_parents_unsync(sp);
1347 trace_kvm_mmu_get_page(sp, false);
1350 ++vcpu->kvm->stat.mmu_cache_miss;
1351 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1356 hlist_add_head(&sp->hash_link, bucket);
1358 if (rmap_write_protect(vcpu->kvm, gfn))
1359 kvm_flush_remote_tlbs(vcpu->kvm);
1360 account_shadowed(vcpu->kvm, gfn);
1362 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1363 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1365 nonpaging_prefetch_page(vcpu, sp);
1366 trace_kvm_mmu_get_page(sp, true);
1370 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1371 struct kvm_vcpu *vcpu, u64 addr)
1373 iterator->addr = addr;
1374 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1375 iterator->level = vcpu->arch.mmu.shadow_root_level;
1376 if (iterator->level == PT32E_ROOT_LEVEL) {
1377 iterator->shadow_addr
1378 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1379 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1381 if (!iterator->shadow_addr)
1382 iterator->level = 0;
1386 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1388 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1391 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1392 if (is_large_pte(*iterator->sptep))
1395 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1396 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1400 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1402 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1406 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1407 struct kvm_mmu_page *sp)
1415 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1418 if (is_shadow_present_pte(ent)) {
1419 if (!is_last_spte(ent, sp->role.level)) {
1420 ent &= PT64_BASE_ADDR_MASK;
1421 mmu_page_remove_parent_pte(page_header(ent),
1424 if (is_large_pte(ent))
1426 rmap_remove(kvm, &pt[i]);
1429 pt[i] = shadow_trap_nonpresent_pte;
1433 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1435 mmu_page_remove_parent_pte(sp, parent_pte);
1438 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1441 struct kvm_vcpu *vcpu;
1443 kvm_for_each_vcpu(i, vcpu, kvm)
1444 vcpu->arch.last_pte_updated = NULL;
1447 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1451 while (sp->multimapped || sp->parent_pte) {
1452 if (!sp->multimapped)
1453 parent_pte = sp->parent_pte;
1455 struct kvm_pte_chain *chain;
1457 chain = container_of(sp->parent_ptes.first,
1458 struct kvm_pte_chain, link);
1459 parent_pte = chain->parent_ptes[0];
1461 BUG_ON(!parent_pte);
1462 kvm_mmu_put_page(sp, parent_pte);
1463 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1467 static int mmu_zap_unsync_children(struct kvm *kvm,
1468 struct kvm_mmu_page *parent)
1471 struct mmu_page_path parents;
1472 struct kvm_mmu_pages pages;
1474 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1477 kvm_mmu_pages_init(parent, &parents, &pages);
1478 while (mmu_unsync_walk(parent, &pages)) {
1479 struct kvm_mmu_page *sp;
1481 for_each_sp(pages, sp, parents, i) {
1482 kvm_mmu_zap_page(kvm, sp);
1483 mmu_pages_clear_parents(&parents);
1486 kvm_mmu_pages_init(parent, &parents, &pages);
1492 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1496 trace_kvm_mmu_zap_page(sp);
1497 ++kvm->stat.mmu_shadow_zapped;
1498 ret = mmu_zap_unsync_children(kvm, sp);
1499 kvm_mmu_page_unlink_children(kvm, sp);
1500 kvm_mmu_unlink_parents(kvm, sp);
1501 kvm_flush_remote_tlbs(kvm);
1502 if (!sp->role.invalid && !sp->role.direct)
1503 unaccount_shadowed(kvm, sp->gfn);
1505 kvm_unlink_unsync_page(kvm, sp);
1506 if (!sp->root_count) {
1507 hlist_del(&sp->hash_link);
1508 kvm_mmu_free_page(kvm, sp);
1510 sp->role.invalid = 1;
1511 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1512 kvm_reload_remote_mmus(kvm);
1514 kvm_mmu_reset_last_pte_updated(kvm);
1519 * Changing the number of mmu pages allocated to the vm
1520 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1522 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1526 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1527 used_pages = max(0, used_pages);
1530 * If we set the number of mmu pages to be smaller be than the
1531 * number of actived pages , we must to free some mmu pages before we
1535 if (used_pages > kvm_nr_mmu_pages) {
1536 while (used_pages > kvm_nr_mmu_pages &&
1537 !list_empty(&kvm->arch.active_mmu_pages)) {
1538 struct kvm_mmu_page *page;
1540 page = container_of(kvm->arch.active_mmu_pages.prev,
1541 struct kvm_mmu_page, link);
1542 used_pages -= kvm_mmu_zap_page(kvm, page);
1545 kvm_nr_mmu_pages = used_pages;
1546 kvm->arch.n_free_mmu_pages = 0;
1549 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1550 - kvm->arch.n_alloc_mmu_pages;
1552 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1555 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1558 struct hlist_head *bucket;
1559 struct kvm_mmu_page *sp;
1560 struct hlist_node *node, *n;
1563 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1565 index = kvm_page_table_hashfn(gfn);
1566 bucket = &kvm->arch.mmu_page_hash[index];
1568 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1569 if (sp->gfn == gfn && !sp->role.direct) {
1570 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1573 if (kvm_mmu_zap_page(kvm, sp))
1579 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1582 struct hlist_head *bucket;
1583 struct kvm_mmu_page *sp;
1584 struct hlist_node *node, *nn;
1586 index = kvm_page_table_hashfn(gfn);
1587 bucket = &kvm->arch.mmu_page_hash[index];
1589 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1590 if (sp->gfn == gfn && !sp->role.direct
1591 && !sp->role.invalid) {
1592 pgprintk("%s: zap %lx %x\n",
1593 __func__, gfn, sp->role.word);
1594 if (kvm_mmu_zap_page(kvm, sp))
1600 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1602 int slot = memslot_id(kvm, gfn);
1603 struct kvm_mmu_page *sp = page_header(__pa(pte));
1605 __set_bit(slot, sp->slot_bitmap);
1608 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1613 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1616 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1617 if (pt[i] == shadow_notrap_nonpresent_pte)
1618 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1623 * The function is based on mtrr_type_lookup() in
1624 * arch/x86/kernel/cpu/mtrr/generic.c
1626 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1631 u8 prev_match, curr_match;
1632 int num_var_ranges = KVM_NR_VAR_MTRR;
1634 if (!mtrr_state->enabled)
1637 /* Make end inclusive end, instead of exclusive */
1640 /* Look in fixed ranges. Just return the type as per start */
1641 if (mtrr_state->have_fixed && (start < 0x100000)) {
1644 if (start < 0x80000) {
1646 idx += (start >> 16);
1647 return mtrr_state->fixed_ranges[idx];
1648 } else if (start < 0xC0000) {
1650 idx += ((start - 0x80000) >> 14);
1651 return mtrr_state->fixed_ranges[idx];
1652 } else if (start < 0x1000000) {
1654 idx += ((start - 0xC0000) >> 12);
1655 return mtrr_state->fixed_ranges[idx];
1660 * Look in variable ranges
1661 * Look of multiple ranges matching this address and pick type
1662 * as per MTRR precedence
1664 if (!(mtrr_state->enabled & 2))
1665 return mtrr_state->def_type;
1668 for (i = 0; i < num_var_ranges; ++i) {
1669 unsigned short start_state, end_state;
1671 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1674 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1675 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1676 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1677 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1679 start_state = ((start & mask) == (base & mask));
1680 end_state = ((end & mask) == (base & mask));
1681 if (start_state != end_state)
1684 if ((start & mask) != (base & mask))
1687 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1688 if (prev_match == 0xFF) {
1689 prev_match = curr_match;
1693 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1694 curr_match == MTRR_TYPE_UNCACHABLE)
1695 return MTRR_TYPE_UNCACHABLE;
1697 if ((prev_match == MTRR_TYPE_WRBACK &&
1698 curr_match == MTRR_TYPE_WRTHROUGH) ||
1699 (prev_match == MTRR_TYPE_WRTHROUGH &&
1700 curr_match == MTRR_TYPE_WRBACK)) {
1701 prev_match = MTRR_TYPE_WRTHROUGH;
1702 curr_match = MTRR_TYPE_WRTHROUGH;
1705 if (prev_match != curr_match)
1706 return MTRR_TYPE_UNCACHABLE;
1709 if (prev_match != 0xFF)
1712 return mtrr_state->def_type;
1715 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1719 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1720 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1721 if (mtrr == 0xfe || mtrr == 0xff)
1722 mtrr = MTRR_TYPE_WRBACK;
1725 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1727 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1730 struct hlist_head *bucket;
1731 struct kvm_mmu_page *s;
1732 struct hlist_node *node, *n;
1734 index = kvm_page_table_hashfn(sp->gfn);
1735 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1736 /* don't unsync if pagetable is shadowed with multiple roles */
1737 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1738 if (s->gfn != sp->gfn || s->role.direct)
1740 if (s->role.word != sp->role.word)
1743 trace_kvm_mmu_unsync_page(sp);
1744 ++vcpu->kvm->stat.mmu_unsync;
1747 kvm_mmu_mark_parents_unsync(sp);
1749 mmu_convert_notrap(sp);
1753 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1756 struct kvm_mmu_page *shadow;
1758 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1760 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1764 if (can_unsync && oos_shadow)
1765 return kvm_unsync_page(vcpu, shadow);
1771 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1772 unsigned pte_access, int user_fault,
1773 int write_fault, int dirty, int level,
1774 gfn_t gfn, pfn_t pfn, bool speculative,
1775 bool can_unsync, bool reset_host_protection)
1781 * We don't set the accessed bit, since we sometimes want to see
1782 * whether the guest actually used the pte (in order to detect
1785 spte = shadow_base_present_pte | shadow_dirty_mask;
1787 spte |= shadow_accessed_mask;
1789 pte_access &= ~ACC_WRITE_MASK;
1790 if (pte_access & ACC_EXEC_MASK)
1791 spte |= shadow_x_mask;
1793 spte |= shadow_nx_mask;
1794 if (pte_access & ACC_USER_MASK)
1795 spte |= shadow_user_mask;
1796 if (level > PT_PAGE_TABLE_LEVEL)
1797 spte |= PT_PAGE_SIZE_MASK;
1799 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1800 kvm_is_mmio_pfn(pfn));
1802 if (reset_host_protection)
1803 spte |= SPTE_HOST_WRITEABLE;
1805 spte |= (u64)pfn << PAGE_SHIFT;
1807 if ((pte_access & ACC_WRITE_MASK)
1808 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1810 if (level > PT_PAGE_TABLE_LEVEL &&
1811 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1813 spte = shadow_trap_nonpresent_pte;
1817 spte |= PT_WRITABLE_MASK;
1819 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1820 spte &= ~PT_USER_MASK;
1823 * Optimization: for pte sync, if spte was writable the hash
1824 * lookup is unnecessary (and expensive). Write protection
1825 * is responsibility of mmu_get_page / kvm_sync_page.
1826 * Same reasoning can be applied to dirty page accounting.
1828 if (!can_unsync && is_writable_pte(*sptep))
1831 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1832 pgprintk("%s: found shadow page for %lx, marking ro\n",
1835 pte_access &= ~ACC_WRITE_MASK;
1836 if (is_writable_pte(spte))
1837 spte &= ~PT_WRITABLE_MASK;
1841 if (pte_access & ACC_WRITE_MASK)
1842 mark_page_dirty(vcpu->kvm, gfn);
1845 __set_spte(sptep, spte);
1849 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1850 unsigned pt_access, unsigned pte_access,
1851 int user_fault, int write_fault, int dirty,
1852 int *ptwrite, int level, gfn_t gfn,
1853 pfn_t pfn, bool speculative,
1854 bool reset_host_protection)
1856 int was_rmapped = 0;
1857 int was_writable = is_writable_pte(*sptep);
1860 pgprintk("%s: spte %llx access %x write_fault %d"
1861 " user_fault %d gfn %lx\n",
1862 __func__, *sptep, pt_access,
1863 write_fault, user_fault, gfn);
1865 if (is_rmap_spte(*sptep)) {
1867 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1868 * the parent of the now unreachable PTE.
1870 if (level > PT_PAGE_TABLE_LEVEL &&
1871 !is_large_pte(*sptep)) {
1872 struct kvm_mmu_page *child;
1875 child = page_header(pte & PT64_BASE_ADDR_MASK);
1876 mmu_page_remove_parent_pte(child, sptep);
1877 __set_spte(sptep, shadow_trap_nonpresent_pte);
1878 kvm_flush_remote_tlbs(vcpu->kvm);
1879 } else if (pfn != spte_to_pfn(*sptep)) {
1880 pgprintk("hfn old %lx new %lx\n",
1881 spte_to_pfn(*sptep), pfn);
1882 rmap_remove(vcpu->kvm, sptep);
1883 __set_spte(sptep, shadow_trap_nonpresent_pte);
1884 kvm_flush_remote_tlbs(vcpu->kvm);
1889 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1890 dirty, level, gfn, pfn, speculative, true,
1891 reset_host_protection)) {
1894 kvm_x86_ops->tlb_flush(vcpu);
1897 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1898 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1899 is_large_pte(*sptep)? "2MB" : "4kB",
1900 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1902 if (!was_rmapped && is_large_pte(*sptep))
1903 ++vcpu->kvm->stat.lpages;
1905 page_header_update_slot(vcpu->kvm, sptep, gfn);
1907 rmap_count = rmap_add(vcpu, sptep, gfn);
1908 kvm_release_pfn_clean(pfn);
1909 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1910 rmap_recycle(vcpu, sptep, gfn);
1913 kvm_release_pfn_dirty(pfn);
1915 kvm_release_pfn_clean(pfn);
1918 vcpu->arch.last_pte_updated = sptep;
1919 vcpu->arch.last_pte_gfn = gfn;
1923 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1927 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1928 int level, gfn_t gfn, pfn_t pfn)
1930 struct kvm_shadow_walk_iterator iterator;
1931 struct kvm_mmu_page *sp;
1935 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1936 if (iterator.level == level) {
1937 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1938 0, write, 1, &pt_write,
1939 level, gfn, pfn, false, true);
1940 ++vcpu->stat.pf_fixed;
1944 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1945 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1946 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1948 1, ACC_ALL, iterator.sptep);
1950 pgprintk("nonpaging_map: ENOMEM\n");
1951 kvm_release_pfn_clean(pfn);
1955 __set_spte(iterator.sptep,
1957 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1958 | shadow_user_mask | shadow_x_mask);
1964 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
1970 /* Touch the page, so send SIGBUS */
1971 hva = (void __user *)gfn_to_hva(kvm, gfn);
1972 r = copy_from_user(buf, hva, 1);
1975 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
1977 kvm_release_pfn_clean(pfn);
1978 if (is_hwpoison_pfn(pfn)) {
1979 kvm_send_hwpoison_signal(kvm, gfn);
1985 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1990 unsigned long mmu_seq;
1992 level = mapping_level(vcpu, gfn);
1995 * This path builds a PAE pagetable - so we can map 2mb pages at
1996 * maximum. Therefore check if the level is larger than that.
1998 if (level > PT_DIRECTORY_LEVEL)
1999 level = PT_DIRECTORY_LEVEL;
2001 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2003 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2005 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2008 if (is_error_pfn(pfn))
2009 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2011 spin_lock(&vcpu->kvm->mmu_lock);
2012 if (mmu_notifier_retry(vcpu, mmu_seq))
2014 kvm_mmu_free_some_pages(vcpu);
2015 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2016 spin_unlock(&vcpu->kvm->mmu_lock);
2022 spin_unlock(&vcpu->kvm->mmu_lock);
2023 kvm_release_pfn_clean(pfn);
2028 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2031 struct kvm_mmu_page *sp;
2033 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2035 spin_lock(&vcpu->kvm->mmu_lock);
2036 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2037 hpa_t root = vcpu->arch.mmu.root_hpa;
2039 sp = page_header(root);
2041 if (!sp->root_count && sp->role.invalid)
2042 kvm_mmu_zap_page(vcpu->kvm, sp);
2043 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2044 spin_unlock(&vcpu->kvm->mmu_lock);
2047 for (i = 0; i < 4; ++i) {
2048 hpa_t root = vcpu->arch.mmu.pae_root[i];
2051 root &= PT64_BASE_ADDR_MASK;
2052 sp = page_header(root);
2054 if (!sp->root_count && sp->role.invalid)
2055 kvm_mmu_zap_page(vcpu->kvm, sp);
2057 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2059 spin_unlock(&vcpu->kvm->mmu_lock);
2060 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2063 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2067 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2068 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2075 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2079 struct kvm_mmu_page *sp;
2083 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2085 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2086 hpa_t root = vcpu->arch.mmu.root_hpa;
2088 ASSERT(!VALID_PAGE(root));
2089 if (mmu_check_root(vcpu, root_gfn))
2095 spin_lock(&vcpu->kvm->mmu_lock);
2096 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2097 PT64_ROOT_LEVEL, direct,
2099 root = __pa(sp->spt);
2101 spin_unlock(&vcpu->kvm->mmu_lock);
2102 vcpu->arch.mmu.root_hpa = root;
2105 direct = !is_paging(vcpu);
2106 for (i = 0; i < 4; ++i) {
2107 hpa_t root = vcpu->arch.mmu.pae_root[i];
2109 ASSERT(!VALID_PAGE(root));
2110 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2111 pdptr = kvm_pdptr_read(vcpu, i);
2112 if (!is_present_gpte(pdptr)) {
2113 vcpu->arch.mmu.pae_root[i] = 0;
2116 root_gfn = pdptr >> PAGE_SHIFT;
2117 } else if (vcpu->arch.mmu.root_level == 0)
2119 if (mmu_check_root(vcpu, root_gfn))
2125 spin_lock(&vcpu->kvm->mmu_lock);
2126 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2127 PT32_ROOT_LEVEL, direct,
2129 root = __pa(sp->spt);
2131 spin_unlock(&vcpu->kvm->mmu_lock);
2133 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2135 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2139 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2142 struct kvm_mmu_page *sp;
2144 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2146 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2147 hpa_t root = vcpu->arch.mmu.root_hpa;
2148 sp = page_header(root);
2149 mmu_sync_children(vcpu, sp);
2152 for (i = 0; i < 4; ++i) {
2153 hpa_t root = vcpu->arch.mmu.pae_root[i];
2155 if (root && VALID_PAGE(root)) {
2156 root &= PT64_BASE_ADDR_MASK;
2157 sp = page_header(root);
2158 mmu_sync_children(vcpu, sp);
2163 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2165 spin_lock(&vcpu->kvm->mmu_lock);
2166 mmu_sync_roots(vcpu);
2167 spin_unlock(&vcpu->kvm->mmu_lock);
2170 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2171 u32 access, u32 *error)
2178 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2184 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2185 r = mmu_topup_memory_caches(vcpu);
2190 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2192 gfn = gva >> PAGE_SHIFT;
2194 return nonpaging_map(vcpu, gva & PAGE_MASK,
2195 error_code & PFERR_WRITE_MASK, gfn);
2198 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2204 gfn_t gfn = gpa >> PAGE_SHIFT;
2205 unsigned long mmu_seq;
2208 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2210 r = mmu_topup_memory_caches(vcpu);
2214 level = mapping_level(vcpu, gfn);
2216 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2218 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2220 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2221 if (is_error_pfn(pfn))
2222 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2223 spin_lock(&vcpu->kvm->mmu_lock);
2224 if (mmu_notifier_retry(vcpu, mmu_seq))
2226 kvm_mmu_free_some_pages(vcpu);
2227 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2229 spin_unlock(&vcpu->kvm->mmu_lock);
2234 spin_unlock(&vcpu->kvm->mmu_lock);
2235 kvm_release_pfn_clean(pfn);
2239 static void nonpaging_free(struct kvm_vcpu *vcpu)
2241 mmu_free_roots(vcpu);
2244 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2246 struct kvm_mmu *context = &vcpu->arch.mmu;
2248 context->new_cr3 = nonpaging_new_cr3;
2249 context->page_fault = nonpaging_page_fault;
2250 context->gva_to_gpa = nonpaging_gva_to_gpa;
2251 context->free = nonpaging_free;
2252 context->prefetch_page = nonpaging_prefetch_page;
2253 context->sync_page = nonpaging_sync_page;
2254 context->invlpg = nonpaging_invlpg;
2255 context->root_level = 0;
2256 context->shadow_root_level = PT32E_ROOT_LEVEL;
2257 context->root_hpa = INVALID_PAGE;
2261 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2263 ++vcpu->stat.tlb_flush;
2264 kvm_x86_ops->tlb_flush(vcpu);
2267 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2269 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2270 mmu_free_roots(vcpu);
2273 static void inject_page_fault(struct kvm_vcpu *vcpu,
2277 kvm_inject_page_fault(vcpu, addr, err_code);
2280 static void paging_free(struct kvm_vcpu *vcpu)
2282 nonpaging_free(vcpu);
2285 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2289 bit7 = (gpte >> 7) & 1;
2290 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2294 #include "paging_tmpl.h"
2298 #include "paging_tmpl.h"
2301 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2303 struct kvm_mmu *context = &vcpu->arch.mmu;
2304 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2305 u64 exb_bit_rsvd = 0;
2308 exb_bit_rsvd = rsvd_bits(63, 63);
2310 case PT32_ROOT_LEVEL:
2311 /* no rsvd bits for 2 level 4K page table entries */
2312 context->rsvd_bits_mask[0][1] = 0;
2313 context->rsvd_bits_mask[0][0] = 0;
2314 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2316 if (!is_pse(vcpu)) {
2317 context->rsvd_bits_mask[1][1] = 0;
2321 if (is_cpuid_PSE36())
2322 /* 36bits PSE 4MB page */
2323 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2325 /* 32 bits PSE 4MB page */
2326 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2328 case PT32E_ROOT_LEVEL:
2329 context->rsvd_bits_mask[0][2] =
2330 rsvd_bits(maxphyaddr, 63) |
2331 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2332 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2333 rsvd_bits(maxphyaddr, 62); /* PDE */
2334 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2335 rsvd_bits(maxphyaddr, 62); /* PTE */
2336 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2337 rsvd_bits(maxphyaddr, 62) |
2338 rsvd_bits(13, 20); /* large page */
2339 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2341 case PT64_ROOT_LEVEL:
2342 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2343 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2344 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2345 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2346 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2347 rsvd_bits(maxphyaddr, 51);
2348 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2349 rsvd_bits(maxphyaddr, 51);
2350 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2351 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2352 rsvd_bits(maxphyaddr, 51) |
2354 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2355 rsvd_bits(maxphyaddr, 51) |
2356 rsvd_bits(13, 20); /* large page */
2357 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2362 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2364 struct kvm_mmu *context = &vcpu->arch.mmu;
2366 ASSERT(is_pae(vcpu));
2367 context->new_cr3 = paging_new_cr3;
2368 context->page_fault = paging64_page_fault;
2369 context->gva_to_gpa = paging64_gva_to_gpa;
2370 context->prefetch_page = paging64_prefetch_page;
2371 context->sync_page = paging64_sync_page;
2372 context->invlpg = paging64_invlpg;
2373 context->free = paging_free;
2374 context->root_level = level;
2375 context->shadow_root_level = level;
2376 context->root_hpa = INVALID_PAGE;
2380 static int paging64_init_context(struct kvm_vcpu *vcpu)
2382 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2383 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2386 static int paging32_init_context(struct kvm_vcpu *vcpu)
2388 struct kvm_mmu *context = &vcpu->arch.mmu;
2390 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2391 context->new_cr3 = paging_new_cr3;
2392 context->page_fault = paging32_page_fault;
2393 context->gva_to_gpa = paging32_gva_to_gpa;
2394 context->free = paging_free;
2395 context->prefetch_page = paging32_prefetch_page;
2396 context->sync_page = paging32_sync_page;
2397 context->invlpg = paging32_invlpg;
2398 context->root_level = PT32_ROOT_LEVEL;
2399 context->shadow_root_level = PT32E_ROOT_LEVEL;
2400 context->root_hpa = INVALID_PAGE;
2404 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2406 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2407 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2410 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2412 struct kvm_mmu *context = &vcpu->arch.mmu;
2414 context->new_cr3 = nonpaging_new_cr3;
2415 context->page_fault = tdp_page_fault;
2416 context->free = nonpaging_free;
2417 context->prefetch_page = nonpaging_prefetch_page;
2418 context->sync_page = nonpaging_sync_page;
2419 context->invlpg = nonpaging_invlpg;
2420 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2421 context->root_hpa = INVALID_PAGE;
2423 if (!is_paging(vcpu)) {
2424 context->gva_to_gpa = nonpaging_gva_to_gpa;
2425 context->root_level = 0;
2426 } else if (is_long_mode(vcpu)) {
2427 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2428 context->gva_to_gpa = paging64_gva_to_gpa;
2429 context->root_level = PT64_ROOT_LEVEL;
2430 } else if (is_pae(vcpu)) {
2431 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2432 context->gva_to_gpa = paging64_gva_to_gpa;
2433 context->root_level = PT32E_ROOT_LEVEL;
2435 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2436 context->gva_to_gpa = paging32_gva_to_gpa;
2437 context->root_level = PT32_ROOT_LEVEL;
2443 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2448 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2450 if (!is_paging(vcpu))
2451 r = nonpaging_init_context(vcpu);
2452 else if (is_long_mode(vcpu))
2453 r = paging64_init_context(vcpu);
2454 else if (is_pae(vcpu))
2455 r = paging32E_init_context(vcpu);
2457 r = paging32_init_context(vcpu);
2459 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2460 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2465 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2467 vcpu->arch.update_pte.pfn = bad_pfn;
2470 return init_kvm_tdp_mmu(vcpu);
2472 return init_kvm_softmmu(vcpu);
2475 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2478 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2479 vcpu->arch.mmu.free(vcpu);
2480 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2484 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2486 destroy_kvm_mmu(vcpu);
2487 return init_kvm_mmu(vcpu);
2489 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2491 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2495 r = mmu_topup_memory_caches(vcpu);
2498 spin_lock(&vcpu->kvm->mmu_lock);
2499 kvm_mmu_free_some_pages(vcpu);
2500 spin_unlock(&vcpu->kvm->mmu_lock);
2501 r = mmu_alloc_roots(vcpu);
2502 spin_lock(&vcpu->kvm->mmu_lock);
2503 mmu_sync_roots(vcpu);
2504 spin_unlock(&vcpu->kvm->mmu_lock);
2507 /* set_cr3() should ensure TLB has been flushed */
2508 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2512 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2514 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2516 mmu_free_roots(vcpu);
2519 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2520 struct kvm_mmu_page *sp,
2524 struct kvm_mmu_page *child;
2527 if (is_shadow_present_pte(pte)) {
2528 if (is_last_spte(pte, sp->role.level))
2529 rmap_remove(vcpu->kvm, spte);
2531 child = page_header(pte & PT64_BASE_ADDR_MASK);
2532 mmu_page_remove_parent_pte(child, spte);
2535 __set_spte(spte, shadow_trap_nonpresent_pte);
2536 if (is_large_pte(pte))
2537 --vcpu->kvm->stat.lpages;
2540 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2541 struct kvm_mmu_page *sp,
2545 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2546 ++vcpu->kvm->stat.mmu_pde_zapped;
2550 ++vcpu->kvm->stat.mmu_pte_updated;
2551 if (!sp->role.cr4_pae)
2552 paging32_update_pte(vcpu, sp, spte, new);
2554 paging64_update_pte(vcpu, sp, spte, new);
2557 static bool need_remote_flush(u64 old, u64 new)
2559 if (!is_shadow_present_pte(old))
2561 if (!is_shadow_present_pte(new))
2563 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2565 old ^= PT64_NX_MASK;
2566 new ^= PT64_NX_MASK;
2567 return (old & ~new & PT64_PERM_MASK) != 0;
2570 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2572 if (need_remote_flush(old, new))
2573 kvm_flush_remote_tlbs(vcpu->kvm);
2575 kvm_mmu_flush_tlb(vcpu);
2578 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2580 u64 *spte = vcpu->arch.last_pte_updated;
2582 return !!(spte && (*spte & shadow_accessed_mask));
2585 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2591 if (!is_present_gpte(gpte))
2593 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2595 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2597 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2599 if (is_error_pfn(pfn)) {
2600 kvm_release_pfn_clean(pfn);
2603 vcpu->arch.update_pte.gfn = gfn;
2604 vcpu->arch.update_pte.pfn = pfn;
2607 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2609 u64 *spte = vcpu->arch.last_pte_updated;
2612 && vcpu->arch.last_pte_gfn == gfn
2613 && shadow_accessed_mask
2614 && !(*spte & shadow_accessed_mask)
2615 && is_shadow_present_pte(*spte))
2616 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2619 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2620 const u8 *new, int bytes,
2621 bool guest_initiated)
2623 gfn_t gfn = gpa >> PAGE_SHIFT;
2624 struct kvm_mmu_page *sp;
2625 struct hlist_node *node, *n;
2626 struct hlist_head *bucket;
2630 unsigned offset = offset_in_page(gpa);
2632 unsigned page_offset;
2633 unsigned misaligned;
2641 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2643 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2646 * Assume that the pte write on a page table of the same type
2647 * as the current vcpu paging mode. This is nearly always true
2648 * (might be false while changing modes). Note it is verified later
2651 if ((is_pae(vcpu) && bytes == 4) || !new) {
2652 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2657 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2660 new = (const u8 *)&gentry;
2665 gentry = *(const u32 *)new;
2668 gentry = *(const u64 *)new;
2675 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2676 spin_lock(&vcpu->kvm->mmu_lock);
2677 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2679 kvm_mmu_access_page(vcpu, gfn);
2680 kvm_mmu_free_some_pages(vcpu);
2681 ++vcpu->kvm->stat.mmu_pte_write;
2682 kvm_mmu_audit(vcpu, "pre pte write");
2683 if (guest_initiated) {
2684 if (gfn == vcpu->arch.last_pt_write_gfn
2685 && !last_updated_pte_accessed(vcpu)) {
2686 ++vcpu->arch.last_pt_write_count;
2687 if (vcpu->arch.last_pt_write_count >= 3)
2690 vcpu->arch.last_pt_write_gfn = gfn;
2691 vcpu->arch.last_pt_write_count = 1;
2692 vcpu->arch.last_pte_updated = NULL;
2695 index = kvm_page_table_hashfn(gfn);
2696 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2699 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2700 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2702 pte_size = sp->role.cr4_pae ? 8 : 4;
2703 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2704 misaligned |= bytes < 4;
2705 if (misaligned || flooded) {
2707 * Misaligned accesses are too much trouble to fix
2708 * up; also, they usually indicate a page is not used
2711 * If we're seeing too many writes to a page,
2712 * it may no longer be a page table, or we may be
2713 * forking, in which case it is better to unmap the
2716 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2717 gpa, bytes, sp->role.word);
2718 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2720 ++vcpu->kvm->stat.mmu_flooded;
2723 page_offset = offset;
2724 level = sp->role.level;
2726 if (!sp->role.cr4_pae) {
2727 page_offset <<= 1; /* 32->64 */
2729 * A 32-bit pde maps 4MB while the shadow pdes map
2730 * only 2MB. So we need to double the offset again
2731 * and zap two pdes instead of one.
2733 if (level == PT32_ROOT_LEVEL) {
2734 page_offset &= ~7; /* kill rounding error */
2738 quadrant = page_offset >> PAGE_SHIFT;
2739 page_offset &= ~PAGE_MASK;
2740 if (quadrant != sp->role.quadrant)
2743 spte = &sp->spt[page_offset / sizeof(*spte)];
2746 mmu_pte_write_zap_pte(vcpu, sp, spte);
2748 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2749 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2753 kvm_mmu_audit(vcpu, "post pte write");
2754 spin_unlock(&vcpu->kvm->mmu_lock);
2755 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2756 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2757 vcpu->arch.update_pte.pfn = bad_pfn;
2761 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2769 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2771 spin_lock(&vcpu->kvm->mmu_lock);
2772 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2773 spin_unlock(&vcpu->kvm->mmu_lock);
2776 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2778 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2780 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2781 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2782 struct kvm_mmu_page *sp;
2784 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2785 struct kvm_mmu_page, link);
2786 kvm_mmu_zap_page(vcpu->kvm, sp);
2787 ++vcpu->kvm->stat.mmu_recycled;
2791 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2794 enum emulation_result er;
2796 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2805 r = mmu_topup_memory_caches(vcpu);
2809 er = emulate_instruction(vcpu, cr2, error_code, 0);
2814 case EMULATE_DO_MMIO:
2815 ++vcpu->stat.mmio_exits;
2818 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2819 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2820 vcpu->run->internal.ndata = 0;
2828 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2830 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2832 vcpu->arch.mmu.invlpg(vcpu, gva);
2833 kvm_mmu_flush_tlb(vcpu);
2834 ++vcpu->stat.invlpg;
2836 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2838 void kvm_enable_tdp(void)
2842 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2844 void kvm_disable_tdp(void)
2846 tdp_enabled = false;
2848 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2850 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2852 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2855 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2863 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2864 * Therefore we need to allocate shadow page tables in the first
2865 * 4GB of memory, which happens to fit the DMA32 zone.
2867 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2871 vcpu->arch.mmu.pae_root = page_address(page);
2872 for (i = 0; i < 4; ++i)
2873 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2878 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2881 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2883 return alloc_mmu_pages(vcpu);
2886 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2889 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2891 return init_kvm_mmu(vcpu);
2894 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2898 destroy_kvm_mmu(vcpu);
2899 free_mmu_pages(vcpu);
2900 mmu_free_memory_caches(vcpu);
2903 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2905 struct kvm_mmu_page *sp;
2907 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2911 if (!test_bit(slot, sp->slot_bitmap))
2915 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2917 if (pt[i] & PT_WRITABLE_MASK)
2918 pt[i] &= ~PT_WRITABLE_MASK;
2920 kvm_flush_remote_tlbs(kvm);
2923 void kvm_mmu_zap_all(struct kvm *kvm)
2925 struct kvm_mmu_page *sp, *node;
2927 spin_lock(&kvm->mmu_lock);
2929 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2930 if (kvm_mmu_zap_page(kvm, sp))
2933 spin_unlock(&kvm->mmu_lock);
2935 kvm_flush_remote_tlbs(kvm);
2938 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
2940 struct kvm_mmu_page *page;
2942 page = container_of(kvm->arch.active_mmu_pages.prev,
2943 struct kvm_mmu_page, link);
2944 return kvm_mmu_zap_page(kvm, page) + 1;
2947 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
2950 struct kvm *kvm_freed = NULL;
2951 int cache_count = 0;
2953 spin_lock(&kvm_lock);
2955 list_for_each_entry(kvm, &vm_list, vm_list) {
2956 int npages, idx, freed_pages;
2958 idx = srcu_read_lock(&kvm->srcu);
2959 spin_lock(&kvm->mmu_lock);
2960 npages = kvm->arch.n_alloc_mmu_pages -
2961 kvm->arch.n_free_mmu_pages;
2962 cache_count += npages;
2963 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2964 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
2965 cache_count -= freed_pages;
2970 spin_unlock(&kvm->mmu_lock);
2971 srcu_read_unlock(&kvm->srcu, idx);
2974 list_move_tail(&kvm_freed->vm_list, &vm_list);
2976 spin_unlock(&kvm_lock);
2981 static struct shrinker mmu_shrinker = {
2982 .shrink = mmu_shrink,
2983 .seeks = DEFAULT_SEEKS * 10,
2986 static void mmu_destroy_caches(void)
2988 if (pte_chain_cache)
2989 kmem_cache_destroy(pte_chain_cache);
2990 if (rmap_desc_cache)
2991 kmem_cache_destroy(rmap_desc_cache);
2992 if (mmu_page_header_cache)
2993 kmem_cache_destroy(mmu_page_header_cache);
2996 void kvm_mmu_module_exit(void)
2998 mmu_destroy_caches();
2999 unregister_shrinker(&mmu_shrinker);
3002 int kvm_mmu_module_init(void)
3004 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3005 sizeof(struct kvm_pte_chain),
3007 if (!pte_chain_cache)
3009 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3010 sizeof(struct kvm_rmap_desc),
3012 if (!rmap_desc_cache)
3015 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3016 sizeof(struct kvm_mmu_page),
3018 if (!mmu_page_header_cache)
3021 register_shrinker(&mmu_shrinker);
3026 mmu_destroy_caches();
3031 * Caculate mmu pages needed for kvm.
3033 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3036 unsigned int nr_mmu_pages;
3037 unsigned int nr_pages = 0;
3038 struct kvm_memslots *slots;
3040 slots = kvm_memslots(kvm);
3042 for (i = 0; i < slots->nmemslots; i++)
3043 nr_pages += slots->memslots[i].npages;
3045 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3046 nr_mmu_pages = max(nr_mmu_pages,
3047 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3049 return nr_mmu_pages;
3052 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3055 if (len > buffer->len)
3060 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3065 ret = pv_mmu_peek_buffer(buffer, len);
3070 buffer->processed += len;
3074 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3075 gpa_t addr, gpa_t value)
3080 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3083 r = mmu_topup_memory_caches(vcpu);
3087 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3093 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3095 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3099 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3101 spin_lock(&vcpu->kvm->mmu_lock);
3102 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3103 spin_unlock(&vcpu->kvm->mmu_lock);
3107 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3108 struct kvm_pv_mmu_op_buffer *buffer)
3110 struct kvm_mmu_op_header *header;
3112 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3115 switch (header->op) {
3116 case KVM_MMU_OP_WRITE_PTE: {
3117 struct kvm_mmu_op_write_pte *wpte;
3119 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3122 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3125 case KVM_MMU_OP_FLUSH_TLB: {
3126 struct kvm_mmu_op_flush_tlb *ftlb;
3128 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3131 return kvm_pv_mmu_flush_tlb(vcpu);
3133 case KVM_MMU_OP_RELEASE_PT: {
3134 struct kvm_mmu_op_release_pt *rpt;
3136 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3139 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3145 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3146 gpa_t addr, unsigned long *ret)
3149 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3151 buffer->ptr = buffer->buf;
3152 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3153 buffer->processed = 0;
3155 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3159 while (buffer->len) {
3160 r = kvm_pv_mmu_op_one(vcpu, buffer);
3169 *ret = buffer->processed;
3173 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3175 struct kvm_shadow_walk_iterator iterator;
3178 spin_lock(&vcpu->kvm->mmu_lock);
3179 for_each_shadow_entry(vcpu, addr, iterator) {
3180 sptes[iterator.level-1] = *iterator.sptep;
3182 if (!is_shadow_present_pte(*iterator.sptep))
3185 spin_unlock(&vcpu->kvm->mmu_lock);
3189 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3193 static const char *audit_msg;
3195 static gva_t canonicalize(gva_t gva)
3197 #ifdef CONFIG_X86_64
3198 gva = (long long)(gva << 16) >> 16;
3204 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3206 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3211 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3212 u64 ent = sp->spt[i];
3214 if (is_shadow_present_pte(ent)) {
3215 if (!is_last_spte(ent, sp->role.level)) {
3216 struct kvm_mmu_page *child;
3217 child = page_header(ent & PT64_BASE_ADDR_MASK);
3218 __mmu_spte_walk(kvm, child, fn);
3220 fn(kvm, &sp->spt[i]);
3225 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3228 struct kvm_mmu_page *sp;
3230 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3232 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3233 hpa_t root = vcpu->arch.mmu.root_hpa;
3234 sp = page_header(root);
3235 __mmu_spte_walk(vcpu->kvm, sp, fn);
3238 for (i = 0; i < 4; ++i) {
3239 hpa_t root = vcpu->arch.mmu.pae_root[i];
3241 if (root && VALID_PAGE(root)) {
3242 root &= PT64_BASE_ADDR_MASK;
3243 sp = page_header(root);
3244 __mmu_spte_walk(vcpu->kvm, sp, fn);
3250 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3251 gva_t va, int level)
3253 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3255 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3257 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3260 if (ent == shadow_trap_nonpresent_pte)
3263 va = canonicalize(va);
3264 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3265 audit_mappings_page(vcpu, ent, va, level - 1);
3267 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3268 gfn_t gfn = gpa >> PAGE_SHIFT;
3269 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3270 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3272 if (is_error_pfn(pfn)) {
3273 kvm_release_pfn_clean(pfn);
3277 if (is_shadow_present_pte(ent)
3278 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3279 printk(KERN_ERR "xx audit error: (%s) levels %d"
3280 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3281 audit_msg, vcpu->arch.mmu.root_level,
3283 is_shadow_present_pte(ent));
3284 else if (ent == shadow_notrap_nonpresent_pte
3285 && !is_error_hpa(hpa))
3286 printk(KERN_ERR "audit: (%s) notrap shadow,"
3287 " valid guest gva %lx\n", audit_msg, va);
3288 kvm_release_pfn_clean(pfn);
3294 static void audit_mappings(struct kvm_vcpu *vcpu)
3298 if (vcpu->arch.mmu.root_level == 4)
3299 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3301 for (i = 0; i < 4; ++i)
3302 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3303 audit_mappings_page(vcpu,
3304 vcpu->arch.mmu.pae_root[i],
3309 static int count_rmaps(struct kvm_vcpu *vcpu)
3311 struct kvm *kvm = vcpu->kvm;
3312 struct kvm_memslots *slots;
3316 idx = srcu_read_lock(&kvm->srcu);
3317 slots = kvm_memslots(kvm);
3318 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3319 struct kvm_memory_slot *m = &slots->memslots[i];
3320 struct kvm_rmap_desc *d;
3322 for (j = 0; j < m->npages; ++j) {
3323 unsigned long *rmapp = &m->rmap[j];
3327 if (!(*rmapp & 1)) {
3331 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3333 for (k = 0; k < RMAP_EXT; ++k)
3342 srcu_read_unlock(&kvm->srcu, idx);
3346 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3348 unsigned long *rmapp;
3349 struct kvm_mmu_page *rev_sp;
3352 if (*sptep & PT_WRITABLE_MASK) {
3353 rev_sp = page_header(__pa(sptep));
3354 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3356 if (!gfn_to_memslot(kvm, gfn)) {
3357 if (!printk_ratelimit())
3359 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3361 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3362 audit_msg, (long int)(sptep - rev_sp->spt),
3368 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3369 rev_sp->role.level);
3371 if (!printk_ratelimit())
3373 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3381 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3383 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3386 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3388 struct kvm_mmu_page *sp;
3391 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3394 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3397 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3400 if (!(ent & PT_PRESENT_MASK))
3402 if (!(ent & PT_WRITABLE_MASK))
3404 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3410 static void audit_rmap(struct kvm_vcpu *vcpu)
3412 check_writable_mappings_rmap(vcpu);
3416 static void audit_write_protection(struct kvm_vcpu *vcpu)
3418 struct kvm_mmu_page *sp;
3419 struct kvm_memory_slot *slot;
3420 unsigned long *rmapp;
3424 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3425 if (sp->role.direct)
3430 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3431 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3432 rmapp = &slot->rmap[gfn - slot->base_gfn];
3434 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3436 if (*spte & PT_WRITABLE_MASK)
3437 printk(KERN_ERR "%s: (%s) shadow page has "
3438 "writable mappings: gfn %lx role %x\n",
3439 __func__, audit_msg, sp->gfn,
3441 spte = rmap_next(vcpu->kvm, rmapp, spte);
3446 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3453 audit_write_protection(vcpu);
3454 if (strcmp("pre pte write", audit_msg) != 0)
3455 audit_mappings(vcpu);
3456 audit_writable_sptes_have_rmaps(vcpu);