2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
22 #include "kvm_cache_regs.h"
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
35 #include <linux/uaccess.h>
38 #include <asm/cmpxchg.h>
43 * When setting this variable to true it enables Two-Dimensional-Paging
44 * where the hardware walks 2 page tables:
45 * 1. the guest-virtual to guest-physical
46 * 2. while doing 1. it walks guest-physical to host-physical
47 * If the hardware supports that we don't need to do shadow paging.
49 bool tdp_enabled = false;
56 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
63 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
64 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
68 #define pgprintk(x...) do { } while (0)
69 #define rmap_printk(x...) do { } while (0)
73 #if defined(MMU_DEBUG) || defined(AUDIT)
75 module_param(dbg, bool, 0644);
78 static int oos_shadow = 1;
79 module_param(oos_shadow, bool, 0644);
82 #define ASSERT(x) do { } while (0)
86 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
87 __FILE__, __LINE__, #x); \
91 #define PT_FIRST_AVAIL_BITS_SHIFT 9
92 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
96 #define PT64_LEVEL_BITS 9
98 #define PT64_LEVEL_SHIFT(level) \
99 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101 #define PT64_LEVEL_MASK(level) \
102 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
104 #define PT64_INDEX(address, level)\
105 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
108 #define PT32_LEVEL_BITS 10
110 #define PT32_LEVEL_SHIFT(level) \
111 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
113 #define PT32_LEVEL_MASK(level) \
114 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
115 #define PT32_LVL_OFFSET_MASK(level) \
116 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
117 * PT32_LEVEL_BITS))) - 1))
119 #define PT32_INDEX(address, level)\
120 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
123 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
124 #define PT64_DIR_BASE_ADDR_MASK \
125 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
126 #define PT64_LVL_ADDR_MASK(level) \
127 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
128 * PT64_LEVEL_BITS))) - 1))
129 #define PT64_LVL_OFFSET_MASK(level) \
130 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
131 * PT64_LEVEL_BITS))) - 1))
133 #define PT32_BASE_ADDR_MASK PAGE_MASK
134 #define PT32_DIR_BASE_ADDR_MASK \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
136 #define PT32_LVL_ADDR_MASK(level) \
137 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
138 * PT32_LEVEL_BITS))) - 1))
140 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
145 #define ACC_EXEC_MASK 1
146 #define ACC_WRITE_MASK PT_WRITABLE_MASK
147 #define ACC_USER_MASK PT_USER_MASK
148 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
150 #include <trace/events/kvm.h>
152 #define CREATE_TRACE_POINTS
153 #include "mmutrace.h"
155 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
157 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
159 struct kvm_rmap_desc {
160 u64 *sptes[RMAP_EXT];
161 struct kvm_rmap_desc *more;
164 struct kvm_shadow_walk_iterator {
172 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
173 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
174 shadow_walk_okay(&(_walker)); \
175 shadow_walk_next(&(_walker)))
177 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
179 static struct kmem_cache *pte_chain_cache;
180 static struct kmem_cache *rmap_desc_cache;
181 static struct kmem_cache *mmu_page_header_cache;
183 static u64 __read_mostly shadow_trap_nonpresent_pte;
184 static u64 __read_mostly shadow_notrap_nonpresent_pte;
185 static u64 __read_mostly shadow_base_present_pte;
186 static u64 __read_mostly shadow_nx_mask;
187 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
188 static u64 __read_mostly shadow_user_mask;
189 static u64 __read_mostly shadow_accessed_mask;
190 static u64 __read_mostly shadow_dirty_mask;
192 static inline u64 rsvd_bits(int s, int e)
194 return ((1ULL << (e - s + 1)) - 1) << s;
197 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
199 shadow_trap_nonpresent_pte = trap_pte;
200 shadow_notrap_nonpresent_pte = notrap_pte;
202 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
204 void kvm_mmu_set_base_ptes(u64 base_pte)
206 shadow_base_present_pte = base_pte;
208 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
210 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
211 u64 dirty_mask, u64 nx_mask, u64 x_mask)
213 shadow_user_mask = user_mask;
214 shadow_accessed_mask = accessed_mask;
215 shadow_dirty_mask = dirty_mask;
216 shadow_nx_mask = nx_mask;
217 shadow_x_mask = x_mask;
219 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
221 static bool is_write_protection(struct kvm_vcpu *vcpu)
223 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
226 static int is_cpuid_PSE36(void)
231 static int is_nx(struct kvm_vcpu *vcpu)
233 return vcpu->arch.efer & EFER_NX;
236 static int is_shadow_present_pte(u64 pte)
238 return pte != shadow_trap_nonpresent_pte
239 && pte != shadow_notrap_nonpresent_pte;
242 static int is_large_pte(u64 pte)
244 return pte & PT_PAGE_SIZE_MASK;
247 static int is_writable_pte(unsigned long pte)
249 return pte & PT_WRITABLE_MASK;
252 static int is_dirty_gpte(unsigned long pte)
254 return pte & PT_DIRTY_MASK;
257 static int is_rmap_spte(u64 pte)
259 return is_shadow_present_pte(pte);
262 static int is_last_spte(u64 pte, int level)
264 if (level == PT_PAGE_TABLE_LEVEL)
266 if (is_large_pte(pte))
271 static pfn_t spte_to_pfn(u64 pte)
273 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
276 static gfn_t pse36_gfn_delta(u32 gpte)
278 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
280 return (gpte & PT32_DIR_PSE36_MASK) << shift;
283 static void __set_spte(u64 *sptep, u64 spte)
286 set_64bit((unsigned long *)sptep, spte);
288 set_64bit((unsigned long long *)sptep, spte);
292 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
293 struct kmem_cache *base_cache, int min)
297 if (cache->nobjs >= min)
299 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
300 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
303 cache->objects[cache->nobjs++] = obj;
308 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
311 kfree(mc->objects[--mc->nobjs]);
314 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
319 if (cache->nobjs >= min)
321 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
322 page = alloc_page(GFP_KERNEL);
325 cache->objects[cache->nobjs++] = page_address(page);
330 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
333 free_page((unsigned long)mc->objects[--mc->nobjs]);
336 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
340 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
344 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
348 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
351 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
352 mmu_page_header_cache, 4);
357 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
359 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
360 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
361 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
362 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
365 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
371 p = mc->objects[--mc->nobjs];
375 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
377 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
378 sizeof(struct kvm_pte_chain));
381 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
386 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
388 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
389 sizeof(struct kvm_rmap_desc));
392 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
398 * Return the pointer to the largepage write count for a given
399 * gfn, handling slots that are not large page aligned.
401 static int *slot_largepage_idx(gfn_t gfn,
402 struct kvm_memory_slot *slot,
407 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
408 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
409 return &slot->lpage_info[level - 2][idx].write_count;
412 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
414 struct kvm_memory_slot *slot;
418 gfn = unalias_gfn(kvm, gfn);
420 slot = gfn_to_memslot_unaliased(kvm, gfn);
421 for (i = PT_DIRECTORY_LEVEL;
422 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
423 write_count = slot_largepage_idx(gfn, slot, i);
428 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
430 struct kvm_memory_slot *slot;
434 gfn = unalias_gfn(kvm, gfn);
435 slot = gfn_to_memslot_unaliased(kvm, gfn);
436 for (i = PT_DIRECTORY_LEVEL;
437 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
438 write_count = slot_largepage_idx(gfn, slot, i);
440 WARN_ON(*write_count < 0);
444 static int has_wrprotected_page(struct kvm *kvm,
448 struct kvm_memory_slot *slot;
451 gfn = unalias_gfn(kvm, gfn);
452 slot = gfn_to_memslot_unaliased(kvm, gfn);
454 largepage_idx = slot_largepage_idx(gfn, slot, level);
455 return *largepage_idx;
461 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
463 unsigned long page_size;
466 page_size = kvm_host_page_size(kvm, gfn);
468 for (i = PT_PAGE_TABLE_LEVEL;
469 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
470 if (page_size >= KVM_HPAGE_SIZE(i))
479 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
481 struct kvm_memory_slot *slot;
482 int host_level, level, max_level;
484 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
485 if (slot && slot->dirty_bitmap)
486 return PT_PAGE_TABLE_LEVEL;
488 host_level = host_mapping_level(vcpu->kvm, large_gfn);
490 if (host_level == PT_PAGE_TABLE_LEVEL)
493 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
494 kvm_x86_ops->get_lpage_level() : host_level;
496 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
497 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
504 * Take gfn and return the reverse mapping to it.
505 * Note: gfn must be unaliased before this function get called
508 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
510 struct kvm_memory_slot *slot;
513 slot = gfn_to_memslot(kvm, gfn);
514 if (likely(level == PT_PAGE_TABLE_LEVEL))
515 return &slot->rmap[gfn - slot->base_gfn];
517 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
518 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
520 return &slot->lpage_info[level - 2][idx].rmap_pde;
524 * Reverse mapping data structures:
526 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
527 * that points to page_address(page).
529 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
530 * containing more mappings.
532 * Returns the number of rmap entries before the spte was added or zero if
533 * the spte was not added.
536 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
538 struct kvm_mmu_page *sp;
539 struct kvm_rmap_desc *desc;
540 unsigned long *rmapp;
543 if (!is_rmap_spte(*spte))
545 gfn = unalias_gfn(vcpu->kvm, gfn);
546 sp = page_header(__pa(spte));
547 sp->gfns[spte - sp->spt] = gfn;
548 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
550 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
551 *rmapp = (unsigned long)spte;
552 } else if (!(*rmapp & 1)) {
553 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
554 desc = mmu_alloc_rmap_desc(vcpu);
555 desc->sptes[0] = (u64 *)*rmapp;
556 desc->sptes[1] = spte;
557 *rmapp = (unsigned long)desc | 1;
559 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
560 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
561 while (desc->sptes[RMAP_EXT-1] && desc->more) {
565 if (desc->sptes[RMAP_EXT-1]) {
566 desc->more = mmu_alloc_rmap_desc(vcpu);
569 for (i = 0; desc->sptes[i]; ++i)
571 desc->sptes[i] = spte;
576 static void rmap_desc_remove_entry(unsigned long *rmapp,
577 struct kvm_rmap_desc *desc,
579 struct kvm_rmap_desc *prev_desc)
583 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
585 desc->sptes[i] = desc->sptes[j];
586 desc->sptes[j] = NULL;
589 if (!prev_desc && !desc->more)
590 *rmapp = (unsigned long)desc->sptes[0];
593 prev_desc->more = desc->more;
595 *rmapp = (unsigned long)desc->more | 1;
596 mmu_free_rmap_desc(desc);
599 static void rmap_remove(struct kvm *kvm, u64 *spte)
601 struct kvm_rmap_desc *desc;
602 struct kvm_rmap_desc *prev_desc;
603 struct kvm_mmu_page *sp;
605 unsigned long *rmapp;
608 if (!is_rmap_spte(*spte))
610 sp = page_header(__pa(spte));
611 pfn = spte_to_pfn(*spte);
612 if (*spte & shadow_accessed_mask)
613 kvm_set_pfn_accessed(pfn);
614 if (is_writable_pte(*spte))
615 kvm_set_pfn_dirty(pfn);
616 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
618 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
620 } else if (!(*rmapp & 1)) {
621 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
622 if ((u64 *)*rmapp != spte) {
623 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
629 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
630 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
633 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
634 if (desc->sptes[i] == spte) {
635 rmap_desc_remove_entry(rmapp,
643 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
648 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
650 struct kvm_rmap_desc *desc;
656 else if (!(*rmapp & 1)) {
658 return (u64 *)*rmapp;
661 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
664 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
665 if (prev_spte == spte)
666 return desc->sptes[i];
667 prev_spte = desc->sptes[i];
674 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
676 unsigned long *rmapp;
678 int i, write_protected = 0;
680 gfn = unalias_gfn(kvm, gfn);
681 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
683 spte = rmap_next(kvm, rmapp, NULL);
686 BUG_ON(!(*spte & PT_PRESENT_MASK));
687 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
688 if (is_writable_pte(*spte)) {
689 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
692 spte = rmap_next(kvm, rmapp, spte);
694 if (write_protected) {
697 spte = rmap_next(kvm, rmapp, NULL);
698 pfn = spte_to_pfn(*spte);
699 kvm_set_pfn_dirty(pfn);
702 /* check for huge page mappings */
703 for (i = PT_DIRECTORY_LEVEL;
704 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
705 rmapp = gfn_to_rmap(kvm, gfn, i);
706 spte = rmap_next(kvm, rmapp, NULL);
709 BUG_ON(!(*spte & PT_PRESENT_MASK));
710 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
711 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
712 if (is_writable_pte(*spte)) {
713 rmap_remove(kvm, spte);
715 __set_spte(spte, shadow_trap_nonpresent_pte);
719 spte = rmap_next(kvm, rmapp, spte);
723 return write_protected;
726 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
730 int need_tlb_flush = 0;
732 while ((spte = rmap_next(kvm, rmapp, NULL))) {
733 BUG_ON(!(*spte & PT_PRESENT_MASK));
734 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
735 rmap_remove(kvm, spte);
736 __set_spte(spte, shadow_trap_nonpresent_pte);
739 return need_tlb_flush;
742 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
747 pte_t *ptep = (pte_t *)data;
750 WARN_ON(pte_huge(*ptep));
751 new_pfn = pte_pfn(*ptep);
752 spte = rmap_next(kvm, rmapp, NULL);
754 BUG_ON(!is_shadow_present_pte(*spte));
755 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
757 if (pte_write(*ptep)) {
758 rmap_remove(kvm, spte);
759 __set_spte(spte, shadow_trap_nonpresent_pte);
760 spte = rmap_next(kvm, rmapp, NULL);
762 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
763 new_spte |= (u64)new_pfn << PAGE_SHIFT;
765 new_spte &= ~PT_WRITABLE_MASK;
766 new_spte &= ~SPTE_HOST_WRITEABLE;
767 if (is_writable_pte(*spte))
768 kvm_set_pfn_dirty(spte_to_pfn(*spte));
769 __set_spte(spte, new_spte);
770 spte = rmap_next(kvm, rmapp, spte);
774 kvm_flush_remote_tlbs(kvm);
779 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
781 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
787 struct kvm_memslots *slots;
789 slots = kvm_memslots(kvm);
791 for (i = 0; i < slots->nmemslots; i++) {
792 struct kvm_memory_slot *memslot = &slots->memslots[i];
793 unsigned long start = memslot->userspace_addr;
796 end = start + (memslot->npages << PAGE_SHIFT);
797 if (hva >= start && hva < end) {
798 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
800 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
802 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
803 int idx = gfn_offset;
804 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
806 &memslot->lpage_info[j][idx].rmap_pde,
809 trace_kvm_age_page(hva, memslot, ret);
817 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
819 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
822 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
824 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
827 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
834 * Emulate the accessed bit for EPT, by checking if this page has
835 * an EPT mapping, and clearing it if it does. On the next access,
836 * a new EPT mapping will be established.
837 * This has some overhead, but not as much as the cost of swapping
838 * out actively used pages or breaking up actively used hugepages.
840 if (!shadow_accessed_mask)
841 return kvm_unmap_rmapp(kvm, rmapp, data);
843 spte = rmap_next(kvm, rmapp, NULL);
847 BUG_ON(!(_spte & PT_PRESENT_MASK));
848 _young = _spte & PT_ACCESSED_MASK;
851 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
853 spte = rmap_next(kvm, rmapp, spte);
858 #define RMAP_RECYCLE_THRESHOLD 1000
860 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
862 unsigned long *rmapp;
863 struct kvm_mmu_page *sp;
865 sp = page_header(__pa(spte));
867 gfn = unalias_gfn(vcpu->kvm, gfn);
868 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
870 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
871 kvm_flush_remote_tlbs(vcpu->kvm);
874 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
876 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
880 static int is_empty_shadow_page(u64 *spt)
885 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
886 if (is_shadow_present_pte(*pos)) {
887 printk(KERN_ERR "%s: %p %llx\n", __func__,
895 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
897 ASSERT(is_empty_shadow_page(sp->spt));
899 __free_page(virt_to_page(sp->spt));
900 __free_page(virt_to_page(sp->gfns));
902 ++kvm->arch.n_free_mmu_pages;
905 static unsigned kvm_page_table_hashfn(gfn_t gfn)
907 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
910 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
913 struct kvm_mmu_page *sp;
915 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
916 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
917 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
918 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
919 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
920 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
922 sp->parent_pte = parent_pte;
923 --vcpu->kvm->arch.n_free_mmu_pages;
927 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
928 struct kvm_mmu_page *sp, u64 *parent_pte)
930 struct kvm_pte_chain *pte_chain;
931 struct hlist_node *node;
936 if (!sp->multimapped) {
937 u64 *old = sp->parent_pte;
940 sp->parent_pte = parent_pte;
944 pte_chain = mmu_alloc_pte_chain(vcpu);
945 INIT_HLIST_HEAD(&sp->parent_ptes);
946 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
947 pte_chain->parent_ptes[0] = old;
949 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
950 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
952 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
953 if (!pte_chain->parent_ptes[i]) {
954 pte_chain->parent_ptes[i] = parent_pte;
958 pte_chain = mmu_alloc_pte_chain(vcpu);
960 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
961 pte_chain->parent_ptes[0] = parent_pte;
964 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
967 struct kvm_pte_chain *pte_chain;
968 struct hlist_node *node;
971 if (!sp->multimapped) {
972 BUG_ON(sp->parent_pte != parent_pte);
973 sp->parent_pte = NULL;
976 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
977 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
978 if (!pte_chain->parent_ptes[i])
980 if (pte_chain->parent_ptes[i] != parent_pte)
982 while (i + 1 < NR_PTE_CHAIN_ENTRIES
983 && pte_chain->parent_ptes[i + 1]) {
984 pte_chain->parent_ptes[i]
985 = pte_chain->parent_ptes[i + 1];
988 pte_chain->parent_ptes[i] = NULL;
990 hlist_del(&pte_chain->link);
991 mmu_free_pte_chain(pte_chain);
992 if (hlist_empty(&sp->parent_ptes)) {
994 sp->parent_pte = NULL;
1003 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1005 struct kvm_pte_chain *pte_chain;
1006 struct hlist_node *node;
1007 struct kvm_mmu_page *parent_sp;
1010 if (!sp->multimapped && sp->parent_pte) {
1011 parent_sp = page_header(__pa(sp->parent_pte));
1013 mmu_parent_walk(parent_sp, fn);
1016 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1017 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1018 if (!pte_chain->parent_ptes[i])
1020 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1022 mmu_parent_walk(parent_sp, fn);
1026 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1029 struct kvm_mmu_page *sp = page_header(__pa(spte));
1031 index = spte - sp->spt;
1032 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1033 sp->unsync_children++;
1034 WARN_ON(!sp->unsync_children);
1037 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1039 struct kvm_pte_chain *pte_chain;
1040 struct hlist_node *node;
1043 if (!sp->parent_pte)
1046 if (!sp->multimapped) {
1047 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1051 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1052 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1053 if (!pte_chain->parent_ptes[i])
1055 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1059 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1061 kvm_mmu_update_parents_unsync(sp);
1065 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1067 mmu_parent_walk(sp, unsync_walk_fn);
1068 kvm_mmu_update_parents_unsync(sp);
1071 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1072 struct kvm_mmu_page *sp)
1076 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1077 sp->spt[i] = shadow_trap_nonpresent_pte;
1080 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1081 struct kvm_mmu_page *sp)
1086 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1090 #define KVM_PAGE_ARRAY_NR 16
1092 struct kvm_mmu_pages {
1093 struct mmu_page_and_offset {
1094 struct kvm_mmu_page *sp;
1096 } page[KVM_PAGE_ARRAY_NR];
1100 #define for_each_unsync_children(bitmap, idx) \
1101 for (idx = find_first_bit(bitmap, 512); \
1103 idx = find_next_bit(bitmap, 512, idx+1))
1105 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1111 for (i=0; i < pvec->nr; i++)
1112 if (pvec->page[i].sp == sp)
1115 pvec->page[pvec->nr].sp = sp;
1116 pvec->page[pvec->nr].idx = idx;
1118 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1121 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1122 struct kvm_mmu_pages *pvec)
1124 int i, ret, nr_unsync_leaf = 0;
1126 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1127 u64 ent = sp->spt[i];
1129 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1130 struct kvm_mmu_page *child;
1131 child = page_header(ent & PT64_BASE_ADDR_MASK);
1133 if (child->unsync_children) {
1134 if (mmu_pages_add(pvec, child, i))
1137 ret = __mmu_unsync_walk(child, pvec);
1139 __clear_bit(i, sp->unsync_child_bitmap);
1141 nr_unsync_leaf += ret;
1146 if (child->unsync) {
1148 if (mmu_pages_add(pvec, child, i))
1154 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1155 sp->unsync_children = 0;
1157 return nr_unsync_leaf;
1160 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1161 struct kvm_mmu_pages *pvec)
1163 if (!sp->unsync_children)
1166 mmu_pages_add(pvec, sp, 0);
1167 return __mmu_unsync_walk(sp, pvec);
1170 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1173 struct hlist_head *bucket;
1174 struct kvm_mmu_page *sp;
1175 struct hlist_node *node;
1177 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1178 index = kvm_page_table_hashfn(gfn);
1179 bucket = &kvm->arch.mmu_page_hash[index];
1180 hlist_for_each_entry(sp, node, bucket, hash_link)
1181 if (sp->gfn == gfn && !sp->role.direct
1182 && !sp->role.invalid) {
1183 pgprintk("%s: found role %x\n",
1184 __func__, sp->role.word);
1190 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1192 WARN_ON(!sp->unsync);
1193 trace_kvm_mmu_sync_page(sp);
1195 --kvm->stat.mmu_unsync;
1198 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1200 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1202 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1203 kvm_mmu_zap_page(vcpu->kvm, sp);
1207 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1208 kvm_flush_remote_tlbs(vcpu->kvm);
1209 kvm_unlink_unsync_page(vcpu->kvm, sp);
1210 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1211 kvm_mmu_zap_page(vcpu->kvm, sp);
1215 kvm_mmu_flush_tlb(vcpu);
1219 struct mmu_page_path {
1220 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1221 unsigned int idx[PT64_ROOT_LEVEL-1];
1224 #define for_each_sp(pvec, sp, parents, i) \
1225 for (i = mmu_pages_next(&pvec, &parents, -1), \
1226 sp = pvec.page[i].sp; \
1227 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1228 i = mmu_pages_next(&pvec, &parents, i))
1230 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1231 struct mmu_page_path *parents,
1236 for (n = i+1; n < pvec->nr; n++) {
1237 struct kvm_mmu_page *sp = pvec->page[n].sp;
1239 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1240 parents->idx[0] = pvec->page[n].idx;
1244 parents->parent[sp->role.level-2] = sp;
1245 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1251 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1253 struct kvm_mmu_page *sp;
1254 unsigned int level = 0;
1257 unsigned int idx = parents->idx[level];
1259 sp = parents->parent[level];
1263 --sp->unsync_children;
1264 WARN_ON((int)sp->unsync_children < 0);
1265 __clear_bit(idx, sp->unsync_child_bitmap);
1267 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1270 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1271 struct mmu_page_path *parents,
1272 struct kvm_mmu_pages *pvec)
1274 parents->parent[parent->role.level-1] = NULL;
1278 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1279 struct kvm_mmu_page *parent)
1282 struct kvm_mmu_page *sp;
1283 struct mmu_page_path parents;
1284 struct kvm_mmu_pages pages;
1286 kvm_mmu_pages_init(parent, &parents, &pages);
1287 while (mmu_unsync_walk(parent, &pages)) {
1290 for_each_sp(pages, sp, parents, i)
1291 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1294 kvm_flush_remote_tlbs(vcpu->kvm);
1296 for_each_sp(pages, sp, parents, i) {
1297 kvm_sync_page(vcpu, sp);
1298 mmu_pages_clear_parents(&parents);
1300 cond_resched_lock(&vcpu->kvm->mmu_lock);
1301 kvm_mmu_pages_init(parent, &parents, &pages);
1305 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1313 union kvm_mmu_page_role role;
1316 struct hlist_head *bucket;
1317 struct kvm_mmu_page *sp;
1318 struct hlist_node *node, *tmp;
1320 role = vcpu->arch.mmu.base_role;
1322 role.direct = direct;
1325 role.access = access;
1326 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1327 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1328 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1329 role.quadrant = quadrant;
1331 index = kvm_page_table_hashfn(gfn);
1332 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1333 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1334 if (sp->gfn == gfn) {
1336 if (kvm_sync_page(vcpu, sp))
1339 if (sp->role.word != role.word)
1342 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1343 if (sp->unsync_children) {
1344 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1345 kvm_mmu_mark_parents_unsync(sp);
1347 trace_kvm_mmu_get_page(sp, false);
1350 ++vcpu->kvm->stat.mmu_cache_miss;
1351 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1356 hlist_add_head(&sp->hash_link, bucket);
1358 if (rmap_write_protect(vcpu->kvm, gfn))
1359 kvm_flush_remote_tlbs(vcpu->kvm);
1360 account_shadowed(vcpu->kvm, gfn);
1362 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1363 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1365 nonpaging_prefetch_page(vcpu, sp);
1366 trace_kvm_mmu_get_page(sp, true);
1370 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1371 struct kvm_vcpu *vcpu, u64 addr)
1373 iterator->addr = addr;
1374 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1375 iterator->level = vcpu->arch.mmu.shadow_root_level;
1376 if (iterator->level == PT32E_ROOT_LEVEL) {
1377 iterator->shadow_addr
1378 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1379 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1381 if (!iterator->shadow_addr)
1382 iterator->level = 0;
1386 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1388 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1391 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1392 if (is_large_pte(*iterator->sptep))
1395 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1396 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1400 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1402 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1406 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1407 struct kvm_mmu_page *sp)
1415 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1418 if (is_shadow_present_pte(ent)) {
1419 if (!is_last_spte(ent, sp->role.level)) {
1420 ent &= PT64_BASE_ADDR_MASK;
1421 mmu_page_remove_parent_pte(page_header(ent),
1424 if (is_large_pte(ent))
1426 rmap_remove(kvm, &pt[i]);
1429 pt[i] = shadow_trap_nonpresent_pte;
1433 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1435 mmu_page_remove_parent_pte(sp, parent_pte);
1438 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1441 struct kvm_vcpu *vcpu;
1443 kvm_for_each_vcpu(i, vcpu, kvm)
1444 vcpu->arch.last_pte_updated = NULL;
1447 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1451 while (sp->multimapped || sp->parent_pte) {
1452 if (!sp->multimapped)
1453 parent_pte = sp->parent_pte;
1455 struct kvm_pte_chain *chain;
1457 chain = container_of(sp->parent_ptes.first,
1458 struct kvm_pte_chain, link);
1459 parent_pte = chain->parent_ptes[0];
1461 BUG_ON(!parent_pte);
1462 kvm_mmu_put_page(sp, parent_pte);
1463 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1467 static int mmu_zap_unsync_children(struct kvm *kvm,
1468 struct kvm_mmu_page *parent)
1471 struct mmu_page_path parents;
1472 struct kvm_mmu_pages pages;
1474 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1477 kvm_mmu_pages_init(parent, &parents, &pages);
1478 while (mmu_unsync_walk(parent, &pages)) {
1479 struct kvm_mmu_page *sp;
1481 for_each_sp(pages, sp, parents, i) {
1482 kvm_mmu_zap_page(kvm, sp);
1483 mmu_pages_clear_parents(&parents);
1486 kvm_mmu_pages_init(parent, &parents, &pages);
1492 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1496 trace_kvm_mmu_zap_page(sp);
1497 ++kvm->stat.mmu_shadow_zapped;
1498 ret = mmu_zap_unsync_children(kvm, sp);
1499 kvm_mmu_page_unlink_children(kvm, sp);
1500 kvm_mmu_unlink_parents(kvm, sp);
1501 kvm_flush_remote_tlbs(kvm);
1502 if (!sp->role.invalid && !sp->role.direct)
1503 unaccount_shadowed(kvm, sp->gfn);
1505 kvm_unlink_unsync_page(kvm, sp);
1506 if (!sp->root_count) {
1509 hlist_del(&sp->hash_link);
1510 kvm_mmu_free_page(kvm, sp);
1512 sp->role.invalid = 1;
1513 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1514 kvm_reload_remote_mmus(kvm);
1516 kvm_mmu_reset_last_pte_updated(kvm);
1521 * Changing the number of mmu pages allocated to the vm
1522 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1524 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1528 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1529 used_pages = max(0, used_pages);
1532 * If we set the number of mmu pages to be smaller be than the
1533 * number of actived pages , we must to free some mmu pages before we
1537 if (used_pages > kvm_nr_mmu_pages) {
1538 while (used_pages > kvm_nr_mmu_pages &&
1539 !list_empty(&kvm->arch.active_mmu_pages)) {
1540 struct kvm_mmu_page *page;
1542 page = container_of(kvm->arch.active_mmu_pages.prev,
1543 struct kvm_mmu_page, link);
1544 used_pages -= kvm_mmu_zap_page(kvm, page);
1546 kvm_nr_mmu_pages = used_pages;
1547 kvm->arch.n_free_mmu_pages = 0;
1550 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1551 - kvm->arch.n_alloc_mmu_pages;
1553 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1556 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1559 struct hlist_head *bucket;
1560 struct kvm_mmu_page *sp;
1561 struct hlist_node *node, *n;
1564 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1566 index = kvm_page_table_hashfn(gfn);
1567 bucket = &kvm->arch.mmu_page_hash[index];
1569 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1570 if (sp->gfn == gfn && !sp->role.direct) {
1571 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1574 if (kvm_mmu_zap_page(kvm, sp))
1580 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1583 struct hlist_head *bucket;
1584 struct kvm_mmu_page *sp;
1585 struct hlist_node *node, *nn;
1587 index = kvm_page_table_hashfn(gfn);
1588 bucket = &kvm->arch.mmu_page_hash[index];
1590 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1591 if (sp->gfn == gfn && !sp->role.direct
1592 && !sp->role.invalid) {
1593 pgprintk("%s: zap %lx %x\n",
1594 __func__, gfn, sp->role.word);
1595 if (kvm_mmu_zap_page(kvm, sp))
1601 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1603 int slot = memslot_id(kvm, gfn);
1604 struct kvm_mmu_page *sp = page_header(__pa(pte));
1606 __set_bit(slot, sp->slot_bitmap);
1609 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1614 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1617 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1618 if (pt[i] == shadow_notrap_nonpresent_pte)
1619 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1624 * The function is based on mtrr_type_lookup() in
1625 * arch/x86/kernel/cpu/mtrr/generic.c
1627 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1632 u8 prev_match, curr_match;
1633 int num_var_ranges = KVM_NR_VAR_MTRR;
1635 if (!mtrr_state->enabled)
1638 /* Make end inclusive end, instead of exclusive */
1641 /* Look in fixed ranges. Just return the type as per start */
1642 if (mtrr_state->have_fixed && (start < 0x100000)) {
1645 if (start < 0x80000) {
1647 idx += (start >> 16);
1648 return mtrr_state->fixed_ranges[idx];
1649 } else if (start < 0xC0000) {
1651 idx += ((start - 0x80000) >> 14);
1652 return mtrr_state->fixed_ranges[idx];
1653 } else if (start < 0x1000000) {
1655 idx += ((start - 0xC0000) >> 12);
1656 return mtrr_state->fixed_ranges[idx];
1661 * Look in variable ranges
1662 * Look of multiple ranges matching this address and pick type
1663 * as per MTRR precedence
1665 if (!(mtrr_state->enabled & 2))
1666 return mtrr_state->def_type;
1669 for (i = 0; i < num_var_ranges; ++i) {
1670 unsigned short start_state, end_state;
1672 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1675 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1676 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1677 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1678 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1680 start_state = ((start & mask) == (base & mask));
1681 end_state = ((end & mask) == (base & mask));
1682 if (start_state != end_state)
1685 if ((start & mask) != (base & mask))
1688 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1689 if (prev_match == 0xFF) {
1690 prev_match = curr_match;
1694 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1695 curr_match == MTRR_TYPE_UNCACHABLE)
1696 return MTRR_TYPE_UNCACHABLE;
1698 if ((prev_match == MTRR_TYPE_WRBACK &&
1699 curr_match == MTRR_TYPE_WRTHROUGH) ||
1700 (prev_match == MTRR_TYPE_WRTHROUGH &&
1701 curr_match == MTRR_TYPE_WRBACK)) {
1702 prev_match = MTRR_TYPE_WRTHROUGH;
1703 curr_match = MTRR_TYPE_WRTHROUGH;
1706 if (prev_match != curr_match)
1707 return MTRR_TYPE_UNCACHABLE;
1710 if (prev_match != 0xFF)
1713 return mtrr_state->def_type;
1716 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1720 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1721 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1722 if (mtrr == 0xfe || mtrr == 0xff)
1723 mtrr = MTRR_TYPE_WRBACK;
1726 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1728 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1731 struct hlist_head *bucket;
1732 struct kvm_mmu_page *s;
1733 struct hlist_node *node, *n;
1735 index = kvm_page_table_hashfn(sp->gfn);
1736 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1737 /* don't unsync if pagetable is shadowed with multiple roles */
1738 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1739 if (s->gfn != sp->gfn || s->role.direct)
1741 if (s->role.word != sp->role.word)
1744 trace_kvm_mmu_unsync_page(sp);
1745 ++vcpu->kvm->stat.mmu_unsync;
1748 kvm_mmu_mark_parents_unsync(sp);
1750 mmu_convert_notrap(sp);
1754 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1757 struct kvm_mmu_page *shadow;
1759 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1761 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1765 if (can_unsync && oos_shadow)
1766 return kvm_unsync_page(vcpu, shadow);
1772 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1773 unsigned pte_access, int user_fault,
1774 int write_fault, int dirty, int level,
1775 gfn_t gfn, pfn_t pfn, bool speculative,
1776 bool can_unsync, bool reset_host_protection)
1782 * We don't set the accessed bit, since we sometimes want to see
1783 * whether the guest actually used the pte (in order to detect
1786 spte = shadow_base_present_pte | shadow_dirty_mask;
1788 spte |= shadow_accessed_mask;
1790 pte_access &= ~ACC_WRITE_MASK;
1791 if (pte_access & ACC_EXEC_MASK)
1792 spte |= shadow_x_mask;
1794 spte |= shadow_nx_mask;
1795 if (pte_access & ACC_USER_MASK)
1796 spte |= shadow_user_mask;
1797 if (level > PT_PAGE_TABLE_LEVEL)
1798 spte |= PT_PAGE_SIZE_MASK;
1800 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1801 kvm_is_mmio_pfn(pfn));
1803 if (reset_host_protection)
1804 spte |= SPTE_HOST_WRITEABLE;
1806 spte |= (u64)pfn << PAGE_SHIFT;
1808 if ((pte_access & ACC_WRITE_MASK)
1809 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1811 if (level > PT_PAGE_TABLE_LEVEL &&
1812 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1814 spte = shadow_trap_nonpresent_pte;
1818 spte |= PT_WRITABLE_MASK;
1820 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1821 spte &= ~PT_USER_MASK;
1824 * Optimization: for pte sync, if spte was writable the hash
1825 * lookup is unnecessary (and expensive). Write protection
1826 * is responsibility of mmu_get_page / kvm_sync_page.
1827 * Same reasoning can be applied to dirty page accounting.
1829 if (!can_unsync && is_writable_pte(*sptep))
1832 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1833 pgprintk("%s: found shadow page for %lx, marking ro\n",
1836 pte_access &= ~ACC_WRITE_MASK;
1837 if (is_writable_pte(spte))
1838 spte &= ~PT_WRITABLE_MASK;
1842 if (pte_access & ACC_WRITE_MASK)
1843 mark_page_dirty(vcpu->kvm, gfn);
1846 __set_spte(sptep, spte);
1850 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1851 unsigned pt_access, unsigned pte_access,
1852 int user_fault, int write_fault, int dirty,
1853 int *ptwrite, int level, gfn_t gfn,
1854 pfn_t pfn, bool speculative,
1855 bool reset_host_protection)
1857 int was_rmapped = 0;
1858 int was_writable = is_writable_pte(*sptep);
1861 pgprintk("%s: spte %llx access %x write_fault %d"
1862 " user_fault %d gfn %lx\n",
1863 __func__, *sptep, pt_access,
1864 write_fault, user_fault, gfn);
1866 if (is_rmap_spte(*sptep)) {
1868 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1869 * the parent of the now unreachable PTE.
1871 if (level > PT_PAGE_TABLE_LEVEL &&
1872 !is_large_pte(*sptep)) {
1873 struct kvm_mmu_page *child;
1876 child = page_header(pte & PT64_BASE_ADDR_MASK);
1877 mmu_page_remove_parent_pte(child, sptep);
1878 __set_spte(sptep, shadow_trap_nonpresent_pte);
1879 kvm_flush_remote_tlbs(vcpu->kvm);
1880 } else if (pfn != spte_to_pfn(*sptep)) {
1881 pgprintk("hfn old %lx new %lx\n",
1882 spte_to_pfn(*sptep), pfn);
1883 rmap_remove(vcpu->kvm, sptep);
1884 __set_spte(sptep, shadow_trap_nonpresent_pte);
1885 kvm_flush_remote_tlbs(vcpu->kvm);
1890 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1891 dirty, level, gfn, pfn, speculative, true,
1892 reset_host_protection)) {
1895 kvm_x86_ops->tlb_flush(vcpu);
1898 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1899 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1900 is_large_pte(*sptep)? "2MB" : "4kB",
1901 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1903 if (!was_rmapped && is_large_pte(*sptep))
1904 ++vcpu->kvm->stat.lpages;
1906 page_header_update_slot(vcpu->kvm, sptep, gfn);
1908 rmap_count = rmap_add(vcpu, sptep, gfn);
1909 kvm_release_pfn_clean(pfn);
1910 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1911 rmap_recycle(vcpu, sptep, gfn);
1914 kvm_release_pfn_dirty(pfn);
1916 kvm_release_pfn_clean(pfn);
1919 vcpu->arch.last_pte_updated = sptep;
1920 vcpu->arch.last_pte_gfn = gfn;
1924 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1928 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1929 int level, gfn_t gfn, pfn_t pfn)
1931 struct kvm_shadow_walk_iterator iterator;
1932 struct kvm_mmu_page *sp;
1936 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1937 if (iterator.level == level) {
1938 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1939 0, write, 1, &pt_write,
1940 level, gfn, pfn, false, true);
1941 ++vcpu->stat.pf_fixed;
1945 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1946 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1947 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1949 1, ACC_ALL, iterator.sptep);
1951 pgprintk("nonpaging_map: ENOMEM\n");
1952 kvm_release_pfn_clean(pfn);
1956 __set_spte(iterator.sptep,
1958 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1959 | shadow_user_mask | shadow_x_mask);
1965 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
1971 /* Touch the page, so send SIGBUS */
1972 hva = (void __user *)gfn_to_hva(kvm, gfn);
1973 r = copy_from_user(buf, hva, 1);
1976 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
1978 kvm_release_pfn_clean(pfn);
1979 if (is_hwpoison_pfn(pfn)) {
1980 kvm_send_hwpoison_signal(kvm, gfn);
1986 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1991 unsigned long mmu_seq;
1993 level = mapping_level(vcpu, gfn);
1996 * This path builds a PAE pagetable - so we can map 2mb pages at
1997 * maximum. Therefore check if the level is larger than that.
1999 if (level > PT_DIRECTORY_LEVEL)
2000 level = PT_DIRECTORY_LEVEL;
2002 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2004 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2006 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2009 if (is_error_pfn(pfn))
2010 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2012 spin_lock(&vcpu->kvm->mmu_lock);
2013 if (mmu_notifier_retry(vcpu, mmu_seq))
2015 kvm_mmu_free_some_pages(vcpu);
2016 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2017 spin_unlock(&vcpu->kvm->mmu_lock);
2023 spin_unlock(&vcpu->kvm->mmu_lock);
2024 kvm_release_pfn_clean(pfn);
2029 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2032 struct kvm_mmu_page *sp;
2034 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2036 spin_lock(&vcpu->kvm->mmu_lock);
2037 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2038 hpa_t root = vcpu->arch.mmu.root_hpa;
2040 sp = page_header(root);
2042 if (!sp->root_count && sp->role.invalid)
2043 kvm_mmu_zap_page(vcpu->kvm, sp);
2044 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2045 spin_unlock(&vcpu->kvm->mmu_lock);
2048 for (i = 0; i < 4; ++i) {
2049 hpa_t root = vcpu->arch.mmu.pae_root[i];
2052 root &= PT64_BASE_ADDR_MASK;
2053 sp = page_header(root);
2055 if (!sp->root_count && sp->role.invalid)
2056 kvm_mmu_zap_page(vcpu->kvm, sp);
2058 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2060 spin_unlock(&vcpu->kvm->mmu_lock);
2061 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2064 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2068 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2069 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2076 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2080 struct kvm_mmu_page *sp;
2084 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2086 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2087 hpa_t root = vcpu->arch.mmu.root_hpa;
2089 ASSERT(!VALID_PAGE(root));
2090 if (mmu_check_root(vcpu, root_gfn))
2096 spin_lock(&vcpu->kvm->mmu_lock);
2097 kvm_mmu_free_some_pages(vcpu->kvm);
2098 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2099 PT64_ROOT_LEVEL, direct,
2101 root = __pa(sp->spt);
2103 spin_unlock(&vcpu->kvm->mmu_lock);
2104 vcpu->arch.mmu.root_hpa = root;
2107 direct = !is_paging(vcpu);
2108 for (i = 0; i < 4; ++i) {
2109 hpa_t root = vcpu->arch.mmu.pae_root[i];
2111 ASSERT(!VALID_PAGE(root));
2112 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2113 pdptr = kvm_pdptr_read(vcpu, i);
2114 if (!is_present_gpte(pdptr)) {
2115 vcpu->arch.mmu.pae_root[i] = 0;
2118 root_gfn = pdptr >> PAGE_SHIFT;
2119 } else if (vcpu->arch.mmu.root_level == 0)
2121 if (mmu_check_root(vcpu, root_gfn))
2127 spin_lock(&vcpu->kvm->mmu_lock);
2128 kvm_mmu_free_some_pages(vcpu->kvm);
2129 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2130 PT32_ROOT_LEVEL, direct,
2132 root = __pa(sp->spt);
2134 spin_unlock(&vcpu->kvm->mmu_lock);
2136 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2138 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2142 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2145 struct kvm_mmu_page *sp;
2147 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2149 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2150 hpa_t root = vcpu->arch.mmu.root_hpa;
2151 sp = page_header(root);
2152 mmu_sync_children(vcpu, sp);
2155 for (i = 0; i < 4; ++i) {
2156 hpa_t root = vcpu->arch.mmu.pae_root[i];
2158 if (root && VALID_PAGE(root)) {
2159 root &= PT64_BASE_ADDR_MASK;
2160 sp = page_header(root);
2161 mmu_sync_children(vcpu, sp);
2166 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2168 spin_lock(&vcpu->kvm->mmu_lock);
2169 mmu_sync_roots(vcpu);
2170 spin_unlock(&vcpu->kvm->mmu_lock);
2173 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2174 u32 access, u32 *error)
2181 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2187 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2188 r = mmu_topup_memory_caches(vcpu);
2193 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2195 gfn = gva >> PAGE_SHIFT;
2197 return nonpaging_map(vcpu, gva & PAGE_MASK,
2198 error_code & PFERR_WRITE_MASK, gfn);
2201 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2207 gfn_t gfn = gpa >> PAGE_SHIFT;
2208 unsigned long mmu_seq;
2211 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2213 r = mmu_topup_memory_caches(vcpu);
2217 level = mapping_level(vcpu, gfn);
2219 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2221 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2223 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2224 if (is_error_pfn(pfn))
2225 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2226 spin_lock(&vcpu->kvm->mmu_lock);
2227 if (mmu_notifier_retry(vcpu, mmu_seq))
2229 kvm_mmu_free_some_pages(vcpu);
2230 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2232 spin_unlock(&vcpu->kvm->mmu_lock);
2237 spin_unlock(&vcpu->kvm->mmu_lock);
2238 kvm_release_pfn_clean(pfn);
2242 static void nonpaging_free(struct kvm_vcpu *vcpu)
2244 mmu_free_roots(vcpu);
2247 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2249 struct kvm_mmu *context = &vcpu->arch.mmu;
2251 context->new_cr3 = nonpaging_new_cr3;
2252 context->page_fault = nonpaging_page_fault;
2253 context->gva_to_gpa = nonpaging_gva_to_gpa;
2254 context->free = nonpaging_free;
2255 context->prefetch_page = nonpaging_prefetch_page;
2256 context->sync_page = nonpaging_sync_page;
2257 context->invlpg = nonpaging_invlpg;
2258 context->root_level = 0;
2259 context->shadow_root_level = PT32E_ROOT_LEVEL;
2260 context->root_hpa = INVALID_PAGE;
2264 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2266 ++vcpu->stat.tlb_flush;
2267 kvm_x86_ops->tlb_flush(vcpu);
2270 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2272 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2273 mmu_free_roots(vcpu);
2276 static void inject_page_fault(struct kvm_vcpu *vcpu,
2280 kvm_inject_page_fault(vcpu, addr, err_code);
2283 static void paging_free(struct kvm_vcpu *vcpu)
2285 nonpaging_free(vcpu);
2288 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2292 bit7 = (gpte >> 7) & 1;
2293 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2297 #include "paging_tmpl.h"
2301 #include "paging_tmpl.h"
2304 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2306 struct kvm_mmu *context = &vcpu->arch.mmu;
2307 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2308 u64 exb_bit_rsvd = 0;
2311 exb_bit_rsvd = rsvd_bits(63, 63);
2313 case PT32_ROOT_LEVEL:
2314 /* no rsvd bits for 2 level 4K page table entries */
2315 context->rsvd_bits_mask[0][1] = 0;
2316 context->rsvd_bits_mask[0][0] = 0;
2317 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2319 if (!is_pse(vcpu)) {
2320 context->rsvd_bits_mask[1][1] = 0;
2324 if (is_cpuid_PSE36())
2325 /* 36bits PSE 4MB page */
2326 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2328 /* 32 bits PSE 4MB page */
2329 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2331 case PT32E_ROOT_LEVEL:
2332 context->rsvd_bits_mask[0][2] =
2333 rsvd_bits(maxphyaddr, 63) |
2334 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2335 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2336 rsvd_bits(maxphyaddr, 62); /* PDE */
2337 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2338 rsvd_bits(maxphyaddr, 62); /* PTE */
2339 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2340 rsvd_bits(maxphyaddr, 62) |
2341 rsvd_bits(13, 20); /* large page */
2342 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2344 case PT64_ROOT_LEVEL:
2345 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2346 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2347 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2348 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2349 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2350 rsvd_bits(maxphyaddr, 51);
2351 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2352 rsvd_bits(maxphyaddr, 51);
2353 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2354 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2355 rsvd_bits(maxphyaddr, 51) |
2357 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2358 rsvd_bits(maxphyaddr, 51) |
2359 rsvd_bits(13, 20); /* large page */
2360 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2365 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2367 struct kvm_mmu *context = &vcpu->arch.mmu;
2369 ASSERT(is_pae(vcpu));
2370 context->new_cr3 = paging_new_cr3;
2371 context->page_fault = paging64_page_fault;
2372 context->gva_to_gpa = paging64_gva_to_gpa;
2373 context->prefetch_page = paging64_prefetch_page;
2374 context->sync_page = paging64_sync_page;
2375 context->invlpg = paging64_invlpg;
2376 context->free = paging_free;
2377 context->root_level = level;
2378 context->shadow_root_level = level;
2379 context->root_hpa = INVALID_PAGE;
2383 static int paging64_init_context(struct kvm_vcpu *vcpu)
2385 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2386 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2389 static int paging32_init_context(struct kvm_vcpu *vcpu)
2391 struct kvm_mmu *context = &vcpu->arch.mmu;
2393 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2394 context->new_cr3 = paging_new_cr3;
2395 context->page_fault = paging32_page_fault;
2396 context->gva_to_gpa = paging32_gva_to_gpa;
2397 context->free = paging_free;
2398 context->prefetch_page = paging32_prefetch_page;
2399 context->sync_page = paging32_sync_page;
2400 context->invlpg = paging32_invlpg;
2401 context->root_level = PT32_ROOT_LEVEL;
2402 context->shadow_root_level = PT32E_ROOT_LEVEL;
2403 context->root_hpa = INVALID_PAGE;
2407 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2409 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2410 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2413 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2415 struct kvm_mmu *context = &vcpu->arch.mmu;
2417 context->new_cr3 = nonpaging_new_cr3;
2418 context->page_fault = tdp_page_fault;
2419 context->free = nonpaging_free;
2420 context->prefetch_page = nonpaging_prefetch_page;
2421 context->sync_page = nonpaging_sync_page;
2422 context->invlpg = nonpaging_invlpg;
2423 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2424 context->root_hpa = INVALID_PAGE;
2426 if (!is_paging(vcpu)) {
2427 context->gva_to_gpa = nonpaging_gva_to_gpa;
2428 context->root_level = 0;
2429 } else if (is_long_mode(vcpu)) {
2430 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2431 context->gva_to_gpa = paging64_gva_to_gpa;
2432 context->root_level = PT64_ROOT_LEVEL;
2433 } else if (is_pae(vcpu)) {
2434 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2435 context->gva_to_gpa = paging64_gva_to_gpa;
2436 context->root_level = PT32E_ROOT_LEVEL;
2438 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2439 context->gva_to_gpa = paging32_gva_to_gpa;
2440 context->root_level = PT32_ROOT_LEVEL;
2446 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2451 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2453 if (!is_paging(vcpu))
2454 r = nonpaging_init_context(vcpu);
2455 else if (is_long_mode(vcpu))
2456 r = paging64_init_context(vcpu);
2457 else if (is_pae(vcpu))
2458 r = paging32E_init_context(vcpu);
2460 r = paging32_init_context(vcpu);
2462 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2463 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2468 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2470 vcpu->arch.update_pte.pfn = bad_pfn;
2473 return init_kvm_tdp_mmu(vcpu);
2475 return init_kvm_softmmu(vcpu);
2478 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2481 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2482 vcpu->arch.mmu.free(vcpu);
2483 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2487 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2489 destroy_kvm_mmu(vcpu);
2490 return init_kvm_mmu(vcpu);
2492 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2494 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2498 r = mmu_topup_memory_caches(vcpu);
2501 r = mmu_alloc_roots(vcpu);
2502 spin_lock(&vcpu->kvm->mmu_lock);
2503 mmu_sync_roots(vcpu);
2504 spin_unlock(&vcpu->kvm->mmu_lock);
2507 /* set_cr3() should ensure TLB has been flushed */
2508 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2512 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2514 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2516 mmu_free_roots(vcpu);
2519 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2520 struct kvm_mmu_page *sp,
2524 struct kvm_mmu_page *child;
2527 if (is_shadow_present_pte(pte)) {
2528 if (is_last_spte(pte, sp->role.level))
2529 rmap_remove(vcpu->kvm, spte);
2531 child = page_header(pte & PT64_BASE_ADDR_MASK);
2532 mmu_page_remove_parent_pte(child, spte);
2535 __set_spte(spte, shadow_trap_nonpresent_pte);
2536 if (is_large_pte(pte))
2537 --vcpu->kvm->stat.lpages;
2540 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2541 struct kvm_mmu_page *sp,
2545 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2546 ++vcpu->kvm->stat.mmu_pde_zapped;
2550 ++vcpu->kvm->stat.mmu_pte_updated;
2551 if (!sp->role.cr4_pae)
2552 paging32_update_pte(vcpu, sp, spte, new);
2554 paging64_update_pte(vcpu, sp, spte, new);
2557 static bool need_remote_flush(u64 old, u64 new)
2559 if (!is_shadow_present_pte(old))
2561 if (!is_shadow_present_pte(new))
2563 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2565 old ^= PT64_NX_MASK;
2566 new ^= PT64_NX_MASK;
2567 return (old & ~new & PT64_PERM_MASK) != 0;
2570 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2572 if (need_remote_flush(old, new))
2573 kvm_flush_remote_tlbs(vcpu->kvm);
2575 kvm_mmu_flush_tlb(vcpu);
2578 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2580 u64 *spte = vcpu->arch.last_pte_updated;
2582 return !!(spte && (*spte & shadow_accessed_mask));
2585 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2591 if (!is_present_gpte(gpte))
2593 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2595 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2597 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2599 if (is_error_pfn(pfn)) {
2600 kvm_release_pfn_clean(pfn);
2603 vcpu->arch.update_pte.gfn = gfn;
2604 vcpu->arch.update_pte.pfn = pfn;
2607 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2609 u64 *spte = vcpu->arch.last_pte_updated;
2612 && vcpu->arch.last_pte_gfn == gfn
2613 && shadow_accessed_mask
2614 && !(*spte & shadow_accessed_mask)
2615 && is_shadow_present_pte(*spte))
2616 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2619 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2620 const u8 *new, int bytes,
2621 bool guest_initiated)
2623 gfn_t gfn = gpa >> PAGE_SHIFT;
2624 struct kvm_mmu_page *sp;
2625 struct hlist_node *node, *n;
2626 struct hlist_head *bucket;
2630 unsigned offset = offset_in_page(gpa);
2632 unsigned page_offset;
2633 unsigned misaligned;
2641 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2643 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2646 * Assume that the pte write on a page table of the same type
2647 * as the current vcpu paging mode. This is nearly always true
2648 * (might be false while changing modes). Note it is verified later
2651 if ((is_pae(vcpu) && bytes == 4) || !new) {
2652 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2657 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2660 new = (const u8 *)&gentry;
2665 gentry = *(const u32 *)new;
2668 gentry = *(const u64 *)new;
2675 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2676 spin_lock(&vcpu->kvm->mmu_lock);
2677 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2679 kvm_mmu_access_page(vcpu, gfn);
2680 kvm_mmu_free_some_pages(vcpu);
2681 ++vcpu->kvm->stat.mmu_pte_write;
2682 kvm_mmu_audit(vcpu, "pre pte write");
2683 if (guest_initiated) {
2684 if (gfn == vcpu->arch.last_pt_write_gfn
2685 && !last_updated_pte_accessed(vcpu)) {
2686 ++vcpu->arch.last_pt_write_count;
2687 if (vcpu->arch.last_pt_write_count >= 3)
2690 vcpu->arch.last_pt_write_gfn = gfn;
2691 vcpu->arch.last_pt_write_count = 1;
2692 vcpu->arch.last_pte_updated = NULL;
2695 index = kvm_page_table_hashfn(gfn);
2696 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2699 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2700 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2702 pte_size = sp->role.cr4_pae ? 8 : 4;
2703 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2704 misaligned |= bytes < 4;
2705 if (misaligned || flooded) {
2707 * Misaligned accesses are too much trouble to fix
2708 * up; also, they usually indicate a page is not used
2711 * If we're seeing too many writes to a page,
2712 * it may no longer be a page table, or we may be
2713 * forking, in which case it is better to unmap the
2716 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2717 gpa, bytes, sp->role.word);
2718 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2720 ++vcpu->kvm->stat.mmu_flooded;
2723 page_offset = offset;
2724 level = sp->role.level;
2726 if (!sp->role.cr4_pae) {
2727 page_offset <<= 1; /* 32->64 */
2729 * A 32-bit pde maps 4MB while the shadow pdes map
2730 * only 2MB. So we need to double the offset again
2731 * and zap two pdes instead of one.
2733 if (level == PT32_ROOT_LEVEL) {
2734 page_offset &= ~7; /* kill rounding error */
2738 quadrant = page_offset >> PAGE_SHIFT;
2739 page_offset &= ~PAGE_MASK;
2740 if (quadrant != sp->role.quadrant)
2743 spte = &sp->spt[page_offset / sizeof(*spte)];
2746 mmu_pte_write_zap_pte(vcpu, sp, spte);
2748 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2749 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2753 kvm_mmu_audit(vcpu, "post pte write");
2754 spin_unlock(&vcpu->kvm->mmu_lock);
2755 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2756 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2757 vcpu->arch.update_pte.pfn = bad_pfn;
2761 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2769 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2771 spin_lock(&vcpu->kvm->mmu_lock);
2772 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2773 spin_unlock(&vcpu->kvm->mmu_lock);
2776 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2778 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2780 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2781 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2782 struct kvm_mmu_page *sp;
2784 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2785 struct kvm_mmu_page, link);
2786 kvm_mmu_zap_page(vcpu->kvm, sp);
2787 ++vcpu->kvm->stat.mmu_recycled;
2791 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2794 enum emulation_result er;
2796 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2805 r = mmu_topup_memory_caches(vcpu);
2809 er = emulate_instruction(vcpu, cr2, error_code, 0);
2814 case EMULATE_DO_MMIO:
2815 ++vcpu->stat.mmio_exits;
2825 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2827 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2829 vcpu->arch.mmu.invlpg(vcpu, gva);
2830 kvm_mmu_flush_tlb(vcpu);
2831 ++vcpu->stat.invlpg;
2833 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2835 void kvm_enable_tdp(void)
2839 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2841 void kvm_disable_tdp(void)
2843 tdp_enabled = false;
2845 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2847 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2849 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2852 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2860 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2861 * Therefore we need to allocate shadow page tables in the first
2862 * 4GB of memory, which happens to fit the DMA32 zone.
2864 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2868 vcpu->arch.mmu.pae_root = page_address(page);
2869 for (i = 0; i < 4; ++i)
2870 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2875 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2878 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2880 return alloc_mmu_pages(vcpu);
2883 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2886 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2888 return init_kvm_mmu(vcpu);
2891 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2895 destroy_kvm_mmu(vcpu);
2896 free_mmu_pages(vcpu);
2897 mmu_free_memory_caches(vcpu);
2900 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2902 struct kvm_mmu_page *sp;
2904 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2908 if (!test_bit(slot, sp->slot_bitmap))
2912 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2914 if (pt[i] & PT_WRITABLE_MASK)
2915 pt[i] &= ~PT_WRITABLE_MASK;
2917 kvm_flush_remote_tlbs(kvm);
2920 void kvm_mmu_zap_all(struct kvm *kvm)
2922 struct kvm_mmu_page *sp, *node;
2924 spin_lock(&kvm->mmu_lock);
2926 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2927 if (kvm_mmu_zap_page(kvm, sp))
2930 spin_unlock(&kvm->mmu_lock);
2932 kvm_flush_remote_tlbs(kvm);
2935 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
2937 struct kvm_mmu_page *page;
2939 page = container_of(kvm->arch.active_mmu_pages.prev,
2940 struct kvm_mmu_page, link);
2941 return kvm_mmu_zap_page(kvm, page);
2944 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
2947 struct kvm *kvm_freed = NULL;
2948 int cache_count = 0;
2950 spin_lock(&kvm_lock);
2952 list_for_each_entry(kvm, &vm_list, vm_list) {
2953 int npages, idx, freed_pages;
2955 idx = srcu_read_lock(&kvm->srcu);
2956 spin_lock(&kvm->mmu_lock);
2957 npages = kvm->arch.n_alloc_mmu_pages -
2958 kvm->arch.n_free_mmu_pages;
2959 cache_count += npages;
2960 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2961 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
2962 cache_count -= freed_pages;
2967 spin_unlock(&kvm->mmu_lock);
2968 srcu_read_unlock(&kvm->srcu, idx);
2971 list_move_tail(&kvm_freed->vm_list, &vm_list);
2973 spin_unlock(&kvm_lock);
2978 static struct shrinker mmu_shrinker = {
2979 .shrink = mmu_shrink,
2980 .seeks = DEFAULT_SEEKS * 10,
2983 static void mmu_destroy_caches(void)
2985 if (pte_chain_cache)
2986 kmem_cache_destroy(pte_chain_cache);
2987 if (rmap_desc_cache)
2988 kmem_cache_destroy(rmap_desc_cache);
2989 if (mmu_page_header_cache)
2990 kmem_cache_destroy(mmu_page_header_cache);
2993 void kvm_mmu_module_exit(void)
2995 mmu_destroy_caches();
2996 unregister_shrinker(&mmu_shrinker);
2999 int kvm_mmu_module_init(void)
3001 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3002 sizeof(struct kvm_pte_chain),
3004 if (!pte_chain_cache)
3006 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3007 sizeof(struct kvm_rmap_desc),
3009 if (!rmap_desc_cache)
3012 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3013 sizeof(struct kvm_mmu_page),
3015 if (!mmu_page_header_cache)
3018 register_shrinker(&mmu_shrinker);
3023 mmu_destroy_caches();
3028 * Caculate mmu pages needed for kvm.
3030 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3033 unsigned int nr_mmu_pages;
3034 unsigned int nr_pages = 0;
3035 struct kvm_memslots *slots;
3037 slots = kvm_memslots(kvm);
3039 for (i = 0; i < slots->nmemslots; i++)
3040 nr_pages += slots->memslots[i].npages;
3042 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3043 nr_mmu_pages = max(nr_mmu_pages,
3044 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3046 return nr_mmu_pages;
3049 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3052 if (len > buffer->len)
3057 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3062 ret = pv_mmu_peek_buffer(buffer, len);
3067 buffer->processed += len;
3071 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3072 gpa_t addr, gpa_t value)
3077 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3080 r = mmu_topup_memory_caches(vcpu);
3084 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3090 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3092 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3096 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3098 spin_lock(&vcpu->kvm->mmu_lock);
3099 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3100 spin_unlock(&vcpu->kvm->mmu_lock);
3104 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3105 struct kvm_pv_mmu_op_buffer *buffer)
3107 struct kvm_mmu_op_header *header;
3109 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3112 switch (header->op) {
3113 case KVM_MMU_OP_WRITE_PTE: {
3114 struct kvm_mmu_op_write_pte *wpte;
3116 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3119 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3122 case KVM_MMU_OP_FLUSH_TLB: {
3123 struct kvm_mmu_op_flush_tlb *ftlb;
3125 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3128 return kvm_pv_mmu_flush_tlb(vcpu);
3130 case KVM_MMU_OP_RELEASE_PT: {
3131 struct kvm_mmu_op_release_pt *rpt;
3133 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3136 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3142 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3143 gpa_t addr, unsigned long *ret)
3146 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3148 buffer->ptr = buffer->buf;
3149 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3150 buffer->processed = 0;
3152 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3156 while (buffer->len) {
3157 r = kvm_pv_mmu_op_one(vcpu, buffer);
3166 *ret = buffer->processed;
3170 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3172 struct kvm_shadow_walk_iterator iterator;
3175 spin_lock(&vcpu->kvm->mmu_lock);
3176 for_each_shadow_entry(vcpu, addr, iterator) {
3177 sptes[iterator.level-1] = *iterator.sptep;
3179 if (!is_shadow_present_pte(*iterator.sptep))
3182 spin_unlock(&vcpu->kvm->mmu_lock);
3186 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3190 static const char *audit_msg;
3192 static gva_t canonicalize(gva_t gva)
3194 #ifdef CONFIG_X86_64
3195 gva = (long long)(gva << 16) >> 16;
3201 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3203 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3208 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3209 u64 ent = sp->spt[i];
3211 if (is_shadow_present_pte(ent)) {
3212 if (!is_last_spte(ent, sp->role.level)) {
3213 struct kvm_mmu_page *child;
3214 child = page_header(ent & PT64_BASE_ADDR_MASK);
3215 __mmu_spte_walk(kvm, child, fn);
3217 fn(kvm, &sp->spt[i]);
3222 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3225 struct kvm_mmu_page *sp;
3227 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3229 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3230 hpa_t root = vcpu->arch.mmu.root_hpa;
3231 sp = page_header(root);
3232 __mmu_spte_walk(vcpu->kvm, sp, fn);
3235 for (i = 0; i < 4; ++i) {
3236 hpa_t root = vcpu->arch.mmu.pae_root[i];
3238 if (root && VALID_PAGE(root)) {
3239 root &= PT64_BASE_ADDR_MASK;
3240 sp = page_header(root);
3241 __mmu_spte_walk(vcpu->kvm, sp, fn);
3247 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3248 gva_t va, int level)
3250 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3252 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3254 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3257 if (ent == shadow_trap_nonpresent_pte)
3260 va = canonicalize(va);
3261 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3262 audit_mappings_page(vcpu, ent, va, level - 1);
3264 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3265 gfn_t gfn = gpa >> PAGE_SHIFT;
3266 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3267 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3269 if (is_error_pfn(pfn)) {
3270 kvm_release_pfn_clean(pfn);
3274 if (is_shadow_present_pte(ent)
3275 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3276 printk(KERN_ERR "xx audit error: (%s) levels %d"
3277 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3278 audit_msg, vcpu->arch.mmu.root_level,
3280 is_shadow_present_pte(ent));
3281 else if (ent == shadow_notrap_nonpresent_pte
3282 && !is_error_hpa(hpa))
3283 printk(KERN_ERR "audit: (%s) notrap shadow,"
3284 " valid guest gva %lx\n", audit_msg, va);
3285 kvm_release_pfn_clean(pfn);
3291 static void audit_mappings(struct kvm_vcpu *vcpu)
3295 if (vcpu->arch.mmu.root_level == 4)
3296 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3298 for (i = 0; i < 4; ++i)
3299 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3300 audit_mappings_page(vcpu,
3301 vcpu->arch.mmu.pae_root[i],
3306 static int count_rmaps(struct kvm_vcpu *vcpu)
3308 struct kvm *kvm = vcpu->kvm;
3309 struct kvm_memslots *slots;
3313 idx = srcu_read_lock(&kvm->srcu);
3314 slots = kvm_memslots(kvm);
3315 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3316 struct kvm_memory_slot *m = &slots->memslots[i];
3317 struct kvm_rmap_desc *d;
3319 for (j = 0; j < m->npages; ++j) {
3320 unsigned long *rmapp = &m->rmap[j];
3324 if (!(*rmapp & 1)) {
3328 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3330 for (k = 0; k < RMAP_EXT; ++k)
3339 srcu_read_unlock(&kvm->srcu, idx);
3343 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3345 unsigned long *rmapp;
3346 struct kvm_mmu_page *rev_sp;
3349 if (*sptep & PT_WRITABLE_MASK) {
3350 rev_sp = page_header(__pa(sptep));
3351 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3353 if (!gfn_to_memslot(kvm, gfn)) {
3354 if (!printk_ratelimit())
3356 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3358 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3359 audit_msg, (long int)(sptep - rev_sp->spt),
3365 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3366 rev_sp->role.level);
3368 if (!printk_ratelimit())
3370 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3378 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3380 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3383 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3385 struct kvm_mmu_page *sp;
3388 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3391 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3394 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3397 if (!(ent & PT_PRESENT_MASK))
3399 if (!(ent & PT_WRITABLE_MASK))
3401 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3407 static void audit_rmap(struct kvm_vcpu *vcpu)
3409 check_writable_mappings_rmap(vcpu);
3413 static void audit_write_protection(struct kvm_vcpu *vcpu)
3415 struct kvm_mmu_page *sp;
3416 struct kvm_memory_slot *slot;
3417 unsigned long *rmapp;
3421 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3422 if (sp->role.direct)
3427 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3428 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3429 rmapp = &slot->rmap[gfn - slot->base_gfn];
3431 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3433 if (*spte & PT_WRITABLE_MASK)
3434 printk(KERN_ERR "%s: (%s) shadow page has "
3435 "writable mappings: gfn %lx role %x\n",
3436 __func__, audit_msg, sp->gfn,
3438 spte = rmap_next(vcpu->kvm, rmapp, spte);
3443 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3450 audit_write_protection(vcpu);
3451 if (strcmp("pre pte write", audit_msg) != 0)
3452 audit_mappings(vcpu);
3453 audit_writable_sptes_have_rmaps(vcpu);