2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
23 #include "kvm_cache_regs.h"
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
39 #include <asm/cmpxchg.h>
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
50 bool tdp_enabled = false;
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
74 #if defined(MMU_DEBUG) || defined(AUDIT)
76 module_param(dbg, bool, 0644);
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
83 #define ASSERT(x) do { } while (0)
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
95 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
97 #define PT64_LEVEL_BITS 9
99 #define PT64_LEVEL_SHIFT(level) \
100 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
102 #define PT64_LEVEL_MASK(level) \
103 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
105 #define PT64_INDEX(address, level)\
106 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
109 #define PT32_LEVEL_BITS 10
111 #define PT32_LEVEL_SHIFT(level) \
112 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
114 #define PT32_LEVEL_MASK(level) \
115 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
116 #define PT32_LVL_OFFSET_MASK(level) \
117 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
118 * PT32_LEVEL_BITS))) - 1))
120 #define PT32_INDEX(address, level)\
121 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
124 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
125 #define PT64_DIR_BASE_ADDR_MASK \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
127 #define PT64_LVL_ADDR_MASK(level) \
128 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
129 * PT64_LEVEL_BITS))) - 1))
130 #define PT64_LVL_OFFSET_MASK(level) \
131 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
132 * PT64_LEVEL_BITS))) - 1))
134 #define PT32_BASE_ADDR_MASK PAGE_MASK
135 #define PT32_DIR_BASE_ADDR_MASK \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
137 #define PT32_LVL_ADDR_MASK(level) \
138 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
139 * PT32_LEVEL_BITS))) - 1))
141 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
146 #define ACC_EXEC_MASK 1
147 #define ACC_WRITE_MASK PT_WRITABLE_MASK
148 #define ACC_USER_MASK PT_USER_MASK
149 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
151 #include <trace/events/kvm.h>
153 #define CREATE_TRACE_POINTS
154 #include "mmutrace.h"
156 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
158 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
160 struct kvm_rmap_desc {
161 u64 *sptes[RMAP_EXT];
162 struct kvm_rmap_desc *more;
165 struct kvm_shadow_walk_iterator {
173 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
174 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
175 shadow_walk_okay(&(_walker)); \
176 shadow_walk_next(&(_walker)))
178 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
180 static struct kmem_cache *pte_chain_cache;
181 static struct kmem_cache *rmap_desc_cache;
182 static struct kmem_cache *mmu_page_header_cache;
184 static u64 __read_mostly shadow_trap_nonpresent_pte;
185 static u64 __read_mostly shadow_notrap_nonpresent_pte;
186 static u64 __read_mostly shadow_base_present_pte;
187 static u64 __read_mostly shadow_nx_mask;
188 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
189 static u64 __read_mostly shadow_user_mask;
190 static u64 __read_mostly shadow_accessed_mask;
191 static u64 __read_mostly shadow_dirty_mask;
193 static inline u64 rsvd_bits(int s, int e)
195 return ((1ULL << (e - s + 1)) - 1) << s;
198 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
200 shadow_trap_nonpresent_pte = trap_pte;
201 shadow_notrap_nonpresent_pte = notrap_pte;
203 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
205 void kvm_mmu_set_base_ptes(u64 base_pte)
207 shadow_base_present_pte = base_pte;
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
211 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
212 u64 dirty_mask, u64 nx_mask, u64 x_mask)
214 shadow_user_mask = user_mask;
215 shadow_accessed_mask = accessed_mask;
216 shadow_dirty_mask = dirty_mask;
217 shadow_nx_mask = nx_mask;
218 shadow_x_mask = x_mask;
220 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
222 static bool is_write_protection(struct kvm_vcpu *vcpu)
224 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
227 static int is_cpuid_PSE36(void)
232 static int is_nx(struct kvm_vcpu *vcpu)
234 return vcpu->arch.efer & EFER_NX;
237 static int is_shadow_present_pte(u64 pte)
239 return pte != shadow_trap_nonpresent_pte
240 && pte != shadow_notrap_nonpresent_pte;
243 static int is_large_pte(u64 pte)
245 return pte & PT_PAGE_SIZE_MASK;
248 static int is_writable_pte(unsigned long pte)
250 return pte & PT_WRITABLE_MASK;
253 static int is_dirty_gpte(unsigned long pte)
255 return pte & PT_DIRTY_MASK;
258 static int is_rmap_spte(u64 pte)
260 return is_shadow_present_pte(pte);
263 static int is_last_spte(u64 pte, int level)
265 if (level == PT_PAGE_TABLE_LEVEL)
267 if (is_large_pte(pte))
272 static pfn_t spte_to_pfn(u64 pte)
274 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
277 static gfn_t pse36_gfn_delta(u32 gpte)
279 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
281 return (gpte & PT32_DIR_PSE36_MASK) << shift;
284 static void __set_spte(u64 *sptep, u64 spte)
287 set_64bit((unsigned long *)sptep, spte);
289 set_64bit((unsigned long long *)sptep, spte);
293 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
294 struct kmem_cache *base_cache, int min)
298 if (cache->nobjs >= min)
300 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
301 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
304 cache->objects[cache->nobjs++] = obj;
309 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
310 struct kmem_cache *cache)
313 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
316 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
321 if (cache->nobjs >= min)
323 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
324 page = alloc_page(GFP_KERNEL);
327 cache->objects[cache->nobjs++] = page_address(page);
332 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
335 free_page((unsigned long)mc->objects[--mc->nobjs]);
338 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
342 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
350 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
353 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
354 mmu_page_header_cache, 4);
359 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
361 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
362 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
363 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
364 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
365 mmu_page_header_cache);
368 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
374 p = mc->objects[--mc->nobjs];
378 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
380 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
381 sizeof(struct kvm_pte_chain));
384 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
386 kmem_cache_free(pte_chain_cache, pc);
389 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
391 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
392 sizeof(struct kvm_rmap_desc));
395 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
397 kmem_cache_free(rmap_desc_cache, rd);
400 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
402 if (!sp->role.direct)
403 return sp->gfns[index];
405 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
408 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
411 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
413 sp->gfns[index] = gfn;
417 * Return the pointer to the largepage write count for a given
418 * gfn, handling slots that are not large page aligned.
420 static int *slot_largepage_idx(gfn_t gfn,
421 struct kvm_memory_slot *slot,
426 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
427 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
428 return &slot->lpage_info[level - 2][idx].write_count;
431 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
433 struct kvm_memory_slot *slot;
437 gfn = unalias_gfn(kvm, gfn);
439 slot = gfn_to_memslot_unaliased(kvm, gfn);
440 for (i = PT_DIRECTORY_LEVEL;
441 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
442 write_count = slot_largepage_idx(gfn, slot, i);
447 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
449 struct kvm_memory_slot *slot;
453 gfn = unalias_gfn(kvm, gfn);
454 slot = gfn_to_memslot_unaliased(kvm, gfn);
455 for (i = PT_DIRECTORY_LEVEL;
456 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
457 write_count = slot_largepage_idx(gfn, slot, i);
459 WARN_ON(*write_count < 0);
463 static int has_wrprotected_page(struct kvm *kvm,
467 struct kvm_memory_slot *slot;
470 gfn = unalias_gfn(kvm, gfn);
471 slot = gfn_to_memslot_unaliased(kvm, gfn);
473 largepage_idx = slot_largepage_idx(gfn, slot, level);
474 return *largepage_idx;
480 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
482 unsigned long page_size;
485 page_size = kvm_host_page_size(kvm, gfn);
487 for (i = PT_PAGE_TABLE_LEVEL;
488 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
489 if (page_size >= KVM_HPAGE_SIZE(i))
498 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
500 struct kvm_memory_slot *slot;
501 int host_level, level, max_level;
503 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
504 if (slot && slot->dirty_bitmap)
505 return PT_PAGE_TABLE_LEVEL;
507 host_level = host_mapping_level(vcpu->kvm, large_gfn);
509 if (host_level == PT_PAGE_TABLE_LEVEL)
512 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
513 kvm_x86_ops->get_lpage_level() : host_level;
515 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
516 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
523 * Take gfn and return the reverse mapping to it.
524 * Note: gfn must be unaliased before this function get called
527 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
529 struct kvm_memory_slot *slot;
532 slot = gfn_to_memslot(kvm, gfn);
533 if (likely(level == PT_PAGE_TABLE_LEVEL))
534 return &slot->rmap[gfn - slot->base_gfn];
536 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
537 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
539 return &slot->lpage_info[level - 2][idx].rmap_pde;
543 * Reverse mapping data structures:
545 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
546 * that points to page_address(page).
548 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
549 * containing more mappings.
551 * Returns the number of rmap entries before the spte was added or zero if
552 * the spte was not added.
555 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
557 struct kvm_mmu_page *sp;
558 struct kvm_rmap_desc *desc;
559 unsigned long *rmapp;
562 if (!is_rmap_spte(*spte))
564 gfn = unalias_gfn(vcpu->kvm, gfn);
565 sp = page_header(__pa(spte));
566 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
567 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
569 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
570 *rmapp = (unsigned long)spte;
571 } else if (!(*rmapp & 1)) {
572 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
573 desc = mmu_alloc_rmap_desc(vcpu);
574 desc->sptes[0] = (u64 *)*rmapp;
575 desc->sptes[1] = spte;
576 *rmapp = (unsigned long)desc | 1;
578 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
580 while (desc->sptes[RMAP_EXT-1] && desc->more) {
584 if (desc->sptes[RMAP_EXT-1]) {
585 desc->more = mmu_alloc_rmap_desc(vcpu);
588 for (i = 0; desc->sptes[i]; ++i)
590 desc->sptes[i] = spte;
595 static void rmap_desc_remove_entry(unsigned long *rmapp,
596 struct kvm_rmap_desc *desc,
598 struct kvm_rmap_desc *prev_desc)
602 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
604 desc->sptes[i] = desc->sptes[j];
605 desc->sptes[j] = NULL;
608 if (!prev_desc && !desc->more)
609 *rmapp = (unsigned long)desc->sptes[0];
612 prev_desc->more = desc->more;
614 *rmapp = (unsigned long)desc->more | 1;
615 mmu_free_rmap_desc(desc);
618 static void rmap_remove(struct kvm *kvm, u64 *spte)
620 struct kvm_rmap_desc *desc;
621 struct kvm_rmap_desc *prev_desc;
622 struct kvm_mmu_page *sp;
625 unsigned long *rmapp;
628 if (!is_rmap_spte(*spte))
630 sp = page_header(__pa(spte));
631 pfn = spte_to_pfn(*spte);
632 if (*spte & shadow_accessed_mask)
633 kvm_set_pfn_accessed(pfn);
634 if (is_writable_pte(*spte))
635 kvm_set_pfn_dirty(pfn);
636 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
637 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
639 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
641 } else if (!(*rmapp & 1)) {
642 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
643 if ((u64 *)*rmapp != spte) {
644 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
650 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
651 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
654 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
655 if (desc->sptes[i] == spte) {
656 rmap_desc_remove_entry(rmapp,
664 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
669 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
671 struct kvm_rmap_desc *desc;
677 else if (!(*rmapp & 1)) {
679 return (u64 *)*rmapp;
682 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
685 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
686 if (prev_spte == spte)
687 return desc->sptes[i];
688 prev_spte = desc->sptes[i];
695 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
697 unsigned long *rmapp;
699 int i, write_protected = 0;
701 gfn = unalias_gfn(kvm, gfn);
702 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
704 spte = rmap_next(kvm, rmapp, NULL);
707 BUG_ON(!(*spte & PT_PRESENT_MASK));
708 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
709 if (is_writable_pte(*spte)) {
710 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
713 spte = rmap_next(kvm, rmapp, spte);
715 if (write_protected) {
718 spte = rmap_next(kvm, rmapp, NULL);
719 pfn = spte_to_pfn(*spte);
720 kvm_set_pfn_dirty(pfn);
723 /* check for huge page mappings */
724 for (i = PT_DIRECTORY_LEVEL;
725 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
726 rmapp = gfn_to_rmap(kvm, gfn, i);
727 spte = rmap_next(kvm, rmapp, NULL);
730 BUG_ON(!(*spte & PT_PRESENT_MASK));
731 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
732 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
733 if (is_writable_pte(*spte)) {
734 rmap_remove(kvm, spte);
736 __set_spte(spte, shadow_trap_nonpresent_pte);
740 spte = rmap_next(kvm, rmapp, spte);
744 return write_protected;
747 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
751 int need_tlb_flush = 0;
753 while ((spte = rmap_next(kvm, rmapp, NULL))) {
754 BUG_ON(!(*spte & PT_PRESENT_MASK));
755 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
756 rmap_remove(kvm, spte);
757 __set_spte(spte, shadow_trap_nonpresent_pte);
760 return need_tlb_flush;
763 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
768 pte_t *ptep = (pte_t *)data;
771 WARN_ON(pte_huge(*ptep));
772 new_pfn = pte_pfn(*ptep);
773 spte = rmap_next(kvm, rmapp, NULL);
775 BUG_ON(!is_shadow_present_pte(*spte));
776 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
778 if (pte_write(*ptep)) {
779 rmap_remove(kvm, spte);
780 __set_spte(spte, shadow_trap_nonpresent_pte);
781 spte = rmap_next(kvm, rmapp, NULL);
783 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
784 new_spte |= (u64)new_pfn << PAGE_SHIFT;
786 new_spte &= ~PT_WRITABLE_MASK;
787 new_spte &= ~SPTE_HOST_WRITEABLE;
788 if (is_writable_pte(*spte))
789 kvm_set_pfn_dirty(spte_to_pfn(*spte));
790 __set_spte(spte, new_spte);
791 spte = rmap_next(kvm, rmapp, spte);
795 kvm_flush_remote_tlbs(kvm);
800 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
802 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
808 struct kvm_memslots *slots;
810 slots = kvm_memslots(kvm);
812 for (i = 0; i < slots->nmemslots; i++) {
813 struct kvm_memory_slot *memslot = &slots->memslots[i];
814 unsigned long start = memslot->userspace_addr;
817 end = start + (memslot->npages << PAGE_SHIFT);
818 if (hva >= start && hva < end) {
819 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
821 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
823 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
824 int idx = gfn_offset;
825 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
827 &memslot->lpage_info[j][idx].rmap_pde,
830 trace_kvm_age_page(hva, memslot, ret);
838 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
840 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
843 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
845 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
848 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
855 * Emulate the accessed bit for EPT, by checking if this page has
856 * an EPT mapping, and clearing it if it does. On the next access,
857 * a new EPT mapping will be established.
858 * This has some overhead, but not as much as the cost of swapping
859 * out actively used pages or breaking up actively used hugepages.
861 if (!shadow_accessed_mask)
862 return kvm_unmap_rmapp(kvm, rmapp, data);
864 spte = rmap_next(kvm, rmapp, NULL);
868 BUG_ON(!(_spte & PT_PRESENT_MASK));
869 _young = _spte & PT_ACCESSED_MASK;
872 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
874 spte = rmap_next(kvm, rmapp, spte);
879 #define RMAP_RECYCLE_THRESHOLD 1000
881 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
883 unsigned long *rmapp;
884 struct kvm_mmu_page *sp;
886 sp = page_header(__pa(spte));
888 gfn = unalias_gfn(vcpu->kvm, gfn);
889 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
891 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
892 kvm_flush_remote_tlbs(vcpu->kvm);
895 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
897 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
901 static int is_empty_shadow_page(u64 *spt)
906 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
907 if (is_shadow_present_pte(*pos)) {
908 printk(KERN_ERR "%s: %p %llx\n", __func__,
916 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
918 ASSERT(is_empty_shadow_page(sp->spt));
919 hlist_del(&sp->hash_link);
921 __free_page(virt_to_page(sp->spt));
922 if (!sp->role.direct)
923 __free_page(virt_to_page(sp->gfns));
924 kmem_cache_free(mmu_page_header_cache, sp);
925 ++kvm->arch.n_free_mmu_pages;
928 static unsigned kvm_page_table_hashfn(gfn_t gfn)
930 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
933 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
934 u64 *parent_pte, int direct)
936 struct kvm_mmu_page *sp;
938 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
939 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
941 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
943 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
944 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
945 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
947 sp->parent_pte = parent_pte;
948 --vcpu->kvm->arch.n_free_mmu_pages;
952 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
953 struct kvm_mmu_page *sp, u64 *parent_pte)
955 struct kvm_pte_chain *pte_chain;
956 struct hlist_node *node;
961 if (!sp->multimapped) {
962 u64 *old = sp->parent_pte;
965 sp->parent_pte = parent_pte;
969 pte_chain = mmu_alloc_pte_chain(vcpu);
970 INIT_HLIST_HEAD(&sp->parent_ptes);
971 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
972 pte_chain->parent_ptes[0] = old;
974 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
975 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
977 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
978 if (!pte_chain->parent_ptes[i]) {
979 pte_chain->parent_ptes[i] = parent_pte;
983 pte_chain = mmu_alloc_pte_chain(vcpu);
985 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
986 pte_chain->parent_ptes[0] = parent_pte;
989 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
992 struct kvm_pte_chain *pte_chain;
993 struct hlist_node *node;
996 if (!sp->multimapped) {
997 BUG_ON(sp->parent_pte != parent_pte);
998 sp->parent_pte = NULL;
1001 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1002 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1003 if (!pte_chain->parent_ptes[i])
1005 if (pte_chain->parent_ptes[i] != parent_pte)
1007 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1008 && pte_chain->parent_ptes[i + 1]) {
1009 pte_chain->parent_ptes[i]
1010 = pte_chain->parent_ptes[i + 1];
1013 pte_chain->parent_ptes[i] = NULL;
1015 hlist_del(&pte_chain->link);
1016 mmu_free_pte_chain(pte_chain);
1017 if (hlist_empty(&sp->parent_ptes)) {
1018 sp->multimapped = 0;
1019 sp->parent_pte = NULL;
1028 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1030 struct kvm_pte_chain *pte_chain;
1031 struct hlist_node *node;
1032 struct kvm_mmu_page *parent_sp;
1035 if (!sp->multimapped && sp->parent_pte) {
1036 parent_sp = page_header(__pa(sp->parent_pte));
1038 mmu_parent_walk(parent_sp, fn);
1041 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1042 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1043 if (!pte_chain->parent_ptes[i])
1045 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1047 mmu_parent_walk(parent_sp, fn);
1051 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1054 struct kvm_mmu_page *sp = page_header(__pa(spte));
1056 index = spte - sp->spt;
1057 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1058 sp->unsync_children++;
1059 WARN_ON(!sp->unsync_children);
1062 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1064 struct kvm_pte_chain *pte_chain;
1065 struct hlist_node *node;
1068 if (!sp->parent_pte)
1071 if (!sp->multimapped) {
1072 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1076 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1077 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1078 if (!pte_chain->parent_ptes[i])
1080 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1084 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1086 kvm_mmu_update_parents_unsync(sp);
1090 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1092 mmu_parent_walk(sp, unsync_walk_fn);
1093 kvm_mmu_update_parents_unsync(sp);
1096 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1097 struct kvm_mmu_page *sp)
1101 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1102 sp->spt[i] = shadow_trap_nonpresent_pte;
1105 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1106 struct kvm_mmu_page *sp)
1111 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1115 #define KVM_PAGE_ARRAY_NR 16
1117 struct kvm_mmu_pages {
1118 struct mmu_page_and_offset {
1119 struct kvm_mmu_page *sp;
1121 } page[KVM_PAGE_ARRAY_NR];
1125 #define for_each_unsync_children(bitmap, idx) \
1126 for (idx = find_first_bit(bitmap, 512); \
1128 idx = find_next_bit(bitmap, 512, idx+1))
1130 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1136 for (i=0; i < pvec->nr; i++)
1137 if (pvec->page[i].sp == sp)
1140 pvec->page[pvec->nr].sp = sp;
1141 pvec->page[pvec->nr].idx = idx;
1143 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1146 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1147 struct kvm_mmu_pages *pvec)
1149 int i, ret, nr_unsync_leaf = 0;
1151 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1152 u64 ent = sp->spt[i];
1154 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1155 struct kvm_mmu_page *child;
1156 child = page_header(ent & PT64_BASE_ADDR_MASK);
1158 if (child->unsync_children) {
1159 if (mmu_pages_add(pvec, child, i))
1162 ret = __mmu_unsync_walk(child, pvec);
1164 __clear_bit(i, sp->unsync_child_bitmap);
1166 nr_unsync_leaf += ret;
1171 if (child->unsync) {
1173 if (mmu_pages_add(pvec, child, i))
1179 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1180 sp->unsync_children = 0;
1182 return nr_unsync_leaf;
1185 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1186 struct kvm_mmu_pages *pvec)
1188 if (!sp->unsync_children)
1191 mmu_pages_add(pvec, sp, 0);
1192 return __mmu_unsync_walk(sp, pvec);
1195 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1197 WARN_ON(!sp->unsync);
1198 trace_kvm_mmu_sync_page(sp);
1200 --kvm->stat.mmu_unsync;
1203 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1204 struct list_head *invalid_list);
1205 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1206 struct list_head *invalid_list);
1208 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1209 hlist_for_each_entry(sp, pos, \
1210 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1211 if ((sp)->gfn != (gfn)) {} else
1213 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1214 hlist_for_each_entry(sp, pos, \
1215 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1216 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1217 (sp)->role.invalid) {} else
1219 /* @sp->gfn should be write-protected at the call site */
1220 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1221 struct list_head *invalid_list, bool clear_unsync)
1223 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1224 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1229 kvm_unlink_unsync_page(vcpu->kvm, sp);
1231 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1232 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1236 kvm_mmu_flush_tlb(vcpu);
1240 static void mmu_convert_notrap(struct kvm_mmu_page *sp);
1241 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1242 struct kvm_mmu_page *sp)
1244 LIST_HEAD(invalid_list);
1247 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1249 mmu_convert_notrap(sp);
1251 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1256 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1257 struct list_head *invalid_list)
1259 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1262 /* @gfn should be write-protected at the call site */
1263 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1265 struct kvm_mmu_page *s;
1266 struct hlist_node *node;
1267 LIST_HEAD(invalid_list);
1270 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1274 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1275 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1276 (vcpu->arch.mmu.sync_page(vcpu, s))) {
1277 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1280 kvm_unlink_unsync_page(vcpu->kvm, s);
1284 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1286 kvm_mmu_flush_tlb(vcpu);
1289 struct mmu_page_path {
1290 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1291 unsigned int idx[PT64_ROOT_LEVEL-1];
1294 #define for_each_sp(pvec, sp, parents, i) \
1295 for (i = mmu_pages_next(&pvec, &parents, -1), \
1296 sp = pvec.page[i].sp; \
1297 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1298 i = mmu_pages_next(&pvec, &parents, i))
1300 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1301 struct mmu_page_path *parents,
1306 for (n = i+1; n < pvec->nr; n++) {
1307 struct kvm_mmu_page *sp = pvec->page[n].sp;
1309 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1310 parents->idx[0] = pvec->page[n].idx;
1314 parents->parent[sp->role.level-2] = sp;
1315 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1321 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1323 struct kvm_mmu_page *sp;
1324 unsigned int level = 0;
1327 unsigned int idx = parents->idx[level];
1329 sp = parents->parent[level];
1333 --sp->unsync_children;
1334 WARN_ON((int)sp->unsync_children < 0);
1335 __clear_bit(idx, sp->unsync_child_bitmap);
1337 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1340 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1341 struct mmu_page_path *parents,
1342 struct kvm_mmu_pages *pvec)
1344 parents->parent[parent->role.level-1] = NULL;
1348 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1349 struct kvm_mmu_page *parent)
1352 struct kvm_mmu_page *sp;
1353 struct mmu_page_path parents;
1354 struct kvm_mmu_pages pages;
1355 LIST_HEAD(invalid_list);
1357 kvm_mmu_pages_init(parent, &parents, &pages);
1358 while (mmu_unsync_walk(parent, &pages)) {
1361 for_each_sp(pages, sp, parents, i)
1362 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1365 kvm_flush_remote_tlbs(vcpu->kvm);
1367 for_each_sp(pages, sp, parents, i) {
1368 kvm_sync_page(vcpu, sp, &invalid_list);
1369 mmu_pages_clear_parents(&parents);
1371 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1372 cond_resched_lock(&vcpu->kvm->mmu_lock);
1373 kvm_mmu_pages_init(parent, &parents, &pages);
1377 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1385 union kvm_mmu_page_role role;
1387 struct kvm_mmu_page *sp;
1388 struct hlist_node *node;
1389 bool need_sync = false;
1391 role = vcpu->arch.mmu.base_role;
1393 role.direct = direct;
1396 role.access = access;
1397 if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1398 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1399 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1400 role.quadrant = quadrant;
1402 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1403 if (!need_sync && sp->unsync)
1406 if (sp->role.word != role.word)
1409 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1412 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1413 if (sp->unsync_children) {
1414 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1415 kvm_mmu_mark_parents_unsync(sp);
1416 } else if (sp->unsync)
1417 kvm_mmu_mark_parents_unsync(sp);
1419 trace_kvm_mmu_get_page(sp, false);
1422 ++vcpu->kvm->stat.mmu_cache_miss;
1423 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1428 hlist_add_head(&sp->hash_link,
1429 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1431 if (rmap_write_protect(vcpu->kvm, gfn))
1432 kvm_flush_remote_tlbs(vcpu->kvm);
1433 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1434 kvm_sync_pages(vcpu, gfn);
1436 account_shadowed(vcpu->kvm, gfn);
1438 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1439 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1441 nonpaging_prefetch_page(vcpu, sp);
1442 trace_kvm_mmu_get_page(sp, true);
1446 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1447 struct kvm_vcpu *vcpu, u64 addr)
1449 iterator->addr = addr;
1450 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1451 iterator->level = vcpu->arch.mmu.shadow_root_level;
1452 if (iterator->level == PT32E_ROOT_LEVEL) {
1453 iterator->shadow_addr
1454 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1455 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1457 if (!iterator->shadow_addr)
1458 iterator->level = 0;
1462 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1464 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1467 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1468 if (is_large_pte(*iterator->sptep))
1471 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1472 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1476 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1478 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1482 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1483 struct kvm_mmu_page *sp)
1491 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1494 if (is_shadow_present_pte(ent)) {
1495 if (!is_last_spte(ent, sp->role.level)) {
1496 ent &= PT64_BASE_ADDR_MASK;
1497 mmu_page_remove_parent_pte(page_header(ent),
1500 if (is_large_pte(ent))
1502 rmap_remove(kvm, &pt[i]);
1505 pt[i] = shadow_trap_nonpresent_pte;
1509 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1511 mmu_page_remove_parent_pte(sp, parent_pte);
1514 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1517 struct kvm_vcpu *vcpu;
1519 kvm_for_each_vcpu(i, vcpu, kvm)
1520 vcpu->arch.last_pte_updated = NULL;
1523 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1527 while (sp->multimapped || sp->parent_pte) {
1528 if (!sp->multimapped)
1529 parent_pte = sp->parent_pte;
1531 struct kvm_pte_chain *chain;
1533 chain = container_of(sp->parent_ptes.first,
1534 struct kvm_pte_chain, link);
1535 parent_pte = chain->parent_ptes[0];
1537 BUG_ON(!parent_pte);
1538 kvm_mmu_put_page(sp, parent_pte);
1539 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1543 static int mmu_zap_unsync_children(struct kvm *kvm,
1544 struct kvm_mmu_page *parent,
1545 struct list_head *invalid_list)
1548 struct mmu_page_path parents;
1549 struct kvm_mmu_pages pages;
1551 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1554 kvm_mmu_pages_init(parent, &parents, &pages);
1555 while (mmu_unsync_walk(parent, &pages)) {
1556 struct kvm_mmu_page *sp;
1558 for_each_sp(pages, sp, parents, i) {
1559 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1560 mmu_pages_clear_parents(&parents);
1563 kvm_mmu_pages_init(parent, &parents, &pages);
1569 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1570 struct list_head *invalid_list)
1574 trace_kvm_mmu_prepare_zap_page(sp);
1575 ++kvm->stat.mmu_shadow_zapped;
1576 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1577 kvm_mmu_page_unlink_children(kvm, sp);
1578 kvm_mmu_unlink_parents(kvm, sp);
1579 if (!sp->role.invalid && !sp->role.direct)
1580 unaccount_shadowed(kvm, sp->gfn);
1582 kvm_unlink_unsync_page(kvm, sp);
1583 if (!sp->root_count) {
1586 list_move(&sp->link, invalid_list);
1588 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1589 kvm_reload_remote_mmus(kvm);
1592 sp->role.invalid = 1;
1593 kvm_mmu_reset_last_pte_updated(kvm);
1597 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1598 struct list_head *invalid_list)
1600 struct kvm_mmu_page *sp;
1602 if (list_empty(invalid_list))
1605 kvm_flush_remote_tlbs(kvm);
1608 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1609 WARN_ON(!sp->role.invalid || sp->root_count);
1610 kvm_mmu_free_page(kvm, sp);
1611 } while (!list_empty(invalid_list));
1616 * Changing the number of mmu pages allocated to the vm
1617 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1619 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1622 LIST_HEAD(invalid_list);
1624 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1625 used_pages = max(0, used_pages);
1628 * If we set the number of mmu pages to be smaller be than the
1629 * number of actived pages , we must to free some mmu pages before we
1633 if (used_pages > kvm_nr_mmu_pages) {
1634 while (used_pages > kvm_nr_mmu_pages &&
1635 !list_empty(&kvm->arch.active_mmu_pages)) {
1636 struct kvm_mmu_page *page;
1638 page = container_of(kvm->arch.active_mmu_pages.prev,
1639 struct kvm_mmu_page, link);
1640 used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1643 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1644 kvm_nr_mmu_pages = used_pages;
1645 kvm->arch.n_free_mmu_pages = 0;
1648 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1649 - kvm->arch.n_alloc_mmu_pages;
1651 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1654 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1656 struct kvm_mmu_page *sp;
1657 struct hlist_node *node;
1658 LIST_HEAD(invalid_list);
1661 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1664 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1665 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1668 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1670 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1674 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1676 struct kvm_mmu_page *sp;
1677 struct hlist_node *node;
1678 LIST_HEAD(invalid_list);
1680 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1681 pgprintk("%s: zap %lx %x\n",
1682 __func__, gfn, sp->role.word);
1683 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1685 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1688 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1690 int slot = memslot_id(kvm, gfn);
1691 struct kvm_mmu_page *sp = page_header(__pa(pte));
1693 __set_bit(slot, sp->slot_bitmap);
1696 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1701 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1704 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1705 if (pt[i] == shadow_notrap_nonpresent_pte)
1706 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1711 * The function is based on mtrr_type_lookup() in
1712 * arch/x86/kernel/cpu/mtrr/generic.c
1714 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1719 u8 prev_match, curr_match;
1720 int num_var_ranges = KVM_NR_VAR_MTRR;
1722 if (!mtrr_state->enabled)
1725 /* Make end inclusive end, instead of exclusive */
1728 /* Look in fixed ranges. Just return the type as per start */
1729 if (mtrr_state->have_fixed && (start < 0x100000)) {
1732 if (start < 0x80000) {
1734 idx += (start >> 16);
1735 return mtrr_state->fixed_ranges[idx];
1736 } else if (start < 0xC0000) {
1738 idx += ((start - 0x80000) >> 14);
1739 return mtrr_state->fixed_ranges[idx];
1740 } else if (start < 0x1000000) {
1742 idx += ((start - 0xC0000) >> 12);
1743 return mtrr_state->fixed_ranges[idx];
1748 * Look in variable ranges
1749 * Look of multiple ranges matching this address and pick type
1750 * as per MTRR precedence
1752 if (!(mtrr_state->enabled & 2))
1753 return mtrr_state->def_type;
1756 for (i = 0; i < num_var_ranges; ++i) {
1757 unsigned short start_state, end_state;
1759 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1762 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1763 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1764 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1765 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1767 start_state = ((start & mask) == (base & mask));
1768 end_state = ((end & mask) == (base & mask));
1769 if (start_state != end_state)
1772 if ((start & mask) != (base & mask))
1775 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1776 if (prev_match == 0xFF) {
1777 prev_match = curr_match;
1781 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1782 curr_match == MTRR_TYPE_UNCACHABLE)
1783 return MTRR_TYPE_UNCACHABLE;
1785 if ((prev_match == MTRR_TYPE_WRBACK &&
1786 curr_match == MTRR_TYPE_WRTHROUGH) ||
1787 (prev_match == MTRR_TYPE_WRTHROUGH &&
1788 curr_match == MTRR_TYPE_WRBACK)) {
1789 prev_match = MTRR_TYPE_WRTHROUGH;
1790 curr_match = MTRR_TYPE_WRTHROUGH;
1793 if (prev_match != curr_match)
1794 return MTRR_TYPE_UNCACHABLE;
1797 if (prev_match != 0xFF)
1800 return mtrr_state->def_type;
1803 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1807 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1808 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1809 if (mtrr == 0xfe || mtrr == 0xff)
1810 mtrr = MTRR_TYPE_WRBACK;
1813 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1815 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1817 trace_kvm_mmu_unsync_page(sp);
1818 ++vcpu->kvm->stat.mmu_unsync;
1821 kvm_mmu_mark_parents_unsync(sp);
1822 mmu_convert_notrap(sp);
1825 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1827 struct kvm_mmu_page *s;
1828 struct hlist_node *node;
1830 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1833 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1834 __kvm_unsync_page(vcpu, s);
1838 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1841 struct kvm_mmu_page *s;
1842 struct hlist_node *node;
1843 bool need_unsync = false;
1845 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1846 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1849 if (!need_unsync && !s->unsync) {
1850 if (!can_unsync || !oos_shadow)
1856 kvm_unsync_pages(vcpu, gfn);
1860 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1861 unsigned pte_access, int user_fault,
1862 int write_fault, int dirty, int level,
1863 gfn_t gfn, pfn_t pfn, bool speculative,
1864 bool can_unsync, bool reset_host_protection)
1870 * We don't set the accessed bit, since we sometimes want to see
1871 * whether the guest actually used the pte (in order to detect
1874 spte = shadow_base_present_pte | shadow_dirty_mask;
1876 spte |= shadow_accessed_mask;
1878 pte_access &= ~ACC_WRITE_MASK;
1879 if (pte_access & ACC_EXEC_MASK)
1880 spte |= shadow_x_mask;
1882 spte |= shadow_nx_mask;
1883 if (pte_access & ACC_USER_MASK)
1884 spte |= shadow_user_mask;
1885 if (level > PT_PAGE_TABLE_LEVEL)
1886 spte |= PT_PAGE_SIZE_MASK;
1888 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1889 kvm_is_mmio_pfn(pfn));
1891 if (reset_host_protection)
1892 spte |= SPTE_HOST_WRITEABLE;
1894 spte |= (u64)pfn << PAGE_SHIFT;
1896 if ((pte_access & ACC_WRITE_MASK)
1897 || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1900 if (level > PT_PAGE_TABLE_LEVEL &&
1901 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1903 rmap_remove(vcpu->kvm, sptep);
1904 spte = shadow_trap_nonpresent_pte;
1908 spte |= PT_WRITABLE_MASK;
1910 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1911 spte &= ~PT_USER_MASK;
1914 * Optimization: for pte sync, if spte was writable the hash
1915 * lookup is unnecessary (and expensive). Write protection
1916 * is responsibility of mmu_get_page / kvm_sync_page.
1917 * Same reasoning can be applied to dirty page accounting.
1919 if (!can_unsync && is_writable_pte(*sptep))
1922 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1923 pgprintk("%s: found shadow page for %lx, marking ro\n",
1926 pte_access &= ~ACC_WRITE_MASK;
1927 if (is_writable_pte(spte))
1928 spte &= ~PT_WRITABLE_MASK;
1932 if (pte_access & ACC_WRITE_MASK)
1933 mark_page_dirty(vcpu->kvm, gfn);
1936 __set_spte(sptep, spte);
1940 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1941 unsigned pt_access, unsigned pte_access,
1942 int user_fault, int write_fault, int dirty,
1943 int *ptwrite, int level, gfn_t gfn,
1944 pfn_t pfn, bool speculative,
1945 bool reset_host_protection)
1947 int was_rmapped = 0;
1948 int was_writable = is_writable_pte(*sptep);
1951 pgprintk("%s: spte %llx access %x write_fault %d"
1952 " user_fault %d gfn %lx\n",
1953 __func__, *sptep, pt_access,
1954 write_fault, user_fault, gfn);
1956 if (is_rmap_spte(*sptep)) {
1958 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1959 * the parent of the now unreachable PTE.
1961 if (level > PT_PAGE_TABLE_LEVEL &&
1962 !is_large_pte(*sptep)) {
1963 struct kvm_mmu_page *child;
1966 child = page_header(pte & PT64_BASE_ADDR_MASK);
1967 mmu_page_remove_parent_pte(child, sptep);
1968 __set_spte(sptep, shadow_trap_nonpresent_pte);
1969 kvm_flush_remote_tlbs(vcpu->kvm);
1970 } else if (pfn != spte_to_pfn(*sptep)) {
1971 pgprintk("hfn old %lx new %lx\n",
1972 spte_to_pfn(*sptep), pfn);
1973 rmap_remove(vcpu->kvm, sptep);
1974 __set_spte(sptep, shadow_trap_nonpresent_pte);
1975 kvm_flush_remote_tlbs(vcpu->kvm);
1980 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1981 dirty, level, gfn, pfn, speculative, true,
1982 reset_host_protection)) {
1985 kvm_mmu_flush_tlb(vcpu);
1988 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1989 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1990 is_large_pte(*sptep)? "2MB" : "4kB",
1991 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1993 if (!was_rmapped && is_large_pte(*sptep))
1994 ++vcpu->kvm->stat.lpages;
1996 page_header_update_slot(vcpu->kvm, sptep, gfn);
1998 rmap_count = rmap_add(vcpu, sptep, gfn);
1999 kvm_release_pfn_clean(pfn);
2000 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2001 rmap_recycle(vcpu, sptep, gfn);
2004 kvm_release_pfn_dirty(pfn);
2006 kvm_release_pfn_clean(pfn);
2009 vcpu->arch.last_pte_updated = sptep;
2010 vcpu->arch.last_pte_gfn = gfn;
2014 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2018 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2019 int level, gfn_t gfn, pfn_t pfn)
2021 struct kvm_shadow_walk_iterator iterator;
2022 struct kvm_mmu_page *sp;
2026 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2027 if (iterator.level == level) {
2028 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2029 0, write, 1, &pt_write,
2030 level, gfn, pfn, false, true);
2031 ++vcpu->stat.pf_fixed;
2035 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2036 u64 base_addr = iterator.addr;
2038 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2039 pseudo_gfn = base_addr >> PAGE_SHIFT;
2040 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2042 1, ACC_ALL, iterator.sptep);
2044 pgprintk("nonpaging_map: ENOMEM\n");
2045 kvm_release_pfn_clean(pfn);
2049 __set_spte(iterator.sptep,
2051 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2052 | shadow_user_mask | shadow_x_mask);
2058 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2064 /* Touch the page, so send SIGBUS */
2065 hva = (void __user *)gfn_to_hva(kvm, gfn);
2066 r = copy_from_user(buf, hva, 1);
2069 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2071 kvm_release_pfn_clean(pfn);
2072 if (is_hwpoison_pfn(pfn)) {
2073 kvm_send_hwpoison_signal(kvm, gfn);
2079 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2084 unsigned long mmu_seq;
2086 level = mapping_level(vcpu, gfn);
2089 * This path builds a PAE pagetable - so we can map 2mb pages at
2090 * maximum. Therefore check if the level is larger than that.
2092 if (level > PT_DIRECTORY_LEVEL)
2093 level = PT_DIRECTORY_LEVEL;
2095 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2097 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2099 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2102 if (is_error_pfn(pfn))
2103 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2105 spin_lock(&vcpu->kvm->mmu_lock);
2106 if (mmu_notifier_retry(vcpu, mmu_seq))
2108 kvm_mmu_free_some_pages(vcpu);
2109 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2110 spin_unlock(&vcpu->kvm->mmu_lock);
2116 spin_unlock(&vcpu->kvm->mmu_lock);
2117 kvm_release_pfn_clean(pfn);
2122 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2125 struct kvm_mmu_page *sp;
2126 LIST_HEAD(invalid_list);
2128 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2130 spin_lock(&vcpu->kvm->mmu_lock);
2131 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2132 hpa_t root = vcpu->arch.mmu.root_hpa;
2134 sp = page_header(root);
2136 if (!sp->root_count && sp->role.invalid) {
2137 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2138 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2140 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2141 spin_unlock(&vcpu->kvm->mmu_lock);
2144 for (i = 0; i < 4; ++i) {
2145 hpa_t root = vcpu->arch.mmu.pae_root[i];
2148 root &= PT64_BASE_ADDR_MASK;
2149 sp = page_header(root);
2151 if (!sp->root_count && sp->role.invalid)
2152 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2155 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2157 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2158 spin_unlock(&vcpu->kvm->mmu_lock);
2159 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2162 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2166 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2167 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2174 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2178 struct kvm_mmu_page *sp;
2182 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2184 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2185 hpa_t root = vcpu->arch.mmu.root_hpa;
2187 ASSERT(!VALID_PAGE(root));
2188 if (mmu_check_root(vcpu, root_gfn))
2194 spin_lock(&vcpu->kvm->mmu_lock);
2195 kvm_mmu_free_some_pages(vcpu);
2196 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2197 PT64_ROOT_LEVEL, direct,
2199 root = __pa(sp->spt);
2201 spin_unlock(&vcpu->kvm->mmu_lock);
2202 vcpu->arch.mmu.root_hpa = root;
2205 direct = !is_paging(vcpu);
2206 for (i = 0; i < 4; ++i) {
2207 hpa_t root = vcpu->arch.mmu.pae_root[i];
2209 ASSERT(!VALID_PAGE(root));
2210 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2211 pdptr = kvm_pdptr_read(vcpu, i);
2212 if (!is_present_gpte(pdptr)) {
2213 vcpu->arch.mmu.pae_root[i] = 0;
2216 root_gfn = pdptr >> PAGE_SHIFT;
2217 } else if (vcpu->arch.mmu.root_level == 0)
2219 if (mmu_check_root(vcpu, root_gfn))
2225 spin_lock(&vcpu->kvm->mmu_lock);
2226 kvm_mmu_free_some_pages(vcpu);
2227 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2228 PT32_ROOT_LEVEL, direct,
2230 root = __pa(sp->spt);
2232 spin_unlock(&vcpu->kvm->mmu_lock);
2234 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2236 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2240 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2243 struct kvm_mmu_page *sp;
2245 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2247 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2248 hpa_t root = vcpu->arch.mmu.root_hpa;
2249 sp = page_header(root);
2250 mmu_sync_children(vcpu, sp);
2253 for (i = 0; i < 4; ++i) {
2254 hpa_t root = vcpu->arch.mmu.pae_root[i];
2256 if (root && VALID_PAGE(root)) {
2257 root &= PT64_BASE_ADDR_MASK;
2258 sp = page_header(root);
2259 mmu_sync_children(vcpu, sp);
2264 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2266 spin_lock(&vcpu->kvm->mmu_lock);
2267 mmu_sync_roots(vcpu);
2268 spin_unlock(&vcpu->kvm->mmu_lock);
2271 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2272 u32 access, u32 *error)
2279 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2285 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2286 r = mmu_topup_memory_caches(vcpu);
2291 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2293 gfn = gva >> PAGE_SHIFT;
2295 return nonpaging_map(vcpu, gva & PAGE_MASK,
2296 error_code & PFERR_WRITE_MASK, gfn);
2299 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2305 gfn_t gfn = gpa >> PAGE_SHIFT;
2306 unsigned long mmu_seq;
2309 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2311 r = mmu_topup_memory_caches(vcpu);
2315 level = mapping_level(vcpu, gfn);
2317 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2319 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2321 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2322 if (is_error_pfn(pfn))
2323 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2324 spin_lock(&vcpu->kvm->mmu_lock);
2325 if (mmu_notifier_retry(vcpu, mmu_seq))
2327 kvm_mmu_free_some_pages(vcpu);
2328 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2330 spin_unlock(&vcpu->kvm->mmu_lock);
2335 spin_unlock(&vcpu->kvm->mmu_lock);
2336 kvm_release_pfn_clean(pfn);
2340 static void nonpaging_free(struct kvm_vcpu *vcpu)
2342 mmu_free_roots(vcpu);
2345 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2347 struct kvm_mmu *context = &vcpu->arch.mmu;
2349 context->new_cr3 = nonpaging_new_cr3;
2350 context->page_fault = nonpaging_page_fault;
2351 context->gva_to_gpa = nonpaging_gva_to_gpa;
2352 context->free = nonpaging_free;
2353 context->prefetch_page = nonpaging_prefetch_page;
2354 context->sync_page = nonpaging_sync_page;
2355 context->invlpg = nonpaging_invlpg;
2356 context->root_level = 0;
2357 context->shadow_root_level = PT32E_ROOT_LEVEL;
2358 context->root_hpa = INVALID_PAGE;
2362 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2364 ++vcpu->stat.tlb_flush;
2365 set_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests);
2368 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2370 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2371 mmu_free_roots(vcpu);
2374 static void inject_page_fault(struct kvm_vcpu *vcpu,
2378 kvm_inject_page_fault(vcpu, addr, err_code);
2381 static void paging_free(struct kvm_vcpu *vcpu)
2383 nonpaging_free(vcpu);
2386 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2390 bit7 = (gpte >> 7) & 1;
2391 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2395 #include "paging_tmpl.h"
2399 #include "paging_tmpl.h"
2402 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2404 struct kvm_mmu *context = &vcpu->arch.mmu;
2405 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2406 u64 exb_bit_rsvd = 0;
2409 exb_bit_rsvd = rsvd_bits(63, 63);
2411 case PT32_ROOT_LEVEL:
2412 /* no rsvd bits for 2 level 4K page table entries */
2413 context->rsvd_bits_mask[0][1] = 0;
2414 context->rsvd_bits_mask[0][0] = 0;
2415 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2417 if (!is_pse(vcpu)) {
2418 context->rsvd_bits_mask[1][1] = 0;
2422 if (is_cpuid_PSE36())
2423 /* 36bits PSE 4MB page */
2424 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2426 /* 32 bits PSE 4MB page */
2427 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2429 case PT32E_ROOT_LEVEL:
2430 context->rsvd_bits_mask[0][2] =
2431 rsvd_bits(maxphyaddr, 63) |
2432 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2433 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2434 rsvd_bits(maxphyaddr, 62); /* PDE */
2435 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2436 rsvd_bits(maxphyaddr, 62); /* PTE */
2437 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2438 rsvd_bits(maxphyaddr, 62) |
2439 rsvd_bits(13, 20); /* large page */
2440 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2442 case PT64_ROOT_LEVEL:
2443 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2444 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2445 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2446 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2447 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2448 rsvd_bits(maxphyaddr, 51);
2449 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2450 rsvd_bits(maxphyaddr, 51);
2451 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2452 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2453 rsvd_bits(maxphyaddr, 51) |
2455 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2456 rsvd_bits(maxphyaddr, 51) |
2457 rsvd_bits(13, 20); /* large page */
2458 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2463 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2465 struct kvm_mmu *context = &vcpu->arch.mmu;
2467 ASSERT(is_pae(vcpu));
2468 context->new_cr3 = paging_new_cr3;
2469 context->page_fault = paging64_page_fault;
2470 context->gva_to_gpa = paging64_gva_to_gpa;
2471 context->prefetch_page = paging64_prefetch_page;
2472 context->sync_page = paging64_sync_page;
2473 context->invlpg = paging64_invlpg;
2474 context->free = paging_free;
2475 context->root_level = level;
2476 context->shadow_root_level = level;
2477 context->root_hpa = INVALID_PAGE;
2481 static int paging64_init_context(struct kvm_vcpu *vcpu)
2483 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2484 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2487 static int paging32_init_context(struct kvm_vcpu *vcpu)
2489 struct kvm_mmu *context = &vcpu->arch.mmu;
2491 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2492 context->new_cr3 = paging_new_cr3;
2493 context->page_fault = paging32_page_fault;
2494 context->gva_to_gpa = paging32_gva_to_gpa;
2495 context->free = paging_free;
2496 context->prefetch_page = paging32_prefetch_page;
2497 context->sync_page = paging32_sync_page;
2498 context->invlpg = paging32_invlpg;
2499 context->root_level = PT32_ROOT_LEVEL;
2500 context->shadow_root_level = PT32E_ROOT_LEVEL;
2501 context->root_hpa = INVALID_PAGE;
2505 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2507 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2508 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2511 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2513 struct kvm_mmu *context = &vcpu->arch.mmu;
2515 context->new_cr3 = nonpaging_new_cr3;
2516 context->page_fault = tdp_page_fault;
2517 context->free = nonpaging_free;
2518 context->prefetch_page = nonpaging_prefetch_page;
2519 context->sync_page = nonpaging_sync_page;
2520 context->invlpg = nonpaging_invlpg;
2521 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2522 context->root_hpa = INVALID_PAGE;
2524 if (!is_paging(vcpu)) {
2525 context->gva_to_gpa = nonpaging_gva_to_gpa;
2526 context->root_level = 0;
2527 } else if (is_long_mode(vcpu)) {
2528 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2529 context->gva_to_gpa = paging64_gva_to_gpa;
2530 context->root_level = PT64_ROOT_LEVEL;
2531 } else if (is_pae(vcpu)) {
2532 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2533 context->gva_to_gpa = paging64_gva_to_gpa;
2534 context->root_level = PT32E_ROOT_LEVEL;
2536 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2537 context->gva_to_gpa = paging32_gva_to_gpa;
2538 context->root_level = PT32_ROOT_LEVEL;
2544 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2549 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2551 if (!is_paging(vcpu))
2552 r = nonpaging_init_context(vcpu);
2553 else if (is_long_mode(vcpu))
2554 r = paging64_init_context(vcpu);
2555 else if (is_pae(vcpu))
2556 r = paging32E_init_context(vcpu);
2558 r = paging32_init_context(vcpu);
2560 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2561 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2566 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2568 vcpu->arch.update_pte.pfn = bad_pfn;
2571 return init_kvm_tdp_mmu(vcpu);
2573 return init_kvm_softmmu(vcpu);
2576 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2579 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2580 /* mmu.free() should set root_hpa = INVALID_PAGE */
2581 vcpu->arch.mmu.free(vcpu);
2584 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2586 destroy_kvm_mmu(vcpu);
2587 return init_kvm_mmu(vcpu);
2589 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2591 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2595 r = mmu_topup_memory_caches(vcpu);
2598 r = mmu_alloc_roots(vcpu);
2599 spin_lock(&vcpu->kvm->mmu_lock);
2600 mmu_sync_roots(vcpu);
2601 spin_unlock(&vcpu->kvm->mmu_lock);
2604 /* set_cr3() should ensure TLB has been flushed */
2605 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2609 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2611 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2613 mmu_free_roots(vcpu);
2616 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2617 struct kvm_mmu_page *sp,
2621 struct kvm_mmu_page *child;
2624 if (is_shadow_present_pte(pte)) {
2625 if (is_last_spte(pte, sp->role.level))
2626 rmap_remove(vcpu->kvm, spte);
2628 child = page_header(pte & PT64_BASE_ADDR_MASK);
2629 mmu_page_remove_parent_pte(child, spte);
2632 __set_spte(spte, shadow_trap_nonpresent_pte);
2633 if (is_large_pte(pte))
2634 --vcpu->kvm->stat.lpages;
2637 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2638 struct kvm_mmu_page *sp,
2642 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2643 ++vcpu->kvm->stat.mmu_pde_zapped;
2647 ++vcpu->kvm->stat.mmu_pte_updated;
2648 if (!sp->role.cr4_pae)
2649 paging32_update_pte(vcpu, sp, spte, new);
2651 paging64_update_pte(vcpu, sp, spte, new);
2654 static bool need_remote_flush(u64 old, u64 new)
2656 if (!is_shadow_present_pte(old))
2658 if (!is_shadow_present_pte(new))
2660 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2662 old ^= PT64_NX_MASK;
2663 new ^= PT64_NX_MASK;
2664 return (old & ~new & PT64_PERM_MASK) != 0;
2667 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2668 bool remote_flush, bool local_flush)
2674 kvm_flush_remote_tlbs(vcpu->kvm);
2675 else if (local_flush)
2676 kvm_mmu_flush_tlb(vcpu);
2679 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2681 u64 *spte = vcpu->arch.last_pte_updated;
2683 return !!(spte && (*spte & shadow_accessed_mask));
2686 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2692 if (!is_present_gpte(gpte))
2694 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2696 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2698 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2700 if (is_error_pfn(pfn)) {
2701 kvm_release_pfn_clean(pfn);
2704 vcpu->arch.update_pte.gfn = gfn;
2705 vcpu->arch.update_pte.pfn = pfn;
2708 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2710 u64 *spte = vcpu->arch.last_pte_updated;
2713 && vcpu->arch.last_pte_gfn == gfn
2714 && shadow_accessed_mask
2715 && !(*spte & shadow_accessed_mask)
2716 && is_shadow_present_pte(*spte))
2717 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2720 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2721 const u8 *new, int bytes,
2722 bool guest_initiated)
2724 gfn_t gfn = gpa >> PAGE_SHIFT;
2725 struct kvm_mmu_page *sp;
2726 struct hlist_node *node;
2727 LIST_HEAD(invalid_list);
2730 unsigned offset = offset_in_page(gpa);
2732 unsigned page_offset;
2733 unsigned misaligned;
2740 bool remote_flush, local_flush, zap_page;
2742 zap_page = remote_flush = local_flush = false;
2744 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2746 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2749 * Assume that the pte write on a page table of the same type
2750 * as the current vcpu paging mode. This is nearly always true
2751 * (might be false while changing modes). Note it is verified later
2754 if ((is_pae(vcpu) && bytes == 4) || !new) {
2755 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2760 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2763 new = (const u8 *)&gentry;
2768 gentry = *(const u32 *)new;
2771 gentry = *(const u64 *)new;
2778 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2779 spin_lock(&vcpu->kvm->mmu_lock);
2780 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2782 kvm_mmu_access_page(vcpu, gfn);
2783 kvm_mmu_free_some_pages(vcpu);
2784 ++vcpu->kvm->stat.mmu_pte_write;
2785 kvm_mmu_audit(vcpu, "pre pte write");
2786 if (guest_initiated) {
2787 if (gfn == vcpu->arch.last_pt_write_gfn
2788 && !last_updated_pte_accessed(vcpu)) {
2789 ++vcpu->arch.last_pt_write_count;
2790 if (vcpu->arch.last_pt_write_count >= 3)
2793 vcpu->arch.last_pt_write_gfn = gfn;
2794 vcpu->arch.last_pt_write_count = 1;
2795 vcpu->arch.last_pte_updated = NULL;
2799 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2800 pte_size = sp->role.cr4_pae ? 8 : 4;
2801 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2802 misaligned |= bytes < 4;
2803 if (misaligned || flooded) {
2805 * Misaligned accesses are too much trouble to fix
2806 * up; also, they usually indicate a page is not used
2809 * If we're seeing too many writes to a page,
2810 * it may no longer be a page table, or we may be
2811 * forking, in which case it is better to unmap the
2814 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2815 gpa, bytes, sp->role.word);
2816 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2818 ++vcpu->kvm->stat.mmu_flooded;
2821 page_offset = offset;
2822 level = sp->role.level;
2824 if (!sp->role.cr4_pae) {
2825 page_offset <<= 1; /* 32->64 */
2827 * A 32-bit pde maps 4MB while the shadow pdes map
2828 * only 2MB. So we need to double the offset again
2829 * and zap two pdes instead of one.
2831 if (level == PT32_ROOT_LEVEL) {
2832 page_offset &= ~7; /* kill rounding error */
2836 quadrant = page_offset >> PAGE_SHIFT;
2837 page_offset &= ~PAGE_MASK;
2838 if (quadrant != sp->role.quadrant)
2842 spte = &sp->spt[page_offset / sizeof(*spte)];
2845 mmu_pte_write_zap_pte(vcpu, sp, spte);
2847 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2848 if (!remote_flush && need_remote_flush(entry, *spte))
2849 remote_flush = true;
2853 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2854 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2855 kvm_mmu_audit(vcpu, "post pte write");
2856 spin_unlock(&vcpu->kvm->mmu_lock);
2857 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2858 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2859 vcpu->arch.update_pte.pfn = bad_pfn;
2863 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2871 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2873 spin_lock(&vcpu->kvm->mmu_lock);
2874 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2875 spin_unlock(&vcpu->kvm->mmu_lock);
2878 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2880 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2883 LIST_HEAD(invalid_list);
2885 free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2886 while (free_pages < KVM_REFILL_PAGES &&
2887 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2888 struct kvm_mmu_page *sp;
2890 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2891 struct kvm_mmu_page, link);
2892 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2894 ++vcpu->kvm->stat.mmu_recycled;
2896 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2899 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2902 enum emulation_result er;
2904 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2913 r = mmu_topup_memory_caches(vcpu);
2917 er = emulate_instruction(vcpu, cr2, error_code, 0);
2922 case EMULATE_DO_MMIO:
2923 ++vcpu->stat.mmio_exits;
2933 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2935 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2937 vcpu->arch.mmu.invlpg(vcpu, gva);
2938 kvm_mmu_flush_tlb(vcpu);
2939 ++vcpu->stat.invlpg;
2941 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2943 void kvm_enable_tdp(void)
2947 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2949 void kvm_disable_tdp(void)
2951 tdp_enabled = false;
2953 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2955 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2957 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2960 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2968 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2969 * Therefore we need to allocate shadow page tables in the first
2970 * 4GB of memory, which happens to fit the DMA32 zone.
2972 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2976 vcpu->arch.mmu.pae_root = page_address(page);
2977 for (i = 0; i < 4; ++i)
2978 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2983 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2986 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2988 return alloc_mmu_pages(vcpu);
2991 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2994 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2996 return init_kvm_mmu(vcpu);
2999 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3003 destroy_kvm_mmu(vcpu);
3004 free_mmu_pages(vcpu);
3005 mmu_free_memory_caches(vcpu);
3008 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3010 struct kvm_mmu_page *sp;
3012 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3016 if (!test_bit(slot, sp->slot_bitmap))
3020 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3022 if (is_writable_pte(pt[i]))
3023 pt[i] &= ~PT_WRITABLE_MASK;
3025 kvm_flush_remote_tlbs(kvm);
3028 void kvm_mmu_zap_all(struct kvm *kvm)
3030 struct kvm_mmu_page *sp, *node;
3031 LIST_HEAD(invalid_list);
3033 spin_lock(&kvm->mmu_lock);
3035 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3036 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3039 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3040 spin_unlock(&kvm->mmu_lock);
3043 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3044 struct list_head *invalid_list)
3046 struct kvm_mmu_page *page;
3048 page = container_of(kvm->arch.active_mmu_pages.prev,
3049 struct kvm_mmu_page, link);
3050 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3053 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3056 struct kvm *kvm_freed = NULL;
3057 int cache_count = 0;
3059 spin_lock(&kvm_lock);
3061 list_for_each_entry(kvm, &vm_list, vm_list) {
3062 int npages, idx, freed_pages;
3063 LIST_HEAD(invalid_list);
3065 idx = srcu_read_lock(&kvm->srcu);
3066 spin_lock(&kvm->mmu_lock);
3067 npages = kvm->arch.n_alloc_mmu_pages -
3068 kvm->arch.n_free_mmu_pages;
3069 cache_count += npages;
3070 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3071 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3073 cache_count -= freed_pages;
3078 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3079 spin_unlock(&kvm->mmu_lock);
3080 srcu_read_unlock(&kvm->srcu, idx);
3083 list_move_tail(&kvm_freed->vm_list, &vm_list);
3085 spin_unlock(&kvm_lock);
3090 static struct shrinker mmu_shrinker = {
3091 .shrink = mmu_shrink,
3092 .seeks = DEFAULT_SEEKS * 10,
3095 static void mmu_destroy_caches(void)
3097 if (pte_chain_cache)
3098 kmem_cache_destroy(pte_chain_cache);
3099 if (rmap_desc_cache)
3100 kmem_cache_destroy(rmap_desc_cache);
3101 if (mmu_page_header_cache)
3102 kmem_cache_destroy(mmu_page_header_cache);
3105 void kvm_mmu_module_exit(void)
3107 mmu_destroy_caches();
3108 unregister_shrinker(&mmu_shrinker);
3111 int kvm_mmu_module_init(void)
3113 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3114 sizeof(struct kvm_pte_chain),
3116 if (!pte_chain_cache)
3118 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3119 sizeof(struct kvm_rmap_desc),
3121 if (!rmap_desc_cache)
3124 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3125 sizeof(struct kvm_mmu_page),
3127 if (!mmu_page_header_cache)
3130 register_shrinker(&mmu_shrinker);
3135 mmu_destroy_caches();
3140 * Caculate mmu pages needed for kvm.
3142 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3145 unsigned int nr_mmu_pages;
3146 unsigned int nr_pages = 0;
3147 struct kvm_memslots *slots;
3149 slots = kvm_memslots(kvm);
3151 for (i = 0; i < slots->nmemslots; i++)
3152 nr_pages += slots->memslots[i].npages;
3154 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3155 nr_mmu_pages = max(nr_mmu_pages,
3156 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3158 return nr_mmu_pages;
3161 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3164 if (len > buffer->len)
3169 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3174 ret = pv_mmu_peek_buffer(buffer, len);
3179 buffer->processed += len;
3183 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3184 gpa_t addr, gpa_t value)
3189 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3192 r = mmu_topup_memory_caches(vcpu);
3196 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3202 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3204 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3208 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3210 spin_lock(&vcpu->kvm->mmu_lock);
3211 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3212 spin_unlock(&vcpu->kvm->mmu_lock);
3216 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3217 struct kvm_pv_mmu_op_buffer *buffer)
3219 struct kvm_mmu_op_header *header;
3221 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3224 switch (header->op) {
3225 case KVM_MMU_OP_WRITE_PTE: {
3226 struct kvm_mmu_op_write_pte *wpte;
3228 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3231 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3234 case KVM_MMU_OP_FLUSH_TLB: {
3235 struct kvm_mmu_op_flush_tlb *ftlb;
3237 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3240 return kvm_pv_mmu_flush_tlb(vcpu);
3242 case KVM_MMU_OP_RELEASE_PT: {
3243 struct kvm_mmu_op_release_pt *rpt;
3245 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3248 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3254 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3255 gpa_t addr, unsigned long *ret)
3258 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3260 buffer->ptr = buffer->buf;
3261 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3262 buffer->processed = 0;
3264 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3268 while (buffer->len) {
3269 r = kvm_pv_mmu_op_one(vcpu, buffer);
3278 *ret = buffer->processed;
3282 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3284 struct kvm_shadow_walk_iterator iterator;
3287 spin_lock(&vcpu->kvm->mmu_lock);
3288 for_each_shadow_entry(vcpu, addr, iterator) {
3289 sptes[iterator.level-1] = *iterator.sptep;
3291 if (!is_shadow_present_pte(*iterator.sptep))
3294 spin_unlock(&vcpu->kvm->mmu_lock);
3298 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3302 static const char *audit_msg;
3304 static gva_t canonicalize(gva_t gva)
3306 #ifdef CONFIG_X86_64
3307 gva = (long long)(gva << 16) >> 16;
3313 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3315 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3320 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3321 u64 ent = sp->spt[i];
3323 if (is_shadow_present_pte(ent)) {
3324 if (!is_last_spte(ent, sp->role.level)) {
3325 struct kvm_mmu_page *child;
3326 child = page_header(ent & PT64_BASE_ADDR_MASK);
3327 __mmu_spte_walk(kvm, child, fn);
3329 fn(kvm, &sp->spt[i]);
3334 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3337 struct kvm_mmu_page *sp;
3339 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3341 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3342 hpa_t root = vcpu->arch.mmu.root_hpa;
3343 sp = page_header(root);
3344 __mmu_spte_walk(vcpu->kvm, sp, fn);
3347 for (i = 0; i < 4; ++i) {
3348 hpa_t root = vcpu->arch.mmu.pae_root[i];
3350 if (root && VALID_PAGE(root)) {
3351 root &= PT64_BASE_ADDR_MASK;
3352 sp = page_header(root);
3353 __mmu_spte_walk(vcpu->kvm, sp, fn);
3359 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3360 gva_t va, int level)
3362 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3364 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3366 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3369 if (ent == shadow_trap_nonpresent_pte)
3372 va = canonicalize(va);
3373 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3374 audit_mappings_page(vcpu, ent, va, level - 1);
3376 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3377 gfn_t gfn = gpa >> PAGE_SHIFT;
3378 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3379 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3381 if (is_error_pfn(pfn)) {
3382 kvm_release_pfn_clean(pfn);
3386 if (is_shadow_present_pte(ent)
3387 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3388 printk(KERN_ERR "xx audit error: (%s) levels %d"
3389 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3390 audit_msg, vcpu->arch.mmu.root_level,
3392 is_shadow_present_pte(ent));
3393 else if (ent == shadow_notrap_nonpresent_pte
3394 && !is_error_hpa(hpa))
3395 printk(KERN_ERR "audit: (%s) notrap shadow,"
3396 " valid guest gva %lx\n", audit_msg, va);
3397 kvm_release_pfn_clean(pfn);
3403 static void audit_mappings(struct kvm_vcpu *vcpu)
3407 if (vcpu->arch.mmu.root_level == 4)
3408 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3410 for (i = 0; i < 4; ++i)
3411 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3412 audit_mappings_page(vcpu,
3413 vcpu->arch.mmu.pae_root[i],
3418 static int count_rmaps(struct kvm_vcpu *vcpu)
3420 struct kvm *kvm = vcpu->kvm;
3421 struct kvm_memslots *slots;
3425 idx = srcu_read_lock(&kvm->srcu);
3426 slots = kvm_memslots(kvm);
3427 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3428 struct kvm_memory_slot *m = &slots->memslots[i];
3429 struct kvm_rmap_desc *d;
3431 for (j = 0; j < m->npages; ++j) {
3432 unsigned long *rmapp = &m->rmap[j];
3436 if (!(*rmapp & 1)) {
3440 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3442 for (k = 0; k < RMAP_EXT; ++k)
3451 srcu_read_unlock(&kvm->srcu, idx);
3455 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3457 unsigned long *rmapp;
3458 struct kvm_mmu_page *rev_sp;
3461 if (is_writable_pte(*sptep)) {
3462 rev_sp = page_header(__pa(sptep));
3463 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3465 if (!gfn_to_memslot(kvm, gfn)) {
3466 if (!printk_ratelimit())
3468 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3470 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3471 audit_msg, (long int)(sptep - rev_sp->spt),
3477 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3479 if (!printk_ratelimit())
3481 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3489 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3491 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3494 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3496 struct kvm_mmu_page *sp;
3499 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3502 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3505 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3508 if (!(ent & PT_PRESENT_MASK))
3510 if (!is_writable_pte(ent))
3512 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3518 static void audit_rmap(struct kvm_vcpu *vcpu)
3520 check_writable_mappings_rmap(vcpu);
3524 static void audit_write_protection(struct kvm_vcpu *vcpu)
3526 struct kvm_mmu_page *sp;
3527 struct kvm_memory_slot *slot;
3528 unsigned long *rmapp;
3532 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3533 if (sp->role.direct)
3538 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3539 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3540 rmapp = &slot->rmap[gfn - slot->base_gfn];
3542 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3544 if (is_writable_pte(*spte))
3545 printk(KERN_ERR "%s: (%s) shadow page has "
3546 "writable mappings: gfn %lx role %x\n",
3547 __func__, audit_msg, sp->gfn,
3549 spte = rmap_next(vcpu->kvm, rmapp, spte);
3554 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3561 audit_write_protection(vcpu);
3562 if (strcmp("pre pte write", audit_msg) != 0)
3563 audit_mappings(vcpu);
3564 audit_writable_sptes_have_rmaps(vcpu);