2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
40 #include <asm/uaccess.h>
45 #define MAX_IO_MSRS 256
46 #define CR0_RESERVED_BITS \
47 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
48 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
49 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
50 #define CR4_RESERVED_BITS \
51 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
52 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
53 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
54 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
56 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
58 * - enable syscall per default because its emulated by KVM
59 * - enable LME and LMA per default on 64 bit KVM
62 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
64 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
67 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
68 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
70 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
71 struct kvm_cpuid_entry2 __user *entries);
72 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
73 u32 function, u32 index);
75 struct kvm_x86_ops *kvm_x86_ops;
76 EXPORT_SYMBOL_GPL(kvm_x86_ops);
78 struct kvm_stats_debugfs_item debugfs_entries[] = {
79 { "pf_fixed", VCPU_STAT(pf_fixed) },
80 { "pf_guest", VCPU_STAT(pf_guest) },
81 { "tlb_flush", VCPU_STAT(tlb_flush) },
82 { "invlpg", VCPU_STAT(invlpg) },
83 { "exits", VCPU_STAT(exits) },
84 { "io_exits", VCPU_STAT(io_exits) },
85 { "mmio_exits", VCPU_STAT(mmio_exits) },
86 { "signal_exits", VCPU_STAT(signal_exits) },
87 { "irq_window", VCPU_STAT(irq_window_exits) },
88 { "nmi_window", VCPU_STAT(nmi_window_exits) },
89 { "halt_exits", VCPU_STAT(halt_exits) },
90 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
91 { "hypercalls", VCPU_STAT(hypercalls) },
92 { "request_irq", VCPU_STAT(request_irq_exits) },
93 { "request_nmi", VCPU_STAT(request_nmi_exits) },
94 { "irq_exits", VCPU_STAT(irq_exits) },
95 { "host_state_reload", VCPU_STAT(host_state_reload) },
96 { "efer_reload", VCPU_STAT(efer_reload) },
97 { "fpu_reload", VCPU_STAT(fpu_reload) },
98 { "insn_emulation", VCPU_STAT(insn_emulation) },
99 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
100 { "irq_injections", VCPU_STAT(irq_injections) },
101 { "nmi_injections", VCPU_STAT(nmi_injections) },
102 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
103 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
104 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
105 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
106 { "mmu_flooded", VM_STAT(mmu_flooded) },
107 { "mmu_recycled", VM_STAT(mmu_recycled) },
108 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
109 { "mmu_unsync", VM_STAT(mmu_unsync) },
110 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
111 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
112 { "largepages", VM_STAT(lpages) },
116 unsigned long segment_base(u16 selector)
118 struct descriptor_table gdt;
119 struct desc_struct *d;
120 unsigned long table_base;
126 asm("sgdt %0" : "=m"(gdt));
127 table_base = gdt.base;
129 if (selector & 4) { /* from ldt */
132 asm("sldt %0" : "=g"(ldt_selector));
133 table_base = segment_base(ldt_selector);
135 d = (struct desc_struct *)(table_base + (selector & ~7));
136 v = d->base0 | ((unsigned long)d->base1 << 16) |
137 ((unsigned long)d->base2 << 24);
139 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
140 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
144 EXPORT_SYMBOL_GPL(segment_base);
146 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
148 if (irqchip_in_kernel(vcpu->kvm))
149 return vcpu->arch.apic_base;
151 return vcpu->arch.apic_base;
153 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
155 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
157 /* TODO: reserve bits check */
158 if (irqchip_in_kernel(vcpu->kvm))
159 kvm_lapic_set_base(vcpu, data);
161 vcpu->arch.apic_base = data;
163 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
165 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
167 WARN_ON(vcpu->arch.exception.pending);
168 vcpu->arch.exception.pending = true;
169 vcpu->arch.exception.has_error_code = false;
170 vcpu->arch.exception.nr = nr;
172 EXPORT_SYMBOL_GPL(kvm_queue_exception);
174 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
177 ++vcpu->stat.pf_guest;
179 if (vcpu->arch.exception.pending) {
180 if (vcpu->arch.exception.nr == PF_VECTOR) {
181 printk(KERN_DEBUG "kvm: inject_page_fault:"
182 " double fault 0x%lx\n", addr);
183 vcpu->arch.exception.nr = DF_VECTOR;
184 vcpu->arch.exception.error_code = 0;
185 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
186 /* triple fault -> shutdown */
187 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
191 vcpu->arch.cr2 = addr;
192 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
195 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
197 vcpu->arch.nmi_pending = 1;
199 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
201 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
203 WARN_ON(vcpu->arch.exception.pending);
204 vcpu->arch.exception.pending = true;
205 vcpu->arch.exception.has_error_code = true;
206 vcpu->arch.exception.nr = nr;
207 vcpu->arch.exception.error_code = error_code;
209 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
211 static void __queue_exception(struct kvm_vcpu *vcpu)
213 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
214 vcpu->arch.exception.has_error_code,
215 vcpu->arch.exception.error_code);
219 * Load the pae pdptrs. Return true is they are all valid.
221 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
223 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
224 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
227 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
229 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
230 offset * sizeof(u64), sizeof(pdpte));
235 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
236 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
243 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
248 EXPORT_SYMBOL_GPL(load_pdptrs);
250 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
252 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
256 if (is_long_mode(vcpu) || !is_pae(vcpu))
259 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
262 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
268 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
270 if (cr0 & CR0_RESERVED_BITS) {
271 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
272 cr0, vcpu->arch.cr0);
273 kvm_inject_gp(vcpu, 0);
277 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
278 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
279 kvm_inject_gp(vcpu, 0);
283 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
284 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
285 "and a clear PE flag\n");
286 kvm_inject_gp(vcpu, 0);
290 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
292 if ((vcpu->arch.shadow_efer & EFER_LME)) {
296 printk(KERN_DEBUG "set_cr0: #GP, start paging "
297 "in long mode while PAE is disabled\n");
298 kvm_inject_gp(vcpu, 0);
301 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
303 printk(KERN_DEBUG "set_cr0: #GP, start paging "
304 "in long mode while CS.L == 1\n");
305 kvm_inject_gp(vcpu, 0);
311 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
312 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
314 kvm_inject_gp(vcpu, 0);
320 kvm_x86_ops->set_cr0(vcpu, cr0);
321 vcpu->arch.cr0 = cr0;
323 kvm_mmu_sync_global(vcpu);
324 kvm_mmu_reset_context(vcpu);
327 EXPORT_SYMBOL_GPL(kvm_set_cr0);
329 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
331 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
332 KVMTRACE_1D(LMSW, vcpu,
333 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
336 EXPORT_SYMBOL_GPL(kvm_lmsw);
338 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
340 if (cr4 & CR4_RESERVED_BITS) {
341 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
342 kvm_inject_gp(vcpu, 0);
346 if (is_long_mode(vcpu)) {
347 if (!(cr4 & X86_CR4_PAE)) {
348 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
350 kvm_inject_gp(vcpu, 0);
353 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
354 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
355 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
356 kvm_inject_gp(vcpu, 0);
360 if (cr4 & X86_CR4_VMXE) {
361 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
362 kvm_inject_gp(vcpu, 0);
365 kvm_x86_ops->set_cr4(vcpu, cr4);
366 vcpu->arch.cr4 = cr4;
367 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
368 kvm_mmu_sync_global(vcpu);
369 kvm_mmu_reset_context(vcpu);
371 EXPORT_SYMBOL_GPL(kvm_set_cr4);
373 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
375 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
376 kvm_mmu_sync_roots(vcpu);
377 kvm_mmu_flush_tlb(vcpu);
381 if (is_long_mode(vcpu)) {
382 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
383 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
384 kvm_inject_gp(vcpu, 0);
389 if (cr3 & CR3_PAE_RESERVED_BITS) {
391 "set_cr3: #GP, reserved bits\n");
392 kvm_inject_gp(vcpu, 0);
395 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
396 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
398 kvm_inject_gp(vcpu, 0);
403 * We don't check reserved bits in nonpae mode, because
404 * this isn't enforced, and VMware depends on this.
409 * Does the new cr3 value map to physical memory? (Note, we
410 * catch an invalid cr3 even in real-mode, because it would
411 * cause trouble later on when we turn on paging anyway.)
413 * A real CPU would silently accept an invalid cr3 and would
414 * attempt to use it - with largely undefined (and often hard
415 * to debug) behavior on the guest side.
417 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
418 kvm_inject_gp(vcpu, 0);
420 vcpu->arch.cr3 = cr3;
421 vcpu->arch.mmu.new_cr3(vcpu);
424 EXPORT_SYMBOL_GPL(kvm_set_cr3);
426 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
428 if (cr8 & CR8_RESERVED_BITS) {
429 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
430 kvm_inject_gp(vcpu, 0);
433 if (irqchip_in_kernel(vcpu->kvm))
434 kvm_lapic_set_tpr(vcpu, cr8);
436 vcpu->arch.cr8 = cr8;
438 EXPORT_SYMBOL_GPL(kvm_set_cr8);
440 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
442 if (irqchip_in_kernel(vcpu->kvm))
443 return kvm_lapic_get_cr8(vcpu);
445 return vcpu->arch.cr8;
447 EXPORT_SYMBOL_GPL(kvm_get_cr8);
449 static inline u32 bit(int bitno)
451 return 1 << (bitno & 31);
455 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
456 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
458 * This list is modified at module load time to reflect the
459 * capabilities of the host cpu.
461 static u32 msrs_to_save[] = {
462 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
465 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
467 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
468 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
471 static unsigned num_msrs_to_save;
473 static u32 emulated_msrs[] = {
474 MSR_IA32_MISC_ENABLE,
477 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
479 if (efer & efer_reserved_bits) {
480 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
482 kvm_inject_gp(vcpu, 0);
487 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
488 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
489 kvm_inject_gp(vcpu, 0);
493 if (efer & EFER_SVME) {
494 struct kvm_cpuid_entry2 *feat;
496 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
497 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
498 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
499 kvm_inject_gp(vcpu, 0);
504 kvm_x86_ops->set_efer(vcpu, efer);
507 efer |= vcpu->arch.shadow_efer & EFER_LMA;
509 vcpu->arch.shadow_efer = efer;
512 void kvm_enable_efer_bits(u64 mask)
514 efer_reserved_bits &= ~mask;
516 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
520 * Writes msr value into into the appropriate "register".
521 * Returns 0 on success, non-0 otherwise.
522 * Assumes vcpu_load() was already called.
524 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
526 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
530 * Adapt set_msr() to msr_io()'s calling convention
532 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
534 return kvm_set_msr(vcpu, index, *data);
537 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
540 struct pvclock_wall_clock wc;
541 struct timespec now, sys, boot;
548 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
551 * The guest calculates current wall clock time by adding
552 * system time (updated by kvm_write_guest_time below) to the
553 * wall clock specified here. guest system time equals host
554 * system time for us, thus we must fill in host boot time here.
556 now = current_kernel_time();
558 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
560 wc.sec = boot.tv_sec;
561 wc.nsec = boot.tv_nsec;
562 wc.version = version;
564 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
567 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
570 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
572 uint32_t quotient, remainder;
574 /* Don't try to replace with do_div(), this one calculates
575 * "(dividend << 32) / divisor" */
577 : "=a" (quotient), "=d" (remainder)
578 : "0" (0), "1" (dividend), "r" (divisor) );
582 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
584 uint64_t nsecs = 1000000000LL;
589 tps64 = tsc_khz * 1000LL;
590 while (tps64 > nsecs*2) {
595 tps32 = (uint32_t)tps64;
596 while (tps32 <= (uint32_t)nsecs) {
601 hv_clock->tsc_shift = shift;
602 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
604 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
605 __func__, tsc_khz, hv_clock->tsc_shift,
606 hv_clock->tsc_to_system_mul);
609 static void kvm_write_guest_time(struct kvm_vcpu *v)
613 struct kvm_vcpu_arch *vcpu = &v->arch;
616 if ((!vcpu->time_page))
619 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
620 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
621 vcpu->hv_clock_tsc_khz = tsc_khz;
624 /* Keep irq disabled to prevent changes to the clock */
625 local_irq_save(flags);
626 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
627 &vcpu->hv_clock.tsc_timestamp);
629 local_irq_restore(flags);
631 /* With all the info we got, fill in the values */
633 vcpu->hv_clock.system_time = ts.tv_nsec +
634 (NSEC_PER_SEC * (u64)ts.tv_sec);
636 * The interface expects us to write an even number signaling that the
637 * update is finished. Since the guest won't see the intermediate
638 * state, we just increase by 2 at the end.
640 vcpu->hv_clock.version += 2;
642 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
644 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
645 sizeof(vcpu->hv_clock));
647 kunmap_atomic(shared_kaddr, KM_USER0);
649 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
652 static bool msr_mtrr_valid(unsigned msr)
655 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
656 case MSR_MTRRfix64K_00000:
657 case MSR_MTRRfix16K_80000:
658 case MSR_MTRRfix16K_A0000:
659 case MSR_MTRRfix4K_C0000:
660 case MSR_MTRRfix4K_C8000:
661 case MSR_MTRRfix4K_D0000:
662 case MSR_MTRRfix4K_D8000:
663 case MSR_MTRRfix4K_E0000:
664 case MSR_MTRRfix4K_E8000:
665 case MSR_MTRRfix4K_F0000:
666 case MSR_MTRRfix4K_F8000:
667 case MSR_MTRRdefType:
668 case MSR_IA32_CR_PAT:
676 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
678 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
680 if (!msr_mtrr_valid(msr))
683 if (msr == MSR_MTRRdefType) {
684 vcpu->arch.mtrr_state.def_type = data;
685 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
686 } else if (msr == MSR_MTRRfix64K_00000)
688 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
689 p[1 + msr - MSR_MTRRfix16K_80000] = data;
690 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
691 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
692 else if (msr == MSR_IA32_CR_PAT)
693 vcpu->arch.pat = data;
694 else { /* Variable MTRRs */
695 int idx, is_mtrr_mask;
698 idx = (msr - 0x200) / 2;
699 is_mtrr_mask = msr - 0x200 - 2 * idx;
702 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
705 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
709 kvm_mmu_reset_context(vcpu);
713 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
717 set_efer(vcpu, data);
719 case MSR_IA32_MC0_STATUS:
720 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
723 case MSR_IA32_MCG_STATUS:
724 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
727 case MSR_IA32_MCG_CTL:
728 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
731 case MSR_IA32_DEBUGCTLMSR:
733 /* We support the non-activated case already */
735 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
736 /* Values other than LBR and BTF are vendor-specific,
737 thus reserved and should throw a #GP */
740 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
743 case MSR_IA32_UCODE_REV:
744 case MSR_IA32_UCODE_WRITE:
745 case MSR_VM_HSAVE_PA:
747 case 0x200 ... 0x2ff:
748 return set_msr_mtrr(vcpu, msr, data);
749 case MSR_IA32_APICBASE:
750 kvm_set_apic_base(vcpu, data);
752 case MSR_IA32_MISC_ENABLE:
753 vcpu->arch.ia32_misc_enable_msr = data;
755 case MSR_KVM_WALL_CLOCK:
756 vcpu->kvm->arch.wall_clock = data;
757 kvm_write_wall_clock(vcpu->kvm, data);
759 case MSR_KVM_SYSTEM_TIME: {
760 if (vcpu->arch.time_page) {
761 kvm_release_page_dirty(vcpu->arch.time_page);
762 vcpu->arch.time_page = NULL;
765 vcpu->arch.time = data;
767 /* we verify if the enable bit is set... */
771 /* ...but clean it before doing the actual write */
772 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
774 vcpu->arch.time_page =
775 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
777 if (is_error_page(vcpu->arch.time_page)) {
778 kvm_release_page_clean(vcpu->arch.time_page);
779 vcpu->arch.time_page = NULL;
782 kvm_write_guest_time(vcpu);
786 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
791 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
795 * Reads an msr value (of 'msr_index') into 'pdata'.
796 * Returns 0 on success, non-0 otherwise.
797 * Assumes vcpu_load() was already called.
799 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
801 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
804 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
806 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
808 if (!msr_mtrr_valid(msr))
811 if (msr == MSR_MTRRdefType)
812 *pdata = vcpu->arch.mtrr_state.def_type +
813 (vcpu->arch.mtrr_state.enabled << 10);
814 else if (msr == MSR_MTRRfix64K_00000)
816 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
817 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
818 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
819 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
820 else if (msr == MSR_IA32_CR_PAT)
821 *pdata = vcpu->arch.pat;
822 else { /* Variable MTRRs */
823 int idx, is_mtrr_mask;
826 idx = (msr - 0x200) / 2;
827 is_mtrr_mask = msr - 0x200 - 2 * idx;
830 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
833 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
840 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
845 case 0xc0010010: /* SYSCFG */
846 case 0xc0010015: /* HWCR */
847 case MSR_IA32_PLATFORM_ID:
848 case MSR_IA32_P5_MC_ADDR:
849 case MSR_IA32_P5_MC_TYPE:
850 case MSR_IA32_MC0_CTL:
851 case MSR_IA32_MCG_STATUS:
852 case MSR_IA32_MCG_CAP:
853 case MSR_IA32_MCG_CTL:
854 case MSR_IA32_MC0_MISC:
855 case MSR_IA32_MC0_MISC+4:
856 case MSR_IA32_MC0_MISC+8:
857 case MSR_IA32_MC0_MISC+12:
858 case MSR_IA32_MC0_MISC+16:
859 case MSR_IA32_MC0_MISC+20:
860 case MSR_IA32_UCODE_REV:
861 case MSR_IA32_EBL_CR_POWERON:
862 case MSR_IA32_DEBUGCTLMSR:
863 case MSR_IA32_LASTBRANCHFROMIP:
864 case MSR_IA32_LASTBRANCHTOIP:
865 case MSR_IA32_LASTINTFROMIP:
866 case MSR_IA32_LASTINTTOIP:
867 case MSR_VM_HSAVE_PA:
871 data = 0x500 | KVM_NR_VAR_MTRR;
873 case 0x200 ... 0x2ff:
874 return get_msr_mtrr(vcpu, msr, pdata);
875 case 0xcd: /* fsb frequency */
878 case MSR_IA32_APICBASE:
879 data = kvm_get_apic_base(vcpu);
881 case MSR_IA32_MISC_ENABLE:
882 data = vcpu->arch.ia32_misc_enable_msr;
884 case MSR_IA32_PERF_STATUS:
885 /* TSC increment by tick */
888 data |= (((uint64_t)4ULL) << 40);
891 data = vcpu->arch.shadow_efer;
893 case MSR_KVM_WALL_CLOCK:
894 data = vcpu->kvm->arch.wall_clock;
896 case MSR_KVM_SYSTEM_TIME:
897 data = vcpu->arch.time;
900 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
906 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
909 * Read or write a bunch of msrs. All parameters are kernel addresses.
911 * @return number of msrs set successfully.
913 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
914 struct kvm_msr_entry *entries,
915 int (*do_msr)(struct kvm_vcpu *vcpu,
916 unsigned index, u64 *data))
922 down_read(&vcpu->kvm->slots_lock);
923 for (i = 0; i < msrs->nmsrs; ++i)
924 if (do_msr(vcpu, entries[i].index, &entries[i].data))
926 up_read(&vcpu->kvm->slots_lock);
934 * Read or write a bunch of msrs. Parameters are user addresses.
936 * @return number of msrs set successfully.
938 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
939 int (*do_msr)(struct kvm_vcpu *vcpu,
940 unsigned index, u64 *data),
943 struct kvm_msrs msrs;
944 struct kvm_msr_entry *entries;
949 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
953 if (msrs.nmsrs >= MAX_IO_MSRS)
957 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
958 entries = vmalloc(size);
963 if (copy_from_user(entries, user_msrs->entries, size))
966 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
971 if (writeback && copy_to_user(user_msrs->entries, entries, size))
982 int kvm_dev_ioctl_check_extension(long ext)
987 case KVM_CAP_IRQCHIP:
989 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
990 case KVM_CAP_SET_TSS_ADDR:
991 case KVM_CAP_EXT_CPUID:
993 case KVM_CAP_NOP_IO_DELAY:
994 case KVM_CAP_MP_STATE:
995 case KVM_CAP_SYNC_MMU:
996 case KVM_CAP_REINJECT_CONTROL:
999 case KVM_CAP_COALESCED_MMIO:
1000 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1003 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1005 case KVM_CAP_NR_VCPUS:
1008 case KVM_CAP_NR_MEMSLOTS:
1009 r = KVM_MEMORY_SLOTS;
1011 case KVM_CAP_PV_MMU:
1017 case KVM_CAP_CLOCKSOURCE:
1018 r = boot_cpu_has(X86_FEATURE_CONSTANT_TSC);
1028 long kvm_arch_dev_ioctl(struct file *filp,
1029 unsigned int ioctl, unsigned long arg)
1031 void __user *argp = (void __user *)arg;
1035 case KVM_GET_MSR_INDEX_LIST: {
1036 struct kvm_msr_list __user *user_msr_list = argp;
1037 struct kvm_msr_list msr_list;
1041 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1044 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1045 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1048 if (n < num_msrs_to_save)
1051 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1052 num_msrs_to_save * sizeof(u32)))
1054 if (copy_to_user(user_msr_list->indices
1055 + num_msrs_to_save * sizeof(u32),
1057 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1062 case KVM_GET_SUPPORTED_CPUID: {
1063 struct kvm_cpuid2 __user *cpuid_arg = argp;
1064 struct kvm_cpuid2 cpuid;
1067 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1069 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1070 cpuid_arg->entries);
1075 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1087 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1089 kvm_x86_ops->vcpu_load(vcpu, cpu);
1090 kvm_write_guest_time(vcpu);
1093 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1095 kvm_x86_ops->vcpu_put(vcpu);
1096 kvm_put_guest_fpu(vcpu);
1099 static int is_efer_nx(void)
1103 rdmsrl(MSR_EFER, efer);
1104 return efer & EFER_NX;
1107 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1110 struct kvm_cpuid_entry2 *e, *entry;
1113 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1114 e = &vcpu->arch.cpuid_entries[i];
1115 if (e->function == 0x80000001) {
1120 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1121 entry->edx &= ~(1 << 20);
1122 printk(KERN_INFO "kvm: guest NX capability removed\n");
1126 /* when an old userspace process fills a new kernel module */
1127 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1128 struct kvm_cpuid *cpuid,
1129 struct kvm_cpuid_entry __user *entries)
1132 struct kvm_cpuid_entry *cpuid_entries;
1135 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1138 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1142 if (copy_from_user(cpuid_entries, entries,
1143 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1145 for (i = 0; i < cpuid->nent; i++) {
1146 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1147 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1148 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1149 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1150 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1151 vcpu->arch.cpuid_entries[i].index = 0;
1152 vcpu->arch.cpuid_entries[i].flags = 0;
1153 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1154 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1155 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1157 vcpu->arch.cpuid_nent = cpuid->nent;
1158 cpuid_fix_nx_cap(vcpu);
1162 vfree(cpuid_entries);
1167 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1168 struct kvm_cpuid2 *cpuid,
1169 struct kvm_cpuid_entry2 __user *entries)
1174 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1177 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1178 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1180 vcpu->arch.cpuid_nent = cpuid->nent;
1187 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1188 struct kvm_cpuid2 *cpuid,
1189 struct kvm_cpuid_entry2 __user *entries)
1194 if (cpuid->nent < vcpu->arch.cpuid_nent)
1197 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1198 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1203 cpuid->nent = vcpu->arch.cpuid_nent;
1207 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1210 entry->function = function;
1211 entry->index = index;
1212 cpuid_count(entry->function, entry->index,
1213 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1217 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1218 u32 index, int *nent, int maxnent)
1220 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1221 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1222 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1223 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1224 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1225 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1226 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1227 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1228 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1229 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1230 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1231 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1232 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1233 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1234 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1235 bit(X86_FEATURE_PGE) |
1236 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1237 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1238 bit(X86_FEATURE_SYSCALL) |
1239 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1240 #ifdef CONFIG_X86_64
1241 bit(X86_FEATURE_LM) |
1243 bit(X86_FEATURE_MMXEXT) |
1244 bit(X86_FEATURE_3DNOWEXT) |
1245 bit(X86_FEATURE_3DNOW);
1246 const u32 kvm_supported_word3_x86_features =
1247 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1248 const u32 kvm_supported_word6_x86_features =
1249 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1250 bit(X86_FEATURE_SVM);
1252 /* all calls to cpuid_count() should be made on the same cpu */
1254 do_cpuid_1_ent(entry, function, index);
1259 entry->eax = min(entry->eax, (u32)0xb);
1262 entry->edx &= kvm_supported_word0_x86_features;
1263 entry->ecx &= kvm_supported_word3_x86_features;
1265 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1266 * may return different values. This forces us to get_cpu() before
1267 * issuing the first command, and also to emulate this annoying behavior
1268 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1270 int t, times = entry->eax & 0xff;
1272 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1273 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1274 for (t = 1; t < times && *nent < maxnent; ++t) {
1275 do_cpuid_1_ent(&entry[t], function, 0);
1276 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1281 /* function 4 and 0xb have additional index. */
1285 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1286 /* read more entries until cache_type is zero */
1287 for (i = 1; *nent < maxnent; ++i) {
1288 cache_type = entry[i - 1].eax & 0x1f;
1291 do_cpuid_1_ent(&entry[i], function, i);
1293 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1301 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1302 /* read more entries until level_type is zero */
1303 for (i = 1; *nent < maxnent; ++i) {
1304 level_type = entry[i - 1].ecx & 0xff00;
1307 do_cpuid_1_ent(&entry[i], function, i);
1309 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1315 entry->eax = min(entry->eax, 0x8000001a);
1318 entry->edx &= kvm_supported_word1_x86_features;
1319 entry->ecx &= kvm_supported_word6_x86_features;
1325 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1326 struct kvm_cpuid_entry2 __user *entries)
1328 struct kvm_cpuid_entry2 *cpuid_entries;
1329 int limit, nent = 0, r = -E2BIG;
1332 if (cpuid->nent < 1)
1335 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1339 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1340 limit = cpuid_entries[0].eax;
1341 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1342 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1343 &nent, cpuid->nent);
1345 if (nent >= cpuid->nent)
1348 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1349 limit = cpuid_entries[nent - 1].eax;
1350 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1351 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1352 &nent, cpuid->nent);
1354 if (copy_to_user(entries, cpuid_entries,
1355 nent * sizeof(struct kvm_cpuid_entry2)))
1361 vfree(cpuid_entries);
1366 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1367 struct kvm_lapic_state *s)
1370 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1376 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1377 struct kvm_lapic_state *s)
1380 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1381 kvm_apic_post_state_restore(vcpu);
1387 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1388 struct kvm_interrupt *irq)
1390 if (irq->irq < 0 || irq->irq >= 256)
1392 if (irqchip_in_kernel(vcpu->kvm))
1396 set_bit(irq->irq, vcpu->arch.irq_pending);
1397 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1404 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1407 kvm_inject_nmi(vcpu);
1413 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1414 struct kvm_tpr_access_ctl *tac)
1418 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1422 long kvm_arch_vcpu_ioctl(struct file *filp,
1423 unsigned int ioctl, unsigned long arg)
1425 struct kvm_vcpu *vcpu = filp->private_data;
1426 void __user *argp = (void __user *)arg;
1428 struct kvm_lapic_state *lapic = NULL;
1431 case KVM_GET_LAPIC: {
1432 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1437 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1441 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1446 case KVM_SET_LAPIC: {
1447 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1452 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1454 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1460 case KVM_INTERRUPT: {
1461 struct kvm_interrupt irq;
1464 if (copy_from_user(&irq, argp, sizeof irq))
1466 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1473 r = kvm_vcpu_ioctl_nmi(vcpu);
1479 case KVM_SET_CPUID: {
1480 struct kvm_cpuid __user *cpuid_arg = argp;
1481 struct kvm_cpuid cpuid;
1484 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1486 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1491 case KVM_SET_CPUID2: {
1492 struct kvm_cpuid2 __user *cpuid_arg = argp;
1493 struct kvm_cpuid2 cpuid;
1496 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1498 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1499 cpuid_arg->entries);
1504 case KVM_GET_CPUID2: {
1505 struct kvm_cpuid2 __user *cpuid_arg = argp;
1506 struct kvm_cpuid2 cpuid;
1509 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1511 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1512 cpuid_arg->entries);
1516 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1522 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1525 r = msr_io(vcpu, argp, do_set_msr, 0);
1527 case KVM_TPR_ACCESS_REPORTING: {
1528 struct kvm_tpr_access_ctl tac;
1531 if (copy_from_user(&tac, argp, sizeof tac))
1533 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1537 if (copy_to_user(argp, &tac, sizeof tac))
1542 case KVM_SET_VAPIC_ADDR: {
1543 struct kvm_vapic_addr va;
1546 if (!irqchip_in_kernel(vcpu->kvm))
1549 if (copy_from_user(&va, argp, sizeof va))
1552 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1564 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1568 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1570 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1574 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1575 u32 kvm_nr_mmu_pages)
1577 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1580 down_write(&kvm->slots_lock);
1582 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1583 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1585 up_write(&kvm->slots_lock);
1589 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1591 return kvm->arch.n_alloc_mmu_pages;
1594 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1597 struct kvm_mem_alias *alias;
1599 for (i = 0; i < kvm->arch.naliases; ++i) {
1600 alias = &kvm->arch.aliases[i];
1601 if (gfn >= alias->base_gfn
1602 && gfn < alias->base_gfn + alias->npages)
1603 return alias->target_gfn + gfn - alias->base_gfn;
1609 * Set a new alias region. Aliases map a portion of physical memory into
1610 * another portion. This is useful for memory windows, for example the PC
1613 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1614 struct kvm_memory_alias *alias)
1617 struct kvm_mem_alias *p;
1620 /* General sanity checks */
1621 if (alias->memory_size & (PAGE_SIZE - 1))
1623 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1625 if (alias->slot >= KVM_ALIAS_SLOTS)
1627 if (alias->guest_phys_addr + alias->memory_size
1628 < alias->guest_phys_addr)
1630 if (alias->target_phys_addr + alias->memory_size
1631 < alias->target_phys_addr)
1634 down_write(&kvm->slots_lock);
1635 spin_lock(&kvm->mmu_lock);
1637 p = &kvm->arch.aliases[alias->slot];
1638 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1639 p->npages = alias->memory_size >> PAGE_SHIFT;
1640 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1642 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1643 if (kvm->arch.aliases[n - 1].npages)
1645 kvm->arch.naliases = n;
1647 spin_unlock(&kvm->mmu_lock);
1648 kvm_mmu_zap_all(kvm);
1650 up_write(&kvm->slots_lock);
1658 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1663 switch (chip->chip_id) {
1664 case KVM_IRQCHIP_PIC_MASTER:
1665 memcpy(&chip->chip.pic,
1666 &pic_irqchip(kvm)->pics[0],
1667 sizeof(struct kvm_pic_state));
1669 case KVM_IRQCHIP_PIC_SLAVE:
1670 memcpy(&chip->chip.pic,
1671 &pic_irqchip(kvm)->pics[1],
1672 sizeof(struct kvm_pic_state));
1674 case KVM_IRQCHIP_IOAPIC:
1675 memcpy(&chip->chip.ioapic,
1676 ioapic_irqchip(kvm),
1677 sizeof(struct kvm_ioapic_state));
1686 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1691 switch (chip->chip_id) {
1692 case KVM_IRQCHIP_PIC_MASTER:
1693 memcpy(&pic_irqchip(kvm)->pics[0],
1695 sizeof(struct kvm_pic_state));
1697 case KVM_IRQCHIP_PIC_SLAVE:
1698 memcpy(&pic_irqchip(kvm)->pics[1],
1700 sizeof(struct kvm_pic_state));
1702 case KVM_IRQCHIP_IOAPIC:
1703 memcpy(ioapic_irqchip(kvm),
1705 sizeof(struct kvm_ioapic_state));
1711 kvm_pic_update_irq(pic_irqchip(kvm));
1715 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1719 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1723 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1727 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1728 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1732 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1733 struct kvm_reinject_control *control)
1735 if (!kvm->arch.vpit)
1737 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1742 * Get (and clear) the dirty memory log for a memory slot.
1744 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1745 struct kvm_dirty_log *log)
1749 struct kvm_memory_slot *memslot;
1752 down_write(&kvm->slots_lock);
1754 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1758 /* If nothing is dirty, don't bother messing with page tables. */
1760 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1761 kvm_flush_remote_tlbs(kvm);
1762 memslot = &kvm->memslots[log->slot];
1763 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1764 memset(memslot->dirty_bitmap, 0, n);
1768 up_write(&kvm->slots_lock);
1772 long kvm_arch_vm_ioctl(struct file *filp,
1773 unsigned int ioctl, unsigned long arg)
1775 struct kvm *kvm = filp->private_data;
1776 void __user *argp = (void __user *)arg;
1779 * This union makes it completely explicit to gcc-3.x
1780 * that these two variables' stack usage should be
1781 * combined, not added together.
1784 struct kvm_pit_state ps;
1785 struct kvm_memory_alias alias;
1789 case KVM_SET_TSS_ADDR:
1790 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1794 case KVM_SET_MEMORY_REGION: {
1795 struct kvm_memory_region kvm_mem;
1796 struct kvm_userspace_memory_region kvm_userspace_mem;
1799 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1801 kvm_userspace_mem.slot = kvm_mem.slot;
1802 kvm_userspace_mem.flags = kvm_mem.flags;
1803 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1804 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1805 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1810 case KVM_SET_NR_MMU_PAGES:
1811 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1815 case KVM_GET_NR_MMU_PAGES:
1816 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1818 case KVM_SET_MEMORY_ALIAS:
1820 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1822 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1826 case KVM_CREATE_IRQCHIP:
1828 kvm->arch.vpic = kvm_create_pic(kvm);
1829 if (kvm->arch.vpic) {
1830 r = kvm_ioapic_init(kvm);
1832 kfree(kvm->arch.vpic);
1833 kvm->arch.vpic = NULL;
1839 case KVM_CREATE_PIT:
1840 mutex_lock(&kvm->lock);
1843 goto create_pit_unlock;
1845 kvm->arch.vpit = kvm_create_pit(kvm);
1849 mutex_unlock(&kvm->lock);
1851 case KVM_IRQ_LINE: {
1852 struct kvm_irq_level irq_event;
1855 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1857 if (irqchip_in_kernel(kvm)) {
1858 mutex_lock(&kvm->lock);
1859 kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1860 irq_event.irq, irq_event.level);
1861 mutex_unlock(&kvm->lock);
1866 case KVM_GET_IRQCHIP: {
1867 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1868 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1874 if (copy_from_user(chip, argp, sizeof *chip))
1875 goto get_irqchip_out;
1877 if (!irqchip_in_kernel(kvm))
1878 goto get_irqchip_out;
1879 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1881 goto get_irqchip_out;
1883 if (copy_to_user(argp, chip, sizeof *chip))
1884 goto get_irqchip_out;
1892 case KVM_SET_IRQCHIP: {
1893 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1894 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1900 if (copy_from_user(chip, argp, sizeof *chip))
1901 goto set_irqchip_out;
1903 if (!irqchip_in_kernel(kvm))
1904 goto set_irqchip_out;
1905 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1907 goto set_irqchip_out;
1917 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1920 if (!kvm->arch.vpit)
1922 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1926 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1933 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1936 if (!kvm->arch.vpit)
1938 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1944 case KVM_REINJECT_CONTROL: {
1945 struct kvm_reinject_control control;
1947 if (copy_from_user(&control, argp, sizeof(control)))
1949 r = kvm_vm_ioctl_reinject(kvm, &control);
1962 static void kvm_init_msr_list(void)
1967 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1968 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1971 msrs_to_save[j] = msrs_to_save[i];
1974 num_msrs_to_save = j;
1978 * Only apic need an MMIO device hook, so shortcut now..
1980 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1981 gpa_t addr, int len,
1984 struct kvm_io_device *dev;
1986 if (vcpu->arch.apic) {
1987 dev = &vcpu->arch.apic->dev;
1988 if (dev->in_range(dev, addr, len, is_write))
1995 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1996 gpa_t addr, int len,
1999 struct kvm_io_device *dev;
2001 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2003 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2008 int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2009 struct kvm_vcpu *vcpu)
2012 int r = X86EMUL_CONTINUE;
2015 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2016 unsigned offset = addr & (PAGE_SIZE-1);
2017 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2020 if (gpa == UNMAPPED_GVA) {
2021 r = X86EMUL_PROPAGATE_FAULT;
2024 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2026 r = X86EMUL_UNHANDLEABLE;
2038 int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2039 struct kvm_vcpu *vcpu)
2042 int r = X86EMUL_CONTINUE;
2045 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2046 unsigned offset = addr & (PAGE_SIZE-1);
2047 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2050 if (gpa == UNMAPPED_GVA) {
2051 r = X86EMUL_PROPAGATE_FAULT;
2054 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2056 r = X86EMUL_UNHANDLEABLE;
2069 static int emulator_read_emulated(unsigned long addr,
2072 struct kvm_vcpu *vcpu)
2074 struct kvm_io_device *mmio_dev;
2077 if (vcpu->mmio_read_completed) {
2078 memcpy(val, vcpu->mmio_data, bytes);
2079 vcpu->mmio_read_completed = 0;
2080 return X86EMUL_CONTINUE;
2083 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2085 /* For APIC access vmexit */
2086 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2089 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2090 == X86EMUL_CONTINUE)
2091 return X86EMUL_CONTINUE;
2092 if (gpa == UNMAPPED_GVA)
2093 return X86EMUL_PROPAGATE_FAULT;
2097 * Is this MMIO handled locally?
2099 mutex_lock(&vcpu->kvm->lock);
2100 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2102 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2103 mutex_unlock(&vcpu->kvm->lock);
2104 return X86EMUL_CONTINUE;
2106 mutex_unlock(&vcpu->kvm->lock);
2108 vcpu->mmio_needed = 1;
2109 vcpu->mmio_phys_addr = gpa;
2110 vcpu->mmio_size = bytes;
2111 vcpu->mmio_is_write = 0;
2113 return X86EMUL_UNHANDLEABLE;
2116 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2117 const void *val, int bytes)
2121 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2124 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2128 static int emulator_write_emulated_onepage(unsigned long addr,
2131 struct kvm_vcpu *vcpu)
2133 struct kvm_io_device *mmio_dev;
2136 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2138 if (gpa == UNMAPPED_GVA) {
2139 kvm_inject_page_fault(vcpu, addr, 2);
2140 return X86EMUL_PROPAGATE_FAULT;
2143 /* For APIC access vmexit */
2144 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2147 if (emulator_write_phys(vcpu, gpa, val, bytes))
2148 return X86EMUL_CONTINUE;
2152 * Is this MMIO handled locally?
2154 mutex_lock(&vcpu->kvm->lock);
2155 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2157 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2158 mutex_unlock(&vcpu->kvm->lock);
2159 return X86EMUL_CONTINUE;
2161 mutex_unlock(&vcpu->kvm->lock);
2163 vcpu->mmio_needed = 1;
2164 vcpu->mmio_phys_addr = gpa;
2165 vcpu->mmio_size = bytes;
2166 vcpu->mmio_is_write = 1;
2167 memcpy(vcpu->mmio_data, val, bytes);
2169 return X86EMUL_CONTINUE;
2172 int emulator_write_emulated(unsigned long addr,
2175 struct kvm_vcpu *vcpu)
2177 /* Crossing a page boundary? */
2178 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2181 now = -addr & ~PAGE_MASK;
2182 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2183 if (rc != X86EMUL_CONTINUE)
2189 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2191 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2193 static int emulator_cmpxchg_emulated(unsigned long addr,
2197 struct kvm_vcpu *vcpu)
2199 static int reported;
2203 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2205 #ifndef CONFIG_X86_64
2206 /* guests cmpxchg8b have to be emulated atomically */
2213 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2215 if (gpa == UNMAPPED_GVA ||
2216 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2219 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2224 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2226 kaddr = kmap_atomic(page, KM_USER0);
2227 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2228 kunmap_atomic(kaddr, KM_USER0);
2229 kvm_release_page_dirty(page);
2234 return emulator_write_emulated(addr, new, bytes, vcpu);
2237 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2239 return kvm_x86_ops->get_segment_base(vcpu, seg);
2242 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2244 kvm_mmu_invlpg(vcpu, address);
2245 return X86EMUL_CONTINUE;
2248 int emulate_clts(struct kvm_vcpu *vcpu)
2250 KVMTRACE_0D(CLTS, vcpu, handler);
2251 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2252 return X86EMUL_CONTINUE;
2255 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2257 struct kvm_vcpu *vcpu = ctxt->vcpu;
2261 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2262 return X86EMUL_CONTINUE;
2264 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2265 return X86EMUL_UNHANDLEABLE;
2269 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2271 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2274 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2276 /* FIXME: better handling */
2277 return X86EMUL_UNHANDLEABLE;
2279 return X86EMUL_CONTINUE;
2282 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2285 unsigned long rip = kvm_rip_read(vcpu);
2286 unsigned long rip_linear;
2288 if (!printk_ratelimit())
2291 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2293 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2295 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2296 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2298 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2300 static struct x86_emulate_ops emulate_ops = {
2301 .read_std = kvm_read_guest_virt,
2302 .read_emulated = emulator_read_emulated,
2303 .write_emulated = emulator_write_emulated,
2304 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2307 static void cache_all_regs(struct kvm_vcpu *vcpu)
2309 kvm_register_read(vcpu, VCPU_REGS_RAX);
2310 kvm_register_read(vcpu, VCPU_REGS_RSP);
2311 kvm_register_read(vcpu, VCPU_REGS_RIP);
2312 vcpu->arch.regs_dirty = ~0;
2315 int emulate_instruction(struct kvm_vcpu *vcpu,
2316 struct kvm_run *run,
2322 struct decode_cache *c;
2324 kvm_clear_exception_queue(vcpu);
2325 vcpu->arch.mmio_fault_cr2 = cr2;
2327 * TODO: fix x86_emulate.c to use guest_read/write_register
2328 * instead of direct ->regs accesses, can save hundred cycles
2329 * on Intel for instructions that don't read/change RSP, for
2332 cache_all_regs(vcpu);
2334 vcpu->mmio_is_write = 0;
2335 vcpu->arch.pio.string = 0;
2337 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2339 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2341 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2342 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2343 vcpu->arch.emulate_ctxt.mode =
2344 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2345 ? X86EMUL_MODE_REAL : cs_l
2346 ? X86EMUL_MODE_PROT64 : cs_db
2347 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2349 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2351 /* Reject the instructions other than VMCALL/VMMCALL when
2352 * try to emulate invalid opcode */
2353 c = &vcpu->arch.emulate_ctxt.decode;
2354 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2355 (!(c->twobyte && c->b == 0x01 &&
2356 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2357 c->modrm_mod == 3 && c->modrm_rm == 1)))
2358 return EMULATE_FAIL;
2360 ++vcpu->stat.insn_emulation;
2362 ++vcpu->stat.insn_emulation_fail;
2363 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2364 return EMULATE_DONE;
2365 return EMULATE_FAIL;
2369 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2371 if (vcpu->arch.pio.string)
2372 return EMULATE_DO_MMIO;
2374 if ((r || vcpu->mmio_is_write) && run) {
2375 run->exit_reason = KVM_EXIT_MMIO;
2376 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2377 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2378 run->mmio.len = vcpu->mmio_size;
2379 run->mmio.is_write = vcpu->mmio_is_write;
2383 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2384 return EMULATE_DONE;
2385 if (!vcpu->mmio_needed) {
2386 kvm_report_emulation_failure(vcpu, "mmio");
2387 return EMULATE_FAIL;
2389 return EMULATE_DO_MMIO;
2392 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2394 if (vcpu->mmio_is_write) {
2395 vcpu->mmio_needed = 0;
2396 return EMULATE_DO_MMIO;
2399 return EMULATE_DONE;
2401 EXPORT_SYMBOL_GPL(emulate_instruction);
2403 static int pio_copy_data(struct kvm_vcpu *vcpu)
2405 void *p = vcpu->arch.pio_data;
2406 gva_t q = vcpu->arch.pio.guest_gva;
2410 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2411 if (vcpu->arch.pio.in)
2412 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2414 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2418 int complete_pio(struct kvm_vcpu *vcpu)
2420 struct kvm_pio_request *io = &vcpu->arch.pio;
2427 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2428 memcpy(&val, vcpu->arch.pio_data, io->size);
2429 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2433 r = pio_copy_data(vcpu);
2440 delta *= io->cur_count;
2442 * The size of the register should really depend on
2443 * current address size.
2445 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2447 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2453 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2455 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2457 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2459 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2463 io->count -= io->cur_count;
2469 static void kernel_pio(struct kvm_io_device *pio_dev,
2470 struct kvm_vcpu *vcpu,
2473 /* TODO: String I/O for in kernel device */
2475 mutex_lock(&vcpu->kvm->lock);
2476 if (vcpu->arch.pio.in)
2477 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2478 vcpu->arch.pio.size,
2481 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2482 vcpu->arch.pio.size,
2484 mutex_unlock(&vcpu->kvm->lock);
2487 static void pio_string_write(struct kvm_io_device *pio_dev,
2488 struct kvm_vcpu *vcpu)
2490 struct kvm_pio_request *io = &vcpu->arch.pio;
2491 void *pd = vcpu->arch.pio_data;
2494 mutex_lock(&vcpu->kvm->lock);
2495 for (i = 0; i < io->cur_count; i++) {
2496 kvm_iodevice_write(pio_dev, io->port,
2501 mutex_unlock(&vcpu->kvm->lock);
2504 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2505 gpa_t addr, int len,
2508 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2511 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2512 int size, unsigned port)
2514 struct kvm_io_device *pio_dev;
2517 vcpu->run->exit_reason = KVM_EXIT_IO;
2518 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2519 vcpu->run->io.size = vcpu->arch.pio.size = size;
2520 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2521 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2522 vcpu->run->io.port = vcpu->arch.pio.port = port;
2523 vcpu->arch.pio.in = in;
2524 vcpu->arch.pio.string = 0;
2525 vcpu->arch.pio.down = 0;
2526 vcpu->arch.pio.rep = 0;
2528 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2529 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2532 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2535 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2536 memcpy(vcpu->arch.pio_data, &val, 4);
2538 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2540 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2546 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2548 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2549 int size, unsigned long count, int down,
2550 gva_t address, int rep, unsigned port)
2552 unsigned now, in_page;
2554 struct kvm_io_device *pio_dev;
2556 vcpu->run->exit_reason = KVM_EXIT_IO;
2557 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2558 vcpu->run->io.size = vcpu->arch.pio.size = size;
2559 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2560 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2561 vcpu->run->io.port = vcpu->arch.pio.port = port;
2562 vcpu->arch.pio.in = in;
2563 vcpu->arch.pio.string = 1;
2564 vcpu->arch.pio.down = down;
2565 vcpu->arch.pio.rep = rep;
2567 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2568 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2571 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2575 kvm_x86_ops->skip_emulated_instruction(vcpu);
2580 in_page = PAGE_SIZE - offset_in_page(address);
2582 in_page = offset_in_page(address) + size;
2583 now = min(count, (unsigned long)in_page / size);
2588 * String I/O in reverse. Yuck. Kill the guest, fix later.
2590 pr_unimpl(vcpu, "guest string pio down\n");
2591 kvm_inject_gp(vcpu, 0);
2594 vcpu->run->io.count = now;
2595 vcpu->arch.pio.cur_count = now;
2597 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2598 kvm_x86_ops->skip_emulated_instruction(vcpu);
2600 vcpu->arch.pio.guest_gva = address;
2602 pio_dev = vcpu_find_pio_dev(vcpu, port,
2603 vcpu->arch.pio.cur_count,
2604 !vcpu->arch.pio.in);
2605 if (!vcpu->arch.pio.in) {
2606 /* string PIO write */
2607 ret = pio_copy_data(vcpu);
2608 if (ret == X86EMUL_PROPAGATE_FAULT) {
2609 kvm_inject_gp(vcpu, 0);
2612 if (ret == 0 && pio_dev) {
2613 pio_string_write(pio_dev, vcpu);
2615 if (vcpu->arch.pio.count == 0)
2619 pr_unimpl(vcpu, "no string pio read support yet, "
2620 "port %x size %d count %ld\n",
2625 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2627 int kvm_arch_init(void *opaque)
2630 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2633 printk(KERN_ERR "kvm: already loaded the other module\n");
2638 if (!ops->cpu_has_kvm_support()) {
2639 printk(KERN_ERR "kvm: no hardware support\n");
2643 if (ops->disabled_by_bios()) {
2644 printk(KERN_ERR "kvm: disabled by bios\n");
2649 r = kvm_mmu_module_init();
2653 kvm_init_msr_list();
2656 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2657 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2658 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2659 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2666 void kvm_arch_exit(void)
2669 kvm_mmu_module_exit();
2672 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2674 ++vcpu->stat.halt_exits;
2675 KVMTRACE_0D(HLT, vcpu, handler);
2676 if (irqchip_in_kernel(vcpu->kvm)) {
2677 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2680 vcpu->run->exit_reason = KVM_EXIT_HLT;
2684 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2686 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2689 if (is_long_mode(vcpu))
2692 return a0 | ((gpa_t)a1 << 32);
2695 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2697 unsigned long nr, a0, a1, a2, a3, ret;
2700 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2701 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2702 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2703 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2704 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2706 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2708 if (!is_long_mode(vcpu)) {
2717 case KVM_HC_VAPIC_POLL_IRQ:
2721 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2727 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2728 ++vcpu->stat.hypercalls;
2731 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2733 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2735 char instruction[3];
2737 unsigned long rip = kvm_rip_read(vcpu);
2741 * Blow out the MMU to ensure that no other VCPU has an active mapping
2742 * to ensure that the updated hypercall appears atomically across all
2745 kvm_mmu_zap_all(vcpu->kvm);
2747 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2748 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2749 != X86EMUL_CONTINUE)
2755 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2757 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2760 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2762 struct descriptor_table dt = { limit, base };
2764 kvm_x86_ops->set_gdt(vcpu, &dt);
2767 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2769 struct descriptor_table dt = { limit, base };
2771 kvm_x86_ops->set_idt(vcpu, &dt);
2774 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2775 unsigned long *rflags)
2777 kvm_lmsw(vcpu, msw);
2778 *rflags = kvm_x86_ops->get_rflags(vcpu);
2781 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2783 unsigned long value;
2785 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2788 value = vcpu->arch.cr0;
2791 value = vcpu->arch.cr2;
2794 value = vcpu->arch.cr3;
2797 value = vcpu->arch.cr4;
2800 value = kvm_get_cr8(vcpu);
2803 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2806 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2807 (u32)((u64)value >> 32), handler);
2812 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2813 unsigned long *rflags)
2815 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2816 (u32)((u64)val >> 32), handler);
2820 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2821 *rflags = kvm_x86_ops->get_rflags(vcpu);
2824 vcpu->arch.cr2 = val;
2827 kvm_set_cr3(vcpu, val);
2830 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2833 kvm_set_cr8(vcpu, val & 0xfUL);
2836 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2840 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2842 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2843 int j, nent = vcpu->arch.cpuid_nent;
2845 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2846 /* when no next entry is found, the current entry[i] is reselected */
2847 for (j = i + 1; ; j = (j + 1) % nent) {
2848 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2849 if (ej->function == e->function) {
2850 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2854 return 0; /* silence gcc, even though control never reaches here */
2857 /* find an entry with matching function, matching index (if needed), and that
2858 * should be read next (if it's stateful) */
2859 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2860 u32 function, u32 index)
2862 if (e->function != function)
2864 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2866 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2867 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2872 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
2873 u32 function, u32 index)
2876 struct kvm_cpuid_entry2 *best = NULL;
2878 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2879 struct kvm_cpuid_entry2 *e;
2881 e = &vcpu->arch.cpuid_entries[i];
2882 if (is_matching_cpuid_entry(e, function, index)) {
2883 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2884 move_to_next_stateful_cpuid_entry(vcpu, i);
2889 * Both basic or both extended?
2891 if (((e->function ^ function) & 0x80000000) == 0)
2892 if (!best || e->function > best->function)
2898 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2900 u32 function, index;
2901 struct kvm_cpuid_entry2 *best;
2903 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
2904 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
2905 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
2906 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
2907 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
2908 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
2909 best = kvm_find_cpuid_entry(vcpu, function, index);
2911 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
2912 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
2913 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
2914 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
2916 kvm_x86_ops->skip_emulated_instruction(vcpu);
2917 KVMTRACE_5D(CPUID, vcpu, function,
2918 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
2919 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
2920 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
2921 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
2923 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
2926 * Check if userspace requested an interrupt window, and that the
2927 * interrupt window is open.
2929 * No need to exit to userspace if we already have an interrupt queued.
2931 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2932 struct kvm_run *kvm_run)
2934 return (!vcpu->arch.irq_summary &&
2935 kvm_run->request_interrupt_window &&
2936 vcpu->arch.interrupt_window_open &&
2937 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2940 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2941 struct kvm_run *kvm_run)
2943 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2944 kvm_run->cr8 = kvm_get_cr8(vcpu);
2945 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2946 if (irqchip_in_kernel(vcpu->kvm))
2947 kvm_run->ready_for_interrupt_injection = 1;
2949 kvm_run->ready_for_interrupt_injection =
2950 (vcpu->arch.interrupt_window_open &&
2951 vcpu->arch.irq_summary == 0);
2954 static void vapic_enter(struct kvm_vcpu *vcpu)
2956 struct kvm_lapic *apic = vcpu->arch.apic;
2959 if (!apic || !apic->vapic_addr)
2962 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2964 vcpu->arch.apic->vapic_page = page;
2967 static void vapic_exit(struct kvm_vcpu *vcpu)
2969 struct kvm_lapic *apic = vcpu->arch.apic;
2971 if (!apic || !apic->vapic_addr)
2974 down_read(&vcpu->kvm->slots_lock);
2975 kvm_release_page_dirty(apic->vapic_page);
2976 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2977 up_read(&vcpu->kvm->slots_lock);
2980 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2985 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
2986 kvm_mmu_unload(vcpu);
2988 r = kvm_mmu_reload(vcpu);
2992 if (vcpu->requests) {
2993 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2994 __kvm_migrate_timers(vcpu);
2995 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
2996 kvm_mmu_sync_roots(vcpu);
2997 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2998 kvm_x86_ops->tlb_flush(vcpu);
2999 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3001 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3005 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3006 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3012 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3013 kvm_inject_pending_timer_irqs(vcpu);
3017 kvm_x86_ops->prepare_guest_switch(vcpu);
3018 kvm_load_guest_fpu(vcpu);
3020 local_irq_disable();
3022 if (vcpu->requests || need_resched() || signal_pending(current)) {
3029 vcpu->guest_mode = 1;
3031 * Make sure that guest_mode assignment won't happen after
3032 * testing the pending IRQ vector bitmap.
3036 if (vcpu->arch.exception.pending)
3037 __queue_exception(vcpu);
3038 else if (irqchip_in_kernel(vcpu->kvm))
3039 kvm_x86_ops->inject_pending_irq(vcpu);
3041 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3043 kvm_lapic_sync_to_vapic(vcpu);
3045 up_read(&vcpu->kvm->slots_lock);
3049 get_debugreg(vcpu->arch.host_dr6, 6);
3050 get_debugreg(vcpu->arch.host_dr7, 7);
3051 if (unlikely(vcpu->arch.switch_db_regs)) {
3052 get_debugreg(vcpu->arch.host_db[0], 0);
3053 get_debugreg(vcpu->arch.host_db[1], 1);
3054 get_debugreg(vcpu->arch.host_db[2], 2);
3055 get_debugreg(vcpu->arch.host_db[3], 3);
3058 set_debugreg(vcpu->arch.eff_db[0], 0);
3059 set_debugreg(vcpu->arch.eff_db[1], 1);
3060 set_debugreg(vcpu->arch.eff_db[2], 2);
3061 set_debugreg(vcpu->arch.eff_db[3], 3);
3064 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3065 kvm_x86_ops->run(vcpu, kvm_run);
3067 if (unlikely(vcpu->arch.switch_db_regs)) {
3069 set_debugreg(vcpu->arch.host_db[0], 0);
3070 set_debugreg(vcpu->arch.host_db[1], 1);
3071 set_debugreg(vcpu->arch.host_db[2], 2);
3072 set_debugreg(vcpu->arch.host_db[3], 3);
3074 set_debugreg(vcpu->arch.host_dr6, 6);
3075 set_debugreg(vcpu->arch.host_dr7, 7);
3077 vcpu->guest_mode = 0;
3083 * We must have an instruction between local_irq_enable() and
3084 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3085 * the interrupt shadow. The stat.exits increment will do nicely.
3086 * But we need to prevent reordering, hence this barrier():
3094 down_read(&vcpu->kvm->slots_lock);
3097 * Profile KVM exit RIPs:
3099 if (unlikely(prof_on == KVM_PROFILING)) {
3100 unsigned long rip = kvm_rip_read(vcpu);
3101 profile_hit(KVM_PROFILING, (void *)rip);
3104 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3105 vcpu->arch.exception.pending = false;
3107 kvm_lapic_sync_from_vapic(vcpu);
3109 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3114 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3118 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3119 pr_debug("vcpu %d received sipi with vector # %x\n",
3120 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3121 kvm_lapic_reset(vcpu);
3122 r = kvm_arch_vcpu_reset(vcpu);
3125 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3128 down_read(&vcpu->kvm->slots_lock);
3133 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3134 r = vcpu_enter_guest(vcpu, kvm_run);
3136 up_read(&vcpu->kvm->slots_lock);
3137 kvm_vcpu_block(vcpu);
3138 down_read(&vcpu->kvm->slots_lock);
3139 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3140 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3141 vcpu->arch.mp_state =
3142 KVM_MP_STATE_RUNNABLE;
3143 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3148 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3150 kvm_run->exit_reason = KVM_EXIT_INTR;
3151 ++vcpu->stat.request_irq_exits;
3153 if (signal_pending(current)) {
3155 kvm_run->exit_reason = KVM_EXIT_INTR;
3156 ++vcpu->stat.signal_exits;
3158 if (need_resched()) {
3159 up_read(&vcpu->kvm->slots_lock);
3161 down_read(&vcpu->kvm->slots_lock);
3166 up_read(&vcpu->kvm->slots_lock);
3167 post_kvm_run_save(vcpu, kvm_run);
3174 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3181 if (vcpu->sigset_active)
3182 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3184 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3185 kvm_vcpu_block(vcpu);
3186 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3191 /* re-sync apic's tpr */
3192 if (!irqchip_in_kernel(vcpu->kvm))
3193 kvm_set_cr8(vcpu, kvm_run->cr8);
3195 if (vcpu->arch.pio.cur_count) {
3196 r = complete_pio(vcpu);
3200 #if CONFIG_HAS_IOMEM
3201 if (vcpu->mmio_needed) {
3202 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3203 vcpu->mmio_read_completed = 1;
3204 vcpu->mmio_needed = 0;
3206 down_read(&vcpu->kvm->slots_lock);
3207 r = emulate_instruction(vcpu, kvm_run,
3208 vcpu->arch.mmio_fault_cr2, 0,
3209 EMULTYPE_NO_DECODE);
3210 up_read(&vcpu->kvm->slots_lock);
3211 if (r == EMULATE_DO_MMIO) {
3213 * Read-modify-write. Back to userspace.
3220 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3221 kvm_register_write(vcpu, VCPU_REGS_RAX,
3222 kvm_run->hypercall.ret);
3224 r = __vcpu_run(vcpu, kvm_run);
3227 if (vcpu->sigset_active)
3228 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3234 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3238 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3239 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3240 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3241 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3242 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3243 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3244 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3245 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3246 #ifdef CONFIG_X86_64
3247 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3248 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3249 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3250 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3251 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3252 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3253 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3254 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3257 regs->rip = kvm_rip_read(vcpu);
3258 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3261 * Don't leak debug flags in case they were set for guest debugging
3263 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3264 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3271 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3275 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3276 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3277 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3278 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3279 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3280 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3281 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3282 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3283 #ifdef CONFIG_X86_64
3284 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3285 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3286 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3287 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3288 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3289 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3290 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3291 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3295 kvm_rip_write(vcpu, regs->rip);
3296 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3299 vcpu->arch.exception.pending = false;
3306 void kvm_get_segment(struct kvm_vcpu *vcpu,
3307 struct kvm_segment *var, int seg)
3309 kvm_x86_ops->get_segment(vcpu, var, seg);
3312 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3314 struct kvm_segment cs;
3316 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3320 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3322 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3323 struct kvm_sregs *sregs)
3325 struct descriptor_table dt;
3330 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3331 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3332 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3333 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3334 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3335 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3337 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3338 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3340 kvm_x86_ops->get_idt(vcpu, &dt);
3341 sregs->idt.limit = dt.limit;
3342 sregs->idt.base = dt.base;
3343 kvm_x86_ops->get_gdt(vcpu, &dt);
3344 sregs->gdt.limit = dt.limit;
3345 sregs->gdt.base = dt.base;
3347 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3348 sregs->cr0 = vcpu->arch.cr0;
3349 sregs->cr2 = vcpu->arch.cr2;
3350 sregs->cr3 = vcpu->arch.cr3;
3351 sregs->cr4 = vcpu->arch.cr4;
3352 sregs->cr8 = kvm_get_cr8(vcpu);
3353 sregs->efer = vcpu->arch.shadow_efer;
3354 sregs->apic_base = kvm_get_apic_base(vcpu);
3356 if (irqchip_in_kernel(vcpu->kvm)) {
3357 memset(sregs->interrupt_bitmap, 0,
3358 sizeof sregs->interrupt_bitmap);
3359 pending_vec = kvm_x86_ops->get_irq(vcpu);
3360 if (pending_vec >= 0)
3361 set_bit(pending_vec,
3362 (unsigned long *)sregs->interrupt_bitmap);
3364 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3365 sizeof sregs->interrupt_bitmap);
3372 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3373 struct kvm_mp_state *mp_state)
3376 mp_state->mp_state = vcpu->arch.mp_state;
3381 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3382 struct kvm_mp_state *mp_state)
3385 vcpu->arch.mp_state = mp_state->mp_state;
3390 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3391 struct kvm_segment *var, int seg)
3393 kvm_x86_ops->set_segment(vcpu, var, seg);
3396 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3397 struct kvm_segment *kvm_desct)
3399 kvm_desct->base = seg_desc->base0;
3400 kvm_desct->base |= seg_desc->base1 << 16;
3401 kvm_desct->base |= seg_desc->base2 << 24;
3402 kvm_desct->limit = seg_desc->limit0;
3403 kvm_desct->limit |= seg_desc->limit << 16;
3405 kvm_desct->limit <<= 12;
3406 kvm_desct->limit |= 0xfff;
3408 kvm_desct->selector = selector;
3409 kvm_desct->type = seg_desc->type;
3410 kvm_desct->present = seg_desc->p;
3411 kvm_desct->dpl = seg_desc->dpl;
3412 kvm_desct->db = seg_desc->d;
3413 kvm_desct->s = seg_desc->s;
3414 kvm_desct->l = seg_desc->l;
3415 kvm_desct->g = seg_desc->g;
3416 kvm_desct->avl = seg_desc->avl;
3418 kvm_desct->unusable = 1;
3420 kvm_desct->unusable = 0;
3421 kvm_desct->padding = 0;
3424 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3426 struct descriptor_table *dtable)
3428 if (selector & 1 << 2) {
3429 struct kvm_segment kvm_seg;
3431 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3433 if (kvm_seg.unusable)
3436 dtable->limit = kvm_seg.limit;
3437 dtable->base = kvm_seg.base;
3440 kvm_x86_ops->get_gdt(vcpu, dtable);
3443 /* allowed just for 8 bytes segments */
3444 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3445 struct desc_struct *seg_desc)
3448 struct descriptor_table dtable;
3449 u16 index = selector >> 3;
3451 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3453 if (dtable.limit < index * 8 + 7) {
3454 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3457 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3459 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3462 /* allowed just for 8 bytes segments */
3463 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3464 struct desc_struct *seg_desc)
3467 struct descriptor_table dtable;
3468 u16 index = selector >> 3;
3470 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3472 if (dtable.limit < index * 8 + 7)
3474 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3476 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3479 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3480 struct desc_struct *seg_desc)
3484 base_addr = seg_desc->base0;
3485 base_addr |= (seg_desc->base1 << 16);
3486 base_addr |= (seg_desc->base2 << 24);
3488 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3491 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3493 struct kvm_segment kvm_seg;
3495 kvm_get_segment(vcpu, &kvm_seg, seg);
3496 return kvm_seg.selector;
3499 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3501 struct kvm_segment *kvm_seg)
3503 struct desc_struct seg_desc;
3505 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3507 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3511 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3513 struct kvm_segment segvar = {
3514 .base = selector << 4,
3516 .selector = selector,
3527 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3531 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3532 int type_bits, int seg)
3534 struct kvm_segment kvm_seg;
3536 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3537 return kvm_load_realmode_segment(vcpu, selector, seg);
3538 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3540 kvm_seg.type |= type_bits;
3542 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3543 seg != VCPU_SREG_LDTR)
3545 kvm_seg.unusable = 1;
3547 kvm_set_segment(vcpu, &kvm_seg, seg);
3551 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3552 struct tss_segment_32 *tss)
3554 tss->cr3 = vcpu->arch.cr3;
3555 tss->eip = kvm_rip_read(vcpu);
3556 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3557 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3558 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3559 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3560 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3561 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3562 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3563 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3564 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3565 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3566 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3567 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3568 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3569 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3570 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3571 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3572 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3575 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3576 struct tss_segment_32 *tss)
3578 kvm_set_cr3(vcpu, tss->cr3);
3580 kvm_rip_write(vcpu, tss->eip);
3581 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3583 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3584 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3585 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3586 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3587 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3588 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3589 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3590 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3592 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3595 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3598 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3601 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3604 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3607 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3610 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3615 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3616 struct tss_segment_16 *tss)
3618 tss->ip = kvm_rip_read(vcpu);
3619 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3620 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3621 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3622 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3623 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3624 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3625 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3626 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3627 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3629 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3630 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3631 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3632 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3633 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3634 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3637 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3638 struct tss_segment_16 *tss)
3640 kvm_rip_write(vcpu, tss->ip);
3641 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3642 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3643 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3644 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3645 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3646 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3647 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3648 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3649 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3651 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3654 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3657 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3660 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3663 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3668 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3670 struct desc_struct *nseg_desc)
3672 struct tss_segment_16 tss_segment_16;
3675 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3676 sizeof tss_segment_16))
3679 save_state_to_tss16(vcpu, &tss_segment_16);
3681 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3682 sizeof tss_segment_16))
3685 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3686 &tss_segment_16, sizeof tss_segment_16))
3689 if (load_state_from_tss16(vcpu, &tss_segment_16))
3697 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3699 struct desc_struct *nseg_desc)
3701 struct tss_segment_32 tss_segment_32;
3704 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3705 sizeof tss_segment_32))
3708 save_state_to_tss32(vcpu, &tss_segment_32);
3710 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3711 sizeof tss_segment_32))
3714 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3715 &tss_segment_32, sizeof tss_segment_32))
3718 if (load_state_from_tss32(vcpu, &tss_segment_32))
3726 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3728 struct kvm_segment tr_seg;
3729 struct desc_struct cseg_desc;
3730 struct desc_struct nseg_desc;
3732 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3733 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3735 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3737 /* FIXME: Handle errors. Failure to read either TSS or their
3738 * descriptors should generate a pagefault.
3740 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3743 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3746 if (reason != TASK_SWITCH_IRET) {
3749 cpl = kvm_x86_ops->get_cpl(vcpu);
3750 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3751 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3756 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3757 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3761 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3762 cseg_desc.type &= ~(1 << 1); //clear the B flag
3763 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3766 if (reason == TASK_SWITCH_IRET) {
3767 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3768 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3771 kvm_x86_ops->skip_emulated_instruction(vcpu);
3773 if (nseg_desc.type & 8)
3774 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3777 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3780 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3781 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3782 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3785 if (reason != TASK_SWITCH_IRET) {
3786 nseg_desc.type |= (1 << 1);
3787 save_guest_segment_descriptor(vcpu, tss_selector,
3791 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3792 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3794 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3798 EXPORT_SYMBOL_GPL(kvm_task_switch);
3800 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3801 struct kvm_sregs *sregs)
3803 int mmu_reset_needed = 0;
3804 int i, pending_vec, max_bits;
3805 struct descriptor_table dt;
3809 dt.limit = sregs->idt.limit;
3810 dt.base = sregs->idt.base;
3811 kvm_x86_ops->set_idt(vcpu, &dt);
3812 dt.limit = sregs->gdt.limit;
3813 dt.base = sregs->gdt.base;
3814 kvm_x86_ops->set_gdt(vcpu, &dt);
3816 vcpu->arch.cr2 = sregs->cr2;
3817 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3818 vcpu->arch.cr3 = sregs->cr3;
3820 kvm_set_cr8(vcpu, sregs->cr8);
3822 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3823 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3824 kvm_set_apic_base(vcpu, sregs->apic_base);
3826 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3828 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3829 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3830 vcpu->arch.cr0 = sregs->cr0;
3832 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3833 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3834 if (!is_long_mode(vcpu) && is_pae(vcpu))
3835 load_pdptrs(vcpu, vcpu->arch.cr3);
3837 if (mmu_reset_needed)
3838 kvm_mmu_reset_context(vcpu);
3840 if (!irqchip_in_kernel(vcpu->kvm)) {
3841 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3842 sizeof vcpu->arch.irq_pending);
3843 vcpu->arch.irq_summary = 0;
3844 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3845 if (vcpu->arch.irq_pending[i])
3846 __set_bit(i, &vcpu->arch.irq_summary);
3848 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3849 pending_vec = find_first_bit(
3850 (const unsigned long *)sregs->interrupt_bitmap,
3852 /* Only pending external irq is handled here */
3853 if (pending_vec < max_bits) {
3854 kvm_x86_ops->set_irq(vcpu, pending_vec);
3855 pr_debug("Set back pending irq %d\n",
3858 kvm_pic_clear_isr_ack(vcpu->kvm);
3861 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3862 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3863 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3864 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3865 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3866 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3868 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3869 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3871 /* Older userspace won't unhalt the vcpu on reset. */
3872 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
3873 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
3874 !(vcpu->arch.cr0 & X86_CR0_PE))
3875 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3882 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
3883 struct kvm_guest_debug *dbg)
3889 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
3890 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
3891 for (i = 0; i < KVM_NR_DB_REGS; ++i)
3892 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
3893 vcpu->arch.switch_db_regs =
3894 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
3896 for (i = 0; i < KVM_NR_DB_REGS; i++)
3897 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
3898 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
3901 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3903 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
3904 kvm_queue_exception(vcpu, DB_VECTOR);
3905 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
3906 kvm_queue_exception(vcpu, BP_VECTOR);
3914 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3915 * we have asm/x86/processor.h
3926 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3927 #ifdef CONFIG_X86_64
3928 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3930 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3935 * Translate a guest virtual address to a guest physical address.
3937 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3938 struct kvm_translation *tr)
3940 unsigned long vaddr = tr->linear_address;
3944 down_read(&vcpu->kvm->slots_lock);
3945 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
3946 up_read(&vcpu->kvm->slots_lock);
3947 tr->physical_address = gpa;
3948 tr->valid = gpa != UNMAPPED_GVA;
3956 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3958 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3962 memcpy(fpu->fpr, fxsave->st_space, 128);
3963 fpu->fcw = fxsave->cwd;
3964 fpu->fsw = fxsave->swd;
3965 fpu->ftwx = fxsave->twd;
3966 fpu->last_opcode = fxsave->fop;
3967 fpu->last_ip = fxsave->rip;
3968 fpu->last_dp = fxsave->rdp;
3969 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
3976 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3978 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3982 memcpy(fxsave->st_space, fpu->fpr, 128);
3983 fxsave->cwd = fpu->fcw;
3984 fxsave->swd = fpu->fsw;
3985 fxsave->twd = fpu->ftwx;
3986 fxsave->fop = fpu->last_opcode;
3987 fxsave->rip = fpu->last_ip;
3988 fxsave->rdp = fpu->last_dp;
3989 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
3996 void fx_init(struct kvm_vcpu *vcpu)
3998 unsigned after_mxcsr_mask;
4001 * Touch the fpu the first time in non atomic context as if
4002 * this is the first fpu instruction the exception handler
4003 * will fire before the instruction returns and it'll have to
4004 * allocate ram with GFP_KERNEL.
4007 kvm_fx_save(&vcpu->arch.host_fx_image);
4009 /* Initialize guest FPU by resetting ours and saving into guest's */
4011 kvm_fx_save(&vcpu->arch.host_fx_image);
4013 kvm_fx_save(&vcpu->arch.guest_fx_image);
4014 kvm_fx_restore(&vcpu->arch.host_fx_image);
4017 vcpu->arch.cr0 |= X86_CR0_ET;
4018 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4019 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4020 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4021 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4023 EXPORT_SYMBOL_GPL(fx_init);
4025 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4027 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4030 vcpu->guest_fpu_loaded = 1;
4031 kvm_fx_save(&vcpu->arch.host_fx_image);
4032 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4034 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4036 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4038 if (!vcpu->guest_fpu_loaded)
4041 vcpu->guest_fpu_loaded = 0;
4042 kvm_fx_save(&vcpu->arch.guest_fx_image);
4043 kvm_fx_restore(&vcpu->arch.host_fx_image);
4044 ++vcpu->stat.fpu_reload;
4046 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4048 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4050 kvm_x86_ops->vcpu_free(vcpu);
4053 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4056 return kvm_x86_ops->vcpu_create(kvm, id);
4059 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4063 /* We do fxsave: this must be aligned. */
4064 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4066 vcpu->arch.mtrr_state.have_fixed = 1;
4068 r = kvm_arch_vcpu_reset(vcpu);
4070 r = kvm_mmu_setup(vcpu);
4077 kvm_x86_ops->vcpu_free(vcpu);
4081 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4084 kvm_mmu_unload(vcpu);
4087 kvm_x86_ops->vcpu_free(vcpu);
4090 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4092 vcpu->arch.nmi_pending = false;
4093 vcpu->arch.nmi_injected = false;
4095 vcpu->arch.switch_db_regs = 0;
4096 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4097 vcpu->arch.dr6 = DR6_FIXED_1;
4098 vcpu->arch.dr7 = DR7_FIXED_1;
4100 return kvm_x86_ops->vcpu_reset(vcpu);
4103 void kvm_arch_hardware_enable(void *garbage)
4105 kvm_x86_ops->hardware_enable(garbage);
4108 void kvm_arch_hardware_disable(void *garbage)
4110 kvm_x86_ops->hardware_disable(garbage);
4113 int kvm_arch_hardware_setup(void)
4115 return kvm_x86_ops->hardware_setup();
4118 void kvm_arch_hardware_unsetup(void)
4120 kvm_x86_ops->hardware_unsetup();
4123 void kvm_arch_check_processor_compat(void *rtn)
4125 kvm_x86_ops->check_processor_compatibility(rtn);
4128 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4134 BUG_ON(vcpu->kvm == NULL);
4137 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4138 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4139 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4141 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4143 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4148 vcpu->arch.pio_data = page_address(page);
4150 r = kvm_mmu_create(vcpu);
4152 goto fail_free_pio_data;
4154 if (irqchip_in_kernel(kvm)) {
4155 r = kvm_create_lapic(vcpu);
4157 goto fail_mmu_destroy;
4163 kvm_mmu_destroy(vcpu);
4165 free_page((unsigned long)vcpu->arch.pio_data);
4170 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4172 kvm_free_lapic(vcpu);
4173 down_read(&vcpu->kvm->slots_lock);
4174 kvm_mmu_destroy(vcpu);
4175 up_read(&vcpu->kvm->slots_lock);
4176 free_page((unsigned long)vcpu->arch.pio_data);
4179 struct kvm *kvm_arch_create_vm(void)
4181 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4184 return ERR_PTR(-ENOMEM);
4186 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4187 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4188 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4190 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4191 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4193 rdtscll(kvm->arch.vm_init_tsc);
4198 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4201 kvm_mmu_unload(vcpu);
4205 static void kvm_free_vcpus(struct kvm *kvm)
4210 * Unpin any mmu pages first.
4212 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4214 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4215 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4216 if (kvm->vcpus[i]) {
4217 kvm_arch_vcpu_free(kvm->vcpus[i]);
4218 kvm->vcpus[i] = NULL;
4224 void kvm_arch_sync_events(struct kvm *kvm)
4226 kvm_free_all_assigned_devices(kvm);
4229 void kvm_arch_destroy_vm(struct kvm *kvm)
4231 kvm_iommu_unmap_guest(kvm);
4233 kfree(kvm->arch.vpic);
4234 kfree(kvm->arch.vioapic);
4235 kvm_free_vcpus(kvm);
4236 kvm_free_physmem(kvm);
4237 if (kvm->arch.apic_access_page)
4238 put_page(kvm->arch.apic_access_page);
4239 if (kvm->arch.ept_identity_pagetable)
4240 put_page(kvm->arch.ept_identity_pagetable);
4244 int kvm_arch_set_memory_region(struct kvm *kvm,
4245 struct kvm_userspace_memory_region *mem,
4246 struct kvm_memory_slot old,
4249 int npages = mem->memory_size >> PAGE_SHIFT;
4250 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4252 /*To keep backward compatibility with older userspace,
4253 *x86 needs to hanlde !user_alloc case.
4256 if (npages && !old.rmap) {
4257 unsigned long userspace_addr;
4259 down_write(¤t->mm->mmap_sem);
4260 userspace_addr = do_mmap(NULL, 0,
4262 PROT_READ | PROT_WRITE,
4263 MAP_PRIVATE | MAP_ANONYMOUS,
4265 up_write(¤t->mm->mmap_sem);
4267 if (IS_ERR((void *)userspace_addr))
4268 return PTR_ERR((void *)userspace_addr);
4270 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4271 spin_lock(&kvm->mmu_lock);
4272 memslot->userspace_addr = userspace_addr;
4273 spin_unlock(&kvm->mmu_lock);
4275 if (!old.user_alloc && old.rmap) {
4278 down_write(¤t->mm->mmap_sem);
4279 ret = do_munmap(current->mm, old.userspace_addr,
4280 old.npages * PAGE_SIZE);
4281 up_write(¤t->mm->mmap_sem);
4284 "kvm_vm_ioctl_set_memory_region: "
4285 "failed to munmap memory\n");
4290 if (!kvm->arch.n_requested_mmu_pages) {
4291 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4292 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4295 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4296 kvm_flush_remote_tlbs(kvm);
4301 void kvm_arch_flush_shadow(struct kvm *kvm)
4303 kvm_mmu_zap_all(kvm);
4306 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4308 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4309 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4310 || vcpu->arch.nmi_pending;
4313 static void vcpu_kick_intr(void *info)
4316 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4317 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4321 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4323 int ipi_pcpu = vcpu->cpu;
4324 int cpu = get_cpu();
4326 if (waitqueue_active(&vcpu->wq)) {
4327 wake_up_interruptible(&vcpu->wq);
4328 ++vcpu->stat.halt_wakeup;
4331 * We may be called synchronously with irqs disabled in guest mode,
4332 * So need not to call smp_call_function_single() in that case.
4334 if (vcpu->guest_mode && vcpu->cpu != cpu)
4335 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);