2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <trace/events/kvm.h>
41 #undef TRACE_INCLUDE_FILE
42 #define CREATE_TRACE_POINTS
45 #include <asm/uaccess.h>
51 #define MAX_IO_MSRS 256
52 #define CR0_RESERVED_BITS \
53 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
54 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
55 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
56 #define CR4_RESERVED_BITS \
57 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
58 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
59 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
60 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
64 #define KVM_MAX_MCE_BANKS 32
65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
68 * - enable syscall per default because its emulated by KVM
69 * - enable LME and LMA per default on 64 bit KVM
72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
80 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
82 struct kvm_cpuid_entry2 __user *entries);
84 struct kvm_x86_ops *kvm_x86_ops;
85 EXPORT_SYMBOL_GPL(kvm_x86_ops);
88 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
90 struct kvm_stats_debugfs_item debugfs_entries[] = {
91 { "pf_fixed", VCPU_STAT(pf_fixed) },
92 { "pf_guest", VCPU_STAT(pf_guest) },
93 { "tlb_flush", VCPU_STAT(tlb_flush) },
94 { "invlpg", VCPU_STAT(invlpg) },
95 { "exits", VCPU_STAT(exits) },
96 { "io_exits", VCPU_STAT(io_exits) },
97 { "mmio_exits", VCPU_STAT(mmio_exits) },
98 { "signal_exits", VCPU_STAT(signal_exits) },
99 { "irq_window", VCPU_STAT(irq_window_exits) },
100 { "nmi_window", VCPU_STAT(nmi_window_exits) },
101 { "halt_exits", VCPU_STAT(halt_exits) },
102 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
103 { "hypercalls", VCPU_STAT(hypercalls) },
104 { "request_irq", VCPU_STAT(request_irq_exits) },
105 { "irq_exits", VCPU_STAT(irq_exits) },
106 { "host_state_reload", VCPU_STAT(host_state_reload) },
107 { "efer_reload", VCPU_STAT(efer_reload) },
108 { "fpu_reload", VCPU_STAT(fpu_reload) },
109 { "insn_emulation", VCPU_STAT(insn_emulation) },
110 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
111 { "irq_injections", VCPU_STAT(irq_injections) },
112 { "nmi_injections", VCPU_STAT(nmi_injections) },
113 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
114 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
115 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
116 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
117 { "mmu_flooded", VM_STAT(mmu_flooded) },
118 { "mmu_recycled", VM_STAT(mmu_recycled) },
119 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
120 { "mmu_unsync", VM_STAT(mmu_unsync) },
121 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
122 { "largepages", VM_STAT(lpages) },
126 unsigned long segment_base(u16 selector)
128 struct descriptor_table gdt;
129 struct desc_struct *d;
130 unsigned long table_base;
137 table_base = gdt.base;
139 if (selector & 4) { /* from ldt */
140 u16 ldt_selector = kvm_read_ldt();
142 table_base = segment_base(ldt_selector);
144 d = (struct desc_struct *)(table_base + (selector & ~7));
145 v = get_desc_base(d);
147 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
148 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
152 EXPORT_SYMBOL_GPL(segment_base);
154 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
156 if (irqchip_in_kernel(vcpu->kvm))
157 return vcpu->arch.apic_base;
159 return vcpu->arch.apic_base;
161 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
163 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
165 /* TODO: reserve bits check */
166 if (irqchip_in_kernel(vcpu->kvm))
167 kvm_lapic_set_base(vcpu, data);
169 vcpu->arch.apic_base = data;
171 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
173 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
175 WARN_ON(vcpu->arch.exception.pending);
176 vcpu->arch.exception.pending = true;
177 vcpu->arch.exception.has_error_code = false;
178 vcpu->arch.exception.nr = nr;
180 EXPORT_SYMBOL_GPL(kvm_queue_exception);
182 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
185 ++vcpu->stat.pf_guest;
187 if (vcpu->arch.exception.pending) {
188 switch(vcpu->arch.exception.nr) {
190 /* triple fault -> shutdown */
191 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
194 vcpu->arch.exception.nr = DF_VECTOR;
195 vcpu->arch.exception.error_code = 0;
198 /* replace previous exception with a new one in a hope
199 that instruction re-execution will regenerate lost
201 vcpu->arch.exception.pending = false;
205 vcpu->arch.cr2 = addr;
206 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
209 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
211 vcpu->arch.nmi_pending = 1;
213 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
215 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
217 WARN_ON(vcpu->arch.exception.pending);
218 vcpu->arch.exception.pending = true;
219 vcpu->arch.exception.has_error_code = true;
220 vcpu->arch.exception.nr = nr;
221 vcpu->arch.exception.error_code = error_code;
223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
226 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
227 * a #GP and return false.
229 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
231 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
233 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
236 EXPORT_SYMBOL_GPL(kvm_require_cpl);
238 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
240 unsigned long rflags;
242 rflags = kvm_x86_ops->get_rflags(vcpu);
243 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
244 rflags &= ~(unsigned long)(X86_EFLAGS_TF | X86_EFLAGS_RF);
247 EXPORT_SYMBOL_GPL(kvm_get_rflags);
249 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
251 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
252 rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
253 kvm_x86_ops->set_rflags(vcpu, rflags);
255 EXPORT_SYMBOL_GPL(kvm_set_rflags);
258 * Load the pae pdptrs. Return true is they are all valid.
260 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
262 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
263 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
266 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
268 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
269 offset * sizeof(u64), sizeof(pdpte));
274 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
275 if (is_present_gpte(pdpte[i]) &&
276 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
283 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
284 __set_bit(VCPU_EXREG_PDPTR,
285 (unsigned long *)&vcpu->arch.regs_avail);
286 __set_bit(VCPU_EXREG_PDPTR,
287 (unsigned long *)&vcpu->arch.regs_dirty);
292 EXPORT_SYMBOL_GPL(load_pdptrs);
294 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
296 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
300 if (is_long_mode(vcpu) || !is_pae(vcpu))
303 if (!test_bit(VCPU_EXREG_PDPTR,
304 (unsigned long *)&vcpu->arch.regs_avail))
307 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
310 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
316 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
318 if (cr0 & CR0_RESERVED_BITS) {
319 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
320 cr0, vcpu->arch.cr0);
321 kvm_inject_gp(vcpu, 0);
325 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
326 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
327 kvm_inject_gp(vcpu, 0);
331 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
332 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
333 "and a clear PE flag\n");
334 kvm_inject_gp(vcpu, 0);
338 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
340 if ((vcpu->arch.shadow_efer & EFER_LME)) {
344 printk(KERN_DEBUG "set_cr0: #GP, start paging "
345 "in long mode while PAE is disabled\n");
346 kvm_inject_gp(vcpu, 0);
349 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
351 printk(KERN_DEBUG "set_cr0: #GP, start paging "
352 "in long mode while CS.L == 1\n");
353 kvm_inject_gp(vcpu, 0);
359 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
360 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
362 kvm_inject_gp(vcpu, 0);
368 kvm_x86_ops->set_cr0(vcpu, cr0);
369 vcpu->arch.cr0 = cr0;
371 kvm_mmu_reset_context(vcpu);
374 EXPORT_SYMBOL_GPL(kvm_set_cr0);
376 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
378 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
380 EXPORT_SYMBOL_GPL(kvm_lmsw);
382 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
384 unsigned long old_cr4 = vcpu->arch.cr4;
385 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
387 if (cr4 & CR4_RESERVED_BITS) {
388 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
389 kvm_inject_gp(vcpu, 0);
393 if (is_long_mode(vcpu)) {
394 if (!(cr4 & X86_CR4_PAE)) {
395 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
397 kvm_inject_gp(vcpu, 0);
400 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
401 && ((cr4 ^ old_cr4) & pdptr_bits)
402 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
403 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
404 kvm_inject_gp(vcpu, 0);
408 if (cr4 & X86_CR4_VMXE) {
409 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
410 kvm_inject_gp(vcpu, 0);
413 kvm_x86_ops->set_cr4(vcpu, cr4);
414 vcpu->arch.cr4 = cr4;
415 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
416 kvm_mmu_reset_context(vcpu);
418 EXPORT_SYMBOL_GPL(kvm_set_cr4);
420 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
422 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
423 kvm_mmu_sync_roots(vcpu);
424 kvm_mmu_flush_tlb(vcpu);
428 if (is_long_mode(vcpu)) {
429 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
430 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
431 kvm_inject_gp(vcpu, 0);
436 if (cr3 & CR3_PAE_RESERVED_BITS) {
438 "set_cr3: #GP, reserved bits\n");
439 kvm_inject_gp(vcpu, 0);
442 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
443 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
445 kvm_inject_gp(vcpu, 0);
450 * We don't check reserved bits in nonpae mode, because
451 * this isn't enforced, and VMware depends on this.
456 * Does the new cr3 value map to physical memory? (Note, we
457 * catch an invalid cr3 even in real-mode, because it would
458 * cause trouble later on when we turn on paging anyway.)
460 * A real CPU would silently accept an invalid cr3 and would
461 * attempt to use it - with largely undefined (and often hard
462 * to debug) behavior on the guest side.
464 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
465 kvm_inject_gp(vcpu, 0);
467 vcpu->arch.cr3 = cr3;
468 vcpu->arch.mmu.new_cr3(vcpu);
471 EXPORT_SYMBOL_GPL(kvm_set_cr3);
473 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
475 if (cr8 & CR8_RESERVED_BITS) {
476 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
477 kvm_inject_gp(vcpu, 0);
480 if (irqchip_in_kernel(vcpu->kvm))
481 kvm_lapic_set_tpr(vcpu, cr8);
483 vcpu->arch.cr8 = cr8;
485 EXPORT_SYMBOL_GPL(kvm_set_cr8);
487 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
489 if (irqchip_in_kernel(vcpu->kvm))
490 return kvm_lapic_get_cr8(vcpu);
492 return vcpu->arch.cr8;
494 EXPORT_SYMBOL_GPL(kvm_get_cr8);
496 static inline u32 bit(int bitno)
498 return 1 << (bitno & 31);
502 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
503 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
505 * This list is modified at module load time to reflect the
506 * capabilities of the host cpu. This capabilities test skips MSRs that are
507 * kvm-specific. Those are put in the beginning of the list.
510 #define KVM_SAVE_MSRS_BEGIN 2
511 static u32 msrs_to_save[] = {
512 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
513 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
516 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
518 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
521 static unsigned num_msrs_to_save;
523 static u32 emulated_msrs[] = {
524 MSR_IA32_MISC_ENABLE,
527 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
529 if (efer & efer_reserved_bits) {
530 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
532 kvm_inject_gp(vcpu, 0);
537 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
538 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
539 kvm_inject_gp(vcpu, 0);
543 if (efer & EFER_FFXSR) {
544 struct kvm_cpuid_entry2 *feat;
546 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
547 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
548 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
549 kvm_inject_gp(vcpu, 0);
554 if (efer & EFER_SVME) {
555 struct kvm_cpuid_entry2 *feat;
557 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
558 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
559 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
560 kvm_inject_gp(vcpu, 0);
565 kvm_x86_ops->set_efer(vcpu, efer);
568 efer |= vcpu->arch.shadow_efer & EFER_LMA;
570 vcpu->arch.shadow_efer = efer;
572 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
573 kvm_mmu_reset_context(vcpu);
576 void kvm_enable_efer_bits(u64 mask)
578 efer_reserved_bits &= ~mask;
580 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
584 * Writes msr value into into the appropriate "register".
585 * Returns 0 on success, non-0 otherwise.
586 * Assumes vcpu_load() was already called.
588 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
590 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
594 * Adapt set_msr() to msr_io()'s calling convention
596 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
598 return kvm_set_msr(vcpu, index, *data);
601 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
604 struct pvclock_wall_clock wc;
605 struct timespec now, sys, boot;
612 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
615 * The guest calculates current wall clock time by adding
616 * system time (updated by kvm_write_guest_time below) to the
617 * wall clock specified here. guest system time equals host
618 * system time for us, thus we must fill in host boot time here.
620 now = current_kernel_time();
622 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
624 wc.sec = boot.tv_sec;
625 wc.nsec = boot.tv_nsec;
626 wc.version = version;
628 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
631 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
634 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
636 uint32_t quotient, remainder;
638 /* Don't try to replace with do_div(), this one calculates
639 * "(dividend << 32) / divisor" */
641 : "=a" (quotient), "=d" (remainder)
642 : "0" (0), "1" (dividend), "r" (divisor) );
646 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
648 uint64_t nsecs = 1000000000LL;
653 tps64 = tsc_khz * 1000LL;
654 while (tps64 > nsecs*2) {
659 tps32 = (uint32_t)tps64;
660 while (tps32 <= (uint32_t)nsecs) {
665 hv_clock->tsc_shift = shift;
666 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
668 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
669 __func__, tsc_khz, hv_clock->tsc_shift,
670 hv_clock->tsc_to_system_mul);
673 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
675 static void kvm_write_guest_time(struct kvm_vcpu *v)
679 struct kvm_vcpu_arch *vcpu = &v->arch;
681 unsigned long this_tsc_khz;
683 if ((!vcpu->time_page))
686 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
687 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
688 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
689 vcpu->hv_clock_tsc_khz = this_tsc_khz;
691 put_cpu_var(cpu_tsc_khz);
693 /* Keep irq disabled to prevent changes to the clock */
694 local_irq_save(flags);
695 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
697 local_irq_restore(flags);
699 /* With all the info we got, fill in the values */
701 vcpu->hv_clock.system_time = ts.tv_nsec +
702 (NSEC_PER_SEC * (u64)ts.tv_sec);
704 * The interface expects us to write an even number signaling that the
705 * update is finished. Since the guest won't see the intermediate
706 * state, we just increase by 2 at the end.
708 vcpu->hv_clock.version += 2;
710 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
712 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
713 sizeof(vcpu->hv_clock));
715 kunmap_atomic(shared_kaddr, KM_USER0);
717 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
720 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
722 struct kvm_vcpu_arch *vcpu = &v->arch;
724 if (!vcpu->time_page)
726 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
730 static bool msr_mtrr_valid(unsigned msr)
733 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
734 case MSR_MTRRfix64K_00000:
735 case MSR_MTRRfix16K_80000:
736 case MSR_MTRRfix16K_A0000:
737 case MSR_MTRRfix4K_C0000:
738 case MSR_MTRRfix4K_C8000:
739 case MSR_MTRRfix4K_D0000:
740 case MSR_MTRRfix4K_D8000:
741 case MSR_MTRRfix4K_E0000:
742 case MSR_MTRRfix4K_E8000:
743 case MSR_MTRRfix4K_F0000:
744 case MSR_MTRRfix4K_F8000:
745 case MSR_MTRRdefType:
746 case MSR_IA32_CR_PAT:
754 static bool valid_pat_type(unsigned t)
756 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
759 static bool valid_mtrr_type(unsigned t)
761 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
764 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
768 if (!msr_mtrr_valid(msr))
771 if (msr == MSR_IA32_CR_PAT) {
772 for (i = 0; i < 8; i++)
773 if (!valid_pat_type((data >> (i * 8)) & 0xff))
776 } else if (msr == MSR_MTRRdefType) {
779 return valid_mtrr_type(data & 0xff);
780 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
781 for (i = 0; i < 8 ; i++)
782 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
788 return valid_mtrr_type(data & 0xff);
791 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
793 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
795 if (!mtrr_valid(vcpu, msr, data))
798 if (msr == MSR_MTRRdefType) {
799 vcpu->arch.mtrr_state.def_type = data;
800 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
801 } else if (msr == MSR_MTRRfix64K_00000)
803 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
804 p[1 + msr - MSR_MTRRfix16K_80000] = data;
805 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
806 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
807 else if (msr == MSR_IA32_CR_PAT)
808 vcpu->arch.pat = data;
809 else { /* Variable MTRRs */
810 int idx, is_mtrr_mask;
813 idx = (msr - 0x200) / 2;
814 is_mtrr_mask = msr - 0x200 - 2 * idx;
817 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
820 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
824 kvm_mmu_reset_context(vcpu);
828 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
830 u64 mcg_cap = vcpu->arch.mcg_cap;
831 unsigned bank_num = mcg_cap & 0xff;
834 case MSR_IA32_MCG_STATUS:
835 vcpu->arch.mcg_status = data;
837 case MSR_IA32_MCG_CTL:
838 if (!(mcg_cap & MCG_CTL_P))
840 if (data != 0 && data != ~(u64)0)
842 vcpu->arch.mcg_ctl = data;
845 if (msr >= MSR_IA32_MC0_CTL &&
846 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
847 u32 offset = msr - MSR_IA32_MC0_CTL;
848 /* only 0 or all 1s can be written to IA32_MCi_CTL */
849 if ((offset & 0x3) == 0 &&
850 data != 0 && data != ~(u64)0)
852 vcpu->arch.mce_banks[offset] = data;
860 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
864 set_efer(vcpu, data);
867 data &= ~(u64)0x40; /* ignore flush filter disable */
869 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
874 case MSR_FAM10H_MMIO_CONF_BASE:
876 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
881 case MSR_AMD64_NB_CFG:
883 case MSR_IA32_DEBUGCTLMSR:
885 /* We support the non-activated case already */
887 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
888 /* Values other than LBR and BTF are vendor-specific,
889 thus reserved and should throw a #GP */
892 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
895 case MSR_IA32_UCODE_REV:
896 case MSR_IA32_UCODE_WRITE:
897 case MSR_VM_HSAVE_PA:
898 case MSR_AMD64_PATCH_LOADER:
900 case 0x200 ... 0x2ff:
901 return set_msr_mtrr(vcpu, msr, data);
902 case MSR_IA32_APICBASE:
903 kvm_set_apic_base(vcpu, data);
905 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
906 return kvm_x2apic_msr_write(vcpu, msr, data);
907 case MSR_IA32_MISC_ENABLE:
908 vcpu->arch.ia32_misc_enable_msr = data;
910 case MSR_KVM_WALL_CLOCK:
911 vcpu->kvm->arch.wall_clock = data;
912 kvm_write_wall_clock(vcpu->kvm, data);
914 case MSR_KVM_SYSTEM_TIME: {
915 if (vcpu->arch.time_page) {
916 kvm_release_page_dirty(vcpu->arch.time_page);
917 vcpu->arch.time_page = NULL;
920 vcpu->arch.time = data;
922 /* we verify if the enable bit is set... */
926 /* ...but clean it before doing the actual write */
927 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
929 vcpu->arch.time_page =
930 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
932 if (is_error_page(vcpu->arch.time_page)) {
933 kvm_release_page_clean(vcpu->arch.time_page);
934 vcpu->arch.time_page = NULL;
937 kvm_request_guest_time_update(vcpu);
940 case MSR_IA32_MCG_CTL:
941 case MSR_IA32_MCG_STATUS:
942 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
943 return set_msr_mce(vcpu, msr, data);
945 /* Performance counters are not protected by a CPUID bit,
946 * so we should check all of them in the generic path for the sake of
947 * cross vendor migration.
948 * Writing a zero into the event select MSRs disables them,
949 * which we perfectly emulate ;-). Any other value should be at least
950 * reported, some guests depend on them.
952 case MSR_P6_EVNTSEL0:
953 case MSR_P6_EVNTSEL1:
954 case MSR_K7_EVNTSEL0:
955 case MSR_K7_EVNTSEL1:
956 case MSR_K7_EVNTSEL2:
957 case MSR_K7_EVNTSEL3:
959 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
960 "0x%x data 0x%llx\n", msr, data);
962 /* at least RHEL 4 unconditionally writes to the perfctr registers,
963 * so we ignore writes to make it happy.
965 case MSR_P6_PERFCTR0:
966 case MSR_P6_PERFCTR1:
967 case MSR_K7_PERFCTR0:
968 case MSR_K7_PERFCTR1:
969 case MSR_K7_PERFCTR2:
970 case MSR_K7_PERFCTR3:
971 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
972 "0x%x data 0x%llx\n", msr, data);
976 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
980 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
987 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
991 * Reads an msr value (of 'msr_index') into 'pdata'.
992 * Returns 0 on success, non-0 otherwise.
993 * Assumes vcpu_load() was already called.
995 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
997 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1000 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1002 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1004 if (!msr_mtrr_valid(msr))
1007 if (msr == MSR_MTRRdefType)
1008 *pdata = vcpu->arch.mtrr_state.def_type +
1009 (vcpu->arch.mtrr_state.enabled << 10);
1010 else if (msr == MSR_MTRRfix64K_00000)
1012 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1013 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1014 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1015 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1016 else if (msr == MSR_IA32_CR_PAT)
1017 *pdata = vcpu->arch.pat;
1018 else { /* Variable MTRRs */
1019 int idx, is_mtrr_mask;
1022 idx = (msr - 0x200) / 2;
1023 is_mtrr_mask = msr - 0x200 - 2 * idx;
1026 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1029 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1036 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1039 u64 mcg_cap = vcpu->arch.mcg_cap;
1040 unsigned bank_num = mcg_cap & 0xff;
1043 case MSR_IA32_P5_MC_ADDR:
1044 case MSR_IA32_P5_MC_TYPE:
1047 case MSR_IA32_MCG_CAP:
1048 data = vcpu->arch.mcg_cap;
1050 case MSR_IA32_MCG_CTL:
1051 if (!(mcg_cap & MCG_CTL_P))
1053 data = vcpu->arch.mcg_ctl;
1055 case MSR_IA32_MCG_STATUS:
1056 data = vcpu->arch.mcg_status;
1059 if (msr >= MSR_IA32_MC0_CTL &&
1060 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1061 u32 offset = msr - MSR_IA32_MC0_CTL;
1062 data = vcpu->arch.mce_banks[offset];
1071 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1076 case MSR_IA32_PLATFORM_ID:
1077 case MSR_IA32_UCODE_REV:
1078 case MSR_IA32_EBL_CR_POWERON:
1079 case MSR_IA32_DEBUGCTLMSR:
1080 case MSR_IA32_LASTBRANCHFROMIP:
1081 case MSR_IA32_LASTBRANCHTOIP:
1082 case MSR_IA32_LASTINTFROMIP:
1083 case MSR_IA32_LASTINTTOIP:
1086 case MSR_VM_HSAVE_PA:
1087 case MSR_P6_PERFCTR0:
1088 case MSR_P6_PERFCTR1:
1089 case MSR_P6_EVNTSEL0:
1090 case MSR_P6_EVNTSEL1:
1091 case MSR_K7_EVNTSEL0:
1092 case MSR_K7_PERFCTR0:
1093 case MSR_K8_INT_PENDING_MSG:
1094 case MSR_AMD64_NB_CFG:
1095 case MSR_FAM10H_MMIO_CONF_BASE:
1099 data = 0x500 | KVM_NR_VAR_MTRR;
1101 case 0x200 ... 0x2ff:
1102 return get_msr_mtrr(vcpu, msr, pdata);
1103 case 0xcd: /* fsb frequency */
1106 case MSR_IA32_APICBASE:
1107 data = kvm_get_apic_base(vcpu);
1109 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1110 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1112 case MSR_IA32_MISC_ENABLE:
1113 data = vcpu->arch.ia32_misc_enable_msr;
1115 case MSR_IA32_PERF_STATUS:
1116 /* TSC increment by tick */
1118 /* CPU multiplier */
1119 data |= (((uint64_t)4ULL) << 40);
1122 data = vcpu->arch.shadow_efer;
1124 case MSR_KVM_WALL_CLOCK:
1125 data = vcpu->kvm->arch.wall_clock;
1127 case MSR_KVM_SYSTEM_TIME:
1128 data = vcpu->arch.time;
1130 case MSR_IA32_P5_MC_ADDR:
1131 case MSR_IA32_P5_MC_TYPE:
1132 case MSR_IA32_MCG_CAP:
1133 case MSR_IA32_MCG_CTL:
1134 case MSR_IA32_MCG_STATUS:
1135 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1136 return get_msr_mce(vcpu, msr, pdata);
1139 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1142 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1150 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1153 * Read or write a bunch of msrs. All parameters are kernel addresses.
1155 * @return number of msrs set successfully.
1157 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1158 struct kvm_msr_entry *entries,
1159 int (*do_msr)(struct kvm_vcpu *vcpu,
1160 unsigned index, u64 *data))
1166 down_read(&vcpu->kvm->slots_lock);
1167 for (i = 0; i < msrs->nmsrs; ++i)
1168 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1170 up_read(&vcpu->kvm->slots_lock);
1178 * Read or write a bunch of msrs. Parameters are user addresses.
1180 * @return number of msrs set successfully.
1182 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1183 int (*do_msr)(struct kvm_vcpu *vcpu,
1184 unsigned index, u64 *data),
1187 struct kvm_msrs msrs;
1188 struct kvm_msr_entry *entries;
1193 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1197 if (msrs.nmsrs >= MAX_IO_MSRS)
1201 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1202 entries = vmalloc(size);
1207 if (copy_from_user(entries, user_msrs->entries, size))
1210 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1215 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1226 int kvm_dev_ioctl_check_extension(long ext)
1231 case KVM_CAP_IRQCHIP:
1233 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1234 case KVM_CAP_SET_TSS_ADDR:
1235 case KVM_CAP_EXT_CPUID:
1236 case KVM_CAP_CLOCKSOURCE:
1238 case KVM_CAP_NOP_IO_DELAY:
1239 case KVM_CAP_MP_STATE:
1240 case KVM_CAP_SYNC_MMU:
1241 case KVM_CAP_REINJECT_CONTROL:
1242 case KVM_CAP_IRQ_INJECT_STATUS:
1243 case KVM_CAP_ASSIGN_DEV_IRQ:
1245 case KVM_CAP_IOEVENTFD:
1247 case KVM_CAP_PIT_STATE2:
1248 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1251 case KVM_CAP_COALESCED_MMIO:
1252 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1255 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1257 case KVM_CAP_NR_VCPUS:
1260 case KVM_CAP_NR_MEMSLOTS:
1261 r = KVM_MEMORY_SLOTS;
1263 case KVM_CAP_PV_MMU: /* obsolete */
1270 r = KVM_MAX_MCE_BANKS;
1280 long kvm_arch_dev_ioctl(struct file *filp,
1281 unsigned int ioctl, unsigned long arg)
1283 void __user *argp = (void __user *)arg;
1287 case KVM_GET_MSR_INDEX_LIST: {
1288 struct kvm_msr_list __user *user_msr_list = argp;
1289 struct kvm_msr_list msr_list;
1293 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1296 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1297 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1300 if (n < msr_list.nmsrs)
1303 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1304 num_msrs_to_save * sizeof(u32)))
1306 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1308 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1313 case KVM_GET_SUPPORTED_CPUID: {
1314 struct kvm_cpuid2 __user *cpuid_arg = argp;
1315 struct kvm_cpuid2 cpuid;
1318 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1320 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1321 cpuid_arg->entries);
1326 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1331 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1334 mce_cap = KVM_MCE_CAP_SUPPORTED;
1336 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1348 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1350 kvm_x86_ops->vcpu_load(vcpu, cpu);
1351 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1352 unsigned long khz = cpufreq_quick_get(cpu);
1355 per_cpu(cpu_tsc_khz, cpu) = khz;
1357 kvm_request_guest_time_update(vcpu);
1360 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1362 kvm_x86_ops->vcpu_put(vcpu);
1363 kvm_put_guest_fpu(vcpu);
1366 static int is_efer_nx(void)
1368 unsigned long long efer = 0;
1370 rdmsrl_safe(MSR_EFER, &efer);
1371 return efer & EFER_NX;
1374 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1377 struct kvm_cpuid_entry2 *e, *entry;
1380 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1381 e = &vcpu->arch.cpuid_entries[i];
1382 if (e->function == 0x80000001) {
1387 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1388 entry->edx &= ~(1 << 20);
1389 printk(KERN_INFO "kvm: guest NX capability removed\n");
1393 /* when an old userspace process fills a new kernel module */
1394 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1395 struct kvm_cpuid *cpuid,
1396 struct kvm_cpuid_entry __user *entries)
1399 struct kvm_cpuid_entry *cpuid_entries;
1402 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1405 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1409 if (copy_from_user(cpuid_entries, entries,
1410 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1412 for (i = 0; i < cpuid->nent; i++) {
1413 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1414 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1415 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1416 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1417 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1418 vcpu->arch.cpuid_entries[i].index = 0;
1419 vcpu->arch.cpuid_entries[i].flags = 0;
1420 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1421 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1422 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1424 vcpu->arch.cpuid_nent = cpuid->nent;
1425 cpuid_fix_nx_cap(vcpu);
1427 kvm_apic_set_version(vcpu);
1430 vfree(cpuid_entries);
1435 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1436 struct kvm_cpuid2 *cpuid,
1437 struct kvm_cpuid_entry2 __user *entries)
1442 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1445 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1446 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1448 vcpu->arch.cpuid_nent = cpuid->nent;
1449 kvm_apic_set_version(vcpu);
1456 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1457 struct kvm_cpuid2 *cpuid,
1458 struct kvm_cpuid_entry2 __user *entries)
1463 if (cpuid->nent < vcpu->arch.cpuid_nent)
1466 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1467 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1472 cpuid->nent = vcpu->arch.cpuid_nent;
1476 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1479 entry->function = function;
1480 entry->index = index;
1481 cpuid_count(entry->function, entry->index,
1482 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1486 #define F(x) bit(X86_FEATURE_##x)
1488 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1489 u32 index, int *nent, int maxnent)
1491 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1492 unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1493 #ifdef CONFIG_X86_64
1494 unsigned f_lm = F(LM);
1500 const u32 kvm_supported_word0_x86_features =
1501 F(FPU) | F(VME) | F(DE) | F(PSE) |
1502 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1503 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1504 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1505 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1506 0 /* Reserved, DS, ACPI */ | F(MMX) |
1507 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1508 0 /* HTT, TM, Reserved, PBE */;
1509 /* cpuid 0x80000001.edx */
1510 const u32 kvm_supported_word1_x86_features =
1511 F(FPU) | F(VME) | F(DE) | F(PSE) |
1512 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1513 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1514 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1515 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1516 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1517 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1518 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1520 const u32 kvm_supported_word4_x86_features =
1521 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1522 0 /* DS-CPL, VMX, SMX, EST */ |
1523 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1524 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1525 0 /* Reserved, DCA */ | F(XMM4_1) |
1526 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1527 0 /* Reserved, XSAVE, OSXSAVE */;
1528 /* cpuid 0x80000001.ecx */
1529 const u32 kvm_supported_word6_x86_features =
1530 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1531 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1532 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1533 0 /* SKINIT */ | 0 /* WDT */;
1535 /* all calls to cpuid_count() should be made on the same cpu */
1537 do_cpuid_1_ent(entry, function, index);
1542 entry->eax = min(entry->eax, (u32)0xb);
1545 entry->edx &= kvm_supported_word0_x86_features;
1546 entry->ecx &= kvm_supported_word4_x86_features;
1547 /* we support x2apic emulation even if host does not support
1548 * it since we emulate x2apic in software */
1549 entry->ecx |= F(X2APIC);
1551 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1552 * may return different values. This forces us to get_cpu() before
1553 * issuing the first command, and also to emulate this annoying behavior
1554 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1556 int t, times = entry->eax & 0xff;
1558 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1559 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1560 for (t = 1; t < times && *nent < maxnent; ++t) {
1561 do_cpuid_1_ent(&entry[t], function, 0);
1562 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1567 /* function 4 and 0xb have additional index. */
1571 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1572 /* read more entries until cache_type is zero */
1573 for (i = 1; *nent < maxnent; ++i) {
1574 cache_type = entry[i - 1].eax & 0x1f;
1577 do_cpuid_1_ent(&entry[i], function, i);
1579 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1587 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1588 /* read more entries until level_type is zero */
1589 for (i = 1; *nent < maxnent; ++i) {
1590 level_type = entry[i - 1].ecx & 0xff00;
1593 do_cpuid_1_ent(&entry[i], function, i);
1595 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1601 entry->eax = min(entry->eax, 0x8000001a);
1604 entry->edx &= kvm_supported_word1_x86_features;
1605 entry->ecx &= kvm_supported_word6_x86_features;
1613 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1614 struct kvm_cpuid_entry2 __user *entries)
1616 struct kvm_cpuid_entry2 *cpuid_entries;
1617 int limit, nent = 0, r = -E2BIG;
1620 if (cpuid->nent < 1)
1622 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1623 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1625 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1629 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1630 limit = cpuid_entries[0].eax;
1631 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1632 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1633 &nent, cpuid->nent);
1635 if (nent >= cpuid->nent)
1638 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1639 limit = cpuid_entries[nent - 1].eax;
1640 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1641 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1642 &nent, cpuid->nent);
1644 if (nent >= cpuid->nent)
1648 if (copy_to_user(entries, cpuid_entries,
1649 nent * sizeof(struct kvm_cpuid_entry2)))
1655 vfree(cpuid_entries);
1660 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1661 struct kvm_lapic_state *s)
1664 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1670 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1671 struct kvm_lapic_state *s)
1674 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1675 kvm_apic_post_state_restore(vcpu);
1676 update_cr8_intercept(vcpu);
1682 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1683 struct kvm_interrupt *irq)
1685 if (irq->irq < 0 || irq->irq >= 256)
1687 if (irqchip_in_kernel(vcpu->kvm))
1691 kvm_queue_interrupt(vcpu, irq->irq, false);
1698 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1701 kvm_inject_nmi(vcpu);
1707 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1708 struct kvm_tpr_access_ctl *tac)
1712 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1716 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1720 unsigned bank_num = mcg_cap & 0xff, bank;
1723 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
1725 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1728 vcpu->arch.mcg_cap = mcg_cap;
1729 /* Init IA32_MCG_CTL to all 1s */
1730 if (mcg_cap & MCG_CTL_P)
1731 vcpu->arch.mcg_ctl = ~(u64)0;
1732 /* Init IA32_MCi_CTL to all 1s */
1733 for (bank = 0; bank < bank_num; bank++)
1734 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1739 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1740 struct kvm_x86_mce *mce)
1742 u64 mcg_cap = vcpu->arch.mcg_cap;
1743 unsigned bank_num = mcg_cap & 0xff;
1744 u64 *banks = vcpu->arch.mce_banks;
1746 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1749 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1750 * reporting is disabled
1752 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1753 vcpu->arch.mcg_ctl != ~(u64)0)
1755 banks += 4 * mce->bank;
1757 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1758 * reporting is disabled for the bank
1760 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1762 if (mce->status & MCI_STATUS_UC) {
1763 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1764 !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1765 printk(KERN_DEBUG "kvm: set_mce: "
1766 "injects mce exception while "
1767 "previous one is in progress!\n");
1768 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1771 if (banks[1] & MCI_STATUS_VAL)
1772 mce->status |= MCI_STATUS_OVER;
1773 banks[2] = mce->addr;
1774 banks[3] = mce->misc;
1775 vcpu->arch.mcg_status = mce->mcg_status;
1776 banks[1] = mce->status;
1777 kvm_queue_exception(vcpu, MC_VECTOR);
1778 } else if (!(banks[1] & MCI_STATUS_VAL)
1779 || !(banks[1] & MCI_STATUS_UC)) {
1780 if (banks[1] & MCI_STATUS_VAL)
1781 mce->status |= MCI_STATUS_OVER;
1782 banks[2] = mce->addr;
1783 banks[3] = mce->misc;
1784 banks[1] = mce->status;
1786 banks[1] |= MCI_STATUS_OVER;
1790 long kvm_arch_vcpu_ioctl(struct file *filp,
1791 unsigned int ioctl, unsigned long arg)
1793 struct kvm_vcpu *vcpu = filp->private_data;
1794 void __user *argp = (void __user *)arg;
1796 struct kvm_lapic_state *lapic = NULL;
1799 case KVM_GET_LAPIC: {
1800 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1805 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1809 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1814 case KVM_SET_LAPIC: {
1815 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1820 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1822 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1828 case KVM_INTERRUPT: {
1829 struct kvm_interrupt irq;
1832 if (copy_from_user(&irq, argp, sizeof irq))
1834 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1841 r = kvm_vcpu_ioctl_nmi(vcpu);
1847 case KVM_SET_CPUID: {
1848 struct kvm_cpuid __user *cpuid_arg = argp;
1849 struct kvm_cpuid cpuid;
1852 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1854 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1859 case KVM_SET_CPUID2: {
1860 struct kvm_cpuid2 __user *cpuid_arg = argp;
1861 struct kvm_cpuid2 cpuid;
1864 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1866 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1867 cpuid_arg->entries);
1872 case KVM_GET_CPUID2: {
1873 struct kvm_cpuid2 __user *cpuid_arg = argp;
1874 struct kvm_cpuid2 cpuid;
1877 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1879 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1880 cpuid_arg->entries);
1884 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1890 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1893 r = msr_io(vcpu, argp, do_set_msr, 0);
1895 case KVM_TPR_ACCESS_REPORTING: {
1896 struct kvm_tpr_access_ctl tac;
1899 if (copy_from_user(&tac, argp, sizeof tac))
1901 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1905 if (copy_to_user(argp, &tac, sizeof tac))
1910 case KVM_SET_VAPIC_ADDR: {
1911 struct kvm_vapic_addr va;
1914 if (!irqchip_in_kernel(vcpu->kvm))
1917 if (copy_from_user(&va, argp, sizeof va))
1920 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1923 case KVM_X86_SETUP_MCE: {
1927 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1929 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1932 case KVM_X86_SET_MCE: {
1933 struct kvm_x86_mce mce;
1936 if (copy_from_user(&mce, argp, sizeof mce))
1938 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1949 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1953 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1955 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1959 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
1962 kvm->arch.ept_identity_map_addr = ident_addr;
1966 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1967 u32 kvm_nr_mmu_pages)
1969 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1972 down_write(&kvm->slots_lock);
1973 spin_lock(&kvm->mmu_lock);
1975 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1976 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1978 spin_unlock(&kvm->mmu_lock);
1979 up_write(&kvm->slots_lock);
1983 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1985 return kvm->arch.n_alloc_mmu_pages;
1988 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1991 struct kvm_mem_alias *alias;
1993 for (i = 0; i < kvm->arch.naliases; ++i) {
1994 alias = &kvm->arch.aliases[i];
1995 if (gfn >= alias->base_gfn
1996 && gfn < alias->base_gfn + alias->npages)
1997 return alias->target_gfn + gfn - alias->base_gfn;
2003 * Set a new alias region. Aliases map a portion of physical memory into
2004 * another portion. This is useful for memory windows, for example the PC
2007 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2008 struct kvm_memory_alias *alias)
2011 struct kvm_mem_alias *p;
2014 /* General sanity checks */
2015 if (alias->memory_size & (PAGE_SIZE - 1))
2017 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2019 if (alias->slot >= KVM_ALIAS_SLOTS)
2021 if (alias->guest_phys_addr + alias->memory_size
2022 < alias->guest_phys_addr)
2024 if (alias->target_phys_addr + alias->memory_size
2025 < alias->target_phys_addr)
2028 down_write(&kvm->slots_lock);
2029 spin_lock(&kvm->mmu_lock);
2031 p = &kvm->arch.aliases[alias->slot];
2032 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2033 p->npages = alias->memory_size >> PAGE_SHIFT;
2034 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2036 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2037 if (kvm->arch.aliases[n - 1].npages)
2039 kvm->arch.naliases = n;
2041 spin_unlock(&kvm->mmu_lock);
2042 kvm_mmu_zap_all(kvm);
2044 up_write(&kvm->slots_lock);
2052 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2057 switch (chip->chip_id) {
2058 case KVM_IRQCHIP_PIC_MASTER:
2059 memcpy(&chip->chip.pic,
2060 &pic_irqchip(kvm)->pics[0],
2061 sizeof(struct kvm_pic_state));
2063 case KVM_IRQCHIP_PIC_SLAVE:
2064 memcpy(&chip->chip.pic,
2065 &pic_irqchip(kvm)->pics[1],
2066 sizeof(struct kvm_pic_state));
2068 case KVM_IRQCHIP_IOAPIC:
2069 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2078 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2083 switch (chip->chip_id) {
2084 case KVM_IRQCHIP_PIC_MASTER:
2085 spin_lock(&pic_irqchip(kvm)->lock);
2086 memcpy(&pic_irqchip(kvm)->pics[0],
2088 sizeof(struct kvm_pic_state));
2089 spin_unlock(&pic_irqchip(kvm)->lock);
2091 case KVM_IRQCHIP_PIC_SLAVE:
2092 spin_lock(&pic_irqchip(kvm)->lock);
2093 memcpy(&pic_irqchip(kvm)->pics[1],
2095 sizeof(struct kvm_pic_state));
2096 spin_unlock(&pic_irqchip(kvm)->lock);
2098 case KVM_IRQCHIP_IOAPIC:
2099 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2105 kvm_pic_update_irq(pic_irqchip(kvm));
2109 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2113 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2114 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2115 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2119 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2123 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2124 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2125 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2126 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2130 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2134 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2135 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2136 sizeof(ps->channels));
2137 ps->flags = kvm->arch.vpit->pit_state.flags;
2138 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2142 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2144 int r = 0, start = 0;
2145 u32 prev_legacy, cur_legacy;
2146 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2147 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2148 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2149 if (!prev_legacy && cur_legacy)
2151 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2152 sizeof(kvm->arch.vpit->pit_state.channels));
2153 kvm->arch.vpit->pit_state.flags = ps->flags;
2154 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2155 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2159 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2160 struct kvm_reinject_control *control)
2162 if (!kvm->arch.vpit)
2164 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2165 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2166 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2171 * Get (and clear) the dirty memory log for a memory slot.
2173 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2174 struct kvm_dirty_log *log)
2178 struct kvm_memory_slot *memslot;
2181 down_write(&kvm->slots_lock);
2183 r = kvm_get_dirty_log(kvm, log, &is_dirty);
2187 /* If nothing is dirty, don't bother messing with page tables. */
2189 spin_lock(&kvm->mmu_lock);
2190 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2191 spin_unlock(&kvm->mmu_lock);
2192 memslot = &kvm->memslots[log->slot];
2193 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2194 memset(memslot->dirty_bitmap, 0, n);
2198 up_write(&kvm->slots_lock);
2202 long kvm_arch_vm_ioctl(struct file *filp,
2203 unsigned int ioctl, unsigned long arg)
2205 struct kvm *kvm = filp->private_data;
2206 void __user *argp = (void __user *)arg;
2209 * This union makes it completely explicit to gcc-3.x
2210 * that these two variables' stack usage should be
2211 * combined, not added together.
2214 struct kvm_pit_state ps;
2215 struct kvm_pit_state2 ps2;
2216 struct kvm_memory_alias alias;
2217 struct kvm_pit_config pit_config;
2221 case KVM_SET_TSS_ADDR:
2222 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2226 case KVM_SET_IDENTITY_MAP_ADDR: {
2230 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2232 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2237 case KVM_SET_MEMORY_REGION: {
2238 struct kvm_memory_region kvm_mem;
2239 struct kvm_userspace_memory_region kvm_userspace_mem;
2242 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2244 kvm_userspace_mem.slot = kvm_mem.slot;
2245 kvm_userspace_mem.flags = kvm_mem.flags;
2246 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2247 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2248 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2253 case KVM_SET_NR_MMU_PAGES:
2254 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2258 case KVM_GET_NR_MMU_PAGES:
2259 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2261 case KVM_SET_MEMORY_ALIAS:
2263 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2265 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2269 case KVM_CREATE_IRQCHIP:
2271 kvm->arch.vpic = kvm_create_pic(kvm);
2272 if (kvm->arch.vpic) {
2273 r = kvm_ioapic_init(kvm);
2275 kfree(kvm->arch.vpic);
2276 kvm->arch.vpic = NULL;
2281 r = kvm_setup_default_irq_routing(kvm);
2283 kfree(kvm->arch.vpic);
2284 kfree(kvm->arch.vioapic);
2288 case KVM_CREATE_PIT:
2289 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2291 case KVM_CREATE_PIT2:
2293 if (copy_from_user(&u.pit_config, argp,
2294 sizeof(struct kvm_pit_config)))
2297 down_write(&kvm->slots_lock);
2300 goto create_pit_unlock;
2302 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2306 up_write(&kvm->slots_lock);
2308 case KVM_IRQ_LINE_STATUS:
2309 case KVM_IRQ_LINE: {
2310 struct kvm_irq_level irq_event;
2313 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2315 if (irqchip_in_kernel(kvm)) {
2317 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2318 irq_event.irq, irq_event.level);
2319 if (ioctl == KVM_IRQ_LINE_STATUS) {
2320 irq_event.status = status;
2321 if (copy_to_user(argp, &irq_event,
2329 case KVM_GET_IRQCHIP: {
2330 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2331 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2337 if (copy_from_user(chip, argp, sizeof *chip))
2338 goto get_irqchip_out;
2340 if (!irqchip_in_kernel(kvm))
2341 goto get_irqchip_out;
2342 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2344 goto get_irqchip_out;
2346 if (copy_to_user(argp, chip, sizeof *chip))
2347 goto get_irqchip_out;
2355 case KVM_SET_IRQCHIP: {
2356 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2357 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2363 if (copy_from_user(chip, argp, sizeof *chip))
2364 goto set_irqchip_out;
2366 if (!irqchip_in_kernel(kvm))
2367 goto set_irqchip_out;
2368 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2370 goto set_irqchip_out;
2380 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2383 if (!kvm->arch.vpit)
2385 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2389 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2396 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2399 if (!kvm->arch.vpit)
2401 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2407 case KVM_GET_PIT2: {
2409 if (!kvm->arch.vpit)
2411 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2415 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2420 case KVM_SET_PIT2: {
2422 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2425 if (!kvm->arch.vpit)
2427 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2433 case KVM_REINJECT_CONTROL: {
2434 struct kvm_reinject_control control;
2436 if (copy_from_user(&control, argp, sizeof(control)))
2438 r = kvm_vm_ioctl_reinject(kvm, &control);
2451 static void kvm_init_msr_list(void)
2456 /* skip the first msrs in the list. KVM-specific */
2457 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
2458 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2461 msrs_to_save[j] = msrs_to_save[i];
2464 num_msrs_to_save = j;
2467 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2470 if (vcpu->arch.apic &&
2471 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2474 return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2477 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2479 if (vcpu->arch.apic &&
2480 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2483 return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2486 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2487 struct kvm_vcpu *vcpu)
2490 int r = X86EMUL_CONTINUE;
2493 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2494 unsigned offset = addr & (PAGE_SIZE-1);
2495 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2498 if (gpa == UNMAPPED_GVA) {
2499 r = X86EMUL_PROPAGATE_FAULT;
2502 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2504 r = X86EMUL_UNHANDLEABLE;
2516 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2517 struct kvm_vcpu *vcpu)
2520 int r = X86EMUL_CONTINUE;
2523 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2524 unsigned offset = addr & (PAGE_SIZE-1);
2525 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2528 if (gpa == UNMAPPED_GVA) {
2529 r = X86EMUL_PROPAGATE_FAULT;
2532 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2534 r = X86EMUL_UNHANDLEABLE;
2547 static int emulator_read_emulated(unsigned long addr,
2550 struct kvm_vcpu *vcpu)
2554 if (vcpu->mmio_read_completed) {
2555 memcpy(val, vcpu->mmio_data, bytes);
2556 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2557 vcpu->mmio_phys_addr, *(u64 *)val);
2558 vcpu->mmio_read_completed = 0;
2559 return X86EMUL_CONTINUE;
2562 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2564 /* For APIC access vmexit */
2565 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2568 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2569 == X86EMUL_CONTINUE)
2570 return X86EMUL_CONTINUE;
2571 if (gpa == UNMAPPED_GVA)
2572 return X86EMUL_PROPAGATE_FAULT;
2576 * Is this MMIO handled locally?
2578 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2579 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2580 return X86EMUL_CONTINUE;
2583 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2585 vcpu->mmio_needed = 1;
2586 vcpu->mmio_phys_addr = gpa;
2587 vcpu->mmio_size = bytes;
2588 vcpu->mmio_is_write = 0;
2590 return X86EMUL_UNHANDLEABLE;
2593 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2594 const void *val, int bytes)
2598 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2601 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2605 static int emulator_write_emulated_onepage(unsigned long addr,
2608 struct kvm_vcpu *vcpu)
2612 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2614 if (gpa == UNMAPPED_GVA) {
2615 kvm_inject_page_fault(vcpu, addr, 2);
2616 return X86EMUL_PROPAGATE_FAULT;
2619 /* For APIC access vmexit */
2620 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2623 if (emulator_write_phys(vcpu, gpa, val, bytes))
2624 return X86EMUL_CONTINUE;
2627 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2629 * Is this MMIO handled locally?
2631 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2632 return X86EMUL_CONTINUE;
2634 vcpu->mmio_needed = 1;
2635 vcpu->mmio_phys_addr = gpa;
2636 vcpu->mmio_size = bytes;
2637 vcpu->mmio_is_write = 1;
2638 memcpy(vcpu->mmio_data, val, bytes);
2640 return X86EMUL_CONTINUE;
2643 int emulator_write_emulated(unsigned long addr,
2646 struct kvm_vcpu *vcpu)
2648 /* Crossing a page boundary? */
2649 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2652 now = -addr & ~PAGE_MASK;
2653 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2654 if (rc != X86EMUL_CONTINUE)
2660 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2662 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2664 static int emulator_cmpxchg_emulated(unsigned long addr,
2668 struct kvm_vcpu *vcpu)
2670 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
2671 #ifndef CONFIG_X86_64
2672 /* guests cmpxchg8b have to be emulated atomically */
2679 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2681 if (gpa == UNMAPPED_GVA ||
2682 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2685 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2690 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2692 kaddr = kmap_atomic(page, KM_USER0);
2693 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2694 kunmap_atomic(kaddr, KM_USER0);
2695 kvm_release_page_dirty(page);
2700 return emulator_write_emulated(addr, new, bytes, vcpu);
2703 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2705 return kvm_x86_ops->get_segment_base(vcpu, seg);
2708 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2710 kvm_mmu_invlpg(vcpu, address);
2711 return X86EMUL_CONTINUE;
2714 int emulate_clts(struct kvm_vcpu *vcpu)
2716 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2717 return X86EMUL_CONTINUE;
2720 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2722 struct kvm_vcpu *vcpu = ctxt->vcpu;
2726 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2727 return X86EMUL_CONTINUE;
2729 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2730 return X86EMUL_UNHANDLEABLE;
2734 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2736 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2739 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2741 /* FIXME: better handling */
2742 return X86EMUL_UNHANDLEABLE;
2744 return X86EMUL_CONTINUE;
2747 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2750 unsigned long rip = kvm_rip_read(vcpu);
2751 unsigned long rip_linear;
2753 if (!printk_ratelimit())
2756 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2758 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2760 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2761 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2763 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2765 static struct x86_emulate_ops emulate_ops = {
2766 .read_std = kvm_read_guest_virt,
2767 .read_emulated = emulator_read_emulated,
2768 .write_emulated = emulator_write_emulated,
2769 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2772 static void cache_all_regs(struct kvm_vcpu *vcpu)
2774 kvm_register_read(vcpu, VCPU_REGS_RAX);
2775 kvm_register_read(vcpu, VCPU_REGS_RSP);
2776 kvm_register_read(vcpu, VCPU_REGS_RIP);
2777 vcpu->arch.regs_dirty = ~0;
2780 int emulate_instruction(struct kvm_vcpu *vcpu,
2786 struct decode_cache *c;
2787 struct kvm_run *run = vcpu->run;
2789 kvm_clear_exception_queue(vcpu);
2790 vcpu->arch.mmio_fault_cr2 = cr2;
2792 * TODO: fix emulate.c to use guest_read/write_register
2793 * instead of direct ->regs accesses, can save hundred cycles
2794 * on Intel for instructions that don't read/change RSP, for
2797 cache_all_regs(vcpu);
2799 vcpu->mmio_is_write = 0;
2800 vcpu->arch.pio.string = 0;
2802 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2804 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2806 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2807 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
2808 vcpu->arch.emulate_ctxt.mode =
2809 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2810 ? X86EMUL_MODE_REAL : cs_l
2811 ? X86EMUL_MODE_PROT64 : cs_db
2812 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2814 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2816 /* Only allow emulation of specific instructions on #UD
2817 * (namely VMMCALL, sysenter, sysexit, syscall)*/
2818 c = &vcpu->arch.emulate_ctxt.decode;
2819 if (emulation_type & EMULTYPE_TRAP_UD) {
2821 return EMULATE_FAIL;
2823 case 0x01: /* VMMCALL */
2824 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2825 return EMULATE_FAIL;
2827 case 0x34: /* sysenter */
2828 case 0x35: /* sysexit */
2829 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2830 return EMULATE_FAIL;
2832 case 0x05: /* syscall */
2833 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2834 return EMULATE_FAIL;
2837 return EMULATE_FAIL;
2840 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2841 return EMULATE_FAIL;
2844 ++vcpu->stat.insn_emulation;
2846 ++vcpu->stat.insn_emulation_fail;
2847 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2848 return EMULATE_DONE;
2849 return EMULATE_FAIL;
2853 if (emulation_type & EMULTYPE_SKIP) {
2854 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2855 return EMULATE_DONE;
2858 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2859 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2862 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2864 if (vcpu->arch.pio.string)
2865 return EMULATE_DO_MMIO;
2867 if ((r || vcpu->mmio_is_write) && run) {
2868 run->exit_reason = KVM_EXIT_MMIO;
2869 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2870 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2871 run->mmio.len = vcpu->mmio_size;
2872 run->mmio.is_write = vcpu->mmio_is_write;
2876 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2877 return EMULATE_DONE;
2878 if (!vcpu->mmio_needed) {
2879 kvm_report_emulation_failure(vcpu, "mmio");
2880 return EMULATE_FAIL;
2882 return EMULATE_DO_MMIO;
2885 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2887 if (vcpu->mmio_is_write) {
2888 vcpu->mmio_needed = 0;
2889 return EMULATE_DO_MMIO;
2892 return EMULATE_DONE;
2894 EXPORT_SYMBOL_GPL(emulate_instruction);
2896 static int pio_copy_data(struct kvm_vcpu *vcpu)
2898 void *p = vcpu->arch.pio_data;
2899 gva_t q = vcpu->arch.pio.guest_gva;
2903 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2904 if (vcpu->arch.pio.in)
2905 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2907 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2911 int complete_pio(struct kvm_vcpu *vcpu)
2913 struct kvm_pio_request *io = &vcpu->arch.pio;
2920 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2921 memcpy(&val, vcpu->arch.pio_data, io->size);
2922 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2926 r = pio_copy_data(vcpu);
2933 delta *= io->cur_count;
2935 * The size of the register should really depend on
2936 * current address size.
2938 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2940 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2946 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2948 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2950 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2952 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2956 io->count -= io->cur_count;
2962 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2964 /* TODO: String I/O for in kernel device */
2967 if (vcpu->arch.pio.in)
2968 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2969 vcpu->arch.pio.size, pd);
2971 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2972 vcpu->arch.pio.size, pd);
2976 static int pio_string_write(struct kvm_vcpu *vcpu)
2978 struct kvm_pio_request *io = &vcpu->arch.pio;
2979 void *pd = vcpu->arch.pio_data;
2982 for (i = 0; i < io->cur_count; i++) {
2983 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2984 io->port, io->size, pd)) {
2993 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
2997 vcpu->run->exit_reason = KVM_EXIT_IO;
2998 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2999 vcpu->run->io.size = vcpu->arch.pio.size = size;
3000 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3001 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3002 vcpu->run->io.port = vcpu->arch.pio.port = port;
3003 vcpu->arch.pio.in = in;
3004 vcpu->arch.pio.string = 0;
3005 vcpu->arch.pio.down = 0;
3006 vcpu->arch.pio.rep = 0;
3008 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3011 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3012 memcpy(vcpu->arch.pio_data, &val, 4);
3014 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3020 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3022 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3023 int size, unsigned long count, int down,
3024 gva_t address, int rep, unsigned port)
3026 unsigned now, in_page;
3029 vcpu->run->exit_reason = KVM_EXIT_IO;
3030 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3031 vcpu->run->io.size = vcpu->arch.pio.size = size;
3032 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3033 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3034 vcpu->run->io.port = vcpu->arch.pio.port = port;
3035 vcpu->arch.pio.in = in;
3036 vcpu->arch.pio.string = 1;
3037 vcpu->arch.pio.down = down;
3038 vcpu->arch.pio.rep = rep;
3040 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3044 kvm_x86_ops->skip_emulated_instruction(vcpu);
3049 in_page = PAGE_SIZE - offset_in_page(address);
3051 in_page = offset_in_page(address) + size;
3052 now = min(count, (unsigned long)in_page / size);
3057 * String I/O in reverse. Yuck. Kill the guest, fix later.
3059 pr_unimpl(vcpu, "guest string pio down\n");
3060 kvm_inject_gp(vcpu, 0);
3063 vcpu->run->io.count = now;
3064 vcpu->arch.pio.cur_count = now;
3066 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3067 kvm_x86_ops->skip_emulated_instruction(vcpu);
3069 vcpu->arch.pio.guest_gva = address;
3071 if (!vcpu->arch.pio.in) {
3072 /* string PIO write */
3073 ret = pio_copy_data(vcpu);
3074 if (ret == X86EMUL_PROPAGATE_FAULT) {
3075 kvm_inject_gp(vcpu, 0);
3078 if (ret == 0 && !pio_string_write(vcpu)) {
3080 if (vcpu->arch.pio.count == 0)
3084 /* no string PIO read support yet */
3088 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3090 static void bounce_off(void *info)
3095 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3098 struct cpufreq_freqs *freq = data;
3100 struct kvm_vcpu *vcpu;
3101 int i, send_ipi = 0;
3103 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3105 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3107 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3109 spin_lock(&kvm_lock);
3110 list_for_each_entry(kvm, &vm_list, vm_list) {
3111 kvm_for_each_vcpu(i, vcpu, kvm) {
3112 if (vcpu->cpu != freq->cpu)
3114 if (!kvm_request_guest_time_update(vcpu))
3116 if (vcpu->cpu != smp_processor_id())
3120 spin_unlock(&kvm_lock);
3122 if (freq->old < freq->new && send_ipi) {
3124 * We upscale the frequency. Must make the guest
3125 * doesn't see old kvmclock values while running with
3126 * the new frequency, otherwise we risk the guest sees
3127 * time go backwards.
3129 * In case we update the frequency for another cpu
3130 * (which might be in guest context) send an interrupt
3131 * to kick the cpu out of guest context. Next time
3132 * guest context is entered kvmclock will be updated,
3133 * so the guest will not see stale values.
3135 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3140 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3141 .notifier_call = kvmclock_cpufreq_notifier
3144 static void kvm_timer_init(void)
3148 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3149 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3150 CPUFREQ_TRANSITION_NOTIFIER);
3151 for_each_online_cpu(cpu) {
3152 unsigned long khz = cpufreq_get(cpu);
3155 per_cpu(cpu_tsc_khz, cpu) = khz;
3158 for_each_possible_cpu(cpu)
3159 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3163 int kvm_arch_init(void *opaque)
3166 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3169 printk(KERN_ERR "kvm: already loaded the other module\n");
3174 if (!ops->cpu_has_kvm_support()) {
3175 printk(KERN_ERR "kvm: no hardware support\n");
3179 if (ops->disabled_by_bios()) {
3180 printk(KERN_ERR "kvm: disabled by bios\n");
3185 r = kvm_mmu_module_init();
3189 kvm_init_msr_list();
3192 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3193 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3194 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3195 PT_DIRTY_MASK, PT64_NX_MASK, 0);
3205 void kvm_arch_exit(void)
3207 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3208 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3209 CPUFREQ_TRANSITION_NOTIFIER);
3211 kvm_mmu_module_exit();
3214 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3216 ++vcpu->stat.halt_exits;
3217 if (irqchip_in_kernel(vcpu->kvm)) {
3218 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3221 vcpu->run->exit_reason = KVM_EXIT_HLT;
3225 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3227 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3230 if (is_long_mode(vcpu))
3233 return a0 | ((gpa_t)a1 << 32);
3236 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3238 unsigned long nr, a0, a1, a2, a3, ret;
3241 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3242 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3243 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3244 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3245 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3247 trace_kvm_hypercall(nr, a0, a1, a2, a3);
3249 if (!is_long_mode(vcpu)) {
3257 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3263 case KVM_HC_VAPIC_POLL_IRQ:
3267 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3274 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3275 ++vcpu->stat.hypercalls;
3278 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3280 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3282 char instruction[3];
3284 unsigned long rip = kvm_rip_read(vcpu);
3288 * Blow out the MMU to ensure that no other VCPU has an active mapping
3289 * to ensure that the updated hypercall appears atomically across all
3292 kvm_mmu_zap_all(vcpu->kvm);
3294 kvm_x86_ops->patch_hypercall(vcpu, instruction);
3295 if (emulator_write_emulated(rip, instruction, 3, vcpu)
3296 != X86EMUL_CONTINUE)
3302 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3304 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3307 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3309 struct descriptor_table dt = { limit, base };
3311 kvm_x86_ops->set_gdt(vcpu, &dt);
3314 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3316 struct descriptor_table dt = { limit, base };
3318 kvm_x86_ops->set_idt(vcpu, &dt);
3321 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3322 unsigned long *rflags)
3324 kvm_lmsw(vcpu, msw);
3325 *rflags = kvm_get_rflags(vcpu);
3328 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3330 unsigned long value;
3332 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3335 value = vcpu->arch.cr0;
3338 value = vcpu->arch.cr2;
3341 value = vcpu->arch.cr3;
3344 value = vcpu->arch.cr4;
3347 value = kvm_get_cr8(vcpu);
3350 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3357 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3358 unsigned long *rflags)
3362 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3363 *rflags = kvm_get_rflags(vcpu);
3366 vcpu->arch.cr2 = val;
3369 kvm_set_cr3(vcpu, val);
3372 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3375 kvm_set_cr8(vcpu, val & 0xfUL);
3378 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3382 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3384 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3385 int j, nent = vcpu->arch.cpuid_nent;
3387 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3388 /* when no next entry is found, the current entry[i] is reselected */
3389 for (j = i + 1; ; j = (j + 1) % nent) {
3390 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3391 if (ej->function == e->function) {
3392 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3396 return 0; /* silence gcc, even though control never reaches here */
3399 /* find an entry with matching function, matching index (if needed), and that
3400 * should be read next (if it's stateful) */
3401 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3402 u32 function, u32 index)
3404 if (e->function != function)
3406 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3408 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3409 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3414 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3415 u32 function, u32 index)
3418 struct kvm_cpuid_entry2 *best = NULL;
3420 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3421 struct kvm_cpuid_entry2 *e;
3423 e = &vcpu->arch.cpuid_entries[i];
3424 if (is_matching_cpuid_entry(e, function, index)) {
3425 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3426 move_to_next_stateful_cpuid_entry(vcpu, i);
3431 * Both basic or both extended?
3433 if (((e->function ^ function) & 0x80000000) == 0)
3434 if (!best || e->function > best->function)
3440 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3442 struct kvm_cpuid_entry2 *best;
3444 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3446 return best->eax & 0xff;
3450 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3452 u32 function, index;
3453 struct kvm_cpuid_entry2 *best;
3455 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3456 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3457 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3458 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3459 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3460 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3461 best = kvm_find_cpuid_entry(vcpu, function, index);
3463 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3464 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3465 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3466 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3468 kvm_x86_ops->skip_emulated_instruction(vcpu);
3469 trace_kvm_cpuid(function,
3470 kvm_register_read(vcpu, VCPU_REGS_RAX),
3471 kvm_register_read(vcpu, VCPU_REGS_RBX),
3472 kvm_register_read(vcpu, VCPU_REGS_RCX),
3473 kvm_register_read(vcpu, VCPU_REGS_RDX));
3475 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3478 * Check if userspace requested an interrupt window, and that the
3479 * interrupt window is open.
3481 * No need to exit to userspace if we already have an interrupt queued.
3483 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
3485 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3486 vcpu->run->request_interrupt_window &&
3487 kvm_arch_interrupt_allowed(vcpu));
3490 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
3492 struct kvm_run *kvm_run = vcpu->run;
3494 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3495 kvm_run->cr8 = kvm_get_cr8(vcpu);
3496 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3497 if (irqchip_in_kernel(vcpu->kvm))
3498 kvm_run->ready_for_interrupt_injection = 1;
3500 kvm_run->ready_for_interrupt_injection =
3501 kvm_arch_interrupt_allowed(vcpu) &&
3502 !kvm_cpu_has_interrupt(vcpu) &&
3503 !kvm_event_needs_reinjection(vcpu);
3506 static void vapic_enter(struct kvm_vcpu *vcpu)
3508 struct kvm_lapic *apic = vcpu->arch.apic;
3511 if (!apic || !apic->vapic_addr)
3514 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3516 vcpu->arch.apic->vapic_page = page;
3519 static void vapic_exit(struct kvm_vcpu *vcpu)
3521 struct kvm_lapic *apic = vcpu->arch.apic;
3523 if (!apic || !apic->vapic_addr)
3526 down_read(&vcpu->kvm->slots_lock);
3527 kvm_release_page_dirty(apic->vapic_page);
3528 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3529 up_read(&vcpu->kvm->slots_lock);
3532 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3536 if (!kvm_x86_ops->update_cr8_intercept)
3539 if (!vcpu->arch.apic)
3542 if (!vcpu->arch.apic->vapic_addr)
3543 max_irr = kvm_lapic_find_highest_irr(vcpu);
3550 tpr = kvm_lapic_get_cr8(vcpu);
3552 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3555 static void inject_pending_event(struct kvm_vcpu *vcpu)
3557 /* try to reinject previous events if any */
3558 if (vcpu->arch.exception.pending) {
3559 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3560 vcpu->arch.exception.has_error_code,
3561 vcpu->arch.exception.error_code);
3565 if (vcpu->arch.nmi_injected) {
3566 kvm_x86_ops->set_nmi(vcpu);
3570 if (vcpu->arch.interrupt.pending) {
3571 kvm_x86_ops->set_irq(vcpu);
3575 /* try to inject new event if pending */
3576 if (vcpu->arch.nmi_pending) {
3577 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3578 vcpu->arch.nmi_pending = false;
3579 vcpu->arch.nmi_injected = true;
3580 kvm_x86_ops->set_nmi(vcpu);
3582 } else if (kvm_cpu_has_interrupt(vcpu)) {
3583 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3584 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3586 kvm_x86_ops->set_irq(vcpu);
3591 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
3594 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3595 vcpu->run->request_interrupt_window;
3598 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3599 kvm_mmu_unload(vcpu);
3601 r = kvm_mmu_reload(vcpu);
3605 if (vcpu->requests) {
3606 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3607 __kvm_migrate_timers(vcpu);
3608 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3609 kvm_write_guest_time(vcpu);
3610 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3611 kvm_mmu_sync_roots(vcpu);
3612 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3613 kvm_x86_ops->tlb_flush(vcpu);
3614 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3616 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
3620 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3621 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
3629 kvm_x86_ops->prepare_guest_switch(vcpu);
3630 kvm_load_guest_fpu(vcpu);
3632 local_irq_disable();
3634 clear_bit(KVM_REQ_KICK, &vcpu->requests);
3635 smp_mb__after_clear_bit();
3637 if (vcpu->requests || need_resched() || signal_pending(current)) {
3638 set_bit(KVM_REQ_KICK, &vcpu->requests);
3645 inject_pending_event(vcpu);
3647 /* enable NMI/IRQ window open exits if needed */
3648 if (vcpu->arch.nmi_pending)
3649 kvm_x86_ops->enable_nmi_window(vcpu);
3650 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3651 kvm_x86_ops->enable_irq_window(vcpu);
3653 if (kvm_lapic_enabled(vcpu)) {
3654 update_cr8_intercept(vcpu);
3655 kvm_lapic_sync_to_vapic(vcpu);
3658 up_read(&vcpu->kvm->slots_lock);
3662 if (unlikely(vcpu->arch.switch_db_regs)) {
3664 set_debugreg(vcpu->arch.eff_db[0], 0);
3665 set_debugreg(vcpu->arch.eff_db[1], 1);
3666 set_debugreg(vcpu->arch.eff_db[2], 2);
3667 set_debugreg(vcpu->arch.eff_db[3], 3);
3670 trace_kvm_entry(vcpu->vcpu_id);
3671 kvm_x86_ops->run(vcpu);
3673 if (unlikely(vcpu->arch.switch_db_regs || test_thread_flag(TIF_DEBUG))) {
3674 set_debugreg(current->thread.debugreg0, 0);
3675 set_debugreg(current->thread.debugreg1, 1);
3676 set_debugreg(current->thread.debugreg2, 2);
3677 set_debugreg(current->thread.debugreg3, 3);
3678 set_debugreg(current->thread.debugreg6, 6);
3679 set_debugreg(current->thread.debugreg7, 7);
3682 set_bit(KVM_REQ_KICK, &vcpu->requests);
3688 * We must have an instruction between local_irq_enable() and
3689 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3690 * the interrupt shadow. The stat.exits increment will do nicely.
3691 * But we need to prevent reordering, hence this barrier():
3699 down_read(&vcpu->kvm->slots_lock);
3702 * Profile KVM exit RIPs:
3704 if (unlikely(prof_on == KVM_PROFILING)) {
3705 unsigned long rip = kvm_rip_read(vcpu);
3706 profile_hit(KVM_PROFILING, (void *)rip);
3710 kvm_lapic_sync_from_vapic(vcpu);
3712 r = kvm_x86_ops->handle_exit(vcpu);
3718 static int __vcpu_run(struct kvm_vcpu *vcpu)
3722 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3723 pr_debug("vcpu %d received sipi with vector # %x\n",
3724 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3725 kvm_lapic_reset(vcpu);
3726 r = kvm_arch_vcpu_reset(vcpu);
3729 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3732 down_read(&vcpu->kvm->slots_lock);
3737 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3738 r = vcpu_enter_guest(vcpu);
3740 up_read(&vcpu->kvm->slots_lock);
3741 kvm_vcpu_block(vcpu);
3742 down_read(&vcpu->kvm->slots_lock);
3743 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3745 switch(vcpu->arch.mp_state) {
3746 case KVM_MP_STATE_HALTED:
3747 vcpu->arch.mp_state =
3748 KVM_MP_STATE_RUNNABLE;
3749 case KVM_MP_STATE_RUNNABLE:
3751 case KVM_MP_STATE_SIPI_RECEIVED:
3762 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3763 if (kvm_cpu_has_pending_timer(vcpu))
3764 kvm_inject_pending_timer_irqs(vcpu);
3766 if (dm_request_for_irq_injection(vcpu)) {
3768 vcpu->run->exit_reason = KVM_EXIT_INTR;
3769 ++vcpu->stat.request_irq_exits;
3771 if (signal_pending(current)) {
3773 vcpu->run->exit_reason = KVM_EXIT_INTR;
3774 ++vcpu->stat.signal_exits;
3776 if (need_resched()) {
3777 up_read(&vcpu->kvm->slots_lock);
3779 down_read(&vcpu->kvm->slots_lock);
3783 up_read(&vcpu->kvm->slots_lock);
3784 post_kvm_run_save(vcpu);
3791 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3798 if (vcpu->sigset_active)
3799 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3801 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3802 kvm_vcpu_block(vcpu);
3803 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3808 /* re-sync apic's tpr */
3809 if (!irqchip_in_kernel(vcpu->kvm))
3810 kvm_set_cr8(vcpu, kvm_run->cr8);
3812 if (vcpu->arch.pio.cur_count) {
3813 r = complete_pio(vcpu);
3817 #if CONFIG_HAS_IOMEM
3818 if (vcpu->mmio_needed) {
3819 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3820 vcpu->mmio_read_completed = 1;
3821 vcpu->mmio_needed = 0;
3823 down_read(&vcpu->kvm->slots_lock);
3824 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
3825 EMULTYPE_NO_DECODE);
3826 up_read(&vcpu->kvm->slots_lock);
3827 if (r == EMULATE_DO_MMIO) {
3829 * Read-modify-write. Back to userspace.
3836 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3837 kvm_register_write(vcpu, VCPU_REGS_RAX,
3838 kvm_run->hypercall.ret);
3840 r = __vcpu_run(vcpu);
3843 if (vcpu->sigset_active)
3844 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3850 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3854 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3855 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3856 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3857 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3858 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3859 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3860 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3861 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3862 #ifdef CONFIG_X86_64
3863 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3864 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3865 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3866 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3867 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3868 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3869 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3870 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3873 regs->rip = kvm_rip_read(vcpu);
3874 regs->rflags = kvm_get_rflags(vcpu);
3881 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3885 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3886 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3887 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3888 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3889 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3890 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3891 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3892 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3893 #ifdef CONFIG_X86_64
3894 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3895 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3896 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3897 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3898 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3899 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3900 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3901 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3904 kvm_rip_write(vcpu, regs->rip);
3905 kvm_set_rflags(vcpu, regs->rflags);
3907 vcpu->arch.exception.pending = false;
3914 void kvm_get_segment(struct kvm_vcpu *vcpu,
3915 struct kvm_segment *var, int seg)
3917 kvm_x86_ops->get_segment(vcpu, var, seg);
3920 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3922 struct kvm_segment cs;
3924 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3928 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3930 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3931 struct kvm_sregs *sregs)
3933 struct descriptor_table dt;
3937 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3938 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3939 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3940 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3941 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3942 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3944 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3945 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3947 kvm_x86_ops->get_idt(vcpu, &dt);
3948 sregs->idt.limit = dt.limit;
3949 sregs->idt.base = dt.base;
3950 kvm_x86_ops->get_gdt(vcpu, &dt);
3951 sregs->gdt.limit = dt.limit;
3952 sregs->gdt.base = dt.base;
3954 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3955 sregs->cr0 = vcpu->arch.cr0;
3956 sregs->cr2 = vcpu->arch.cr2;
3957 sregs->cr3 = vcpu->arch.cr3;
3958 sregs->cr4 = vcpu->arch.cr4;
3959 sregs->cr8 = kvm_get_cr8(vcpu);
3960 sregs->efer = vcpu->arch.shadow_efer;
3961 sregs->apic_base = kvm_get_apic_base(vcpu);
3963 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3965 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3966 set_bit(vcpu->arch.interrupt.nr,
3967 (unsigned long *)sregs->interrupt_bitmap);
3974 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3975 struct kvm_mp_state *mp_state)
3978 mp_state->mp_state = vcpu->arch.mp_state;
3983 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3984 struct kvm_mp_state *mp_state)
3987 vcpu->arch.mp_state = mp_state->mp_state;
3992 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3993 struct kvm_segment *var, int seg)
3995 kvm_x86_ops->set_segment(vcpu, var, seg);
3998 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3999 struct kvm_segment *kvm_desct)
4001 kvm_desct->base = get_desc_base(seg_desc);
4002 kvm_desct->limit = get_desc_limit(seg_desc);
4004 kvm_desct->limit <<= 12;
4005 kvm_desct->limit |= 0xfff;
4007 kvm_desct->selector = selector;
4008 kvm_desct->type = seg_desc->type;
4009 kvm_desct->present = seg_desc->p;
4010 kvm_desct->dpl = seg_desc->dpl;
4011 kvm_desct->db = seg_desc->d;
4012 kvm_desct->s = seg_desc->s;
4013 kvm_desct->l = seg_desc->l;
4014 kvm_desct->g = seg_desc->g;
4015 kvm_desct->avl = seg_desc->avl;
4017 kvm_desct->unusable = 1;
4019 kvm_desct->unusable = 0;
4020 kvm_desct->padding = 0;
4023 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4025 struct descriptor_table *dtable)
4027 if (selector & 1 << 2) {
4028 struct kvm_segment kvm_seg;
4030 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4032 if (kvm_seg.unusable)
4035 dtable->limit = kvm_seg.limit;
4036 dtable->base = kvm_seg.base;
4039 kvm_x86_ops->get_gdt(vcpu, dtable);
4042 /* allowed just for 8 bytes segments */
4043 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4044 struct desc_struct *seg_desc)
4046 struct descriptor_table dtable;
4047 u16 index = selector >> 3;
4049 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4051 if (dtable.limit < index * 8 + 7) {
4052 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4055 return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4058 /* allowed just for 8 bytes segments */
4059 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4060 struct desc_struct *seg_desc)
4062 struct descriptor_table dtable;
4063 u16 index = selector >> 3;
4065 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4067 if (dtable.limit < index * 8 + 7)
4069 return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4072 static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4073 struct desc_struct *seg_desc)
4075 u32 base_addr = get_desc_base(seg_desc);
4077 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4080 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4082 struct kvm_segment kvm_seg;
4084 kvm_get_segment(vcpu, &kvm_seg, seg);
4085 return kvm_seg.selector;
4088 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4090 struct kvm_segment *kvm_seg)
4092 struct desc_struct seg_desc;
4094 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4096 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4100 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4102 struct kvm_segment segvar = {
4103 .base = selector << 4,
4105 .selector = selector,
4116 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4120 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4122 return (seg != VCPU_SREG_LDTR) &&
4123 (seg != VCPU_SREG_TR) &&
4124 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4127 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4128 int type_bits, int seg)
4130 struct kvm_segment kvm_seg;
4132 if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4133 return kvm_load_realmode_segment(vcpu, selector, seg);
4134 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4136 kvm_seg.type |= type_bits;
4138 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4139 seg != VCPU_SREG_LDTR)
4141 kvm_seg.unusable = 1;
4143 kvm_set_segment(vcpu, &kvm_seg, seg);
4147 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4148 struct tss_segment_32 *tss)
4150 tss->cr3 = vcpu->arch.cr3;
4151 tss->eip = kvm_rip_read(vcpu);
4152 tss->eflags = kvm_get_rflags(vcpu);
4153 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4154 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4155 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4156 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4157 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4158 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4159 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4160 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4161 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4162 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4163 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4164 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4165 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4166 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4167 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4170 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4171 struct tss_segment_32 *tss)
4173 kvm_set_cr3(vcpu, tss->cr3);
4175 kvm_rip_write(vcpu, tss->eip);
4176 kvm_set_rflags(vcpu, tss->eflags | 2);
4178 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4179 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4180 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4181 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4182 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4183 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4184 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4185 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4187 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4190 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4193 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4196 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4199 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4202 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4205 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4210 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4211 struct tss_segment_16 *tss)
4213 tss->ip = kvm_rip_read(vcpu);
4214 tss->flag = kvm_get_rflags(vcpu);
4215 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4216 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4217 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4218 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4219 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4220 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4221 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4222 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4224 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4225 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4226 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4227 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4228 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4231 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4232 struct tss_segment_16 *tss)
4234 kvm_rip_write(vcpu, tss->ip);
4235 kvm_set_rflags(vcpu, tss->flag | 2);
4236 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4237 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4238 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4239 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4240 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4241 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4242 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4243 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4245 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4248 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4251 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4254 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4257 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4262 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4263 u16 old_tss_sel, u32 old_tss_base,
4264 struct desc_struct *nseg_desc)
4266 struct tss_segment_16 tss_segment_16;
4269 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4270 sizeof tss_segment_16))
4273 save_state_to_tss16(vcpu, &tss_segment_16);
4275 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4276 sizeof tss_segment_16))
4279 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4280 &tss_segment_16, sizeof tss_segment_16))
4283 if (old_tss_sel != 0xffff) {
4284 tss_segment_16.prev_task_link = old_tss_sel;
4286 if (kvm_write_guest(vcpu->kvm,
4287 get_tss_base_addr(vcpu, nseg_desc),
4288 &tss_segment_16.prev_task_link,
4289 sizeof tss_segment_16.prev_task_link))
4293 if (load_state_from_tss16(vcpu, &tss_segment_16))
4301 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4302 u16 old_tss_sel, u32 old_tss_base,
4303 struct desc_struct *nseg_desc)
4305 struct tss_segment_32 tss_segment_32;
4308 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4309 sizeof tss_segment_32))
4312 save_state_to_tss32(vcpu, &tss_segment_32);
4314 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4315 sizeof tss_segment_32))
4318 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4319 &tss_segment_32, sizeof tss_segment_32))
4322 if (old_tss_sel != 0xffff) {
4323 tss_segment_32.prev_task_link = old_tss_sel;
4325 if (kvm_write_guest(vcpu->kvm,
4326 get_tss_base_addr(vcpu, nseg_desc),
4327 &tss_segment_32.prev_task_link,
4328 sizeof tss_segment_32.prev_task_link))
4332 if (load_state_from_tss32(vcpu, &tss_segment_32))
4340 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4342 struct kvm_segment tr_seg;
4343 struct desc_struct cseg_desc;
4344 struct desc_struct nseg_desc;
4346 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4347 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4349 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4351 /* FIXME: Handle errors. Failure to read either TSS or their
4352 * descriptors should generate a pagefault.
4354 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4357 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4360 if (reason != TASK_SWITCH_IRET) {
4363 cpl = kvm_x86_ops->get_cpl(vcpu);
4364 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4365 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4370 if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4371 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4375 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4376 cseg_desc.type &= ~(1 << 1); //clear the B flag
4377 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4380 if (reason == TASK_SWITCH_IRET) {
4381 u32 eflags = kvm_get_rflags(vcpu);
4382 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4385 /* set back link to prev task only if NT bit is set in eflags
4386 note that old_tss_sel is not used afetr this point */
4387 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4388 old_tss_sel = 0xffff;
4390 /* set back link to prev task only if NT bit is set in eflags
4391 note that old_tss_sel is not used afetr this point */
4392 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4393 old_tss_sel = 0xffff;
4395 if (nseg_desc.type & 8)
4396 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4397 old_tss_base, &nseg_desc);
4399 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4400 old_tss_base, &nseg_desc);
4402 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4403 u32 eflags = kvm_get_rflags(vcpu);
4404 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4407 if (reason != TASK_SWITCH_IRET) {
4408 nseg_desc.type |= (1 << 1);
4409 save_guest_segment_descriptor(vcpu, tss_selector,
4413 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4414 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4416 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4420 EXPORT_SYMBOL_GPL(kvm_task_switch);
4422 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4423 struct kvm_sregs *sregs)
4425 int mmu_reset_needed = 0;
4426 int pending_vec, max_bits;
4427 struct descriptor_table dt;
4431 dt.limit = sregs->idt.limit;
4432 dt.base = sregs->idt.base;
4433 kvm_x86_ops->set_idt(vcpu, &dt);
4434 dt.limit = sregs->gdt.limit;
4435 dt.base = sregs->gdt.base;
4436 kvm_x86_ops->set_gdt(vcpu, &dt);
4438 vcpu->arch.cr2 = sregs->cr2;
4439 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4440 vcpu->arch.cr3 = sregs->cr3;
4442 kvm_set_cr8(vcpu, sregs->cr8);
4444 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4445 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4446 kvm_set_apic_base(vcpu, sregs->apic_base);
4448 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4450 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4451 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4452 vcpu->arch.cr0 = sregs->cr0;
4454 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4455 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4456 if (!is_long_mode(vcpu) && is_pae(vcpu))
4457 load_pdptrs(vcpu, vcpu->arch.cr3);
4459 if (mmu_reset_needed)
4460 kvm_mmu_reset_context(vcpu);
4462 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4463 pending_vec = find_first_bit(
4464 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4465 if (pending_vec < max_bits) {
4466 kvm_queue_interrupt(vcpu, pending_vec, false);
4467 pr_debug("Set back pending irq %d\n", pending_vec);
4468 if (irqchip_in_kernel(vcpu->kvm))
4469 kvm_pic_clear_isr_ack(vcpu->kvm);
4472 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4473 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4474 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4475 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4476 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4477 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4479 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4480 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4482 update_cr8_intercept(vcpu);
4484 /* Older userspace won't unhalt the vcpu on reset. */
4485 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4486 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4487 !(vcpu->arch.cr0 & X86_CR0_PE))
4488 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4495 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4496 struct kvm_guest_debug *dbg)
4498 unsigned long rflags;
4504 * Read rflags as long as potentially injected trace flags are still
4507 rflags = kvm_get_rflags(vcpu);
4509 vcpu->guest_debug = dbg->control;
4510 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
4511 vcpu->guest_debug = 0;
4513 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
4514 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4515 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4516 vcpu->arch.switch_db_regs =
4517 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4519 for (i = 0; i < KVM_NR_DB_REGS; i++)
4520 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4521 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4525 * Trigger an rflags update that will inject or remove the trace
4528 kvm_set_rflags(vcpu, rflags);
4530 kvm_x86_ops->set_guest_debug(vcpu, dbg);
4532 if (vcpu->guest_debug & KVM_GUESTDBG_INJECT_DB)
4533 kvm_queue_exception(vcpu, DB_VECTOR);
4534 else if (vcpu->guest_debug & KVM_GUESTDBG_INJECT_BP)
4535 kvm_queue_exception(vcpu, BP_VECTOR);
4543 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4544 * we have asm/x86/processor.h
4555 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4556 #ifdef CONFIG_X86_64
4557 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4559 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4564 * Translate a guest virtual address to a guest physical address.
4566 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4567 struct kvm_translation *tr)
4569 unsigned long vaddr = tr->linear_address;
4573 down_read(&vcpu->kvm->slots_lock);
4574 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4575 up_read(&vcpu->kvm->slots_lock);
4576 tr->physical_address = gpa;
4577 tr->valid = gpa != UNMAPPED_GVA;
4585 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4587 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4591 memcpy(fpu->fpr, fxsave->st_space, 128);
4592 fpu->fcw = fxsave->cwd;
4593 fpu->fsw = fxsave->swd;
4594 fpu->ftwx = fxsave->twd;
4595 fpu->last_opcode = fxsave->fop;
4596 fpu->last_ip = fxsave->rip;
4597 fpu->last_dp = fxsave->rdp;
4598 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4605 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4607 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4611 memcpy(fxsave->st_space, fpu->fpr, 128);
4612 fxsave->cwd = fpu->fcw;
4613 fxsave->swd = fpu->fsw;
4614 fxsave->twd = fpu->ftwx;
4615 fxsave->fop = fpu->last_opcode;
4616 fxsave->rip = fpu->last_ip;
4617 fxsave->rdp = fpu->last_dp;
4618 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4625 void fx_init(struct kvm_vcpu *vcpu)
4627 unsigned after_mxcsr_mask;
4630 * Touch the fpu the first time in non atomic context as if
4631 * this is the first fpu instruction the exception handler
4632 * will fire before the instruction returns and it'll have to
4633 * allocate ram with GFP_KERNEL.
4636 kvm_fx_save(&vcpu->arch.host_fx_image);
4638 /* Initialize guest FPU by resetting ours and saving into guest's */
4640 kvm_fx_save(&vcpu->arch.host_fx_image);
4642 kvm_fx_save(&vcpu->arch.guest_fx_image);
4643 kvm_fx_restore(&vcpu->arch.host_fx_image);
4646 vcpu->arch.cr0 |= X86_CR0_ET;
4647 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4648 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4649 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4650 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4652 EXPORT_SYMBOL_GPL(fx_init);
4654 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4656 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4659 vcpu->guest_fpu_loaded = 1;
4660 kvm_fx_save(&vcpu->arch.host_fx_image);
4661 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4663 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4665 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4667 if (!vcpu->guest_fpu_loaded)
4670 vcpu->guest_fpu_loaded = 0;
4671 kvm_fx_save(&vcpu->arch.guest_fx_image);
4672 kvm_fx_restore(&vcpu->arch.host_fx_image);
4673 ++vcpu->stat.fpu_reload;
4675 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4677 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4679 if (vcpu->arch.time_page) {
4680 kvm_release_page_dirty(vcpu->arch.time_page);
4681 vcpu->arch.time_page = NULL;
4684 kvm_x86_ops->vcpu_free(vcpu);
4687 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4690 return kvm_x86_ops->vcpu_create(kvm, id);
4693 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4697 /* We do fxsave: this must be aligned. */
4698 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4700 vcpu->arch.mtrr_state.have_fixed = 1;
4702 r = kvm_arch_vcpu_reset(vcpu);
4704 r = kvm_mmu_setup(vcpu);
4711 kvm_x86_ops->vcpu_free(vcpu);
4715 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4718 kvm_mmu_unload(vcpu);
4721 kvm_x86_ops->vcpu_free(vcpu);
4724 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4726 vcpu->arch.nmi_pending = false;
4727 vcpu->arch.nmi_injected = false;
4729 vcpu->arch.switch_db_regs = 0;
4730 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4731 vcpu->arch.dr6 = DR6_FIXED_1;
4732 vcpu->arch.dr7 = DR7_FIXED_1;
4734 return kvm_x86_ops->vcpu_reset(vcpu);
4737 int kvm_arch_hardware_enable(void *garbage)
4740 * Since this may be called from a hotplug notifcation,
4741 * we can't get the CPU frequency directly.
4743 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4744 int cpu = raw_smp_processor_id();
4745 per_cpu(cpu_tsc_khz, cpu) = 0;
4747 return kvm_x86_ops->hardware_enable(garbage);
4750 void kvm_arch_hardware_disable(void *garbage)
4752 kvm_x86_ops->hardware_disable(garbage);
4755 int kvm_arch_hardware_setup(void)
4757 return kvm_x86_ops->hardware_setup();
4760 void kvm_arch_hardware_unsetup(void)
4762 kvm_x86_ops->hardware_unsetup();
4765 void kvm_arch_check_processor_compat(void *rtn)
4767 kvm_x86_ops->check_processor_compatibility(rtn);
4770 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4776 BUG_ON(vcpu->kvm == NULL);
4779 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4780 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4781 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4783 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4785 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4790 vcpu->arch.pio_data = page_address(page);
4792 r = kvm_mmu_create(vcpu);
4794 goto fail_free_pio_data;
4796 if (irqchip_in_kernel(kvm)) {
4797 r = kvm_create_lapic(vcpu);
4799 goto fail_mmu_destroy;
4802 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4804 if (!vcpu->arch.mce_banks) {
4806 goto fail_mmu_destroy;
4808 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4813 kvm_mmu_destroy(vcpu);
4815 free_page((unsigned long)vcpu->arch.pio_data);
4820 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4822 kvm_free_lapic(vcpu);
4823 down_read(&vcpu->kvm->slots_lock);
4824 kvm_mmu_destroy(vcpu);
4825 up_read(&vcpu->kvm->slots_lock);
4826 free_page((unsigned long)vcpu->arch.pio_data);
4829 struct kvm *kvm_arch_create_vm(void)
4831 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4834 return ERR_PTR(-ENOMEM);
4836 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4837 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4839 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4840 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4842 rdtscll(kvm->arch.vm_init_tsc);
4847 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4850 kvm_mmu_unload(vcpu);
4854 static void kvm_free_vcpus(struct kvm *kvm)
4857 struct kvm_vcpu *vcpu;
4860 * Unpin any mmu pages first.
4862 kvm_for_each_vcpu(i, vcpu, kvm)
4863 kvm_unload_vcpu_mmu(vcpu);
4864 kvm_for_each_vcpu(i, vcpu, kvm)
4865 kvm_arch_vcpu_free(vcpu);
4867 mutex_lock(&kvm->lock);
4868 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4869 kvm->vcpus[i] = NULL;
4871 atomic_set(&kvm->online_vcpus, 0);
4872 mutex_unlock(&kvm->lock);
4875 void kvm_arch_sync_events(struct kvm *kvm)
4877 kvm_free_all_assigned_devices(kvm);
4880 void kvm_arch_destroy_vm(struct kvm *kvm)
4882 kvm_iommu_unmap_guest(kvm);
4884 kfree(kvm->arch.vpic);
4885 kfree(kvm->arch.vioapic);
4886 kvm_free_vcpus(kvm);
4887 kvm_free_physmem(kvm);
4888 if (kvm->arch.apic_access_page)
4889 put_page(kvm->arch.apic_access_page);
4890 if (kvm->arch.ept_identity_pagetable)
4891 put_page(kvm->arch.ept_identity_pagetable);
4895 int kvm_arch_set_memory_region(struct kvm *kvm,
4896 struct kvm_userspace_memory_region *mem,
4897 struct kvm_memory_slot old,
4900 int npages = mem->memory_size >> PAGE_SHIFT;
4901 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4903 /*To keep backward compatibility with older userspace,
4904 *x86 needs to hanlde !user_alloc case.
4907 if (npages && !old.rmap) {
4908 unsigned long userspace_addr;
4910 down_write(¤t->mm->mmap_sem);
4911 userspace_addr = do_mmap(NULL, 0,
4913 PROT_READ | PROT_WRITE,
4914 MAP_PRIVATE | MAP_ANONYMOUS,
4916 up_write(¤t->mm->mmap_sem);
4918 if (IS_ERR((void *)userspace_addr))
4919 return PTR_ERR((void *)userspace_addr);
4921 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4922 spin_lock(&kvm->mmu_lock);
4923 memslot->userspace_addr = userspace_addr;
4924 spin_unlock(&kvm->mmu_lock);
4926 if (!old.user_alloc && old.rmap) {
4929 down_write(¤t->mm->mmap_sem);
4930 ret = do_munmap(current->mm, old.userspace_addr,
4931 old.npages * PAGE_SIZE);
4932 up_write(¤t->mm->mmap_sem);
4935 "kvm_vm_ioctl_set_memory_region: "
4936 "failed to munmap memory\n");
4941 spin_lock(&kvm->mmu_lock);
4942 if (!kvm->arch.n_requested_mmu_pages) {
4943 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4944 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4947 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4948 spin_unlock(&kvm->mmu_lock);
4953 void kvm_arch_flush_shadow(struct kvm *kvm)
4955 kvm_mmu_zap_all(kvm);
4956 kvm_reload_remote_mmus(kvm);
4959 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4961 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4962 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4963 || vcpu->arch.nmi_pending ||
4964 (kvm_arch_interrupt_allowed(vcpu) &&
4965 kvm_cpu_has_interrupt(vcpu));
4968 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4971 int cpu = vcpu->cpu;
4973 if (waitqueue_active(&vcpu->wq)) {
4974 wake_up_interruptible(&vcpu->wq);
4975 ++vcpu->stat.halt_wakeup;
4979 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4980 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4981 smp_send_reschedule(cpu);
4985 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4987 return kvm_x86_ops->interrupt_allowed(vcpu);
4990 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4991 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4992 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4993 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4994 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
4995 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
4996 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
4997 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
4998 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
4999 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5000 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);