2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <linux/pci.h>
48 #include <trace/events/kvm.h>
50 #define CREATE_TRACE_POINTS
53 #include <asm/debugreg.h>
60 #include <asm/pvclock.h>
61 #include <asm/div64.h>
63 #define MAX_IO_MSRS 256
64 #define KVM_MAX_MCE_BANKS 32
65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
67 #define emul_to_vcpu(ctxt) \
68 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
71 * - enable syscall per default because its emulated by KVM
72 * - enable LME and LMA per default on 64 bit KVM
76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
86 struct kvm_cpuid_entry2 __user *entries);
88 struct kvm_x86_ops *kvm_x86_ops;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
92 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
94 bool kvm_has_tsc_control;
95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
96 u32 kvm_max_guest_tsc_khz;
97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
99 #define KVM_NR_SHARED_MSRS 16
101 struct kvm_shared_msrs_global {
103 u32 msrs[KVM_NR_SHARED_MSRS];
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
109 struct kvm_shared_msr_values {
112 } values[KVM_NR_SHARED_MSRS];
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
154 u64 __read_mostly host_xcr0;
156 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
158 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
161 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
162 vcpu->arch.apf.gfns[i] = ~0;
165 static void kvm_on_user_return(struct user_return_notifier *urn)
168 struct kvm_shared_msrs *locals
169 = container_of(urn, struct kvm_shared_msrs, urn);
170 struct kvm_shared_msr_values *values;
172 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
173 values = &locals->values[slot];
174 if (values->host != values->curr) {
175 wrmsrl(shared_msrs_global.msrs[slot], values->host);
176 values->curr = values->host;
179 locals->registered = false;
180 user_return_notifier_unregister(urn);
183 static void shared_msr_update(unsigned slot, u32 msr)
185 struct kvm_shared_msrs *smsr;
188 smsr = &__get_cpu_var(shared_msrs);
189 /* only read, and nobody should modify it at this time,
190 * so don't need lock */
191 if (slot >= shared_msrs_global.nr) {
192 printk(KERN_ERR "kvm: invalid MSR slot!");
195 rdmsrl_safe(msr, &value);
196 smsr->values[slot].host = value;
197 smsr->values[slot].curr = value;
200 void kvm_define_shared_msr(unsigned slot, u32 msr)
202 if (slot >= shared_msrs_global.nr)
203 shared_msrs_global.nr = slot + 1;
204 shared_msrs_global.msrs[slot] = msr;
205 /* we need ensured the shared_msr_global have been updated */
208 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
210 static void kvm_shared_msr_cpu_online(void)
214 for (i = 0; i < shared_msrs_global.nr; ++i)
215 shared_msr_update(i, shared_msrs_global.msrs[i]);
218 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
220 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
222 if (((value ^ smsr->values[slot].curr) & mask) == 0)
224 smsr->values[slot].curr = value;
225 wrmsrl(shared_msrs_global.msrs[slot], value);
226 if (!smsr->registered) {
227 smsr->urn.on_user_return = kvm_on_user_return;
228 user_return_notifier_register(&smsr->urn);
229 smsr->registered = true;
232 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
234 static void drop_user_return_notifiers(void *ignore)
236 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
238 if (smsr->registered)
239 kvm_on_user_return(&smsr->urn);
242 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
244 if (irqchip_in_kernel(vcpu->kvm))
245 return vcpu->arch.apic_base;
247 return vcpu->arch.apic_base;
249 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
251 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
253 /* TODO: reserve bits check */
254 if (irqchip_in_kernel(vcpu->kvm))
255 kvm_lapic_set_base(vcpu, data);
257 vcpu->arch.apic_base = data;
259 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
261 #define EXCPT_BENIGN 0
262 #define EXCPT_CONTRIBUTORY 1
265 static int exception_class(int vector)
275 return EXCPT_CONTRIBUTORY;
282 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
283 unsigned nr, bool has_error, u32 error_code,
289 kvm_make_request(KVM_REQ_EVENT, vcpu);
291 if (!vcpu->arch.exception.pending) {
293 vcpu->arch.exception.pending = true;
294 vcpu->arch.exception.has_error_code = has_error;
295 vcpu->arch.exception.nr = nr;
296 vcpu->arch.exception.error_code = error_code;
297 vcpu->arch.exception.reinject = reinject;
301 /* to check exception */
302 prev_nr = vcpu->arch.exception.nr;
303 if (prev_nr == DF_VECTOR) {
304 /* triple fault -> shutdown */
305 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
308 class1 = exception_class(prev_nr);
309 class2 = exception_class(nr);
310 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
311 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
312 /* generate double fault per SDM Table 5-5 */
313 vcpu->arch.exception.pending = true;
314 vcpu->arch.exception.has_error_code = true;
315 vcpu->arch.exception.nr = DF_VECTOR;
316 vcpu->arch.exception.error_code = 0;
318 /* replace previous exception with a new one in a hope
319 that instruction re-execution will regenerate lost
324 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
326 kvm_multiple_exception(vcpu, nr, false, 0, false);
328 EXPORT_SYMBOL_GPL(kvm_queue_exception);
330 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
332 kvm_multiple_exception(vcpu, nr, false, 0, true);
334 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
336 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
339 kvm_inject_gp(vcpu, 0);
341 kvm_x86_ops->skip_emulated_instruction(vcpu);
343 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
345 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
347 ++vcpu->stat.pf_guest;
348 vcpu->arch.cr2 = fault->address;
349 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
351 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
355 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
356 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
358 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
363 kvm_make_request(KVM_REQ_EVENT, vcpu);
364 vcpu->arch.nmi_pending = 1;
366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
370 kvm_multiple_exception(vcpu, nr, true, error_code, false);
372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
376 kvm_multiple_exception(vcpu, nr, true, error_code, true);
378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
381 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
382 * a #GP and return false.
384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
386 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
388 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
394 * This function will be used to read from the physical memory of the currently
395 * running guest. The difference to kvm_read_guest_page is that this function
396 * can read from guest physical or from the guest's guest physical memory.
398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
399 gfn_t ngfn, void *data, int offset, int len,
405 ngpa = gfn_to_gpa(ngfn);
406 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
407 if (real_gfn == UNMAPPED_GVA)
410 real_gfn = gpa_to_gfn(real_gfn);
412 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
417 void *data, int offset, int len, u32 access)
419 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
420 data, offset, len, access);
424 * Load the pae pdptrs. Return true is they are all valid.
426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
428 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
429 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
432 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
434 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
435 offset * sizeof(u64), sizeof(pdpte),
436 PFERR_USER_MASK|PFERR_WRITE_MASK);
441 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
442 if (is_present_gpte(pdpte[i]) &&
443 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
450 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
451 __set_bit(VCPU_EXREG_PDPTR,
452 (unsigned long *)&vcpu->arch.regs_avail);
453 __set_bit(VCPU_EXREG_PDPTR,
454 (unsigned long *)&vcpu->arch.regs_dirty);
459 EXPORT_SYMBOL_GPL(load_pdptrs);
461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
463 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
469 if (is_long_mode(vcpu) || !is_pae(vcpu))
472 if (!test_bit(VCPU_EXREG_PDPTR,
473 (unsigned long *)&vcpu->arch.regs_avail))
476 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
477 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
478 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
479 PFERR_USER_MASK | PFERR_WRITE_MASK);
482 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
490 unsigned long old_cr0 = kvm_read_cr0(vcpu);
491 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
492 X86_CR0_CD | X86_CR0_NW;
497 if (cr0 & 0xffffffff00000000UL)
501 cr0 &= ~CR0_RESERVED_BITS;
503 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
506 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
509 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
511 if ((vcpu->arch.efer & EFER_LME)) {
516 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
521 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
526 kvm_x86_ops->set_cr0(vcpu, cr0);
528 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
529 kvm_clear_async_pf_completion_queue(vcpu);
530 kvm_async_pf_hash_reset(vcpu);
533 if ((cr0 ^ old_cr0) & update_bits)
534 kvm_mmu_reset_context(vcpu);
537 EXPORT_SYMBOL_GPL(kvm_set_cr0);
539 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
541 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
543 EXPORT_SYMBOL_GPL(kvm_lmsw);
545 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
549 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
550 if (index != XCR_XFEATURE_ENABLED_MASK)
553 if (kvm_x86_ops->get_cpl(vcpu) != 0)
555 if (!(xcr0 & XSTATE_FP))
557 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
559 if (xcr0 & ~host_xcr0)
561 vcpu->arch.xcr0 = xcr0;
562 vcpu->guest_xcr0_loaded = 0;
566 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
568 if (__kvm_set_xcr(vcpu, index, xcr)) {
569 kvm_inject_gp(vcpu, 0);
574 EXPORT_SYMBOL_GPL(kvm_set_xcr);
576 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
578 struct kvm_cpuid_entry2 *best;
580 best = kvm_find_cpuid_entry(vcpu, 1, 0);
581 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
584 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
586 struct kvm_cpuid_entry2 *best;
588 best = kvm_find_cpuid_entry(vcpu, 7, 0);
589 return best && (best->ebx & bit(X86_FEATURE_SMEP));
592 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
594 struct kvm_cpuid_entry2 *best;
596 best = kvm_find_cpuid_entry(vcpu, 7, 0);
597 return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
600 static void update_cpuid(struct kvm_vcpu *vcpu)
602 struct kvm_cpuid_entry2 *best;
604 best = kvm_find_cpuid_entry(vcpu, 1, 0);
608 /* Update OSXSAVE bit */
609 if (cpu_has_xsave && best->function == 0x1) {
610 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
611 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
612 best->ecx |= bit(X86_FEATURE_OSXSAVE);
616 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
618 unsigned long old_cr4 = kvm_read_cr4(vcpu);
619 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
620 X86_CR4_PAE | X86_CR4_SMEP;
621 if (cr4 & CR4_RESERVED_BITS)
624 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
627 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
630 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
633 if (is_long_mode(vcpu)) {
634 if (!(cr4 & X86_CR4_PAE))
636 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
637 && ((cr4 ^ old_cr4) & pdptr_bits)
638 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
642 if (kvm_x86_ops->set_cr4(vcpu, cr4))
645 if ((cr4 ^ old_cr4) & pdptr_bits)
646 kvm_mmu_reset_context(vcpu);
648 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
653 EXPORT_SYMBOL_GPL(kvm_set_cr4);
655 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
657 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
658 kvm_mmu_sync_roots(vcpu);
659 kvm_mmu_flush_tlb(vcpu);
663 if (is_long_mode(vcpu)) {
664 if (cr3 & CR3_L_MODE_RESERVED_BITS)
668 if (cr3 & CR3_PAE_RESERVED_BITS)
670 if (is_paging(vcpu) &&
671 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
675 * We don't check reserved bits in nonpae mode, because
676 * this isn't enforced, and VMware depends on this.
681 * Does the new cr3 value map to physical memory? (Note, we
682 * catch an invalid cr3 even in real-mode, because it would
683 * cause trouble later on when we turn on paging anyway.)
685 * A real CPU would silently accept an invalid cr3 and would
686 * attempt to use it - with largely undefined (and often hard
687 * to debug) behavior on the guest side.
689 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
691 vcpu->arch.cr3 = cr3;
692 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
693 vcpu->arch.mmu.new_cr3(vcpu);
696 EXPORT_SYMBOL_GPL(kvm_set_cr3);
698 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
700 if (cr8 & CR8_RESERVED_BITS)
702 if (irqchip_in_kernel(vcpu->kvm))
703 kvm_lapic_set_tpr(vcpu, cr8);
705 vcpu->arch.cr8 = cr8;
708 EXPORT_SYMBOL_GPL(kvm_set_cr8);
710 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
712 if (irqchip_in_kernel(vcpu->kvm))
713 return kvm_lapic_get_cr8(vcpu);
715 return vcpu->arch.cr8;
717 EXPORT_SYMBOL_GPL(kvm_get_cr8);
719 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
723 vcpu->arch.db[dr] = val;
724 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
725 vcpu->arch.eff_db[dr] = val;
728 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
732 if (val & 0xffffffff00000000ULL)
734 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
737 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
741 if (val & 0xffffffff00000000ULL)
743 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
744 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
745 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
746 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
754 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
758 res = __kvm_set_dr(vcpu, dr, val);
760 kvm_queue_exception(vcpu, UD_VECTOR);
762 kvm_inject_gp(vcpu, 0);
766 EXPORT_SYMBOL_GPL(kvm_set_dr);
768 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
772 *val = vcpu->arch.db[dr];
775 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
779 *val = vcpu->arch.dr6;
782 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
786 *val = vcpu->arch.dr7;
793 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
795 if (_kvm_get_dr(vcpu, dr, val)) {
796 kvm_queue_exception(vcpu, UD_VECTOR);
801 EXPORT_SYMBOL_GPL(kvm_get_dr);
804 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
805 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
807 * This list is modified at module load time to reflect the
808 * capabilities of the host cpu. This capabilities test skips MSRs that are
809 * kvm-specific. Those are put in the beginning of the list.
812 #define KVM_SAVE_MSRS_BEGIN 9
813 static u32 msrs_to_save[] = {
814 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
815 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
816 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
817 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
818 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
821 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
823 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
826 static unsigned num_msrs_to_save;
828 static u32 emulated_msrs[] = {
829 MSR_IA32_MISC_ENABLE,
834 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
836 u64 old_efer = vcpu->arch.efer;
838 if (efer & efer_reserved_bits)
842 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
845 if (efer & EFER_FFXSR) {
846 struct kvm_cpuid_entry2 *feat;
848 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
849 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
853 if (efer & EFER_SVME) {
854 struct kvm_cpuid_entry2 *feat;
856 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
857 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
862 efer |= vcpu->arch.efer & EFER_LMA;
864 kvm_x86_ops->set_efer(vcpu, efer);
866 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
868 /* Update reserved bits */
869 if ((efer ^ old_efer) & EFER_NX)
870 kvm_mmu_reset_context(vcpu);
875 void kvm_enable_efer_bits(u64 mask)
877 efer_reserved_bits &= ~mask;
879 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
883 * Writes msr value into into the appropriate "register".
884 * Returns 0 on success, non-0 otherwise.
885 * Assumes vcpu_load() was already called.
887 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
889 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
893 * Adapt set_msr() to msr_io()'s calling convention
895 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
897 return kvm_set_msr(vcpu, index, *data);
900 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
904 struct pvclock_wall_clock wc;
905 struct timespec boot;
910 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
915 ++version; /* first time write, random junk */
919 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
922 * The guest calculates current wall clock time by adding
923 * system time (updated by kvm_guest_time_update below) to the
924 * wall clock specified here. guest system time equals host
925 * system time for us, thus we must fill in host boot time here.
929 wc.sec = boot.tv_sec;
930 wc.nsec = boot.tv_nsec;
931 wc.version = version;
933 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
936 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
939 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
941 uint32_t quotient, remainder;
943 /* Don't try to replace with do_div(), this one calculates
944 * "(dividend << 32) / divisor" */
946 : "=a" (quotient), "=d" (remainder)
947 : "0" (0), "1" (dividend), "r" (divisor) );
951 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
952 s8 *pshift, u32 *pmultiplier)
959 tps64 = base_khz * 1000LL;
960 scaled64 = scaled_khz * 1000LL;
961 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
966 tps32 = (uint32_t)tps64;
967 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
968 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
976 *pmultiplier = div_frac(scaled64, tps32);
978 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
979 __func__, base_khz, scaled_khz, shift, *pmultiplier);
982 static inline u64 get_kernel_ns(void)
986 WARN_ON(preemptible());
988 monotonic_to_bootbased(&ts);
989 return timespec_to_ns(&ts);
992 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
993 unsigned long max_tsc_khz;
995 static inline int kvm_tsc_changes_freq(void)
998 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
999 cpufreq_quick_get(cpu) != 0;
1004 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1006 if (vcpu->arch.virtual_tsc_khz)
1007 return vcpu->arch.virtual_tsc_khz;
1009 return __this_cpu_read(cpu_tsc_khz);
1012 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1016 WARN_ON(preemptible());
1017 if (kvm_tsc_changes_freq())
1018 printk_once(KERN_WARNING
1019 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1020 ret = nsec * vcpu_tsc_khz(vcpu);
1021 do_div(ret, USEC_PER_SEC);
1025 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1027 /* Compute a scale to convert nanoseconds in TSC cycles */
1028 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1029 &vcpu->arch.tsc_catchup_shift,
1030 &vcpu->arch.tsc_catchup_mult);
1033 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1035 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1036 vcpu->arch.tsc_catchup_mult,
1037 vcpu->arch.tsc_catchup_shift);
1038 tsc += vcpu->arch.last_tsc_write;
1042 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1044 struct kvm *kvm = vcpu->kvm;
1045 u64 offset, ns, elapsed;
1046 unsigned long flags;
1049 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1050 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1051 ns = get_kernel_ns();
1052 elapsed = ns - kvm->arch.last_tsc_nsec;
1053 sdiff = data - kvm->arch.last_tsc_write;
1058 * Special case: close write to TSC within 5 seconds of
1059 * another CPU is interpreted as an attempt to synchronize
1060 * The 5 seconds is to accommodate host load / swapping as
1061 * well as any reset of TSC during the boot process.
1063 * In that case, for a reliable TSC, we can match TSC offsets,
1064 * or make a best guest using elapsed value.
1066 if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1067 elapsed < 5ULL * NSEC_PER_SEC) {
1068 if (!check_tsc_unstable()) {
1069 offset = kvm->arch.last_tsc_offset;
1070 pr_debug("kvm: matched tsc offset for %llu\n", data);
1072 u64 delta = nsec_to_cycles(vcpu, elapsed);
1074 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1076 ns = kvm->arch.last_tsc_nsec;
1078 kvm->arch.last_tsc_nsec = ns;
1079 kvm->arch.last_tsc_write = data;
1080 kvm->arch.last_tsc_offset = offset;
1081 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1082 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1084 /* Reset of TSC must disable overshoot protection below */
1085 vcpu->arch.hv_clock.tsc_timestamp = 0;
1086 vcpu->arch.last_tsc_write = data;
1087 vcpu->arch.last_tsc_nsec = ns;
1089 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1091 static int kvm_guest_time_update(struct kvm_vcpu *v)
1093 unsigned long flags;
1094 struct kvm_vcpu_arch *vcpu = &v->arch;
1096 unsigned long this_tsc_khz;
1097 s64 kernel_ns, max_kernel_ns;
1100 /* Keep irq disabled to prevent changes to the clock */
1101 local_irq_save(flags);
1102 kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1103 kernel_ns = get_kernel_ns();
1104 this_tsc_khz = vcpu_tsc_khz(v);
1105 if (unlikely(this_tsc_khz == 0)) {
1106 local_irq_restore(flags);
1107 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1112 * We may have to catch up the TSC to match elapsed wall clock
1113 * time for two reasons, even if kvmclock is used.
1114 * 1) CPU could have been running below the maximum TSC rate
1115 * 2) Broken TSC compensation resets the base at each VCPU
1116 * entry to avoid unknown leaps of TSC even when running
1117 * again on the same CPU. This may cause apparent elapsed
1118 * time to disappear, and the guest to stand still or run
1121 if (vcpu->tsc_catchup) {
1122 u64 tsc = compute_guest_tsc(v, kernel_ns);
1123 if (tsc > tsc_timestamp) {
1124 kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1125 tsc_timestamp = tsc;
1129 local_irq_restore(flags);
1131 if (!vcpu->time_page)
1135 * Time as measured by the TSC may go backwards when resetting the base
1136 * tsc_timestamp. The reason for this is that the TSC resolution is
1137 * higher than the resolution of the other clock scales. Thus, many
1138 * possible measurments of the TSC correspond to one measurement of any
1139 * other clock, and so a spread of values is possible. This is not a
1140 * problem for the computation of the nanosecond clock; with TSC rates
1141 * around 1GHZ, there can only be a few cycles which correspond to one
1142 * nanosecond value, and any path through this code will inevitably
1143 * take longer than that. However, with the kernel_ns value itself,
1144 * the precision may be much lower, down to HZ granularity. If the
1145 * first sampling of TSC against kernel_ns ends in the low part of the
1146 * range, and the second in the high end of the range, we can get:
1148 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1150 * As the sampling errors potentially range in the thousands of cycles,
1151 * it is possible such a time value has already been observed by the
1152 * guest. To protect against this, we must compute the system time as
1153 * observed by the guest and ensure the new system time is greater.
1156 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1157 max_kernel_ns = vcpu->last_guest_tsc -
1158 vcpu->hv_clock.tsc_timestamp;
1159 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1160 vcpu->hv_clock.tsc_to_system_mul,
1161 vcpu->hv_clock.tsc_shift);
1162 max_kernel_ns += vcpu->last_kernel_ns;
1165 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1166 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1167 &vcpu->hv_clock.tsc_shift,
1168 &vcpu->hv_clock.tsc_to_system_mul);
1169 vcpu->hw_tsc_khz = this_tsc_khz;
1172 if (max_kernel_ns > kernel_ns)
1173 kernel_ns = max_kernel_ns;
1175 /* With all the info we got, fill in the values */
1176 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1177 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1178 vcpu->last_kernel_ns = kernel_ns;
1179 vcpu->last_guest_tsc = tsc_timestamp;
1180 vcpu->hv_clock.flags = 0;
1183 * The interface expects us to write an even number signaling that the
1184 * update is finished. Since the guest won't see the intermediate
1185 * state, we just increase by 2 at the end.
1187 vcpu->hv_clock.version += 2;
1189 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1191 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1192 sizeof(vcpu->hv_clock));
1194 kunmap_atomic(shared_kaddr, KM_USER0);
1196 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1200 static bool msr_mtrr_valid(unsigned msr)
1203 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1204 case MSR_MTRRfix64K_00000:
1205 case MSR_MTRRfix16K_80000:
1206 case MSR_MTRRfix16K_A0000:
1207 case MSR_MTRRfix4K_C0000:
1208 case MSR_MTRRfix4K_C8000:
1209 case MSR_MTRRfix4K_D0000:
1210 case MSR_MTRRfix4K_D8000:
1211 case MSR_MTRRfix4K_E0000:
1212 case MSR_MTRRfix4K_E8000:
1213 case MSR_MTRRfix4K_F0000:
1214 case MSR_MTRRfix4K_F8000:
1215 case MSR_MTRRdefType:
1216 case MSR_IA32_CR_PAT:
1224 static bool valid_pat_type(unsigned t)
1226 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1229 static bool valid_mtrr_type(unsigned t)
1231 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1234 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1238 if (!msr_mtrr_valid(msr))
1241 if (msr == MSR_IA32_CR_PAT) {
1242 for (i = 0; i < 8; i++)
1243 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1246 } else if (msr == MSR_MTRRdefType) {
1249 return valid_mtrr_type(data & 0xff);
1250 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1251 for (i = 0; i < 8 ; i++)
1252 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1257 /* variable MTRRs */
1258 return valid_mtrr_type(data & 0xff);
1261 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1263 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1265 if (!mtrr_valid(vcpu, msr, data))
1268 if (msr == MSR_MTRRdefType) {
1269 vcpu->arch.mtrr_state.def_type = data;
1270 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1271 } else if (msr == MSR_MTRRfix64K_00000)
1273 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1274 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1275 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1276 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1277 else if (msr == MSR_IA32_CR_PAT)
1278 vcpu->arch.pat = data;
1279 else { /* Variable MTRRs */
1280 int idx, is_mtrr_mask;
1283 idx = (msr - 0x200) / 2;
1284 is_mtrr_mask = msr - 0x200 - 2 * idx;
1287 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1290 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1294 kvm_mmu_reset_context(vcpu);
1298 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1300 u64 mcg_cap = vcpu->arch.mcg_cap;
1301 unsigned bank_num = mcg_cap & 0xff;
1304 case MSR_IA32_MCG_STATUS:
1305 vcpu->arch.mcg_status = data;
1307 case MSR_IA32_MCG_CTL:
1308 if (!(mcg_cap & MCG_CTL_P))
1310 if (data != 0 && data != ~(u64)0)
1312 vcpu->arch.mcg_ctl = data;
1315 if (msr >= MSR_IA32_MC0_CTL &&
1316 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1317 u32 offset = msr - MSR_IA32_MC0_CTL;
1318 /* only 0 or all 1s can be written to IA32_MCi_CTL
1319 * some Linux kernels though clear bit 10 in bank 4 to
1320 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1321 * this to avoid an uncatched #GP in the guest
1323 if ((offset & 0x3) == 0 &&
1324 data != 0 && (data | (1 << 10)) != ~(u64)0)
1326 vcpu->arch.mce_banks[offset] = data;
1334 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1336 struct kvm *kvm = vcpu->kvm;
1337 int lm = is_long_mode(vcpu);
1338 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1339 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1340 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1341 : kvm->arch.xen_hvm_config.blob_size_32;
1342 u32 page_num = data & ~PAGE_MASK;
1343 u64 page_addr = data & PAGE_MASK;
1348 if (page_num >= blob_size)
1351 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1355 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1357 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1366 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1368 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1371 static bool kvm_hv_msr_partition_wide(u32 msr)
1375 case HV_X64_MSR_GUEST_OS_ID:
1376 case HV_X64_MSR_HYPERCALL:
1384 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1386 struct kvm *kvm = vcpu->kvm;
1389 case HV_X64_MSR_GUEST_OS_ID:
1390 kvm->arch.hv_guest_os_id = data;
1391 /* setting guest os id to zero disables hypercall page */
1392 if (!kvm->arch.hv_guest_os_id)
1393 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1395 case HV_X64_MSR_HYPERCALL: {
1400 /* if guest os id is not set hypercall should remain disabled */
1401 if (!kvm->arch.hv_guest_os_id)
1403 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1404 kvm->arch.hv_hypercall = data;
1407 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1408 addr = gfn_to_hva(kvm, gfn);
1409 if (kvm_is_error_hva(addr))
1411 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1412 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1413 if (__copy_to_user((void __user *)addr, instructions, 4))
1415 kvm->arch.hv_hypercall = data;
1419 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1420 "data 0x%llx\n", msr, data);
1426 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1429 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1432 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1433 vcpu->arch.hv_vapic = data;
1436 addr = gfn_to_hva(vcpu->kvm, data >>
1437 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1438 if (kvm_is_error_hva(addr))
1440 if (__clear_user((void __user *)addr, PAGE_SIZE))
1442 vcpu->arch.hv_vapic = data;
1445 case HV_X64_MSR_EOI:
1446 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1447 case HV_X64_MSR_ICR:
1448 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1449 case HV_X64_MSR_TPR:
1450 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1452 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1453 "data 0x%llx\n", msr, data);
1460 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1462 gpa_t gpa = data & ~0x3f;
1464 /* Bits 2:5 are resrved, Should be zero */
1468 vcpu->arch.apf.msr_val = data;
1470 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1471 kvm_clear_async_pf_completion_queue(vcpu);
1472 kvm_async_pf_hash_reset(vcpu);
1476 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1479 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1480 kvm_async_pf_wakeup_all(vcpu);
1484 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1486 if (vcpu->arch.time_page) {
1487 kvm_release_page_dirty(vcpu->arch.time_page);
1488 vcpu->arch.time_page = NULL;
1492 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1496 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1499 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1500 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1501 vcpu->arch.st.accum_steal = delta;
1504 static void record_steal_time(struct kvm_vcpu *vcpu)
1506 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1509 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1510 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1513 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1514 vcpu->arch.st.steal.version += 2;
1515 vcpu->arch.st.accum_steal = 0;
1517 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1518 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1521 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1525 return set_efer(vcpu, data);
1527 data &= ~(u64)0x40; /* ignore flush filter disable */
1528 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1530 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1535 case MSR_FAM10H_MMIO_CONF_BASE:
1537 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1542 case MSR_AMD64_NB_CFG:
1544 case MSR_IA32_DEBUGCTLMSR:
1546 /* We support the non-activated case already */
1548 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1549 /* Values other than LBR and BTF are vendor-specific,
1550 thus reserved and should throw a #GP */
1553 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1556 case MSR_IA32_UCODE_REV:
1557 case MSR_IA32_UCODE_WRITE:
1558 case MSR_VM_HSAVE_PA:
1559 case MSR_AMD64_PATCH_LOADER:
1561 case 0x200 ... 0x2ff:
1562 return set_msr_mtrr(vcpu, msr, data);
1563 case MSR_IA32_APICBASE:
1564 kvm_set_apic_base(vcpu, data);
1566 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1567 return kvm_x2apic_msr_write(vcpu, msr, data);
1568 case MSR_IA32_MISC_ENABLE:
1569 vcpu->arch.ia32_misc_enable_msr = data;
1571 case MSR_KVM_WALL_CLOCK_NEW:
1572 case MSR_KVM_WALL_CLOCK:
1573 vcpu->kvm->arch.wall_clock = data;
1574 kvm_write_wall_clock(vcpu->kvm, data);
1576 case MSR_KVM_SYSTEM_TIME_NEW:
1577 case MSR_KVM_SYSTEM_TIME: {
1578 kvmclock_reset(vcpu);
1580 vcpu->arch.time = data;
1581 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1583 /* we verify if the enable bit is set... */
1587 /* ...but clean it before doing the actual write */
1588 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1590 vcpu->arch.time_page =
1591 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1593 if (is_error_page(vcpu->arch.time_page)) {
1594 kvm_release_page_clean(vcpu->arch.time_page);
1595 vcpu->arch.time_page = NULL;
1599 case MSR_KVM_ASYNC_PF_EN:
1600 if (kvm_pv_enable_async_pf(vcpu, data))
1603 case MSR_KVM_STEAL_TIME:
1605 if (unlikely(!sched_info_on()))
1608 if (data & KVM_STEAL_RESERVED_MASK)
1611 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1612 data & KVM_STEAL_VALID_BITS))
1615 vcpu->arch.st.msr_val = data;
1617 if (!(data & KVM_MSR_ENABLED))
1620 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1623 accumulate_steal_time(vcpu);
1626 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1630 case MSR_IA32_MCG_CTL:
1631 case MSR_IA32_MCG_STATUS:
1632 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1633 return set_msr_mce(vcpu, msr, data);
1635 /* Performance counters are not protected by a CPUID bit,
1636 * so we should check all of them in the generic path for the sake of
1637 * cross vendor migration.
1638 * Writing a zero into the event select MSRs disables them,
1639 * which we perfectly emulate ;-). Any other value should be at least
1640 * reported, some guests depend on them.
1642 case MSR_P6_EVNTSEL0:
1643 case MSR_P6_EVNTSEL1:
1644 case MSR_K7_EVNTSEL0:
1645 case MSR_K7_EVNTSEL1:
1646 case MSR_K7_EVNTSEL2:
1647 case MSR_K7_EVNTSEL3:
1649 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1650 "0x%x data 0x%llx\n", msr, data);
1652 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1653 * so we ignore writes to make it happy.
1655 case MSR_P6_PERFCTR0:
1656 case MSR_P6_PERFCTR1:
1657 case MSR_K7_PERFCTR0:
1658 case MSR_K7_PERFCTR1:
1659 case MSR_K7_PERFCTR2:
1660 case MSR_K7_PERFCTR3:
1661 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1662 "0x%x data 0x%llx\n", msr, data);
1664 case MSR_K7_CLK_CTL:
1666 * Ignore all writes to this no longer documented MSR.
1667 * Writes are only relevant for old K7 processors,
1668 * all pre-dating SVM, but a recommended workaround from
1669 * AMD for these chips. It is possible to speicify the
1670 * affected processor models on the command line, hence
1671 * the need to ignore the workaround.
1674 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1675 if (kvm_hv_msr_partition_wide(msr)) {
1677 mutex_lock(&vcpu->kvm->lock);
1678 r = set_msr_hyperv_pw(vcpu, msr, data);
1679 mutex_unlock(&vcpu->kvm->lock);
1682 return set_msr_hyperv(vcpu, msr, data);
1684 case MSR_IA32_BBL_CR_CTL3:
1685 /* Drop writes to this legacy MSR -- see rdmsr
1686 * counterpart for further detail.
1688 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1691 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1692 return xen_hvm_config(vcpu, data);
1694 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1698 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1705 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1709 * Reads an msr value (of 'msr_index') into 'pdata'.
1710 * Returns 0 on success, non-0 otherwise.
1711 * Assumes vcpu_load() was already called.
1713 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1715 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1718 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1720 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1722 if (!msr_mtrr_valid(msr))
1725 if (msr == MSR_MTRRdefType)
1726 *pdata = vcpu->arch.mtrr_state.def_type +
1727 (vcpu->arch.mtrr_state.enabled << 10);
1728 else if (msr == MSR_MTRRfix64K_00000)
1730 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1731 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1732 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1733 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1734 else if (msr == MSR_IA32_CR_PAT)
1735 *pdata = vcpu->arch.pat;
1736 else { /* Variable MTRRs */
1737 int idx, is_mtrr_mask;
1740 idx = (msr - 0x200) / 2;
1741 is_mtrr_mask = msr - 0x200 - 2 * idx;
1744 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1747 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1754 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1757 u64 mcg_cap = vcpu->arch.mcg_cap;
1758 unsigned bank_num = mcg_cap & 0xff;
1761 case MSR_IA32_P5_MC_ADDR:
1762 case MSR_IA32_P5_MC_TYPE:
1765 case MSR_IA32_MCG_CAP:
1766 data = vcpu->arch.mcg_cap;
1768 case MSR_IA32_MCG_CTL:
1769 if (!(mcg_cap & MCG_CTL_P))
1771 data = vcpu->arch.mcg_ctl;
1773 case MSR_IA32_MCG_STATUS:
1774 data = vcpu->arch.mcg_status;
1777 if (msr >= MSR_IA32_MC0_CTL &&
1778 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1779 u32 offset = msr - MSR_IA32_MC0_CTL;
1780 data = vcpu->arch.mce_banks[offset];
1789 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1792 struct kvm *kvm = vcpu->kvm;
1795 case HV_X64_MSR_GUEST_OS_ID:
1796 data = kvm->arch.hv_guest_os_id;
1798 case HV_X64_MSR_HYPERCALL:
1799 data = kvm->arch.hv_hypercall;
1802 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1810 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1815 case HV_X64_MSR_VP_INDEX: {
1818 kvm_for_each_vcpu(r, v, vcpu->kvm)
1823 case HV_X64_MSR_EOI:
1824 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1825 case HV_X64_MSR_ICR:
1826 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1827 case HV_X64_MSR_TPR:
1828 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1830 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1837 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1842 case MSR_IA32_PLATFORM_ID:
1843 case MSR_IA32_UCODE_REV:
1844 case MSR_IA32_EBL_CR_POWERON:
1845 case MSR_IA32_DEBUGCTLMSR:
1846 case MSR_IA32_LASTBRANCHFROMIP:
1847 case MSR_IA32_LASTBRANCHTOIP:
1848 case MSR_IA32_LASTINTFROMIP:
1849 case MSR_IA32_LASTINTTOIP:
1852 case MSR_VM_HSAVE_PA:
1853 case MSR_P6_PERFCTR0:
1854 case MSR_P6_PERFCTR1:
1855 case MSR_P6_EVNTSEL0:
1856 case MSR_P6_EVNTSEL1:
1857 case MSR_K7_EVNTSEL0:
1858 case MSR_K7_PERFCTR0:
1859 case MSR_K8_INT_PENDING_MSG:
1860 case MSR_AMD64_NB_CFG:
1861 case MSR_FAM10H_MMIO_CONF_BASE:
1865 data = 0x500 | KVM_NR_VAR_MTRR;
1867 case 0x200 ... 0x2ff:
1868 return get_msr_mtrr(vcpu, msr, pdata);
1869 case 0xcd: /* fsb frequency */
1873 * MSR_EBC_FREQUENCY_ID
1874 * Conservative value valid for even the basic CPU models.
1875 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1876 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1877 * and 266MHz for model 3, or 4. Set Core Clock
1878 * Frequency to System Bus Frequency Ratio to 1 (bits
1879 * 31:24) even though these are only valid for CPU
1880 * models > 2, however guests may end up dividing or
1881 * multiplying by zero otherwise.
1883 case MSR_EBC_FREQUENCY_ID:
1886 case MSR_IA32_APICBASE:
1887 data = kvm_get_apic_base(vcpu);
1889 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1890 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1892 case MSR_IA32_MISC_ENABLE:
1893 data = vcpu->arch.ia32_misc_enable_msr;
1895 case MSR_IA32_PERF_STATUS:
1896 /* TSC increment by tick */
1898 /* CPU multiplier */
1899 data |= (((uint64_t)4ULL) << 40);
1902 data = vcpu->arch.efer;
1904 case MSR_KVM_WALL_CLOCK:
1905 case MSR_KVM_WALL_CLOCK_NEW:
1906 data = vcpu->kvm->arch.wall_clock;
1908 case MSR_KVM_SYSTEM_TIME:
1909 case MSR_KVM_SYSTEM_TIME_NEW:
1910 data = vcpu->arch.time;
1912 case MSR_KVM_ASYNC_PF_EN:
1913 data = vcpu->arch.apf.msr_val;
1915 case MSR_KVM_STEAL_TIME:
1916 data = vcpu->arch.st.msr_val;
1918 case MSR_IA32_P5_MC_ADDR:
1919 case MSR_IA32_P5_MC_TYPE:
1920 case MSR_IA32_MCG_CAP:
1921 case MSR_IA32_MCG_CTL:
1922 case MSR_IA32_MCG_STATUS:
1923 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1924 return get_msr_mce(vcpu, msr, pdata);
1925 case MSR_K7_CLK_CTL:
1927 * Provide expected ramp-up count for K7. All other
1928 * are set to zero, indicating minimum divisors for
1931 * This prevents guest kernels on AMD host with CPU
1932 * type 6, model 8 and higher from exploding due to
1933 * the rdmsr failing.
1937 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1938 if (kvm_hv_msr_partition_wide(msr)) {
1940 mutex_lock(&vcpu->kvm->lock);
1941 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1942 mutex_unlock(&vcpu->kvm->lock);
1945 return get_msr_hyperv(vcpu, msr, pdata);
1947 case MSR_IA32_BBL_CR_CTL3:
1948 /* This legacy MSR exists but isn't fully documented in current
1949 * silicon. It is however accessed by winxp in very narrow
1950 * scenarios where it sets bit #19, itself documented as
1951 * a "reserved" bit. Best effort attempt to source coherent
1952 * read data here should the balance of the register be
1953 * interpreted by the guest:
1955 * L2 cache control register 3: 64GB range, 256KB size,
1956 * enabled, latency 0x1, configured
1962 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1965 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1973 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1976 * Read or write a bunch of msrs. All parameters are kernel addresses.
1978 * @return number of msrs set successfully.
1980 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1981 struct kvm_msr_entry *entries,
1982 int (*do_msr)(struct kvm_vcpu *vcpu,
1983 unsigned index, u64 *data))
1987 idx = srcu_read_lock(&vcpu->kvm->srcu);
1988 for (i = 0; i < msrs->nmsrs; ++i)
1989 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1991 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1997 * Read or write a bunch of msrs. Parameters are user addresses.
1999 * @return number of msrs set successfully.
2001 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2002 int (*do_msr)(struct kvm_vcpu *vcpu,
2003 unsigned index, u64 *data),
2006 struct kvm_msrs msrs;
2007 struct kvm_msr_entry *entries;
2012 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2016 if (msrs.nmsrs >= MAX_IO_MSRS)
2020 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2021 entries = kmalloc(size, GFP_KERNEL);
2026 if (copy_from_user(entries, user_msrs->entries, size))
2029 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2034 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2045 int kvm_dev_ioctl_check_extension(long ext)
2050 case KVM_CAP_IRQCHIP:
2052 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2053 case KVM_CAP_SET_TSS_ADDR:
2054 case KVM_CAP_EXT_CPUID:
2055 case KVM_CAP_CLOCKSOURCE:
2057 case KVM_CAP_NOP_IO_DELAY:
2058 case KVM_CAP_MP_STATE:
2059 case KVM_CAP_SYNC_MMU:
2060 case KVM_CAP_USER_NMI:
2061 case KVM_CAP_REINJECT_CONTROL:
2062 case KVM_CAP_IRQ_INJECT_STATUS:
2063 case KVM_CAP_ASSIGN_DEV_IRQ:
2065 case KVM_CAP_IOEVENTFD:
2067 case KVM_CAP_PIT_STATE2:
2068 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2069 case KVM_CAP_XEN_HVM:
2070 case KVM_CAP_ADJUST_CLOCK:
2071 case KVM_CAP_VCPU_EVENTS:
2072 case KVM_CAP_HYPERV:
2073 case KVM_CAP_HYPERV_VAPIC:
2074 case KVM_CAP_HYPERV_SPIN:
2075 case KVM_CAP_PCI_SEGMENT:
2076 case KVM_CAP_DEBUGREGS:
2077 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2079 case KVM_CAP_ASYNC_PF:
2080 case KVM_CAP_GET_TSC_KHZ:
2083 case KVM_CAP_COALESCED_MMIO:
2084 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2087 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2089 case KVM_CAP_NR_VCPUS:
2092 case KVM_CAP_NR_MEMSLOTS:
2093 r = KVM_MEMORY_SLOTS;
2095 case KVM_CAP_PV_MMU: /* obsolete */
2099 r = iommu_present(&pci_bus_type);
2102 r = KVM_MAX_MCE_BANKS;
2107 case KVM_CAP_TSC_CONTROL:
2108 r = kvm_has_tsc_control;
2118 long kvm_arch_dev_ioctl(struct file *filp,
2119 unsigned int ioctl, unsigned long arg)
2121 void __user *argp = (void __user *)arg;
2125 case KVM_GET_MSR_INDEX_LIST: {
2126 struct kvm_msr_list __user *user_msr_list = argp;
2127 struct kvm_msr_list msr_list;
2131 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2134 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2135 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2138 if (n < msr_list.nmsrs)
2141 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2142 num_msrs_to_save * sizeof(u32)))
2144 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2146 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2151 case KVM_GET_SUPPORTED_CPUID: {
2152 struct kvm_cpuid2 __user *cpuid_arg = argp;
2153 struct kvm_cpuid2 cpuid;
2156 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2158 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2159 cpuid_arg->entries);
2164 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2169 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2172 mce_cap = KVM_MCE_CAP_SUPPORTED;
2174 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2186 static void wbinvd_ipi(void *garbage)
2191 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2193 return vcpu->kvm->arch.iommu_domain &&
2194 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2197 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2199 /* Address WBINVD may be executed by guest */
2200 if (need_emulate_wbinvd(vcpu)) {
2201 if (kvm_x86_ops->has_wbinvd_exit())
2202 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2203 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2204 smp_call_function_single(vcpu->cpu,
2205 wbinvd_ipi, NULL, 1);
2208 kvm_x86_ops->vcpu_load(vcpu, cpu);
2209 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2210 /* Make sure TSC doesn't go backwards */
2214 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2215 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2216 tsc - vcpu->arch.last_guest_tsc;
2219 mark_tsc_unstable("KVM discovered backwards TSC");
2220 if (check_tsc_unstable()) {
2221 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2222 vcpu->arch.tsc_catchup = 1;
2224 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2225 if (vcpu->cpu != cpu)
2226 kvm_migrate_timers(vcpu);
2230 accumulate_steal_time(vcpu);
2231 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2234 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2236 kvm_x86_ops->vcpu_put(vcpu);
2237 kvm_put_guest_fpu(vcpu);
2238 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2241 static int is_efer_nx(void)
2243 unsigned long long efer = 0;
2245 rdmsrl_safe(MSR_EFER, &efer);
2246 return efer & EFER_NX;
2249 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2252 struct kvm_cpuid_entry2 *e, *entry;
2255 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2256 e = &vcpu->arch.cpuid_entries[i];
2257 if (e->function == 0x80000001) {
2262 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2263 entry->edx &= ~(1 << 20);
2264 printk(KERN_INFO "kvm: guest NX capability removed\n");
2268 /* when an old userspace process fills a new kernel module */
2269 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2270 struct kvm_cpuid *cpuid,
2271 struct kvm_cpuid_entry __user *entries)
2274 struct kvm_cpuid_entry *cpuid_entries;
2277 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2280 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2284 if (copy_from_user(cpuid_entries, entries,
2285 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2287 for (i = 0; i < cpuid->nent; i++) {
2288 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2289 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2290 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2291 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2292 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2293 vcpu->arch.cpuid_entries[i].index = 0;
2294 vcpu->arch.cpuid_entries[i].flags = 0;
2295 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2296 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2297 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2299 vcpu->arch.cpuid_nent = cpuid->nent;
2300 cpuid_fix_nx_cap(vcpu);
2302 kvm_apic_set_version(vcpu);
2303 kvm_x86_ops->cpuid_update(vcpu);
2307 vfree(cpuid_entries);
2312 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2313 struct kvm_cpuid2 *cpuid,
2314 struct kvm_cpuid_entry2 __user *entries)
2319 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2322 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2323 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2325 vcpu->arch.cpuid_nent = cpuid->nent;
2326 kvm_apic_set_version(vcpu);
2327 kvm_x86_ops->cpuid_update(vcpu);
2335 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2336 struct kvm_cpuid2 *cpuid,
2337 struct kvm_cpuid_entry2 __user *entries)
2342 if (cpuid->nent < vcpu->arch.cpuid_nent)
2345 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2346 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2351 cpuid->nent = vcpu->arch.cpuid_nent;
2355 static void cpuid_mask(u32 *word, int wordnum)
2357 *word &= boot_cpu_data.x86_capability[wordnum];
2360 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2363 entry->function = function;
2364 entry->index = index;
2365 cpuid_count(entry->function, entry->index,
2366 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2370 static bool supported_xcr0_bit(unsigned bit)
2372 u64 mask = ((u64)1 << bit);
2374 return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2377 #define F(x) bit(X86_FEATURE_##x)
2379 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2380 u32 index, int *nent, int maxnent)
2382 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2383 #ifdef CONFIG_X86_64
2384 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2386 unsigned f_lm = F(LM);
2388 unsigned f_gbpages = 0;
2391 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2394 const u32 kvm_supported_word0_x86_features =
2395 F(FPU) | F(VME) | F(DE) | F(PSE) |
2396 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2397 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2398 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2399 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2400 0 /* Reserved, DS, ACPI */ | F(MMX) |
2401 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2402 0 /* HTT, TM, Reserved, PBE */;
2403 /* cpuid 0x80000001.edx */
2404 const u32 kvm_supported_word1_x86_features =
2405 F(FPU) | F(VME) | F(DE) | F(PSE) |
2406 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2407 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2408 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2409 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2410 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2411 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2412 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2414 const u32 kvm_supported_word4_x86_features =
2415 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2416 0 /* DS-CPL, VMX, SMX, EST */ |
2417 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2418 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2419 0 /* Reserved, DCA */ | F(XMM4_1) |
2420 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2421 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2422 F(F16C) | F(RDRAND);
2423 /* cpuid 0x80000001.ecx */
2424 const u32 kvm_supported_word6_x86_features =
2425 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2426 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2427 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2428 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2430 /* cpuid 0xC0000001.edx */
2431 const u32 kvm_supported_word5_x86_features =
2432 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2433 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2437 const u32 kvm_supported_word9_x86_features =
2438 F(SMEP) | F(FSGSBASE) | F(ERMS);
2440 /* all calls to cpuid_count() should be made on the same cpu */
2442 do_cpuid_1_ent(entry, function, index);
2447 entry->eax = min(entry->eax, (u32)0xd);
2450 entry->edx &= kvm_supported_word0_x86_features;
2451 cpuid_mask(&entry->edx, 0);
2452 entry->ecx &= kvm_supported_word4_x86_features;
2453 cpuid_mask(&entry->ecx, 4);
2454 /* we support x2apic emulation even if host does not support
2455 * it since we emulate x2apic in software */
2456 entry->ecx |= F(X2APIC);
2458 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2459 * may return different values. This forces us to get_cpu() before
2460 * issuing the first command, and also to emulate this annoying behavior
2461 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2463 int t, times = entry->eax & 0xff;
2465 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2466 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2467 for (t = 1; t < times && *nent < maxnent; ++t) {
2468 do_cpuid_1_ent(&entry[t], function, 0);
2469 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2474 /* function 4 has additional index. */
2478 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2479 /* read more entries until cache_type is zero */
2480 for (i = 1; *nent < maxnent; ++i) {
2481 cache_type = entry[i - 1].eax & 0x1f;
2484 do_cpuid_1_ent(&entry[i], function, i);
2486 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2492 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2493 /* Mask ebx against host capbability word 9 */
2495 entry->ebx &= kvm_supported_word9_x86_features;
2496 cpuid_mask(&entry->ebx, 9);
2506 /* function 0xb has additional index. */
2510 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2511 /* read more entries until level_type is zero */
2512 for (i = 1; *nent < maxnent; ++i) {
2513 level_type = entry[i - 1].ecx & 0xff00;
2516 do_cpuid_1_ent(&entry[i], function, i);
2518 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2526 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2527 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2528 do_cpuid_1_ent(&entry[i], function, idx);
2529 if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2532 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2538 case KVM_CPUID_SIGNATURE: {
2539 char signature[12] = "KVMKVMKVM\0\0";
2540 u32 *sigptr = (u32 *)signature;
2542 entry->ebx = sigptr[0];
2543 entry->ecx = sigptr[1];
2544 entry->edx = sigptr[2];
2547 case KVM_CPUID_FEATURES:
2548 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2549 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2550 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2551 (1 << KVM_FEATURE_ASYNC_PF) |
2552 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2554 if (sched_info_on())
2555 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2562 entry->eax = min(entry->eax, 0x8000001a);
2565 entry->edx &= kvm_supported_word1_x86_features;
2566 cpuid_mask(&entry->edx, 1);
2567 entry->ecx &= kvm_supported_word6_x86_features;
2568 cpuid_mask(&entry->ecx, 6);
2571 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2572 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2573 unsigned phys_as = entry->eax & 0xff;
2576 g_phys_as = phys_as;
2577 entry->eax = g_phys_as | (virt_as << 8);
2578 entry->ebx = entry->edx = 0;
2582 entry->ecx = entry->edx = 0;
2588 /*Add support for Centaur's CPUID instruction*/
2590 /*Just support up to 0xC0000004 now*/
2591 entry->eax = min(entry->eax, 0xC0000004);
2594 entry->edx &= kvm_supported_word5_x86_features;
2595 cpuid_mask(&entry->edx, 5);
2597 case 3: /* Processor serial number */
2598 case 5: /* MONITOR/MWAIT */
2599 case 6: /* Thermal management */
2600 case 0xA: /* Architectural Performance Monitoring */
2601 case 0x80000007: /* Advanced power management */
2606 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2610 kvm_x86_ops->set_supported_cpuid(function, entry);
2617 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2618 struct kvm_cpuid_entry2 __user *entries)
2620 struct kvm_cpuid_entry2 *cpuid_entries;
2621 int limit, nent = 0, r = -E2BIG;
2624 if (cpuid->nent < 1)
2626 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2627 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2629 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2633 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2634 limit = cpuid_entries[0].eax;
2635 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2636 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2637 &nent, cpuid->nent);
2639 if (nent >= cpuid->nent)
2642 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2643 limit = cpuid_entries[nent - 1].eax;
2644 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2645 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2646 &nent, cpuid->nent);
2651 if (nent >= cpuid->nent)
2654 /* Add support for Centaur's CPUID instruction. */
2655 if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2656 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2657 &nent, cpuid->nent);
2660 if (nent >= cpuid->nent)
2663 limit = cpuid_entries[nent - 1].eax;
2664 for (func = 0xC0000001;
2665 func <= limit && nent < cpuid->nent; ++func)
2666 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2667 &nent, cpuid->nent);
2670 if (nent >= cpuid->nent)
2674 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2678 if (nent >= cpuid->nent)
2681 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2685 if (nent >= cpuid->nent)
2689 if (copy_to_user(entries, cpuid_entries,
2690 nent * sizeof(struct kvm_cpuid_entry2)))
2696 vfree(cpuid_entries);
2701 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2702 struct kvm_lapic_state *s)
2704 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2709 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2710 struct kvm_lapic_state *s)
2712 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2713 kvm_apic_post_state_restore(vcpu);
2714 update_cr8_intercept(vcpu);
2719 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2720 struct kvm_interrupt *irq)
2722 if (irq->irq < 0 || irq->irq >= 256)
2724 if (irqchip_in_kernel(vcpu->kvm))
2727 kvm_queue_interrupt(vcpu, irq->irq, false);
2728 kvm_make_request(KVM_REQ_EVENT, vcpu);
2733 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2735 kvm_inject_nmi(vcpu);
2740 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2741 struct kvm_tpr_access_ctl *tac)
2745 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2749 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2753 unsigned bank_num = mcg_cap & 0xff, bank;
2756 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2758 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2761 vcpu->arch.mcg_cap = mcg_cap;
2762 /* Init IA32_MCG_CTL to all 1s */
2763 if (mcg_cap & MCG_CTL_P)
2764 vcpu->arch.mcg_ctl = ~(u64)0;
2765 /* Init IA32_MCi_CTL to all 1s */
2766 for (bank = 0; bank < bank_num; bank++)
2767 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2772 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2773 struct kvm_x86_mce *mce)
2775 u64 mcg_cap = vcpu->arch.mcg_cap;
2776 unsigned bank_num = mcg_cap & 0xff;
2777 u64 *banks = vcpu->arch.mce_banks;
2779 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2782 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2783 * reporting is disabled
2785 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2786 vcpu->arch.mcg_ctl != ~(u64)0)
2788 banks += 4 * mce->bank;
2790 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2791 * reporting is disabled for the bank
2793 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2795 if (mce->status & MCI_STATUS_UC) {
2796 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2797 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2798 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2801 if (banks[1] & MCI_STATUS_VAL)
2802 mce->status |= MCI_STATUS_OVER;
2803 banks[2] = mce->addr;
2804 banks[3] = mce->misc;
2805 vcpu->arch.mcg_status = mce->mcg_status;
2806 banks[1] = mce->status;
2807 kvm_queue_exception(vcpu, MC_VECTOR);
2808 } else if (!(banks[1] & MCI_STATUS_VAL)
2809 || !(banks[1] & MCI_STATUS_UC)) {
2810 if (banks[1] & MCI_STATUS_VAL)
2811 mce->status |= MCI_STATUS_OVER;
2812 banks[2] = mce->addr;
2813 banks[3] = mce->misc;
2814 banks[1] = mce->status;
2816 banks[1] |= MCI_STATUS_OVER;
2820 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2821 struct kvm_vcpu_events *events)
2823 events->exception.injected =
2824 vcpu->arch.exception.pending &&
2825 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2826 events->exception.nr = vcpu->arch.exception.nr;
2827 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2828 events->exception.pad = 0;
2829 events->exception.error_code = vcpu->arch.exception.error_code;
2831 events->interrupt.injected =
2832 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2833 events->interrupt.nr = vcpu->arch.interrupt.nr;
2834 events->interrupt.soft = 0;
2835 events->interrupt.shadow =
2836 kvm_x86_ops->get_interrupt_shadow(vcpu,
2837 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2839 events->nmi.injected = vcpu->arch.nmi_injected;
2840 events->nmi.pending = vcpu->arch.nmi_pending;
2841 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2842 events->nmi.pad = 0;
2844 events->sipi_vector = vcpu->arch.sipi_vector;
2846 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2847 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2848 | KVM_VCPUEVENT_VALID_SHADOW);
2849 memset(&events->reserved, 0, sizeof(events->reserved));
2852 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2853 struct kvm_vcpu_events *events)
2855 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2856 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2857 | KVM_VCPUEVENT_VALID_SHADOW))
2860 vcpu->arch.exception.pending = events->exception.injected;
2861 vcpu->arch.exception.nr = events->exception.nr;
2862 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2863 vcpu->arch.exception.error_code = events->exception.error_code;
2865 vcpu->arch.interrupt.pending = events->interrupt.injected;
2866 vcpu->arch.interrupt.nr = events->interrupt.nr;
2867 vcpu->arch.interrupt.soft = events->interrupt.soft;
2868 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2869 kvm_x86_ops->set_interrupt_shadow(vcpu,
2870 events->interrupt.shadow);
2872 vcpu->arch.nmi_injected = events->nmi.injected;
2873 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2874 vcpu->arch.nmi_pending = events->nmi.pending;
2875 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2877 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2878 vcpu->arch.sipi_vector = events->sipi_vector;
2880 kvm_make_request(KVM_REQ_EVENT, vcpu);
2885 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2886 struct kvm_debugregs *dbgregs)
2888 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2889 dbgregs->dr6 = vcpu->arch.dr6;
2890 dbgregs->dr7 = vcpu->arch.dr7;
2892 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2895 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2896 struct kvm_debugregs *dbgregs)
2901 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2902 vcpu->arch.dr6 = dbgregs->dr6;
2903 vcpu->arch.dr7 = dbgregs->dr7;
2908 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2909 struct kvm_xsave *guest_xsave)
2912 memcpy(guest_xsave->region,
2913 &vcpu->arch.guest_fpu.state->xsave,
2916 memcpy(guest_xsave->region,
2917 &vcpu->arch.guest_fpu.state->fxsave,
2918 sizeof(struct i387_fxsave_struct));
2919 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2924 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2925 struct kvm_xsave *guest_xsave)
2928 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2931 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2932 guest_xsave->region, xstate_size);
2934 if (xstate_bv & ~XSTATE_FPSSE)
2936 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2937 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2942 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2943 struct kvm_xcrs *guest_xcrs)
2945 if (!cpu_has_xsave) {
2946 guest_xcrs->nr_xcrs = 0;
2950 guest_xcrs->nr_xcrs = 1;
2951 guest_xcrs->flags = 0;
2952 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2953 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2956 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2957 struct kvm_xcrs *guest_xcrs)
2964 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2967 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2968 /* Only support XCR0 currently */
2969 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2970 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2971 guest_xcrs->xcrs[0].value);
2979 long kvm_arch_vcpu_ioctl(struct file *filp,
2980 unsigned int ioctl, unsigned long arg)
2982 struct kvm_vcpu *vcpu = filp->private_data;
2983 void __user *argp = (void __user *)arg;
2986 struct kvm_lapic_state *lapic;
2987 struct kvm_xsave *xsave;
2988 struct kvm_xcrs *xcrs;
2994 case KVM_GET_LAPIC: {
2996 if (!vcpu->arch.apic)
2998 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3003 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3007 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3012 case KVM_SET_LAPIC: {
3014 if (!vcpu->arch.apic)
3016 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3021 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3023 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3029 case KVM_INTERRUPT: {
3030 struct kvm_interrupt irq;
3033 if (copy_from_user(&irq, argp, sizeof irq))
3035 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3042 r = kvm_vcpu_ioctl_nmi(vcpu);
3048 case KVM_SET_CPUID: {
3049 struct kvm_cpuid __user *cpuid_arg = argp;
3050 struct kvm_cpuid cpuid;
3053 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3055 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3060 case KVM_SET_CPUID2: {
3061 struct kvm_cpuid2 __user *cpuid_arg = argp;
3062 struct kvm_cpuid2 cpuid;
3065 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3067 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3068 cpuid_arg->entries);
3073 case KVM_GET_CPUID2: {
3074 struct kvm_cpuid2 __user *cpuid_arg = argp;
3075 struct kvm_cpuid2 cpuid;
3078 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3080 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3081 cpuid_arg->entries);
3085 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3091 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3094 r = msr_io(vcpu, argp, do_set_msr, 0);
3096 case KVM_TPR_ACCESS_REPORTING: {
3097 struct kvm_tpr_access_ctl tac;
3100 if (copy_from_user(&tac, argp, sizeof tac))
3102 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3106 if (copy_to_user(argp, &tac, sizeof tac))
3111 case KVM_SET_VAPIC_ADDR: {
3112 struct kvm_vapic_addr va;
3115 if (!irqchip_in_kernel(vcpu->kvm))
3118 if (copy_from_user(&va, argp, sizeof va))
3121 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3124 case KVM_X86_SETUP_MCE: {
3128 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3130 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3133 case KVM_X86_SET_MCE: {
3134 struct kvm_x86_mce mce;
3137 if (copy_from_user(&mce, argp, sizeof mce))
3139 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3142 case KVM_GET_VCPU_EVENTS: {
3143 struct kvm_vcpu_events events;
3145 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3148 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3153 case KVM_SET_VCPU_EVENTS: {
3154 struct kvm_vcpu_events events;
3157 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3160 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3163 case KVM_GET_DEBUGREGS: {
3164 struct kvm_debugregs dbgregs;
3166 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3169 if (copy_to_user(argp, &dbgregs,
3170 sizeof(struct kvm_debugregs)))
3175 case KVM_SET_DEBUGREGS: {
3176 struct kvm_debugregs dbgregs;
3179 if (copy_from_user(&dbgregs, argp,
3180 sizeof(struct kvm_debugregs)))
3183 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3186 case KVM_GET_XSAVE: {
3187 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3192 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3195 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3200 case KVM_SET_XSAVE: {
3201 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3207 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3210 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3213 case KVM_GET_XCRS: {
3214 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3219 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3222 if (copy_to_user(argp, u.xcrs,
3223 sizeof(struct kvm_xcrs)))
3228 case KVM_SET_XCRS: {
3229 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3235 if (copy_from_user(u.xcrs, argp,
3236 sizeof(struct kvm_xcrs)))
3239 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3242 case KVM_SET_TSC_KHZ: {
3246 if (!kvm_has_tsc_control)
3249 user_tsc_khz = (u32)arg;
3251 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3254 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3259 case KVM_GET_TSC_KHZ: {
3261 if (check_tsc_unstable())
3264 r = vcpu_tsc_khz(vcpu);
3276 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3280 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3282 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3286 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3289 kvm->arch.ept_identity_map_addr = ident_addr;
3293 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3294 u32 kvm_nr_mmu_pages)
3296 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3299 mutex_lock(&kvm->slots_lock);
3300 spin_lock(&kvm->mmu_lock);
3302 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3303 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3305 spin_unlock(&kvm->mmu_lock);
3306 mutex_unlock(&kvm->slots_lock);
3310 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3312 return kvm->arch.n_max_mmu_pages;
3315 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3320 switch (chip->chip_id) {
3321 case KVM_IRQCHIP_PIC_MASTER:
3322 memcpy(&chip->chip.pic,
3323 &pic_irqchip(kvm)->pics[0],
3324 sizeof(struct kvm_pic_state));
3326 case KVM_IRQCHIP_PIC_SLAVE:
3327 memcpy(&chip->chip.pic,
3328 &pic_irqchip(kvm)->pics[1],
3329 sizeof(struct kvm_pic_state));
3331 case KVM_IRQCHIP_IOAPIC:
3332 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3341 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3346 switch (chip->chip_id) {
3347 case KVM_IRQCHIP_PIC_MASTER:
3348 spin_lock(&pic_irqchip(kvm)->lock);
3349 memcpy(&pic_irqchip(kvm)->pics[0],
3351 sizeof(struct kvm_pic_state));
3352 spin_unlock(&pic_irqchip(kvm)->lock);
3354 case KVM_IRQCHIP_PIC_SLAVE:
3355 spin_lock(&pic_irqchip(kvm)->lock);
3356 memcpy(&pic_irqchip(kvm)->pics[1],
3358 sizeof(struct kvm_pic_state));
3359 spin_unlock(&pic_irqchip(kvm)->lock);
3361 case KVM_IRQCHIP_IOAPIC:
3362 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3368 kvm_pic_update_irq(pic_irqchip(kvm));
3372 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3376 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3377 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3378 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3382 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3386 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3387 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3388 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3389 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3393 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3397 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3398 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3399 sizeof(ps->channels));
3400 ps->flags = kvm->arch.vpit->pit_state.flags;
3401 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3402 memset(&ps->reserved, 0, sizeof(ps->reserved));
3406 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3408 int r = 0, start = 0;
3409 u32 prev_legacy, cur_legacy;
3410 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3411 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3412 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3413 if (!prev_legacy && cur_legacy)
3415 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3416 sizeof(kvm->arch.vpit->pit_state.channels));
3417 kvm->arch.vpit->pit_state.flags = ps->flags;
3418 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3419 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3423 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3424 struct kvm_reinject_control *control)
3426 if (!kvm->arch.vpit)
3428 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3429 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3430 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3435 * Get (and clear) the dirty memory log for a memory slot.
3437 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3438 struct kvm_dirty_log *log)
3441 struct kvm_memory_slot *memslot;
3443 unsigned long is_dirty = 0;
3445 mutex_lock(&kvm->slots_lock);
3448 if (log->slot >= KVM_MEMORY_SLOTS)
3451 memslot = &kvm->memslots->memslots[log->slot];
3453 if (!memslot->dirty_bitmap)
3456 n = kvm_dirty_bitmap_bytes(memslot);
3458 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3459 is_dirty = memslot->dirty_bitmap[i];
3461 /* If nothing is dirty, don't bother messing with page tables. */
3463 struct kvm_memslots *slots, *old_slots;
3464 unsigned long *dirty_bitmap;
3466 dirty_bitmap = memslot->dirty_bitmap_head;
3467 if (memslot->dirty_bitmap == dirty_bitmap)
3468 dirty_bitmap += n / sizeof(long);
3469 memset(dirty_bitmap, 0, n);
3472 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3475 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3476 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3477 slots->generation++;
3479 old_slots = kvm->memslots;
3480 rcu_assign_pointer(kvm->memslots, slots);
3481 synchronize_srcu_expedited(&kvm->srcu);
3482 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3485 spin_lock(&kvm->mmu_lock);
3486 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3487 spin_unlock(&kvm->mmu_lock);
3490 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3494 if (clear_user(log->dirty_bitmap, n))
3500 mutex_unlock(&kvm->slots_lock);
3504 long kvm_arch_vm_ioctl(struct file *filp,
3505 unsigned int ioctl, unsigned long arg)
3507 struct kvm *kvm = filp->private_data;
3508 void __user *argp = (void __user *)arg;
3511 * This union makes it completely explicit to gcc-3.x
3512 * that these two variables' stack usage should be
3513 * combined, not added together.
3516 struct kvm_pit_state ps;
3517 struct kvm_pit_state2 ps2;
3518 struct kvm_pit_config pit_config;
3522 case KVM_SET_TSS_ADDR:
3523 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3527 case KVM_SET_IDENTITY_MAP_ADDR: {
3531 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3533 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3538 case KVM_SET_NR_MMU_PAGES:
3539 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3543 case KVM_GET_NR_MMU_PAGES:
3544 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3546 case KVM_CREATE_IRQCHIP: {
3547 struct kvm_pic *vpic;
3549 mutex_lock(&kvm->lock);
3552 goto create_irqchip_unlock;
3554 vpic = kvm_create_pic(kvm);
3556 r = kvm_ioapic_init(kvm);
3558 mutex_lock(&kvm->slots_lock);
3559 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3561 mutex_unlock(&kvm->slots_lock);
3563 goto create_irqchip_unlock;
3566 goto create_irqchip_unlock;
3568 kvm->arch.vpic = vpic;
3570 r = kvm_setup_default_irq_routing(kvm);
3572 mutex_lock(&kvm->slots_lock);
3573 mutex_lock(&kvm->irq_lock);
3574 kvm_ioapic_destroy(kvm);
3575 kvm_destroy_pic(kvm);
3576 mutex_unlock(&kvm->irq_lock);
3577 mutex_unlock(&kvm->slots_lock);
3579 create_irqchip_unlock:
3580 mutex_unlock(&kvm->lock);
3583 case KVM_CREATE_PIT:
3584 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3586 case KVM_CREATE_PIT2:
3588 if (copy_from_user(&u.pit_config, argp,
3589 sizeof(struct kvm_pit_config)))
3592 mutex_lock(&kvm->slots_lock);
3595 goto create_pit_unlock;
3597 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3601 mutex_unlock(&kvm->slots_lock);
3603 case KVM_IRQ_LINE_STATUS:
3604 case KVM_IRQ_LINE: {
3605 struct kvm_irq_level irq_event;
3608 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3611 if (irqchip_in_kernel(kvm)) {
3613 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3614 irq_event.irq, irq_event.level);
3615 if (ioctl == KVM_IRQ_LINE_STATUS) {
3617 irq_event.status = status;
3618 if (copy_to_user(argp, &irq_event,
3626 case KVM_GET_IRQCHIP: {
3627 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3628 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3634 if (copy_from_user(chip, argp, sizeof *chip))
3635 goto get_irqchip_out;
3637 if (!irqchip_in_kernel(kvm))
3638 goto get_irqchip_out;
3639 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3641 goto get_irqchip_out;
3643 if (copy_to_user(argp, chip, sizeof *chip))
3644 goto get_irqchip_out;
3652 case KVM_SET_IRQCHIP: {
3653 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3654 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3660 if (copy_from_user(chip, argp, sizeof *chip))
3661 goto set_irqchip_out;
3663 if (!irqchip_in_kernel(kvm))
3664 goto set_irqchip_out;
3665 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3667 goto set_irqchip_out;
3677 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3680 if (!kvm->arch.vpit)
3682 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3686 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3693 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3696 if (!kvm->arch.vpit)
3698 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3704 case KVM_GET_PIT2: {
3706 if (!kvm->arch.vpit)
3708 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3712 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3717 case KVM_SET_PIT2: {
3719 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3722 if (!kvm->arch.vpit)
3724 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3730 case KVM_REINJECT_CONTROL: {
3731 struct kvm_reinject_control control;
3733 if (copy_from_user(&control, argp, sizeof(control)))
3735 r = kvm_vm_ioctl_reinject(kvm, &control);
3741 case KVM_XEN_HVM_CONFIG: {
3743 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3744 sizeof(struct kvm_xen_hvm_config)))
3747 if (kvm->arch.xen_hvm_config.flags)
3752 case KVM_SET_CLOCK: {
3753 struct kvm_clock_data user_ns;
3758 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3766 local_irq_disable();
3767 now_ns = get_kernel_ns();
3768 delta = user_ns.clock - now_ns;
3770 kvm->arch.kvmclock_offset = delta;
3773 case KVM_GET_CLOCK: {
3774 struct kvm_clock_data user_ns;
3777 local_irq_disable();
3778 now_ns = get_kernel_ns();
3779 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3782 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3785 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3798 static void kvm_init_msr_list(void)
3803 /* skip the first msrs in the list. KVM-specific */
3804 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3805 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3808 msrs_to_save[j] = msrs_to_save[i];
3811 num_msrs_to_save = j;
3814 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3822 if (!(vcpu->arch.apic &&
3823 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3824 && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3835 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3842 if (!(vcpu->arch.apic &&
3843 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3844 && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3846 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3856 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3857 struct kvm_segment *var, int seg)
3859 kvm_x86_ops->set_segment(vcpu, var, seg);
3862 void kvm_get_segment(struct kvm_vcpu *vcpu,
3863 struct kvm_segment *var, int seg)
3865 kvm_x86_ops->get_segment(vcpu, var, seg);
3868 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3873 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3876 struct x86_exception exception;
3878 BUG_ON(!mmu_is_nested(vcpu));
3880 /* NPT walks are always user-walks */
3881 access |= PFERR_USER_MASK;
3882 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3887 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3888 struct x86_exception *exception)
3890 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3891 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3894 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3895 struct x86_exception *exception)
3897 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3898 access |= PFERR_FETCH_MASK;
3899 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3902 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3903 struct x86_exception *exception)
3905 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3906 access |= PFERR_WRITE_MASK;
3907 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3910 /* uses this to access any guest's mapped memory without checking CPL */
3911 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3912 struct x86_exception *exception)
3914 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3917 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3918 struct kvm_vcpu *vcpu, u32 access,
3919 struct x86_exception *exception)
3922 int r = X86EMUL_CONTINUE;
3925 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3927 unsigned offset = addr & (PAGE_SIZE-1);
3928 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3931 if (gpa == UNMAPPED_GVA)
3932 return X86EMUL_PROPAGATE_FAULT;
3933 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3935 r = X86EMUL_IO_NEEDED;
3947 /* used for instruction fetching */
3948 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3949 gva_t addr, void *val, unsigned int bytes,
3950 struct x86_exception *exception)
3952 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3953 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3955 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3956 access | PFERR_FETCH_MASK,
3960 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3961 gva_t addr, void *val, unsigned int bytes,
3962 struct x86_exception *exception)
3964 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3965 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3967 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3970 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3972 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3973 gva_t addr, void *val, unsigned int bytes,
3974 struct x86_exception *exception)
3976 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3977 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3980 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3981 gva_t addr, void *val,
3983 struct x86_exception *exception)
3985 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3987 int r = X86EMUL_CONTINUE;
3990 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3993 unsigned offset = addr & (PAGE_SIZE-1);
3994 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3997 if (gpa == UNMAPPED_GVA)
3998 return X86EMUL_PROPAGATE_FAULT;
3999 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4001 r = X86EMUL_IO_NEEDED;
4012 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4014 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4015 gpa_t *gpa, struct x86_exception *exception,
4018 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4020 if (vcpu_match_mmio_gva(vcpu, gva) &&
4021 check_write_user_access(vcpu, write, access,
4022 vcpu->arch.access)) {
4023 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4024 (gva & (PAGE_SIZE - 1));
4025 trace_vcpu_match_mmio(gva, *gpa, write, false);
4030 access |= PFERR_WRITE_MASK;
4032 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4034 if (*gpa == UNMAPPED_GVA)
4037 /* For APIC access vmexit */
4038 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4041 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4042 trace_vcpu_match_mmio(gva, *gpa, write, true);
4049 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4053 struct x86_exception *exception)
4055 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4059 if (vcpu->mmio_read_completed) {
4060 memcpy(val, vcpu->mmio_data, bytes);
4061 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4062 vcpu->mmio_phys_addr, *(u64 *)val);
4063 vcpu->mmio_read_completed = 0;
4064 return X86EMUL_CONTINUE;
4067 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, false);
4070 return X86EMUL_PROPAGATE_FAULT;
4075 if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
4076 == X86EMUL_CONTINUE)
4077 return X86EMUL_CONTINUE;
4081 * Is this MMIO handled locally?
4083 handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
4085 if (handled == bytes)
4086 return X86EMUL_CONTINUE;
4092 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4094 vcpu->mmio_needed = 1;
4095 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4096 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4097 vcpu->mmio_size = bytes;
4098 vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4099 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
4100 vcpu->mmio_index = 0;
4102 return X86EMUL_IO_NEEDED;
4105 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4106 const void *val, int bytes)
4110 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4113 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4117 static int emulator_write_emulated_onepage(unsigned long addr,
4120 struct x86_exception *exception,
4121 struct kvm_vcpu *vcpu)
4126 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, true);
4129 return X86EMUL_PROPAGATE_FAULT;
4131 /* For APIC access vmexit */
4135 if (emulator_write_phys(vcpu, gpa, val, bytes))
4136 return X86EMUL_CONTINUE;
4139 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4141 * Is this MMIO handled locally?
4143 handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
4144 if (handled == bytes)
4145 return X86EMUL_CONTINUE;
4151 vcpu->mmio_needed = 1;
4152 memcpy(vcpu->mmio_data, val, bytes);
4153 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4154 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4155 vcpu->mmio_size = bytes;
4156 vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4157 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
4158 memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4159 vcpu->mmio_index = 0;
4161 return X86EMUL_CONTINUE;
4164 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4168 struct x86_exception *exception)
4170 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4172 /* Crossing a page boundary? */
4173 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4176 now = -addr & ~PAGE_MASK;
4177 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4179 if (rc != X86EMUL_CONTINUE)
4185 return emulator_write_emulated_onepage(addr, val, bytes, exception,
4189 #define CMPXCHG_TYPE(t, ptr, old, new) \
4190 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4192 #ifdef CONFIG_X86_64
4193 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4195 # define CMPXCHG64(ptr, old, new) \
4196 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4199 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4204 struct x86_exception *exception)
4206 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4212 /* guests cmpxchg8b have to be emulated atomically */
4213 if (bytes > 8 || (bytes & (bytes - 1)))
4216 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4218 if (gpa == UNMAPPED_GVA ||
4219 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4222 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4225 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4226 if (is_error_page(page)) {
4227 kvm_release_page_clean(page);
4231 kaddr = kmap_atomic(page, KM_USER0);
4232 kaddr += offset_in_page(gpa);
4235 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4238 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4241 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4244 exchanged = CMPXCHG64(kaddr, old, new);
4249 kunmap_atomic(kaddr, KM_USER0);
4250 kvm_release_page_dirty(page);
4253 return X86EMUL_CMPXCHG_FAILED;
4255 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4257 return X86EMUL_CONTINUE;
4260 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4262 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4265 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4267 /* TODO: String I/O for in kernel device */
4270 if (vcpu->arch.pio.in)
4271 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4272 vcpu->arch.pio.size, pd);
4274 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4275 vcpu->arch.pio.port, vcpu->arch.pio.size,
4281 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4282 int size, unsigned short port, void *val,
4285 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4287 if (vcpu->arch.pio.count)
4290 trace_kvm_pio(0, port, size, count);
4292 vcpu->arch.pio.port = port;
4293 vcpu->arch.pio.in = 1;
4294 vcpu->arch.pio.count = count;
4295 vcpu->arch.pio.size = size;
4297 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4299 memcpy(val, vcpu->arch.pio_data, size * count);
4300 vcpu->arch.pio.count = 0;
4304 vcpu->run->exit_reason = KVM_EXIT_IO;
4305 vcpu->run->io.direction = KVM_EXIT_IO_IN;
4306 vcpu->run->io.size = size;
4307 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4308 vcpu->run->io.count = count;
4309 vcpu->run->io.port = port;
4314 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4315 int size, unsigned short port,
4316 const void *val, unsigned int count)
4318 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4320 trace_kvm_pio(1, port, size, count);
4322 vcpu->arch.pio.port = port;
4323 vcpu->arch.pio.in = 0;
4324 vcpu->arch.pio.count = count;
4325 vcpu->arch.pio.size = size;
4327 memcpy(vcpu->arch.pio_data, val, size * count);
4329 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4330 vcpu->arch.pio.count = 0;
4334 vcpu->run->exit_reason = KVM_EXIT_IO;
4335 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4336 vcpu->run->io.size = size;
4337 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4338 vcpu->run->io.count = count;
4339 vcpu->run->io.port = port;
4344 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4346 return kvm_x86_ops->get_segment_base(vcpu, seg);
4349 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4351 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4354 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4356 if (!need_emulate_wbinvd(vcpu))
4357 return X86EMUL_CONTINUE;
4359 if (kvm_x86_ops->has_wbinvd_exit()) {
4360 int cpu = get_cpu();
4362 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4363 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4364 wbinvd_ipi, NULL, 1);
4366 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4369 return X86EMUL_CONTINUE;
4371 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4373 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4375 kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4378 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4380 return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4383 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4386 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4389 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4391 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4394 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4396 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4397 unsigned long value;
4401 value = kvm_read_cr0(vcpu);
4404 value = vcpu->arch.cr2;
4407 value = kvm_read_cr3(vcpu);
4410 value = kvm_read_cr4(vcpu);
4413 value = kvm_get_cr8(vcpu);
4416 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4423 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4425 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4430 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4433 vcpu->arch.cr2 = val;
4436 res = kvm_set_cr3(vcpu, val);
4439 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4442 res = kvm_set_cr8(vcpu, val);
4445 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4452 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4454 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4457 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4459 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4462 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4464 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4467 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4469 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4472 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4474 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4477 static unsigned long emulator_get_cached_segment_base(
4478 struct x86_emulate_ctxt *ctxt, int seg)
4480 return get_segment_base(emul_to_vcpu(ctxt), seg);
4483 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4484 struct desc_struct *desc, u32 *base3,
4487 struct kvm_segment var;
4489 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4490 *selector = var.selector;
4497 set_desc_limit(desc, var.limit);
4498 set_desc_base(desc, (unsigned long)var.base);
4499 #ifdef CONFIG_X86_64
4501 *base3 = var.base >> 32;
4503 desc->type = var.type;
4505 desc->dpl = var.dpl;
4506 desc->p = var.present;
4507 desc->avl = var.avl;
4515 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4516 struct desc_struct *desc, u32 base3,
4519 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4520 struct kvm_segment var;
4522 var.selector = selector;
4523 var.base = get_desc_base(desc);
4524 #ifdef CONFIG_X86_64
4525 var.base |= ((u64)base3) << 32;
4527 var.limit = get_desc_limit(desc);
4529 var.limit = (var.limit << 12) | 0xfff;
4530 var.type = desc->type;
4531 var.present = desc->p;
4532 var.dpl = desc->dpl;
4537 var.avl = desc->avl;
4538 var.present = desc->p;
4539 var.unusable = !var.present;
4542 kvm_set_segment(vcpu, &var, seg);
4546 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4547 u32 msr_index, u64 *pdata)
4549 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4552 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4553 u32 msr_index, u64 data)
4555 return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4558 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4560 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4563 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4566 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4568 * CR0.TS may reference the host fpu state, not the guest fpu state,
4569 * so it may be clear at this point.
4574 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4579 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4580 struct x86_instruction_info *info,
4581 enum x86_intercept_stage stage)
4583 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4586 static struct x86_emulate_ops emulate_ops = {
4587 .read_std = kvm_read_guest_virt_system,
4588 .write_std = kvm_write_guest_virt_system,
4589 .fetch = kvm_fetch_guest_virt,
4590 .read_emulated = emulator_read_emulated,
4591 .write_emulated = emulator_write_emulated,
4592 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4593 .invlpg = emulator_invlpg,
4594 .pio_in_emulated = emulator_pio_in_emulated,
4595 .pio_out_emulated = emulator_pio_out_emulated,
4596 .get_segment = emulator_get_segment,
4597 .set_segment = emulator_set_segment,
4598 .get_cached_segment_base = emulator_get_cached_segment_base,
4599 .get_gdt = emulator_get_gdt,
4600 .get_idt = emulator_get_idt,
4601 .set_gdt = emulator_set_gdt,
4602 .set_idt = emulator_set_idt,
4603 .get_cr = emulator_get_cr,
4604 .set_cr = emulator_set_cr,
4605 .cpl = emulator_get_cpl,
4606 .get_dr = emulator_get_dr,
4607 .set_dr = emulator_set_dr,
4608 .set_msr = emulator_set_msr,
4609 .get_msr = emulator_get_msr,
4610 .halt = emulator_halt,
4611 .wbinvd = emulator_wbinvd,
4612 .fix_hypercall = emulator_fix_hypercall,
4613 .get_fpu = emulator_get_fpu,
4614 .put_fpu = emulator_put_fpu,
4615 .intercept = emulator_intercept,
4618 static void cache_all_regs(struct kvm_vcpu *vcpu)
4620 kvm_register_read(vcpu, VCPU_REGS_RAX);
4621 kvm_register_read(vcpu, VCPU_REGS_RSP);
4622 kvm_register_read(vcpu, VCPU_REGS_RIP);
4623 vcpu->arch.regs_dirty = ~0;
4626 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4628 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4630 * an sti; sti; sequence only disable interrupts for the first
4631 * instruction. So, if the last instruction, be it emulated or
4632 * not, left the system with the INT_STI flag enabled, it
4633 * means that the last instruction is an sti. We should not
4634 * leave the flag on in this case. The same goes for mov ss
4636 if (!(int_shadow & mask))
4637 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4640 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4642 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4643 if (ctxt->exception.vector == PF_VECTOR)
4644 kvm_propagate_fault(vcpu, &ctxt->exception);
4645 else if (ctxt->exception.error_code_valid)
4646 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4647 ctxt->exception.error_code);
4649 kvm_queue_exception(vcpu, ctxt->exception.vector);
4652 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4653 const unsigned long *regs)
4655 memset(&ctxt->twobyte, 0,
4656 (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4657 memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4659 ctxt->fetch.start = 0;
4660 ctxt->fetch.end = 0;
4661 ctxt->io_read.pos = 0;
4662 ctxt->io_read.end = 0;
4663 ctxt->mem_read.pos = 0;
4664 ctxt->mem_read.end = 0;
4667 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4669 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4673 * TODO: fix emulate.c to use guest_read/write_register
4674 * instead of direct ->regs accesses, can save hundred cycles
4675 * on Intel for instructions that don't read/change RSP, for
4678 cache_all_regs(vcpu);
4680 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4682 ctxt->eflags = kvm_get_rflags(vcpu);
4683 ctxt->eip = kvm_rip_read(vcpu);
4684 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4685 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
4686 cs_l ? X86EMUL_MODE_PROT64 :
4687 cs_db ? X86EMUL_MODE_PROT32 :
4688 X86EMUL_MODE_PROT16;
4689 ctxt->guest_mode = is_guest_mode(vcpu);
4691 init_decode_cache(ctxt, vcpu->arch.regs);
4692 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4695 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4697 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4700 init_emulate_ctxt(vcpu);
4704 ctxt->_eip = ctxt->eip + inc_eip;
4705 ret = emulate_int_real(ctxt, irq);
4707 if (ret != X86EMUL_CONTINUE)
4708 return EMULATE_FAIL;
4710 ctxt->eip = ctxt->_eip;
4711 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4712 kvm_rip_write(vcpu, ctxt->eip);
4713 kvm_set_rflags(vcpu, ctxt->eflags);
4715 if (irq == NMI_VECTOR)
4716 vcpu->arch.nmi_pending = false;
4718 vcpu->arch.interrupt.pending = false;
4720 return EMULATE_DONE;
4722 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4724 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4726 int r = EMULATE_DONE;
4728 ++vcpu->stat.insn_emulation_fail;
4729 trace_kvm_emulate_insn_failed(vcpu);
4730 if (!is_guest_mode(vcpu)) {
4731 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4732 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4733 vcpu->run->internal.ndata = 0;
4736 kvm_queue_exception(vcpu, UD_VECTOR);
4741 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4749 * if emulation was due to access to shadowed page table
4750 * and it failed try to unshadow page and re-entetr the
4751 * guest to let CPU execute the instruction.
4753 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4756 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4758 if (gpa == UNMAPPED_GVA)
4759 return true; /* let cpu generate fault */
4761 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4767 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4774 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4775 bool writeback = true;
4777 kvm_clear_exception_queue(vcpu);
4779 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4780 init_emulate_ctxt(vcpu);
4781 ctxt->interruptibility = 0;
4782 ctxt->have_exception = false;
4783 ctxt->perm_ok = false;
4785 ctxt->only_vendor_specific_insn
4786 = emulation_type & EMULTYPE_TRAP_UD;
4788 r = x86_decode_insn(ctxt, insn, insn_len);
4790 trace_kvm_emulate_insn_start(vcpu);
4791 ++vcpu->stat.insn_emulation;
4793 if (emulation_type & EMULTYPE_TRAP_UD)
4794 return EMULATE_FAIL;
4795 if (reexecute_instruction(vcpu, cr2))
4796 return EMULATE_DONE;
4797 if (emulation_type & EMULTYPE_SKIP)
4798 return EMULATE_FAIL;
4799 return handle_emulation_failure(vcpu);
4803 if (emulation_type & EMULTYPE_SKIP) {
4804 kvm_rip_write(vcpu, ctxt->_eip);
4805 return EMULATE_DONE;
4808 /* this is needed for vmware backdoor interface to work since it
4809 changes registers values during IO operation */
4810 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4811 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4812 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4816 r = x86_emulate_insn(ctxt);
4818 if (r == EMULATION_INTERCEPTED)
4819 return EMULATE_DONE;
4821 if (r == EMULATION_FAILED) {
4822 if (reexecute_instruction(vcpu, cr2))
4823 return EMULATE_DONE;
4825 return handle_emulation_failure(vcpu);
4828 if (ctxt->have_exception) {
4829 inject_emulated_exception(vcpu);
4831 } else if (vcpu->arch.pio.count) {
4832 if (!vcpu->arch.pio.in)
4833 vcpu->arch.pio.count = 0;
4836 r = EMULATE_DO_MMIO;
4837 } else if (vcpu->mmio_needed) {
4838 if (!vcpu->mmio_is_write)
4840 r = EMULATE_DO_MMIO;
4841 } else if (r == EMULATION_RESTART)
4847 toggle_interruptibility(vcpu, ctxt->interruptibility);
4848 kvm_set_rflags(vcpu, ctxt->eflags);
4849 kvm_make_request(KVM_REQ_EVENT, vcpu);
4850 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4851 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4852 kvm_rip_write(vcpu, ctxt->eip);
4854 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4858 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4860 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4862 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4863 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4864 size, port, &val, 1);
4865 /* do not return to emulator after return from userspace */
4866 vcpu->arch.pio.count = 0;
4869 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4871 static void tsc_bad(void *info)
4873 __this_cpu_write(cpu_tsc_khz, 0);
4876 static void tsc_khz_changed(void *data)
4878 struct cpufreq_freqs *freq = data;
4879 unsigned long khz = 0;
4883 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4884 khz = cpufreq_quick_get(raw_smp_processor_id());
4887 __this_cpu_write(cpu_tsc_khz, khz);
4890 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4893 struct cpufreq_freqs *freq = data;
4895 struct kvm_vcpu *vcpu;
4896 int i, send_ipi = 0;
4899 * We allow guests to temporarily run on slowing clocks,
4900 * provided we notify them after, or to run on accelerating
4901 * clocks, provided we notify them before. Thus time never
4904 * However, we have a problem. We can't atomically update
4905 * the frequency of a given CPU from this function; it is
4906 * merely a notifier, which can be called from any CPU.
4907 * Changing the TSC frequency at arbitrary points in time
4908 * requires a recomputation of local variables related to
4909 * the TSC for each VCPU. We must flag these local variables
4910 * to be updated and be sure the update takes place with the
4911 * new frequency before any guests proceed.
4913 * Unfortunately, the combination of hotplug CPU and frequency
4914 * change creates an intractable locking scenario; the order
4915 * of when these callouts happen is undefined with respect to
4916 * CPU hotplug, and they can race with each other. As such,
4917 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4918 * undefined; you can actually have a CPU frequency change take
4919 * place in between the computation of X and the setting of the
4920 * variable. To protect against this problem, all updates of
4921 * the per_cpu tsc_khz variable are done in an interrupt
4922 * protected IPI, and all callers wishing to update the value
4923 * must wait for a synchronous IPI to complete (which is trivial
4924 * if the caller is on the CPU already). This establishes the
4925 * necessary total order on variable updates.
4927 * Note that because a guest time update may take place
4928 * anytime after the setting of the VCPU's request bit, the
4929 * correct TSC value must be set before the request. However,
4930 * to ensure the update actually makes it to any guest which
4931 * starts running in hardware virtualization between the set
4932 * and the acquisition of the spinlock, we must also ping the
4933 * CPU after setting the request bit.
4937 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4939 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4942 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4944 raw_spin_lock(&kvm_lock);
4945 list_for_each_entry(kvm, &vm_list, vm_list) {
4946 kvm_for_each_vcpu(i, vcpu, kvm) {
4947 if (vcpu->cpu != freq->cpu)
4949 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4950 if (vcpu->cpu != smp_processor_id())
4954 raw_spin_unlock(&kvm_lock);
4956 if (freq->old < freq->new && send_ipi) {
4958 * We upscale the frequency. Must make the guest
4959 * doesn't see old kvmclock values while running with
4960 * the new frequency, otherwise we risk the guest sees
4961 * time go backwards.
4963 * In case we update the frequency for another cpu
4964 * (which might be in guest context) send an interrupt
4965 * to kick the cpu out of guest context. Next time
4966 * guest context is entered kvmclock will be updated,
4967 * so the guest will not see stale values.
4969 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4974 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4975 .notifier_call = kvmclock_cpufreq_notifier
4978 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4979 unsigned long action, void *hcpu)
4981 unsigned int cpu = (unsigned long)hcpu;
4985 case CPU_DOWN_FAILED:
4986 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4988 case CPU_DOWN_PREPARE:
4989 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4995 static struct notifier_block kvmclock_cpu_notifier_block = {
4996 .notifier_call = kvmclock_cpu_notifier,
4997 .priority = -INT_MAX
5000 static void kvm_timer_init(void)
5004 max_tsc_khz = tsc_khz;
5005 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5006 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5007 #ifdef CONFIG_CPU_FREQ
5008 struct cpufreq_policy policy;
5009 memset(&policy, 0, sizeof(policy));
5011 cpufreq_get_policy(&policy, cpu);
5012 if (policy.cpuinfo.max_freq)
5013 max_tsc_khz = policy.cpuinfo.max_freq;
5016 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5017 CPUFREQ_TRANSITION_NOTIFIER);
5019 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5020 for_each_online_cpu(cpu)
5021 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5024 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5026 static int kvm_is_in_guest(void)
5028 return percpu_read(current_vcpu) != NULL;
5031 static int kvm_is_user_mode(void)
5035 if (percpu_read(current_vcpu))
5036 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5038 return user_mode != 0;
5041 static unsigned long kvm_get_guest_ip(void)
5043 unsigned long ip = 0;
5045 if (percpu_read(current_vcpu))
5046 ip = kvm_rip_read(percpu_read(current_vcpu));
5051 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5052 .is_in_guest = kvm_is_in_guest,
5053 .is_user_mode = kvm_is_user_mode,
5054 .get_guest_ip = kvm_get_guest_ip,
5057 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5059 percpu_write(current_vcpu, vcpu);
5061 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5063 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5065 percpu_write(current_vcpu, NULL);
5067 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5069 static void kvm_set_mmio_spte_mask(void)
5072 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5075 * Set the reserved bits and the present bit of an paging-structure
5076 * entry to generate page fault with PFER.RSV = 1.
5078 mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5081 #ifdef CONFIG_X86_64
5083 * If reserved bit is not supported, clear the present bit to disable
5086 if (maxphyaddr == 52)
5090 kvm_mmu_set_mmio_spte_mask(mask);
5093 int kvm_arch_init(void *opaque)
5096 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5099 printk(KERN_ERR "kvm: already loaded the other module\n");
5104 if (!ops->cpu_has_kvm_support()) {
5105 printk(KERN_ERR "kvm: no hardware support\n");
5109 if (ops->disabled_by_bios()) {
5110 printk(KERN_ERR "kvm: disabled by bios\n");
5115 r = kvm_mmu_module_init();
5119 kvm_set_mmio_spte_mask();
5120 kvm_init_msr_list();
5123 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5124 PT_DIRTY_MASK, PT64_NX_MASK, 0);
5128 perf_register_guest_info_callbacks(&kvm_guest_cbs);
5131 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5139 void kvm_arch_exit(void)
5141 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5143 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5144 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5145 CPUFREQ_TRANSITION_NOTIFIER);
5146 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5148 kvm_mmu_module_exit();
5151 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5153 ++vcpu->stat.halt_exits;
5154 if (irqchip_in_kernel(vcpu->kvm)) {
5155 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5158 vcpu->run->exit_reason = KVM_EXIT_HLT;
5162 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5164 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5167 if (is_long_mode(vcpu))
5170 return a0 | ((gpa_t)a1 << 32);
5173 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5175 u64 param, ingpa, outgpa, ret;
5176 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5177 bool fast, longmode;
5181 * hypercall generates UD from non zero cpl and real mode
5184 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5185 kvm_queue_exception(vcpu, UD_VECTOR);
5189 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5190 longmode = is_long_mode(vcpu) && cs_l == 1;
5193 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5194 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5195 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5196 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5197 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5198 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5200 #ifdef CONFIG_X86_64
5202 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5203 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5204 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5208 code = param & 0xffff;
5209 fast = (param >> 16) & 0x1;
5210 rep_cnt = (param >> 32) & 0xfff;
5211 rep_idx = (param >> 48) & 0xfff;
5213 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5216 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5217 kvm_vcpu_on_spin(vcpu);
5220 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5224 ret = res | (((u64)rep_done & 0xfff) << 32);
5226 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5228 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5229 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5235 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5237 unsigned long nr, a0, a1, a2, a3, ret;
5240 if (kvm_hv_hypercall_enabled(vcpu->kvm))
5241 return kvm_hv_hypercall(vcpu);
5243 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5244 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5245 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5246 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5247 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5249 trace_kvm_hypercall(nr, a0, a1, a2, a3);
5251 if (!is_long_mode(vcpu)) {
5259 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5265 case KVM_HC_VAPIC_POLL_IRQ:
5269 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5276 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5277 ++vcpu->stat.hypercalls;
5280 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5282 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5284 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5285 char instruction[3];
5286 unsigned long rip = kvm_rip_read(vcpu);
5289 * Blow out the MMU to ensure that no other VCPU has an active mapping
5290 * to ensure that the updated hypercall appears atomically across all
5293 kvm_mmu_zap_all(vcpu->kvm);
5295 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5297 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5300 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5302 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5303 int j, nent = vcpu->arch.cpuid_nent;
5305 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5306 /* when no next entry is found, the current entry[i] is reselected */
5307 for (j = i + 1; ; j = (j + 1) % nent) {
5308 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5309 if (ej->function == e->function) {
5310 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5314 return 0; /* silence gcc, even though control never reaches here */
5317 /* find an entry with matching function, matching index (if needed), and that
5318 * should be read next (if it's stateful) */
5319 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5320 u32 function, u32 index)
5322 if (e->function != function)
5324 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5326 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5327 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5332 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5333 u32 function, u32 index)
5336 struct kvm_cpuid_entry2 *best = NULL;
5338 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5339 struct kvm_cpuid_entry2 *e;
5341 e = &vcpu->arch.cpuid_entries[i];
5342 if (is_matching_cpuid_entry(e, function, index)) {
5343 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5344 move_to_next_stateful_cpuid_entry(vcpu, i);
5351 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5353 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5355 struct kvm_cpuid_entry2 *best;
5357 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5358 if (!best || best->eax < 0x80000008)
5360 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5362 return best->eax & 0xff;
5368 * If no match is found, check whether we exceed the vCPU's limit
5369 * and return the content of the highest valid _standard_ leaf instead.
5370 * This is to satisfy the CPUID specification.
5372 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5373 u32 function, u32 index)
5375 struct kvm_cpuid_entry2 *maxlevel;
5377 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5378 if (!maxlevel || maxlevel->eax >= function)
5380 if (function & 0x80000000) {
5381 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5385 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5388 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5390 u32 function, index;
5391 struct kvm_cpuid_entry2 *best;
5393 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5394 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5395 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5396 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5397 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5398 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5399 best = kvm_find_cpuid_entry(vcpu, function, index);
5402 best = check_cpuid_limit(vcpu, function, index);
5405 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5406 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5407 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5408 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5410 kvm_x86_ops->skip_emulated_instruction(vcpu);
5411 trace_kvm_cpuid(function,
5412 kvm_register_read(vcpu, VCPU_REGS_RAX),
5413 kvm_register_read(vcpu, VCPU_REGS_RBX),
5414 kvm_register_read(vcpu, VCPU_REGS_RCX),
5415 kvm_register_read(vcpu, VCPU_REGS_RDX));
5417 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5420 * Check if userspace requested an interrupt window, and that the
5421 * interrupt window is open.
5423 * No need to exit to userspace if we already have an interrupt queued.
5425 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5427 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5428 vcpu->run->request_interrupt_window &&
5429 kvm_arch_interrupt_allowed(vcpu));
5432 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5434 struct kvm_run *kvm_run = vcpu->run;
5436 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5437 kvm_run->cr8 = kvm_get_cr8(vcpu);
5438 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5439 if (irqchip_in_kernel(vcpu->kvm))
5440 kvm_run->ready_for_interrupt_injection = 1;
5442 kvm_run->ready_for_interrupt_injection =
5443 kvm_arch_interrupt_allowed(vcpu) &&
5444 !kvm_cpu_has_interrupt(vcpu) &&
5445 !kvm_event_needs_reinjection(vcpu);
5448 static void vapic_enter(struct kvm_vcpu *vcpu)
5450 struct kvm_lapic *apic = vcpu->arch.apic;
5453 if (!apic || !apic->vapic_addr)
5456 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5458 vcpu->arch.apic->vapic_page = page;
5461 static void vapic_exit(struct kvm_vcpu *vcpu)
5463 struct kvm_lapic *apic = vcpu->arch.apic;
5466 if (!apic || !apic->vapic_addr)
5469 idx = srcu_read_lock(&vcpu->kvm->srcu);
5470 kvm_release_page_dirty(apic->vapic_page);
5471 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5472 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5475 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5479 if (!kvm_x86_ops->update_cr8_intercept)
5482 if (!vcpu->arch.apic)
5485 if (!vcpu->arch.apic->vapic_addr)
5486 max_irr = kvm_lapic_find_highest_irr(vcpu);
5493 tpr = kvm_lapic_get_cr8(vcpu);
5495 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5498 static void inject_pending_event(struct kvm_vcpu *vcpu)
5500 /* try to reinject previous events if any */
5501 if (vcpu->arch.exception.pending) {
5502 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5503 vcpu->arch.exception.has_error_code,
5504 vcpu->arch.exception.error_code);
5505 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5506 vcpu->arch.exception.has_error_code,
5507 vcpu->arch.exception.error_code,
5508 vcpu->arch.exception.reinject);
5512 if (vcpu->arch.nmi_injected) {
5513 kvm_x86_ops->set_nmi(vcpu);
5517 if (vcpu->arch.interrupt.pending) {
5518 kvm_x86_ops->set_irq(vcpu);
5522 /* try to inject new event if pending */
5523 if (vcpu->arch.nmi_pending) {
5524 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5525 vcpu->arch.nmi_pending = false;
5526 vcpu->arch.nmi_injected = true;
5527 kvm_x86_ops->set_nmi(vcpu);
5529 } else if (kvm_cpu_has_interrupt(vcpu)) {
5530 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5531 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5533 kvm_x86_ops->set_irq(vcpu);
5538 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5540 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5541 !vcpu->guest_xcr0_loaded) {
5542 /* kvm_set_xcr() also depends on this */
5543 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5544 vcpu->guest_xcr0_loaded = 1;
5548 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5550 if (vcpu->guest_xcr0_loaded) {
5551 if (vcpu->arch.xcr0 != host_xcr0)
5552 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5553 vcpu->guest_xcr0_loaded = 0;
5557 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5561 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5562 vcpu->run->request_interrupt_window;
5564 if (vcpu->requests) {
5565 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5566 kvm_mmu_unload(vcpu);
5567 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5568 __kvm_migrate_timers(vcpu);
5569 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5570 r = kvm_guest_time_update(vcpu);
5574 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5575 kvm_mmu_sync_roots(vcpu);
5576 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5577 kvm_x86_ops->tlb_flush(vcpu);
5578 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5579 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5583 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5584 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5588 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5589 vcpu->fpu_active = 0;
5590 kvm_x86_ops->fpu_deactivate(vcpu);
5592 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5593 /* Page is swapped out. Do synthetic halt */
5594 vcpu->arch.apf.halted = true;
5598 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5599 record_steal_time(vcpu);
5603 r = kvm_mmu_reload(vcpu);
5608 * An NMI can be injected between local nmi_pending read and
5609 * vcpu->arch.nmi_pending read inside inject_pending_event().
5610 * But in that case, KVM_REQ_EVENT will be set, which makes
5611 * the race described above benign.
5613 nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5615 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5616 inject_pending_event(vcpu);
5618 /* enable NMI/IRQ window open exits if needed */
5620 kvm_x86_ops->enable_nmi_window(vcpu);
5621 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5622 kvm_x86_ops->enable_irq_window(vcpu);
5624 if (kvm_lapic_enabled(vcpu)) {
5625 update_cr8_intercept(vcpu);
5626 kvm_lapic_sync_to_vapic(vcpu);
5632 kvm_x86_ops->prepare_guest_switch(vcpu);
5633 if (vcpu->fpu_active)
5634 kvm_load_guest_fpu(vcpu);
5635 kvm_load_guest_xcr0(vcpu);
5637 vcpu->mode = IN_GUEST_MODE;
5639 /* We should set ->mode before check ->requests,
5640 * see the comment in make_all_cpus_request.
5644 local_irq_disable();
5646 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5647 || need_resched() || signal_pending(current)) {
5648 vcpu->mode = OUTSIDE_GUEST_MODE;
5652 kvm_x86_ops->cancel_injection(vcpu);
5657 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5661 if (unlikely(vcpu->arch.switch_db_regs)) {
5663 set_debugreg(vcpu->arch.eff_db[0], 0);
5664 set_debugreg(vcpu->arch.eff_db[1], 1);
5665 set_debugreg(vcpu->arch.eff_db[2], 2);
5666 set_debugreg(vcpu->arch.eff_db[3], 3);
5669 trace_kvm_entry(vcpu->vcpu_id);
5670 kvm_x86_ops->run(vcpu);
5673 * If the guest has used debug registers, at least dr7
5674 * will be disabled while returning to the host.
5675 * If we don't have active breakpoints in the host, we don't
5676 * care about the messed up debug address registers. But if
5677 * we have some of them active, restore the old state.
5679 if (hw_breakpoint_active())
5680 hw_breakpoint_restore();
5682 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5684 vcpu->mode = OUTSIDE_GUEST_MODE;
5691 * We must have an instruction between local_irq_enable() and
5692 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5693 * the interrupt shadow. The stat.exits increment will do nicely.
5694 * But we need to prevent reordering, hence this barrier():
5702 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5705 * Profile KVM exit RIPs:
5707 if (unlikely(prof_on == KVM_PROFILING)) {
5708 unsigned long rip = kvm_rip_read(vcpu);
5709 profile_hit(KVM_PROFILING, (void *)rip);
5713 kvm_lapic_sync_from_vapic(vcpu);
5715 r = kvm_x86_ops->handle_exit(vcpu);
5721 static int __vcpu_run(struct kvm_vcpu *vcpu)
5724 struct kvm *kvm = vcpu->kvm;
5726 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5727 pr_debug("vcpu %d received sipi with vector # %x\n",
5728 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5729 kvm_lapic_reset(vcpu);
5730 r = kvm_arch_vcpu_reset(vcpu);
5733 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5736 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5741 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5742 !vcpu->arch.apf.halted)
5743 r = vcpu_enter_guest(vcpu);
5745 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5746 kvm_vcpu_block(vcpu);
5747 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5748 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5750 switch(vcpu->arch.mp_state) {
5751 case KVM_MP_STATE_HALTED:
5752 vcpu->arch.mp_state =
5753 KVM_MP_STATE_RUNNABLE;
5754 case KVM_MP_STATE_RUNNABLE:
5755 vcpu->arch.apf.halted = false;
5757 case KVM_MP_STATE_SIPI_RECEIVED:
5768 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5769 if (kvm_cpu_has_pending_timer(vcpu))
5770 kvm_inject_pending_timer_irqs(vcpu);
5772 if (dm_request_for_irq_injection(vcpu)) {
5774 vcpu->run->exit_reason = KVM_EXIT_INTR;
5775 ++vcpu->stat.request_irq_exits;
5778 kvm_check_async_pf_completion(vcpu);
5780 if (signal_pending(current)) {
5782 vcpu->run->exit_reason = KVM_EXIT_INTR;
5783 ++vcpu->stat.signal_exits;
5785 if (need_resched()) {
5786 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5788 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5792 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5799 static int complete_mmio(struct kvm_vcpu *vcpu)
5801 struct kvm_run *run = vcpu->run;
5804 if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5807 if (vcpu->mmio_needed) {
5808 vcpu->mmio_needed = 0;
5809 if (!vcpu->mmio_is_write)
5810 memcpy(vcpu->mmio_data + vcpu->mmio_index,
5812 vcpu->mmio_index += 8;
5813 if (vcpu->mmio_index < vcpu->mmio_size) {
5814 run->exit_reason = KVM_EXIT_MMIO;
5815 run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5816 memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5817 run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5818 run->mmio.is_write = vcpu->mmio_is_write;
5819 vcpu->mmio_needed = 1;
5822 if (vcpu->mmio_is_write)
5824 vcpu->mmio_read_completed = 1;
5826 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5827 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5828 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5829 if (r != EMULATE_DONE)
5834 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5839 if (!tsk_used_math(current) && init_fpu(current))
5842 if (vcpu->sigset_active)
5843 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5845 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5846 kvm_vcpu_block(vcpu);
5847 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5852 /* re-sync apic's tpr */
5853 if (!irqchip_in_kernel(vcpu->kvm)) {
5854 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5860 r = complete_mmio(vcpu);
5864 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5865 kvm_register_write(vcpu, VCPU_REGS_RAX,
5866 kvm_run->hypercall.ret);
5868 r = __vcpu_run(vcpu);
5871 post_kvm_run_save(vcpu);
5872 if (vcpu->sigset_active)
5873 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5878 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5880 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5882 * We are here if userspace calls get_regs() in the middle of
5883 * instruction emulation. Registers state needs to be copied
5884 * back from emulation context to vcpu. Usrapace shouldn't do
5885 * that usually, but some bad designed PV devices (vmware
5886 * backdoor interface) need this to work
5888 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5889 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5890 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5892 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5893 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5894 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5895 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5896 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5897 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5898 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5899 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5900 #ifdef CONFIG_X86_64
5901 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5902 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5903 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5904 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5905 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5906 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5907 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5908 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5911 regs->rip = kvm_rip_read(vcpu);
5912 regs->rflags = kvm_get_rflags(vcpu);
5917 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5919 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5920 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5922 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5923 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5924 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5925 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5926 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5927 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5928 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5929 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5930 #ifdef CONFIG_X86_64
5931 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5932 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5933 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5934 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5935 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5936 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5937 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5938 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5941 kvm_rip_write(vcpu, regs->rip);
5942 kvm_set_rflags(vcpu, regs->rflags);
5944 vcpu->arch.exception.pending = false;
5946 kvm_make_request(KVM_REQ_EVENT, vcpu);
5951 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5953 struct kvm_segment cs;
5955 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5959 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5961 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5962 struct kvm_sregs *sregs)
5966 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5967 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5968 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5969 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5970 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5971 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5973 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5974 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5976 kvm_x86_ops->get_idt(vcpu, &dt);
5977 sregs->idt.limit = dt.size;
5978 sregs->idt.base = dt.address;
5979 kvm_x86_ops->get_gdt(vcpu, &dt);
5980 sregs->gdt.limit = dt.size;
5981 sregs->gdt.base = dt.address;
5983 sregs->cr0 = kvm_read_cr0(vcpu);
5984 sregs->cr2 = vcpu->arch.cr2;
5985 sregs->cr3 = kvm_read_cr3(vcpu);
5986 sregs->cr4 = kvm_read_cr4(vcpu);
5987 sregs->cr8 = kvm_get_cr8(vcpu);
5988 sregs->efer = vcpu->arch.efer;
5989 sregs->apic_base = kvm_get_apic_base(vcpu);
5991 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5993 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5994 set_bit(vcpu->arch.interrupt.nr,
5995 (unsigned long *)sregs->interrupt_bitmap);
6000 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6001 struct kvm_mp_state *mp_state)
6003 mp_state->mp_state = vcpu->arch.mp_state;
6007 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6008 struct kvm_mp_state *mp_state)
6010 vcpu->arch.mp_state = mp_state->mp_state;
6011 kvm_make_request(KVM_REQ_EVENT, vcpu);
6015 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6016 bool has_error_code, u32 error_code)
6018 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6021 init_emulate_ctxt(vcpu);
6023 ret = emulator_task_switch(ctxt, tss_selector, reason,
6024 has_error_code, error_code);
6027 return EMULATE_FAIL;
6029 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6030 kvm_rip_write(vcpu, ctxt->eip);
6031 kvm_set_rflags(vcpu, ctxt->eflags);
6032 kvm_make_request(KVM_REQ_EVENT, vcpu);
6033 return EMULATE_DONE;
6035 EXPORT_SYMBOL_GPL(kvm_task_switch);
6037 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6038 struct kvm_sregs *sregs)
6040 int mmu_reset_needed = 0;
6041 int pending_vec, max_bits, idx;
6044 dt.size = sregs->idt.limit;
6045 dt.address = sregs->idt.base;
6046 kvm_x86_ops->set_idt(vcpu, &dt);
6047 dt.size = sregs->gdt.limit;
6048 dt.address = sregs->gdt.base;
6049 kvm_x86_ops->set_gdt(vcpu, &dt);
6051 vcpu->arch.cr2 = sregs->cr2;
6052 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6053 vcpu->arch.cr3 = sregs->cr3;
6054 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6056 kvm_set_cr8(vcpu, sregs->cr8);
6058 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6059 kvm_x86_ops->set_efer(vcpu, sregs->efer);
6060 kvm_set_apic_base(vcpu, sregs->apic_base);
6062 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6063 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6064 vcpu->arch.cr0 = sregs->cr0;
6066 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6067 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6068 if (sregs->cr4 & X86_CR4_OSXSAVE)
6071 idx = srcu_read_lock(&vcpu->kvm->srcu);
6072 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6073 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6074 mmu_reset_needed = 1;
6076 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6078 if (mmu_reset_needed)
6079 kvm_mmu_reset_context(vcpu);
6081 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6082 pending_vec = find_first_bit(
6083 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6084 if (pending_vec < max_bits) {
6085 kvm_queue_interrupt(vcpu, pending_vec, false);
6086 pr_debug("Set back pending irq %d\n", pending_vec);
6089 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6090 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6091 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6092 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6093 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6094 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6096 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6097 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6099 update_cr8_intercept(vcpu);
6101 /* Older userspace won't unhalt the vcpu on reset. */
6102 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6103 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6105 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6107 kvm_make_request(KVM_REQ_EVENT, vcpu);
6112 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6113 struct kvm_guest_debug *dbg)
6115 unsigned long rflags;
6118 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6120 if (vcpu->arch.exception.pending)
6122 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6123 kvm_queue_exception(vcpu, DB_VECTOR);
6125 kvm_queue_exception(vcpu, BP_VECTOR);
6129 * Read rflags as long as potentially injected trace flags are still
6132 rflags = kvm_get_rflags(vcpu);
6134 vcpu->guest_debug = dbg->control;
6135 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6136 vcpu->guest_debug = 0;
6138 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6139 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6140 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6141 vcpu->arch.switch_db_regs =
6142 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6144 for (i = 0; i < KVM_NR_DB_REGS; i++)
6145 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6146 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6149 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6150 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6151 get_segment_base(vcpu, VCPU_SREG_CS);
6154 * Trigger an rflags update that will inject or remove the trace
6157 kvm_set_rflags(vcpu, rflags);
6159 kvm_x86_ops->set_guest_debug(vcpu, dbg);
6169 * Translate a guest virtual address to a guest physical address.
6171 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6172 struct kvm_translation *tr)
6174 unsigned long vaddr = tr->linear_address;
6178 idx = srcu_read_lock(&vcpu->kvm->srcu);
6179 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6180 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6181 tr->physical_address = gpa;
6182 tr->valid = gpa != UNMAPPED_GVA;
6189 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6191 struct i387_fxsave_struct *fxsave =
6192 &vcpu->arch.guest_fpu.state->fxsave;
6194 memcpy(fpu->fpr, fxsave->st_space, 128);
6195 fpu->fcw = fxsave->cwd;
6196 fpu->fsw = fxsave->swd;
6197 fpu->ftwx = fxsave->twd;
6198 fpu->last_opcode = fxsave->fop;
6199 fpu->last_ip = fxsave->rip;
6200 fpu->last_dp = fxsave->rdp;
6201 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6206 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6208 struct i387_fxsave_struct *fxsave =
6209 &vcpu->arch.guest_fpu.state->fxsave;
6211 memcpy(fxsave->st_space, fpu->fpr, 128);
6212 fxsave->cwd = fpu->fcw;
6213 fxsave->swd = fpu->fsw;
6214 fxsave->twd = fpu->ftwx;
6215 fxsave->fop = fpu->last_opcode;
6216 fxsave->rip = fpu->last_ip;
6217 fxsave->rdp = fpu->last_dp;
6218 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6223 int fx_init(struct kvm_vcpu *vcpu)
6227 err = fpu_alloc(&vcpu->arch.guest_fpu);
6231 fpu_finit(&vcpu->arch.guest_fpu);
6234 * Ensure guest xcr0 is valid for loading
6236 vcpu->arch.xcr0 = XSTATE_FP;
6238 vcpu->arch.cr0 |= X86_CR0_ET;
6242 EXPORT_SYMBOL_GPL(fx_init);
6244 static void fx_free(struct kvm_vcpu *vcpu)
6246 fpu_free(&vcpu->arch.guest_fpu);
6249 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6251 if (vcpu->guest_fpu_loaded)
6255 * Restore all possible states in the guest,
6256 * and assume host would use all available bits.
6257 * Guest xcr0 would be loaded later.
6259 kvm_put_guest_xcr0(vcpu);
6260 vcpu->guest_fpu_loaded = 1;
6261 unlazy_fpu(current);
6262 fpu_restore_checking(&vcpu->arch.guest_fpu);
6266 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6268 kvm_put_guest_xcr0(vcpu);
6270 if (!vcpu->guest_fpu_loaded)
6273 vcpu->guest_fpu_loaded = 0;
6274 fpu_save_init(&vcpu->arch.guest_fpu);
6275 ++vcpu->stat.fpu_reload;
6276 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6280 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6282 kvmclock_reset(vcpu);
6284 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6286 kvm_x86_ops->vcpu_free(vcpu);
6289 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6292 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6293 printk_once(KERN_WARNING
6294 "kvm: SMP vm created on host with unstable TSC; "
6295 "guest TSC will not be reliable\n");
6296 return kvm_x86_ops->vcpu_create(kvm, id);
6299 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6303 vcpu->arch.mtrr_state.have_fixed = 1;
6305 r = kvm_arch_vcpu_reset(vcpu);
6307 r = kvm_mmu_setup(vcpu);
6313 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6315 vcpu->arch.apf.msr_val = 0;
6318 kvm_mmu_unload(vcpu);
6322 kvm_x86_ops->vcpu_free(vcpu);
6325 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6327 vcpu->arch.nmi_pending = false;
6328 vcpu->arch.nmi_injected = false;
6330 vcpu->arch.switch_db_regs = 0;
6331 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6332 vcpu->arch.dr6 = DR6_FIXED_1;
6333 vcpu->arch.dr7 = DR7_FIXED_1;
6335 kvm_make_request(KVM_REQ_EVENT, vcpu);
6336 vcpu->arch.apf.msr_val = 0;
6337 vcpu->arch.st.msr_val = 0;
6339 kvmclock_reset(vcpu);
6341 kvm_clear_async_pf_completion_queue(vcpu);
6342 kvm_async_pf_hash_reset(vcpu);
6343 vcpu->arch.apf.halted = false;
6345 return kvm_x86_ops->vcpu_reset(vcpu);
6348 int kvm_arch_hardware_enable(void *garbage)
6351 struct kvm_vcpu *vcpu;
6354 kvm_shared_msr_cpu_online();
6355 list_for_each_entry(kvm, &vm_list, vm_list)
6356 kvm_for_each_vcpu(i, vcpu, kvm)
6357 if (vcpu->cpu == smp_processor_id())
6358 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6359 return kvm_x86_ops->hardware_enable(garbage);
6362 void kvm_arch_hardware_disable(void *garbage)
6364 kvm_x86_ops->hardware_disable(garbage);
6365 drop_user_return_notifiers(garbage);
6368 int kvm_arch_hardware_setup(void)
6370 return kvm_x86_ops->hardware_setup();
6373 void kvm_arch_hardware_unsetup(void)
6375 kvm_x86_ops->hardware_unsetup();
6378 void kvm_arch_check_processor_compat(void *rtn)
6380 kvm_x86_ops->check_processor_compatibility(rtn);
6383 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6389 BUG_ON(vcpu->kvm == NULL);
6392 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6393 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6394 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6395 vcpu->arch.mmu.translate_gpa = translate_gpa;
6396 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6397 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6398 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6400 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6402 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6407 vcpu->arch.pio_data = page_address(page);
6409 kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6411 r = kvm_mmu_create(vcpu);
6413 goto fail_free_pio_data;
6415 if (irqchip_in_kernel(kvm)) {
6416 r = kvm_create_lapic(vcpu);
6418 goto fail_mmu_destroy;
6421 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6423 if (!vcpu->arch.mce_banks) {
6425 goto fail_free_lapic;
6427 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6429 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6430 goto fail_free_mce_banks;
6432 kvm_async_pf_hash_reset(vcpu);
6435 fail_free_mce_banks:
6436 kfree(vcpu->arch.mce_banks);
6438 kvm_free_lapic(vcpu);
6440 kvm_mmu_destroy(vcpu);
6442 free_page((unsigned long)vcpu->arch.pio_data);
6447 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6451 kfree(vcpu->arch.mce_banks);
6452 kvm_free_lapic(vcpu);
6453 idx = srcu_read_lock(&vcpu->kvm->srcu);
6454 kvm_mmu_destroy(vcpu);
6455 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6456 free_page((unsigned long)vcpu->arch.pio_data);
6459 int kvm_arch_init_vm(struct kvm *kvm)
6461 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6462 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6464 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6465 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6467 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6472 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6475 kvm_mmu_unload(vcpu);
6479 static void kvm_free_vcpus(struct kvm *kvm)
6482 struct kvm_vcpu *vcpu;
6485 * Unpin any mmu pages first.
6487 kvm_for_each_vcpu(i, vcpu, kvm) {
6488 kvm_clear_async_pf_completion_queue(vcpu);
6489 kvm_unload_vcpu_mmu(vcpu);
6491 kvm_for_each_vcpu(i, vcpu, kvm)
6492 kvm_arch_vcpu_free(vcpu);
6494 mutex_lock(&kvm->lock);
6495 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6496 kvm->vcpus[i] = NULL;
6498 atomic_set(&kvm->online_vcpus, 0);
6499 mutex_unlock(&kvm->lock);
6502 void kvm_arch_sync_events(struct kvm *kvm)
6504 kvm_free_all_assigned_devices(kvm);
6508 void kvm_arch_destroy_vm(struct kvm *kvm)
6510 kvm_iommu_unmap_guest(kvm);
6511 kfree(kvm->arch.vpic);
6512 kfree(kvm->arch.vioapic);
6513 kvm_free_vcpus(kvm);
6514 if (kvm->arch.apic_access_page)
6515 put_page(kvm->arch.apic_access_page);
6516 if (kvm->arch.ept_identity_pagetable)
6517 put_page(kvm->arch.ept_identity_pagetable);
6520 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6521 struct kvm_memory_slot *memslot,
6522 struct kvm_memory_slot old,
6523 struct kvm_userspace_memory_region *mem,
6526 int npages = memslot->npages;
6527 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6529 /* Prevent internal slot pages from being moved by fork()/COW. */
6530 if (memslot->id >= KVM_MEMORY_SLOTS)
6531 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6533 /*To keep backward compatibility with older userspace,
6534 *x86 needs to hanlde !user_alloc case.
6537 if (npages && !old.rmap) {
6538 unsigned long userspace_addr;
6540 down_write(¤t->mm->mmap_sem);
6541 userspace_addr = do_mmap(NULL, 0,
6543 PROT_READ | PROT_WRITE,
6546 up_write(¤t->mm->mmap_sem);
6548 if (IS_ERR((void *)userspace_addr))
6549 return PTR_ERR((void *)userspace_addr);
6551 memslot->userspace_addr = userspace_addr;
6559 void kvm_arch_commit_memory_region(struct kvm *kvm,
6560 struct kvm_userspace_memory_region *mem,
6561 struct kvm_memory_slot old,
6565 int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6567 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6570 down_write(¤t->mm->mmap_sem);
6571 ret = do_munmap(current->mm, old.userspace_addr,
6572 old.npages * PAGE_SIZE);
6573 up_write(¤t->mm->mmap_sem);
6576 "kvm_vm_ioctl_set_memory_region: "
6577 "failed to munmap memory\n");
6580 if (!kvm->arch.n_requested_mmu_pages)
6581 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6583 spin_lock(&kvm->mmu_lock);
6585 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6586 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6587 spin_unlock(&kvm->mmu_lock);
6590 void kvm_arch_flush_shadow(struct kvm *kvm)
6592 kvm_mmu_zap_all(kvm);
6593 kvm_reload_remote_mmus(kvm);
6596 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6598 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6599 !vcpu->arch.apf.halted)
6600 || !list_empty_careful(&vcpu->async_pf.done)
6601 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6602 || vcpu->arch.nmi_pending ||
6603 (kvm_arch_interrupt_allowed(vcpu) &&
6604 kvm_cpu_has_interrupt(vcpu));
6607 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6610 int cpu = vcpu->cpu;
6612 if (waitqueue_active(&vcpu->wq)) {
6613 wake_up_interruptible(&vcpu->wq);
6614 ++vcpu->stat.halt_wakeup;
6618 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6619 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6620 smp_send_reschedule(cpu);
6624 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6626 return kvm_x86_ops->interrupt_allowed(vcpu);
6629 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6631 unsigned long current_rip = kvm_rip_read(vcpu) +
6632 get_segment_base(vcpu, VCPU_SREG_CS);
6634 return current_rip == linear_rip;
6636 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6638 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6640 unsigned long rflags;
6642 rflags = kvm_x86_ops->get_rflags(vcpu);
6643 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6644 rflags &= ~X86_EFLAGS_TF;
6647 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6649 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6651 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6652 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6653 rflags |= X86_EFLAGS_TF;
6654 kvm_x86_ops->set_rflags(vcpu, rflags);
6655 kvm_make_request(KVM_REQ_EVENT, vcpu);
6657 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6659 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6663 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6664 is_error_page(work->page))
6667 r = kvm_mmu_reload(vcpu);
6671 if (!vcpu->arch.mmu.direct_map &&
6672 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6675 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6678 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6680 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6683 static inline u32 kvm_async_pf_next_probe(u32 key)
6685 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6688 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6690 u32 key = kvm_async_pf_hash_fn(gfn);
6692 while (vcpu->arch.apf.gfns[key] != ~0)
6693 key = kvm_async_pf_next_probe(key);
6695 vcpu->arch.apf.gfns[key] = gfn;
6698 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6701 u32 key = kvm_async_pf_hash_fn(gfn);
6703 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6704 (vcpu->arch.apf.gfns[key] != gfn &&
6705 vcpu->arch.apf.gfns[key] != ~0); i++)
6706 key = kvm_async_pf_next_probe(key);
6711 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6713 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6716 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6720 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6722 vcpu->arch.apf.gfns[i] = ~0;
6724 j = kvm_async_pf_next_probe(j);
6725 if (vcpu->arch.apf.gfns[j] == ~0)
6727 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6729 * k lies cyclically in ]i,j]
6731 * |....j i.k.| or |.k..j i...|
6733 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6734 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6739 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6742 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6746 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6747 struct kvm_async_pf *work)
6749 struct x86_exception fault;
6751 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6752 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6754 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6755 (vcpu->arch.apf.send_user_only &&
6756 kvm_x86_ops->get_cpl(vcpu) == 0))
6757 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6758 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6759 fault.vector = PF_VECTOR;
6760 fault.error_code_valid = true;
6761 fault.error_code = 0;
6762 fault.nested_page_fault = false;
6763 fault.address = work->arch.token;
6764 kvm_inject_page_fault(vcpu, &fault);
6768 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6769 struct kvm_async_pf *work)
6771 struct x86_exception fault;
6773 trace_kvm_async_pf_ready(work->arch.token, work->gva);
6774 if (is_error_page(work->page))
6775 work->arch.token = ~0; /* broadcast wakeup */
6777 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6779 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6780 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6781 fault.vector = PF_VECTOR;
6782 fault.error_code_valid = true;
6783 fault.error_code = 0;
6784 fault.nested_page_fault = false;
6785 fault.address = work->arch.token;
6786 kvm_inject_page_fault(vcpu, &fault);
6788 vcpu->arch.apf.halted = false;
6791 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6793 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6796 return !kvm_event_needs_reinjection(vcpu) &&
6797 kvm_x86_ops->interrupt_allowed(vcpu);
6800 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6801 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6802 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6803 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6804 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6805 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6806 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6807 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6808 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6809 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6810 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6811 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);