arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly vector_hashing = true;
 127 module_param(vector_hashing, bool, S_IRUGO);
 128
 129 static bool __read_mostly backwards_tsc_observed = false;
 130
 131 #define KVM_NR_SHARED_MSRS 16
 132
 133 struct kvm_shared_msrs_global {
 134         int nr;
 135         u32 msrs[KVM_NR_SHARED_MSRS];
 136 };
 137
 138 struct kvm_shared_msrs {
 139         struct user_return_notifier urn;
 140         bool registered;
 141         struct kvm_shared_msr_values {
 142                 u64 host;
 143                 u64 curr;
 144         } values[KVM_NR_SHARED_MSRS];
 145 };
 146
 147 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 148 static struct kvm_shared_msrs __percpu *shared_msrs;
 149
 150 struct kvm_stats_debugfs_item debugfs_entries[] = {
 151         { "pf_fixed", VCPU_STAT(pf_fixed) },
 152         { "pf_guest", VCPU_STAT(pf_guest) },
 153         { "tlb_flush", VCPU_STAT(tlb_flush) },
 154         { "invlpg", VCPU_STAT(invlpg) },
 155         { "exits", VCPU_STAT(exits) },
 156         { "io_exits", VCPU_STAT(io_exits) },
 157         { "mmio_exits", VCPU_STAT(mmio_exits) },
 158         { "signal_exits", VCPU_STAT(signal_exits) },
 159         { "irq_window", VCPU_STAT(irq_window_exits) },
 160         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 161         { "halt_exits", VCPU_STAT(halt_exits) },
 162         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 163         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 164         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 165         { "hypercalls", VCPU_STAT(hypercalls) },
 166         { "request_irq", VCPU_STAT(request_irq_exits) },
 167         { "irq_exits", VCPU_STAT(irq_exits) },
 168         { "host_state_reload", VCPU_STAT(host_state_reload) },
 169         { "efer_reload", VCPU_STAT(efer_reload) },
 170         { "fpu_reload", VCPU_STAT(fpu_reload) },
 171         { "insn_emulation", VCPU_STAT(insn_emulation) },
 172         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 173         { "irq_injections", VCPU_STAT(irq_injections) },
 174         { "nmi_injections", VCPU_STAT(nmi_injections) },
 175         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 176         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 177         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 178         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 179         { "mmu_flooded", VM_STAT(mmu_flooded) },
 180         { "mmu_recycled", VM_STAT(mmu_recycled) },
 181         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 182         { "mmu_unsync", VM_STAT(mmu_unsync) },
 183         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 184         { "largepages", VM_STAT(lpages) },
 185         { NULL }
 186 };
 187
 188 u64 __read_mostly host_xcr0;
 189
 190 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 191
 192 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 193 {
 194         int i;
 195         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 196                 vcpu->arch.apf.gfns[i] = ~0;
 197 }
 198
 199 static void kvm_on_user_return(struct user_return_notifier *urn)
 200 {
 201         unsigned slot;
 202         struct kvm_shared_msrs *locals
 203                 = container_of(urn, struct kvm_shared_msrs, urn);
 204         struct kvm_shared_msr_values *values;
 205
 206         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 207                 values = &locals->values[slot];
 208                 if (values->host != values->curr) {
 209                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 210                         values->curr = values->host;
 211                 }
 212         }
 213         locals->registered = false;
 214         user_return_notifier_unregister(urn);
 215 }
 216
 217 static void shared_msr_update(unsigned slot, u32 msr)
 218 {
 219         u64 value;
 220         unsigned int cpu = smp_processor_id();
 221         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 222
 223         /* only read, and nobody should modify it at this time,
 224          * so don't need lock */
 225         if (slot >= shared_msrs_global.nr) {
 226                 printk(KERN_ERR "kvm: invalid MSR slot!");
 227                 return;
 228         }
 229         rdmsrl_safe(msr, &value);
 230         smsr->values[slot].host = value;
 231         smsr->values[slot].curr = value;
 232 }
 233
 234 void kvm_define_shared_msr(unsigned slot, u32 msr)
 235 {
 236         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 237         shared_msrs_global.msrs[slot] = msr;
 238         if (slot >= shared_msrs_global.nr)
 239                 shared_msrs_global.nr = slot + 1;
 240 }
 241 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 242
 243 static void kvm_shared_msr_cpu_online(void)
 244 {
 245         unsigned i;
 246
 247         for (i = 0; i < shared_msrs_global.nr; ++i)
 248                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 249 }
 250
 251 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 252 {
 253         unsigned int cpu = smp_processor_id();
 254         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 255         int err;
 256
 257         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 258                 return 0;
 259         smsr->values[slot].curr = value;
 260         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 261         if (err)
 262                 return 1;
 263
 264         if (!smsr->registered) {
 265                 smsr->urn.on_user_return = kvm_on_user_return;
 266                 user_return_notifier_register(&smsr->urn);
 267                 smsr->registered = true;
 268         }
 269         return 0;
 270 }
 271 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 272
 273 static void drop_user_return_notifiers(void)
 274 {
 275         unsigned int cpu = smp_processor_id();
 276         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 277
 278         if (smsr->registered)
 279                 kvm_on_user_return(&smsr->urn);
 280 }
 281
 282 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 283 {
 284         return vcpu->arch.apic_base;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 287
 288 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 289 {
 290         u64 old_state = vcpu->arch.apic_base &
 291                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 292         u64 new_state = msr_info->data &
 293                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 294         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 295                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 296
 297         if (!msr_info->host_initiated &&
 298             ((msr_info->data & reserved_bits) != 0 ||
 299              new_state == X2APIC_ENABLE ||
 300              (new_state == MSR_IA32_APICBASE_ENABLE &&
 301               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 302              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 303               old_state == 0)))
 304                 return 1;
 305
 306         kvm_lapic_set_base(vcpu, msr_info->data);
 307         return 0;
 308 }
 309 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 310
 311 asmlinkage __visible void kvm_spurious_fault(void)
 312 {
 313         /* Fault while not rebooting.  We want the trace. */
 314         BUG();
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 317
 318 #define EXCPT_BENIGN            0
 319 #define EXCPT_CONTRIBUTORY      1
 320 #define EXCPT_PF                2
 321
 322 static int exception_class(int vector)
 323 {
 324         switch (vector) {
 325         case PF_VECTOR:
 326                 return EXCPT_PF;
 327         case DE_VECTOR:
 328         case TS_VECTOR:
 329         case NP_VECTOR:
 330         case SS_VECTOR:
 331         case GP_VECTOR:
 332                 return EXCPT_CONTRIBUTORY;
 333         default:
 334                 break;
 335         }
 336         return EXCPT_BENIGN;
 337 }
 338
 339 #define EXCPT_FAULT             0
 340 #define EXCPT_TRAP              1
 341 #define EXCPT_ABORT             2
 342 #define EXCPT_INTERRUPT         3
 343
 344 static int exception_type(int vector)
 345 {
 346         unsigned int mask;
 347
 348         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 349                 return EXCPT_INTERRUPT;
 350
 351         mask = 1 << vector;
 352
 353         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 354         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 355                 return EXCPT_TRAP;
 356
 357         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 358                 return EXCPT_ABORT;
 359
 360         /* Reserved exceptions will result in fault */
 361         return EXCPT_FAULT;
 362 }
 363
 364 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 365                 unsigned nr, bool has_error, u32 error_code,
 366                 bool reinject)
 367 {
 368         u32 prev_nr;
 369         int class1, class2;
 370
 371         kvm_make_request(KVM_REQ_EVENT, vcpu);
 372
 373         if (!vcpu->arch.exception.pending) {
 374         queue:
 375                 if (has_error && !is_protmode(vcpu))
 376                         has_error = false;
 377                 vcpu->arch.exception.pending = true;
 378                 vcpu->arch.exception.has_error_code = has_error;
 379                 vcpu->arch.exception.nr = nr;
 380                 vcpu->arch.exception.error_code = error_code;
 381                 vcpu->arch.exception.reinject = reinject;
 382                 return;
 383         }
 384
 385         /* to check exception */
 386         prev_nr = vcpu->arch.exception.nr;
 387         if (prev_nr == DF_VECTOR) {
 388                 /* triple fault -> shutdown */
 389                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 390                 return;
 391         }
 392         class1 = exception_class(prev_nr);
 393         class2 = exception_class(nr);
 394         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 395                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 396                 /* generate double fault per SDM Table 5-5 */
 397                 vcpu->arch.exception.pending = true;
 398                 vcpu->arch.exception.has_error_code = true;
 399                 vcpu->arch.exception.nr = DF_VECTOR;
 400                 vcpu->arch.exception.error_code = 0;
 401         } else
 402                 /* replace previous exception with a new one in a hope
 403                    that instruction re-execution will regenerate lost
 404                    exception */
 405                 goto queue;
 406 }
 407
 408 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 409 {
 410         kvm_multiple_exception(vcpu, nr, false, 0, false);
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 413
 414 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 415 {
 416         kvm_multiple_exception(vcpu, nr, false, 0, true);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 419
 420 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 421 {
 422         if (err)
 423                 kvm_inject_gp(vcpu, 0);
 424         else
 425                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 428
 429 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 430 {
 431         ++vcpu->stat.pf_guest;
 432         vcpu->arch.cr2 = fault->address;
 433         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 434 }
 435 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 436
 437 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 438 {
 439         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 440                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 441         else
 442                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 443
 444         return fault->nested_page_fault;
 445 }
 446
 447 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 448 {
 449         atomic_inc(&vcpu->arch.nmi_queued);
 450         kvm_make_request(KVM_REQ_NMI, vcpu);
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 453
 454 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 455 {
 456         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 459
 460 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 461 {
 462         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 465
 466 /*
 467  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 468  * a #GP and return false.
 469  */
 470 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 471 {
 472         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 473                 return true;
 474         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 475         return false;
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 478
 479 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 480 {
 481         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 482                 return true;
 483
 484         kvm_queue_exception(vcpu, UD_VECTOR);
 485         return false;
 486 }
 487 EXPORT_SYMBOL_GPL(kvm_require_dr);
 488
 489 /*
 490  * This function will be used to read from the physical memory of the currently
 491  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 492  * can read from guest physical or from the guest's guest physical memory.
 493  */
 494 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 495                             gfn_t ngfn, void *data, int offset, int len,
 496                             u32 access)
 497 {
 498         struct x86_exception exception;
 499         gfn_t real_gfn;
 500         gpa_t ngpa;
 501
 502         ngpa     = gfn_to_gpa(ngfn);
 503         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 504         if (real_gfn == UNMAPPED_GVA)
 505                 return -EFAULT;
 506
 507         real_gfn = gpa_to_gfn(real_gfn);
 508
 509         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 510 }
 511 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 512
 513 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 514                                void *data, int offset, int len, u32 access)
 515 {
 516         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 517                                        data, offset, len, access);
 518 }
 519
 520 /*
 521  * Load the pae pdptrs.  Return true is they are all valid.
 522  */
 523 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 524 {
 525         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 526         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 527         int i;
 528         int ret;
 529         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 530
 531         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 532                                       offset * sizeof(u64), sizeof(pdpte),
 533                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 534         if (ret < 0) {
 535                 ret = 0;
 536                 goto out;
 537         }
 538         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 539                 if (is_present_gpte(pdpte[i]) &&
 540                     (pdpte[i] &
 541                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 542                         ret = 0;
 543                         goto out;
 544                 }
 545         }
 546         ret = 1;
 547
 548         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 549         __set_bit(VCPU_EXREG_PDPTR,
 550                   (unsigned long *)&vcpu->arch.regs_avail);
 551         __set_bit(VCPU_EXREG_PDPTR,
 552                   (unsigned long *)&vcpu->arch.regs_dirty);
 553 out:
 554
 555         return ret;
 556 }
 557 EXPORT_SYMBOL_GPL(load_pdptrs);
 558
 559 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 560 {
 561         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 562         bool changed = true;
 563         int offset;
 564         gfn_t gfn;
 565         int r;
 566
 567         if (is_long_mode(vcpu) || !is_pae(vcpu))
 568                 return false;
 569
 570         if (!test_bit(VCPU_EXREG_PDPTR,
 571                       (unsigned long *)&vcpu->arch.regs_avail))
 572                 return true;
 573
 574         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 575         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 576         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 577                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 578         if (r < 0)
 579                 goto out;
 580         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 581 out:
 582
 583         return changed;
 584 }
 585
 586 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 587 {
 588         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 589         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 590
 591         cr0 |= X86_CR0_ET;
 592
 593 #ifdef CONFIG_X86_64
 594         if (cr0 & 0xffffffff00000000UL)
 595                 return 1;
 596 #endif
 597
 598         cr0 &= ~CR0_RESERVED_BITS;
 599
 600         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 601                 return 1;
 602
 603         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 604                 return 1;
 605
 606         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 607 #ifdef CONFIG_X86_64
 608                 if ((vcpu->arch.efer & EFER_LME)) {
 609                         int cs_db, cs_l;
 610
 611                         if (!is_pae(vcpu))
 612                                 return 1;
 613                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 614                         if (cs_l)
 615                                 return 1;
 616                 } else
 617 #endif
 618                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 619                                                  kvm_read_cr3(vcpu)))
 620                         return 1;
 621         }
 622
 623         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 624                 return 1;
 625
 626         kvm_x86_ops->set_cr0(vcpu, cr0);
 627
 628         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 629                 kvm_clear_async_pf_completion_queue(vcpu);
 630                 kvm_async_pf_hash_reset(vcpu);
 631         }
 632
 633         if ((cr0 ^ old_cr0) & update_bits)
 634                 kvm_mmu_reset_context(vcpu);
 635
 636         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 637             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 638             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 639                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 640
 641         return 0;
 642 }
 643 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 644
 645 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 646 {
 647         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 648 }
 649 EXPORT_SYMBOL_GPL(kvm_lmsw);
 650
 651 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 652 {
 653         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 654                         !vcpu->guest_xcr0_loaded) {
 655                 /* kvm_set_xcr() also depends on this */
 656                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 657                 vcpu->guest_xcr0_loaded = 1;
 658         }
 659 }
 660
 661 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 662 {
 663         if (vcpu->guest_xcr0_loaded) {
 664                 if (vcpu->arch.xcr0 != host_xcr0)
 665                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 666                 vcpu->guest_xcr0_loaded = 0;
 667         }
 668 }
 669
 670 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 671 {
 672         u64 xcr0 = xcr;
 673         u64 old_xcr0 = vcpu->arch.xcr0;
 674         u64 valid_bits;
 675
 676         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 677         if (index != XCR_XFEATURE_ENABLED_MASK)
 678                 return 1;
 679         if (!(xcr0 & XFEATURE_MASK_FP))
 680                 return 1;
 681         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 682                 return 1;
 683
 684         /*
 685          * Do not allow the guest to set bits that we do not support
 686          * saving.  However, xcr0 bit 0 is always set, even if the
 687          * emulated CPU does not support XSAVE (see fx_init).
 688          */
 689         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 690         if (xcr0 & ~valid_bits)
 691                 return 1;
 692
 693         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 694             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 695                 return 1;
 696
 697         if (xcr0 & XFEATURE_MASK_AVX512) {
 698                 if (!(xcr0 & XFEATURE_MASK_YMM))
 699                         return 1;
 700                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 701                         return 1;
 702         }
 703         vcpu->arch.xcr0 = xcr0;
 704
 705         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 706                 kvm_update_cpuid(vcpu);
 707         return 0;
 708 }
 709
 710 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 711 {
 712         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 713             __kvm_set_xcr(vcpu, index, xcr)) {
 714                 kvm_inject_gp(vcpu, 0);
 715                 return 1;
 716         }
 717         return 0;
 718 }
 719 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 720
 721 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 722 {
 723         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 724         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 725                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 726
 727         if (cr4 & CR4_RESERVED_BITS)
 728                 return 1;
 729
 730         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 731                 return 1;
 732
 733         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 734                 return 1;
 735
 736         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 737                 return 1;
 738
 739         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 740                 return 1;
 741
 742         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 743                 return 1;
 744
 745         if (is_long_mode(vcpu)) {
 746                 if (!(cr4 & X86_CR4_PAE))
 747                         return 1;
 748         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 749                    && ((cr4 ^ old_cr4) & pdptr_bits)
 750                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 751                                    kvm_read_cr3(vcpu)))
 752                 return 1;
 753
 754         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 755                 if (!guest_cpuid_has_pcid(vcpu))
 756                         return 1;
 757
 758                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 759                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 760                         return 1;
 761         }
 762
 763         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 764                 return 1;
 765
 766         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 767             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 768                 kvm_mmu_reset_context(vcpu);
 769
 770         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 771                 kvm_update_cpuid(vcpu);
 772
 773         return 0;
 774 }
 775 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 776
 777 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 778 {
 779 #ifdef CONFIG_X86_64
 780         cr3 &= ~CR3_PCID_INVD;
 781 #endif
 782
 783         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 784                 kvm_mmu_sync_roots(vcpu);
 785                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 786                 return 0;
 787         }
 788
 789         if (is_long_mode(vcpu)) {
 790                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 791                         return 1;
 792         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 793                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 794                 return 1;
 795
 796         vcpu->arch.cr3 = cr3;
 797         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 798         kvm_mmu_new_cr3(vcpu);
 799         return 0;
 800 }
 801 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 802
 803 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 804 {
 805         if (cr8 & CR8_RESERVED_BITS)
 806                 return 1;
 807         if (lapic_in_kernel(vcpu))
 808                 kvm_lapic_set_tpr(vcpu, cr8);
 809         else
 810                 vcpu->arch.cr8 = cr8;
 811         return 0;
 812 }
 813 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 814
 815 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 816 {
 817         if (lapic_in_kernel(vcpu))
 818                 return kvm_lapic_get_cr8(vcpu);
 819         else
 820                 return vcpu->arch.cr8;
 821 }
 822 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 823
 824 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 825 {
 826         int i;
 827
 828         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 829                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 830                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 831                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 832         }
 833 }
 834
 835 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 836 {
 837         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 838                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 839 }
 840
 841 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 842 {
 843         unsigned long dr7;
 844
 845         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 846                 dr7 = vcpu->arch.guest_debug_dr7;
 847         else
 848                 dr7 = vcpu->arch.dr7;
 849         kvm_x86_ops->set_dr7(vcpu, dr7);
 850         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 851         if (dr7 & DR7_BP_EN_MASK)
 852                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 853 }
 854
 855 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 856 {
 857         u64 fixed = DR6_FIXED_1;
 858
 859         if (!guest_cpuid_has_rtm(vcpu))
 860                 fixed |= DR6_RTM;
 861         return fixed;
 862 }
 863
 864 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 865 {
 866         switch (dr) {
 867         case 0 ... 3:
 868                 vcpu->arch.db[dr] = val;
 869                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 870                         vcpu->arch.eff_db[dr] = val;
 871                 break;
 872         case 4:
 873                 /* fall through */
 874         case 6:
 875                 if (val & 0xffffffff00000000ULL)
 876                         return -1; /* #GP */
 877                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 878                 kvm_update_dr6(vcpu);
 879                 break;
 880         case 5:
 881                 /* fall through */
 882         default: /* 7 */
 883                 if (val & 0xffffffff00000000ULL)
 884                         return -1; /* #GP */
 885                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 886                 kvm_update_dr7(vcpu);
 887                 break;
 888         }
 889
 890         return 0;
 891 }
 892
 893 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 894 {
 895         if (__kvm_set_dr(vcpu, dr, val)) {
 896                 kvm_inject_gp(vcpu, 0);
 897                 return 1;
 898         }
 899         return 0;
 900 }
 901 EXPORT_SYMBOL_GPL(kvm_set_dr);
 902
 903 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 904 {
 905         switch (dr) {
 906         case 0 ... 3:
 907                 *val = vcpu->arch.db[dr];
 908                 break;
 909         case 4:
 910                 /* fall through */
 911         case 6:
 912                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 913                         *val = vcpu->arch.dr6;
 914                 else
 915                         *val = kvm_x86_ops->get_dr6(vcpu);
 916                 break;
 917         case 5:
 918                 /* fall through */
 919         default: /* 7 */
 920                 *val = vcpu->arch.dr7;
 921                 break;
 922         }
 923         return 0;
 924 }
 925 EXPORT_SYMBOL_GPL(kvm_get_dr);
 926
 927 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 928 {
 929         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 930         u64 data;
 931         int err;
 932
 933         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 934         if (err)
 935                 return err;
 936         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 937         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 938         return err;
 939 }
 940 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 941
 942 /*
 943  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 944  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 945  *
 946  * This list is modified at module load time to reflect the
 947  * capabilities of the host cpu. This capabilities test skips MSRs that are
 948  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 949  * may depend on host virtualization features rather than host cpu features.
 950  */
 951
 952 static u32 msrs_to_save[] = {
 953         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 954         MSR_STAR,
 955 #ifdef CONFIG_X86_64
 956         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 957 #endif
 958         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 959         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 960 };
 961
 962 static unsigned num_msrs_to_save;
 963
 964 static u32 emulated_msrs[] = {
 965         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 966         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 967         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 968         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 969         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 970         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 971         HV_X64_MSR_RESET,
 972         HV_X64_MSR_VP_INDEX,
 973         HV_X64_MSR_VP_RUNTIME,
 974         HV_X64_MSR_SCONTROL,
 975         HV_X64_MSR_STIMER0_CONFIG,
 976         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 977         MSR_KVM_PV_EOI_EN,
 978
 979         MSR_IA32_TSC_ADJUST,
 980         MSR_IA32_TSCDEADLINE,
 981         MSR_IA32_MISC_ENABLE,
 982         MSR_IA32_MCG_STATUS,
 983         MSR_IA32_MCG_CTL,
 984         MSR_IA32_SMBASE,
 985 };
 986
 987 static unsigned num_emulated_msrs;
 988
 989 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 990 {
 991         if (efer & efer_reserved_bits)
 992                 return false;
 993
 994         if (efer & EFER_FFXSR) {
 995                 struct kvm_cpuid_entry2 *feat;
 996
 997                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 998                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 999                         return false;
1000         }
1001
1002         if (efer & EFER_SVME) {
1003                 struct kvm_cpuid_entry2 *feat;
1004
1005                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1006                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1007                         return false;
1008         }
1009
1010         return true;
1011 }
1012 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1013
1014 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1015 {
1016         u64 old_efer = vcpu->arch.efer;
1017
1018         if (!kvm_valid_efer(vcpu, efer))
1019                 return 1;
1020
1021         if (is_paging(vcpu)
1022             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1023                 return 1;
1024
1025         efer &= ~EFER_LMA;
1026         efer |= vcpu->arch.efer & EFER_LMA;
1027
1028         kvm_x86_ops->set_efer(vcpu, efer);
1029
1030         /* Update reserved bits */
1031         if ((efer ^ old_efer) & EFER_NX)
1032                 kvm_mmu_reset_context(vcpu);
1033
1034         return 0;
1035 }
1036
1037 void kvm_enable_efer_bits(u64 mask)
1038 {
1039        efer_reserved_bits &= ~mask;
1040 }
1041 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1042
1043 /*
1044  * Writes msr value into into the appropriate "register".
1045  * Returns 0 on success, non-0 otherwise.
1046  * Assumes vcpu_load() was already called.
1047  */
1048 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1049 {
1050         switch (msr->index) {
1051         case MSR_FS_BASE:
1052         case MSR_GS_BASE:
1053         case MSR_KERNEL_GS_BASE:
1054         case MSR_CSTAR:
1055         case MSR_LSTAR:
1056                 if (is_noncanonical_address(msr->data))
1057                         return 1;
1058                 break;
1059         case MSR_IA32_SYSENTER_EIP:
1060         case MSR_IA32_SYSENTER_ESP:
1061                 /*
1062                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1063                  * non-canonical address is written on Intel but not on
1064                  * AMD (which ignores the top 32-bits, because it does
1065                  * not implement 64-bit SYSENTER).
1066                  *
1067                  * 64-bit code should hence be able to write a non-canonical
1068                  * value on AMD.  Making the address canonical ensures that
1069                  * vmentry does not fail on Intel after writing a non-canonical
1070                  * value, and that something deterministic happens if the guest
1071                  * invokes 64-bit SYSENTER.
1072                  */
1073                 msr->data = get_canonical(msr->data);
1074         }
1075         return kvm_x86_ops->set_msr(vcpu, msr);
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_set_msr);
1078
1079 /*
1080  * Adapt set_msr() to msr_io()'s calling convention
1081  */
1082 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1083 {
1084         struct msr_data msr;
1085         int r;
1086
1087         msr.index = index;
1088         msr.host_initiated = true;
1089         r = kvm_get_msr(vcpu, &msr);
1090         if (r)
1091                 return r;
1092
1093         *data = msr.data;
1094         return 0;
1095 }
1096
1097 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1098 {
1099         struct msr_data msr;
1100
1101         msr.data = *data;
1102         msr.index = index;
1103         msr.host_initiated = true;
1104         return kvm_set_msr(vcpu, &msr);
1105 }
1106
1107 #ifdef CONFIG_X86_64
1108 struct pvclock_gtod_data {
1109         seqcount_t      seq;
1110
1111         struct { /* extract of a clocksource struct */
1112                 int vclock_mode;
1113                 cycle_t cycle_last;
1114                 cycle_t mask;
1115                 u32     mult;
1116                 u32     shift;
1117         } clock;
1118
1119         u64             boot_ns;
1120         u64             nsec_base;
1121 };
1122
1123 static struct pvclock_gtod_data pvclock_gtod_data;
1124
1125 static void update_pvclock_gtod(struct timekeeper *tk)
1126 {
1127         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1128         u64 boot_ns;
1129
1130         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1131
1132         write_seqcount_begin(&vdata->seq);
1133
1134         /* copy pvclock gtod data */
1135         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1136         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1137         vdata->clock.mask               = tk->tkr_mono.mask;
1138         vdata->clock.mult               = tk->tkr_mono.mult;
1139         vdata->clock.shift              = tk->tkr_mono.shift;
1140
1141         vdata->boot_ns                  = boot_ns;
1142         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1143
1144         write_seqcount_end(&vdata->seq);
1145 }
1146 #endif
1147
1148 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1149 {
1150         /*
1151          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1152          * vcpu_enter_guest.  This function is only called from
1153          * the physical CPU that is running vcpu.
1154          */
1155         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1156 }
1157
1158 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1159 {
1160         int version;
1161         int r;
1162         struct pvclock_wall_clock wc;
1163         struct timespec boot;
1164
1165         if (!wall_clock)
1166                 return;
1167
1168         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1169         if (r)
1170                 return;
1171
1172         if (version & 1)
1173                 ++version;  /* first time write, random junk */
1174
1175         ++version;
1176
1177         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1178                 return;
1179
1180         /*
1181          * The guest calculates current wall clock time by adding
1182          * system time (updated by kvm_guest_time_update below) to the
1183          * wall clock specified here.  guest system time equals host
1184          * system time for us, thus we must fill in host boot time here.
1185          */
1186         getboottime(&boot);
1187
1188         if (kvm->arch.kvmclock_offset) {
1189                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1190                 boot = timespec_sub(boot, ts);
1191         }
1192         wc.sec = boot.tv_sec;
1193         wc.nsec = boot.tv_nsec;
1194         wc.version = version;
1195
1196         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1197
1198         version++;
1199         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1200 }
1201
1202 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1203 {
1204         do_shl32_div32(dividend, divisor);
1205         return dividend;
1206 }
1207
1208 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1209                                s8 *pshift, u32 *pmultiplier)
1210 {
1211         uint64_t scaled64;
1212         int32_t  shift = 0;
1213         uint64_t tps64;
1214         uint32_t tps32;
1215
1216         tps64 = base_hz;
1217         scaled64 = scaled_hz;
1218         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1219                 tps64 >>= 1;
1220                 shift--;
1221         }
1222
1223         tps32 = (uint32_t)tps64;
1224         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1225                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1226                         scaled64 >>= 1;
1227                 else
1228                         tps32 <<= 1;
1229                 shift++;
1230         }
1231
1232         *pshift = shift;
1233         *pmultiplier = div_frac(scaled64, tps32);
1234
1235         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1236                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1237 }
1238
1239 #ifdef CONFIG_X86_64
1240 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1241 #endif
1242
1243 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1244 static unsigned long max_tsc_khz;
1245
1246 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1247 {
1248         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1249                                    vcpu->arch.virtual_tsc_shift);
1250 }
1251
1252 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1253 {
1254         u64 v = (u64)khz * (1000000 + ppm);
1255         do_div(v, 1000000);
1256         return v;
1257 }
1258
1259 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1260 {
1261         u64 ratio;
1262
1263         /* Guest TSC same frequency as host TSC? */
1264         if (!scale) {
1265                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1266                 return 0;
1267         }
1268
1269         /* TSC scaling supported? */
1270         if (!kvm_has_tsc_control) {
1271                 if (user_tsc_khz > tsc_khz) {
1272                         vcpu->arch.tsc_catchup = 1;
1273                         vcpu->arch.tsc_always_catchup = 1;
1274                         return 0;
1275                 } else {
1276                         WARN(1, "user requested TSC rate below hardware speed\n");
1277                         return -1;
1278                 }
1279         }
1280
1281         /* TSC scaling required  - calculate ratio */
1282         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1283                                 user_tsc_khz, tsc_khz);
1284
1285         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1286                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1287                           user_tsc_khz);
1288                 return -1;
1289         }
1290
1291         vcpu->arch.tsc_scaling_ratio = ratio;
1292         return 0;
1293 }
1294
1295 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1296 {
1297         u32 thresh_lo, thresh_hi;
1298         int use_scaling = 0;
1299
1300         /* tsc_khz can be zero if TSC calibration fails */
1301         if (user_tsc_khz == 0) {
1302                 /* set tsc_scaling_ratio to a safe value */
1303                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1304                 return -1;
1305         }
1306
1307         /* Compute a scale to convert nanoseconds in TSC cycles */
1308         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1309                            &vcpu->arch.virtual_tsc_shift,
1310                            &vcpu->arch.virtual_tsc_mult);
1311         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1312
1313         /*
1314          * Compute the variation in TSC rate which is acceptable
1315          * within the range of tolerance and decide if the
1316          * rate being applied is within that bounds of the hardware
1317          * rate.  If so, no scaling or compensation need be done.
1318          */
1319         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1320         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1321         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1322                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1323                 use_scaling = 1;
1324         }
1325         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1326 }
1327
1328 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1329 {
1330         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1331                                       vcpu->arch.virtual_tsc_mult,
1332                                       vcpu->arch.virtual_tsc_shift);
1333         tsc += vcpu->arch.this_tsc_write;
1334         return tsc;
1335 }
1336
1337 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1338 {
1339 #ifdef CONFIG_X86_64
1340         bool vcpus_matched;
1341         struct kvm_arch *ka = &vcpu->kvm->arch;
1342         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1343
1344         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1345                          atomic_read(&vcpu->kvm->online_vcpus));
1346
1347         /*
1348          * Once the masterclock is enabled, always perform request in
1349          * order to update it.
1350          *
1351          * In order to enable masterclock, the host clocksource must be TSC
1352          * and the vcpus need to have matched TSCs.  When that happens,
1353          * perform request to enable masterclock.
1354          */
1355         if (ka->use_master_clock ||
1356             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1357                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1358
1359         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1360                             atomic_read(&vcpu->kvm->online_vcpus),
1361                             ka->use_master_clock, gtod->clock.vclock_mode);
1362 #endif
1363 }
1364
1365 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1366 {
1367         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1368         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1369 }
1370
1371 /*
1372  * Multiply tsc by a fixed point number represented by ratio.
1373  *
1374  * The most significant 64-N bits (mult) of ratio represent the
1375  * integral part of the fixed point number; the remaining N bits
1376  * (frac) represent the fractional part, ie. ratio represents a fixed
1377  * point number (mult + frac * 2^(-N)).
1378  *
1379  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1380  */
1381 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1382 {
1383         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1384 }
1385
1386 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1387 {
1388         u64 _tsc = tsc;
1389         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1390
1391         if (ratio != kvm_default_tsc_scaling_ratio)
1392                 _tsc = __scale_tsc(ratio, tsc);
1393
1394         return _tsc;
1395 }
1396 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1397
1398 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1399 {
1400         u64 tsc;
1401
1402         tsc = kvm_scale_tsc(vcpu, rdtsc());
1403
1404         return target_tsc - tsc;
1405 }
1406
1407 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1408 {
1409         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1410 }
1411 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1412
1413 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1414 {
1415         struct kvm *kvm = vcpu->kvm;
1416         u64 offset, ns, elapsed;
1417         unsigned long flags;
1418         s64 usdiff;
1419         bool matched;
1420         bool already_matched;
1421         u64 data = msr->data;
1422
1423         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1424         offset = kvm_compute_tsc_offset(vcpu, data);
1425         ns = get_kernel_ns();
1426         elapsed = ns - kvm->arch.last_tsc_nsec;
1427
1428         if (vcpu->arch.virtual_tsc_khz) {
1429                 int faulted = 0;
1430
1431                 /* n.b - signed multiplication and division required */
1432                 usdiff = data - kvm->arch.last_tsc_write;
1433 #ifdef CONFIG_X86_64
1434                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1435 #else
1436                 /* do_div() only does unsigned */
1437                 asm("1: idivl %[divisor]\n"
1438                     "2: xor %%edx, %%edx\n"
1439                     "   movl $0, %[faulted]\n"
1440                     "3:\n"
1441                     ".section .fixup,\"ax\"\n"
1442                     "4: movl $1, %[faulted]\n"
1443                     "   jmp  3b\n"
1444                     ".previous\n"
1445
1446                 _ASM_EXTABLE(1b, 4b)
1447
1448                 : "=A"(usdiff), [faulted] "=r" (faulted)
1449                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1450
1451 #endif
1452                 do_div(elapsed, 1000);
1453                 usdiff -= elapsed;
1454                 if (usdiff < 0)
1455                         usdiff = -usdiff;
1456
1457                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1458                 if (faulted)
1459                         usdiff = USEC_PER_SEC;
1460         } else
1461                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1462
1463         /*
1464          * Special case: TSC write with a small delta (1 second) of virtual
1465          * cycle time against real time is interpreted as an attempt to
1466          * synchronize the CPU.
1467          *
1468          * For a reliable TSC, we can match TSC offsets, and for an unstable
1469          * TSC, we add elapsed time in this computation.  We could let the
1470          * compensation code attempt to catch up if we fall behind, but
1471          * it's better to try to match offsets from the beginning.
1472          */
1473         if (usdiff < USEC_PER_SEC &&
1474             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1475                 if (!check_tsc_unstable()) {
1476                         offset = kvm->arch.cur_tsc_offset;
1477                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1478                 } else {
1479                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1480                         data += delta;
1481                         offset = kvm_compute_tsc_offset(vcpu, data);
1482                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1483                 }
1484                 matched = true;
1485                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1486         } else {
1487                 /*
1488                  * We split periods of matched TSC writes into generations.
1489                  * For each generation, we track the original measured
1490                  * nanosecond time, offset, and write, so if TSCs are in
1491                  * sync, we can match exact offset, and if not, we can match
1492                  * exact software computation in compute_guest_tsc()
1493                  *
1494                  * These values are tracked in kvm->arch.cur_xxx variables.
1495                  */
1496                 kvm->arch.cur_tsc_generation++;
1497                 kvm->arch.cur_tsc_nsec = ns;
1498                 kvm->arch.cur_tsc_write = data;
1499                 kvm->arch.cur_tsc_offset = offset;
1500                 matched = false;
1501                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1502                          kvm->arch.cur_tsc_generation, data);
1503         }
1504
1505         /*
1506          * We also track th most recent recorded KHZ, write and time to
1507          * allow the matching interval to be extended at each write.
1508          */
1509         kvm->arch.last_tsc_nsec = ns;
1510         kvm->arch.last_tsc_write = data;
1511         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1512
1513         vcpu->arch.last_guest_tsc = data;
1514
1515         /* Keep track of which generation this VCPU has synchronized to */
1516         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1517         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1518         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1519
1520         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1521                 update_ia32_tsc_adjust_msr(vcpu, offset);
1522         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1523         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1524
1525         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1526         if (!matched) {
1527                 kvm->arch.nr_vcpus_matched_tsc = 0;
1528         } else if (!already_matched) {
1529                 kvm->arch.nr_vcpus_matched_tsc++;
1530         }
1531
1532         kvm_track_tsc_matching(vcpu);
1533         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1534 }
1535
1536 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1537
1538 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1539                                            s64 adjustment)
1540 {
1541         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1542 }
1543
1544 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1545 {
1546         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1547                 WARN_ON(adjustment < 0);
1548         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1549         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1550 }
1551
1552 #ifdef CONFIG_X86_64
1553
1554 static cycle_t read_tsc(void)
1555 {
1556         cycle_t ret = (cycle_t)rdtsc_ordered();
1557         u64 last = pvclock_gtod_data.clock.cycle_last;
1558
1559         if (likely(ret >= last))
1560                 return ret;
1561
1562         /*
1563          * GCC likes to generate cmov here, but this branch is extremely
1564          * predictable (it's just a function of time and the likely is
1565          * very likely) and there's a data dependence, so force GCC
1566          * to generate a branch instead.  I don't barrier() because
1567          * we don't actually need a barrier, and if this function
1568          * ever gets inlined it will generate worse code.
1569          */
1570         asm volatile ("");
1571         return last;
1572 }
1573
1574 static inline u64 vgettsc(cycle_t *cycle_now)
1575 {
1576         long v;
1577         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1578
1579         *cycle_now = read_tsc();
1580
1581         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1582         return v * gtod->clock.mult;
1583 }
1584
1585 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1586 {
1587         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1588         unsigned long seq;
1589         int mode;
1590         u64 ns;
1591
1592         do {
1593                 seq = read_seqcount_begin(&gtod->seq);
1594                 mode = gtod->clock.vclock_mode;
1595                 ns = gtod->nsec_base;
1596                 ns += vgettsc(cycle_now);
1597                 ns >>= gtod->clock.shift;
1598                 ns += gtod->boot_ns;
1599         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1600         *t = ns;
1601
1602         return mode;
1603 }
1604
1605 /* returns true if host is using tsc clocksource */
1606 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1607 {
1608         /* checked again under seqlock below */
1609         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1610                 return false;
1611
1612         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1613 }
1614 #endif
1615
1616 /*
1617  *
1618  * Assuming a stable TSC across physical CPUS, and a stable TSC
1619  * across virtual CPUs, the following condition is possible.
1620  * Each numbered line represents an event visible to both
1621  * CPUs at the next numbered event.
1622  *
1623  * "timespecX" represents host monotonic time. "tscX" represents
1624  * RDTSC value.
1625  *
1626  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1627  *
1628  * 1.  read timespec0,tsc0
1629  * 2.                                   | timespec1 = timespec0 + N
1630  *                                      | tsc1 = tsc0 + M
1631  * 3. transition to guest               | transition to guest
1632  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1633  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1634  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1635  *
1636  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1637  *
1638  *      - ret0 < ret1
1639  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1640  *              ...
1641  *      - 0 < N - M => M < N
1642  *
1643  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1644  * always the case (the difference between two distinct xtime instances
1645  * might be smaller then the difference between corresponding TSC reads,
1646  * when updating guest vcpus pvclock areas).
1647  *
1648  * To avoid that problem, do not allow visibility of distinct
1649  * system_timestamp/tsc_timestamp values simultaneously: use a master
1650  * copy of host monotonic time values. Update that master copy
1651  * in lockstep.
1652  *
1653  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1654  *
1655  */
1656
1657 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1658 {
1659 #ifdef CONFIG_X86_64
1660         struct kvm_arch *ka = &kvm->arch;
1661         int vclock_mode;
1662         bool host_tsc_clocksource, vcpus_matched;
1663
1664         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1665                         atomic_read(&kvm->online_vcpus));
1666
1667         /*
1668          * If the host uses TSC clock, then passthrough TSC as stable
1669          * to the guest.
1670          */
1671         host_tsc_clocksource = kvm_get_time_and_clockread(
1672                                         &ka->master_kernel_ns,
1673                                         &ka->master_cycle_now);
1674
1675         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1676                                 && !backwards_tsc_observed
1677                                 && !ka->boot_vcpu_runs_old_kvmclock;
1678
1679         if (ka->use_master_clock)
1680                 atomic_set(&kvm_guest_has_master_clock, 1);
1681
1682         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1683         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1684                                         vcpus_matched);
1685 #endif
1686 }
1687
1688 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1689 {
1690         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1691 }
1692
1693 static void kvm_gen_update_masterclock(struct kvm *kvm)
1694 {
1695 #ifdef CONFIG_X86_64
1696         int i;
1697         struct kvm_vcpu *vcpu;
1698         struct kvm_arch *ka = &kvm->arch;
1699
1700         spin_lock(&ka->pvclock_gtod_sync_lock);
1701         kvm_make_mclock_inprogress_request(kvm);
1702         /* no guest entries from this point */
1703         pvclock_update_vm_gtod_copy(kvm);
1704
1705         kvm_for_each_vcpu(i, vcpu, kvm)
1706                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1707
1708         /* guest entries allowed */
1709         kvm_for_each_vcpu(i, vcpu, kvm)
1710                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1711
1712         spin_unlock(&ka->pvclock_gtod_sync_lock);
1713 #endif
1714 }
1715
1716 static int kvm_guest_time_update(struct kvm_vcpu *v)
1717 {
1718         unsigned long flags, tgt_tsc_khz;
1719         struct kvm_vcpu_arch *vcpu = &v->arch;
1720         struct kvm_arch *ka = &v->kvm->arch;
1721         s64 kernel_ns;
1722         u64 tsc_timestamp, host_tsc;
1723         struct pvclock_vcpu_time_info guest_hv_clock;
1724         u8 pvclock_flags;
1725         bool use_master_clock;
1726
1727         kernel_ns = 0;
1728         host_tsc = 0;
1729
1730         /*
1731          * If the host uses TSC clock, then passthrough TSC as stable
1732          * to the guest.
1733          */
1734         spin_lock(&ka->pvclock_gtod_sync_lock);
1735         use_master_clock = ka->use_master_clock;
1736         if (use_master_clock) {
1737                 host_tsc = ka->master_cycle_now;
1738                 kernel_ns = ka->master_kernel_ns;
1739         }
1740         spin_unlock(&ka->pvclock_gtod_sync_lock);
1741
1742         /* Keep irq disabled to prevent changes to the clock */
1743         local_irq_save(flags);
1744         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1745         if (unlikely(tgt_tsc_khz == 0)) {
1746                 local_irq_restore(flags);
1747                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1748                 return 1;
1749         }
1750         if (!use_master_clock) {
1751                 host_tsc = rdtsc();
1752                 kernel_ns = get_kernel_ns();
1753         }
1754
1755         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1756
1757         /*
1758          * We may have to catch up the TSC to match elapsed wall clock
1759          * time for two reasons, even if kvmclock is used.
1760          *   1) CPU could have been running below the maximum TSC rate
1761          *   2) Broken TSC compensation resets the base at each VCPU
1762          *      entry to avoid unknown leaps of TSC even when running
1763          *      again on the same CPU.  This may cause apparent elapsed
1764          *      time to disappear, and the guest to stand still or run
1765          *      very slowly.
1766          */
1767         if (vcpu->tsc_catchup) {
1768                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1769                 if (tsc > tsc_timestamp) {
1770                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1771                         tsc_timestamp = tsc;
1772                 }
1773         }
1774
1775         local_irq_restore(flags);
1776
1777         if (!vcpu->pv_time_enabled)
1778                 return 0;
1779
1780         if (kvm_has_tsc_control)
1781                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1782
1783         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1784                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1785                                    &vcpu->hv_clock.tsc_shift,
1786                                    &vcpu->hv_clock.tsc_to_system_mul);
1787                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1788         }
1789
1790         /* With all the info we got, fill in the values */
1791         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1792         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1793         vcpu->last_guest_tsc = tsc_timestamp;
1794
1795         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1796                 &guest_hv_clock, sizeof(guest_hv_clock))))
1797                 return 0;
1798
1799         /* This VCPU is paused, but it's legal for a guest to read another
1800          * VCPU's kvmclock, so we really have to follow the specification where
1801          * it says that version is odd if data is being modified, and even after
1802          * it is consistent.
1803          *
1804          * Version field updates must be kept separate.  This is because
1805          * kvm_write_guest_cached might use a "rep movs" instruction, and
1806          * writes within a string instruction are weakly ordered.  So there
1807          * are three writes overall.
1808          *
1809          * As a small optimization, only write the version field in the first
1810          * and third write.  The vcpu->pv_time cache is still valid, because the
1811          * version field is the first in the struct.
1812          */
1813         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1814
1815         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1816         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1817                                 &vcpu->hv_clock,
1818                                 sizeof(vcpu->hv_clock.version));
1819
1820         smp_wmb();
1821
1822         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1823         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1824
1825         if (vcpu->pvclock_set_guest_stopped_request) {
1826                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1827                 vcpu->pvclock_set_guest_stopped_request = false;
1828         }
1829
1830         /* If the host uses TSC clocksource, then it is stable */
1831         if (use_master_clock)
1832                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1833
1834         vcpu->hv_clock.flags = pvclock_flags;
1835
1836         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1837
1838         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1839                                 &vcpu->hv_clock,
1840                                 sizeof(vcpu->hv_clock));
1841
1842         smp_wmb();
1843
1844         vcpu->hv_clock.version++;
1845         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1846                                 &vcpu->hv_clock,
1847                                 sizeof(vcpu->hv_clock.version));
1848         return 0;
1849 }
1850
1851 /*
1852  * kvmclock updates which are isolated to a given vcpu, such as
1853  * vcpu->cpu migration, should not allow system_timestamp from
1854  * the rest of the vcpus to remain static. Otherwise ntp frequency
1855  * correction applies to one vcpu's system_timestamp but not
1856  * the others.
1857  *
1858  * So in those cases, request a kvmclock update for all vcpus.
1859  * We need to rate-limit these requests though, as they can
1860  * considerably slow guests that have a large number of vcpus.
1861  * The time for a remote vcpu to update its kvmclock is bound
1862  * by the delay we use to rate-limit the updates.
1863  */
1864
1865 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1866
1867 static void kvmclock_update_fn(struct work_struct *work)
1868 {
1869         int i;
1870         struct delayed_work *dwork = to_delayed_work(work);
1871         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1872                                            kvmclock_update_work);
1873         struct kvm *kvm = container_of(ka, struct kvm, arch);
1874         struct kvm_vcpu *vcpu;
1875
1876         kvm_for_each_vcpu(i, vcpu, kvm) {
1877                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1878                 kvm_vcpu_kick(vcpu);
1879         }
1880 }
1881
1882 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1883 {
1884         struct kvm *kvm = v->kvm;
1885
1886         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1887         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1888                                         KVMCLOCK_UPDATE_DELAY);
1889 }
1890
1891 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1892
1893 static void kvmclock_sync_fn(struct work_struct *work)
1894 {
1895         struct delayed_work *dwork = to_delayed_work(work);
1896         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1897                                            kvmclock_sync_work);
1898         struct kvm *kvm = container_of(ka, struct kvm, arch);
1899
1900         if (!kvmclock_periodic_sync)
1901                 return;
1902
1903         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1904         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1905                                         KVMCLOCK_SYNC_PERIOD);
1906 }
1907
1908 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1909 {
1910         u64 mcg_cap = vcpu->arch.mcg_cap;
1911         unsigned bank_num = mcg_cap & 0xff;
1912
1913         switch (msr) {
1914         case MSR_IA32_MCG_STATUS:
1915                 vcpu->arch.mcg_status = data;
1916                 break;
1917         case MSR_IA32_MCG_CTL:
1918                 if (!(mcg_cap & MCG_CTL_P))
1919                         return 1;
1920                 if (data != 0 && data != ~(u64)0)
1921                         return -1;
1922                 vcpu->arch.mcg_ctl = data;
1923                 break;
1924         default:
1925                 if (msr >= MSR_IA32_MC0_CTL &&
1926                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1927                         u32 offset = msr - MSR_IA32_MC0_CTL;
1928                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1929                          * some Linux kernels though clear bit 10 in bank 4 to
1930                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1931                          * this to avoid an uncatched #GP in the guest
1932                          */
1933                         if ((offset & 0x3) == 0 &&
1934                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1935                                 return -1;
1936                         vcpu->arch.mce_banks[offset] = data;
1937                         break;
1938                 }
1939                 return 1;
1940         }
1941         return 0;
1942 }
1943
1944 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1945 {
1946         struct kvm *kvm = vcpu->kvm;
1947         int lm = is_long_mode(vcpu);
1948         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1949                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1950         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1951                 : kvm->arch.xen_hvm_config.blob_size_32;
1952         u32 page_num = data & ~PAGE_MASK;
1953         u64 page_addr = data & PAGE_MASK;
1954         u8 *page;
1955         int r;
1956
1957         r = -E2BIG;
1958         if (page_num >= blob_size)
1959                 goto out;
1960         r = -ENOMEM;
1961         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1962         if (IS_ERR(page)) {
1963                 r = PTR_ERR(page);
1964                 goto out;
1965         }
1966         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1967                 goto out_free;
1968         r = 0;
1969 out_free:
1970         kfree(page);
1971 out:
1972         return r;
1973 }
1974
1975 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1976 {
1977         gpa_t gpa = data & ~0x3f;
1978
1979         /* Bits 2:5 are reserved, Should be zero */
1980         if (data & 0x3c)
1981                 return 1;
1982
1983         vcpu->arch.apf.msr_val = data;
1984
1985         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1986                 kvm_clear_async_pf_completion_queue(vcpu);
1987                 kvm_async_pf_hash_reset(vcpu);
1988                 return 0;
1989         }
1990
1991         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1992                                         sizeof(u32)))
1993                 return 1;
1994
1995         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1996         kvm_async_pf_wakeup_all(vcpu);
1997         return 0;
1998 }
1999
2000 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2001 {
2002         vcpu->arch.pv_time_enabled = false;
2003 }
2004
2005 static void record_steal_time(struct kvm_vcpu *vcpu)
2006 {
2007         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2008                 return;
2009
2010         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2011                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2012                 return;
2013
2014         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2015                 vcpu->arch.st.last_steal;
2016         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2017         vcpu->arch.st.steal.version += 2;
2018
2019         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2020                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2021 }
2022
2023 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2024 {
2025         bool pr = false;
2026         u32 msr = msr_info->index;
2027         u64 data = msr_info->data;
2028
2029         switch (msr) {
2030         case MSR_AMD64_NB_CFG:
2031         case MSR_IA32_UCODE_REV:
2032         case MSR_IA32_UCODE_WRITE:
2033         case MSR_VM_HSAVE_PA:
2034         case MSR_AMD64_PATCH_LOADER:
2035         case MSR_AMD64_BU_CFG2:
2036                 break;
2037
2038         case MSR_EFER:
2039                 return set_efer(vcpu, data);
2040         case MSR_K7_HWCR:
2041                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2042                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2043                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2044                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2045                 if (data != 0) {
2046                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2047                                     data);
2048                         return 1;
2049                 }
2050                 break;
2051         case MSR_FAM10H_MMIO_CONF_BASE:
2052                 if (data != 0) {
2053                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2054                                     "0x%llx\n", data);
2055                         return 1;
2056                 }
2057                 break;
2058         case MSR_IA32_DEBUGCTLMSR:
2059                 if (!data) {
2060                         /* We support the non-activated case already */
2061                         break;
2062                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2063                         /* Values other than LBR and BTF are vendor-specific,
2064                            thus reserved and should throw a #GP */
2065                         return 1;
2066                 }
2067                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2068                             __func__, data);
2069                 break;
2070         case 0x200 ... 0x2ff:
2071                 return kvm_mtrr_set_msr(vcpu, msr, data);
2072         case MSR_IA32_APICBASE:
2073                 return kvm_set_apic_base(vcpu, msr_info);
2074         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2075                 return kvm_x2apic_msr_write(vcpu, msr, data);
2076         case MSR_IA32_TSCDEADLINE:
2077                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2078                 break;
2079         case MSR_IA32_TSC_ADJUST:
2080                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2081                         if (!msr_info->host_initiated) {
2082                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2083                                 adjust_tsc_offset_guest(vcpu, adj);
2084                         }
2085                         vcpu->arch.ia32_tsc_adjust_msr = data;
2086                 }
2087                 break;
2088         case MSR_IA32_MISC_ENABLE:
2089                 vcpu->arch.ia32_misc_enable_msr = data;
2090                 break;
2091         case MSR_IA32_SMBASE:
2092                 if (!msr_info->host_initiated)
2093                         return 1;
2094                 vcpu->arch.smbase = data;
2095                 break;
2096         case MSR_KVM_WALL_CLOCK_NEW:
2097         case MSR_KVM_WALL_CLOCK:
2098                 vcpu->kvm->arch.wall_clock = data;
2099                 kvm_write_wall_clock(vcpu->kvm, data);
2100                 break;
2101         case MSR_KVM_SYSTEM_TIME_NEW:
2102         case MSR_KVM_SYSTEM_TIME: {
2103                 u64 gpa_offset;
2104                 struct kvm_arch *ka = &vcpu->kvm->arch;
2105
2106                 kvmclock_reset(vcpu);
2107
2108                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2109                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2110
2111                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2112                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2113                                         &vcpu->requests);
2114
2115                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2116                 }
2117
2118                 vcpu->arch.time = data;
2119                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2120
2121                 /* we verify if the enable bit is set... */
2122                 if (!(data & 1))
2123                         break;
2124
2125                 gpa_offset = data & ~(PAGE_MASK | 1);
2126
2127                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2128                      &vcpu->arch.pv_time, data & ~1ULL,
2129                      sizeof(struct pvclock_vcpu_time_info)))
2130                         vcpu->arch.pv_time_enabled = false;
2131                 else
2132                         vcpu->arch.pv_time_enabled = true;
2133
2134                 break;
2135         }
2136         case MSR_KVM_ASYNC_PF_EN:
2137                 if (kvm_pv_enable_async_pf(vcpu, data))
2138                         return 1;
2139                 break;
2140         case MSR_KVM_STEAL_TIME:
2141
2142                 if (unlikely(!sched_info_on()))
2143                         return 1;
2144
2145                 if (data & KVM_STEAL_RESERVED_MASK)
2146                         return 1;
2147
2148                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2149                                                 data & KVM_STEAL_VALID_BITS,
2150                                                 sizeof(struct kvm_steal_time)))
2151                         return 1;
2152
2153                 vcpu->arch.st.msr_val = data;
2154
2155                 if (!(data & KVM_MSR_ENABLED))
2156                         break;
2157
2158                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2159
2160                 break;
2161         case MSR_KVM_PV_EOI_EN:
2162                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2163                         return 1;
2164                 break;
2165
2166         case MSR_IA32_MCG_CTL:
2167         case MSR_IA32_MCG_STATUS:
2168         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2169                 return set_msr_mce(vcpu, msr, data);
2170
2171         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2172         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2173                 pr = true; /* fall through */
2174         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2175         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2176                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2177                         return kvm_pmu_set_msr(vcpu, msr_info);
2178
2179                 if (pr || data != 0)
2180                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2181                                     "0x%x data 0x%llx\n", msr, data);
2182                 break;
2183         case MSR_K7_CLK_CTL:
2184                 /*
2185                  * Ignore all writes to this no longer documented MSR.
2186                  * Writes are only relevant for old K7 processors,
2187                  * all pre-dating SVM, but a recommended workaround from
2188                  * AMD for these chips. It is possible to specify the
2189                  * affected processor models on the command line, hence
2190                  * the need to ignore the workaround.
2191                  */
2192                 break;
2193         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2194         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2195         case HV_X64_MSR_CRASH_CTL:
2196         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2197                 return kvm_hv_set_msr_common(vcpu, msr, data,
2198                                              msr_info->host_initiated);
2199         case MSR_IA32_BBL_CR_CTL3:
2200                 /* Drop writes to this legacy MSR -- see rdmsr
2201                  * counterpart for further detail.
2202                  */
2203                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2204                 break;
2205         case MSR_AMD64_OSVW_ID_LENGTH:
2206                 if (!guest_cpuid_has_osvw(vcpu))
2207                         return 1;
2208                 vcpu->arch.osvw.length = data;
2209                 break;
2210         case MSR_AMD64_OSVW_STATUS:
2211                 if (!guest_cpuid_has_osvw(vcpu))
2212                         return 1;
2213                 vcpu->arch.osvw.status = data;
2214                 break;
2215         default:
2216                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2217                         return xen_hvm_config(vcpu, data);
2218                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2219                         return kvm_pmu_set_msr(vcpu, msr_info);
2220                 if (!ignore_msrs) {
2221                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2222                                     msr, data);
2223                         return 1;
2224                 } else {
2225                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2226                                     msr, data);
2227                         break;
2228                 }
2229         }
2230         return 0;
2231 }
2232 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2233
2234
2235 /*
2236  * Reads an msr value (of 'msr_index') into 'pdata'.
2237  * Returns 0 on success, non-0 otherwise.
2238  * Assumes vcpu_load() was already called.
2239  */
2240 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2241 {
2242         return kvm_x86_ops->get_msr(vcpu, msr);
2243 }
2244 EXPORT_SYMBOL_GPL(kvm_get_msr);
2245
2246 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2247 {
2248         u64 data;
2249         u64 mcg_cap = vcpu->arch.mcg_cap;
2250         unsigned bank_num = mcg_cap & 0xff;
2251
2252         switch (msr) {
2253         case MSR_IA32_P5_MC_ADDR:
2254         case MSR_IA32_P5_MC_TYPE:
2255                 data = 0;
2256                 break;
2257         case MSR_IA32_MCG_CAP:
2258                 data = vcpu->arch.mcg_cap;
2259                 break;
2260         case MSR_IA32_MCG_CTL:
2261                 if (!(mcg_cap & MCG_CTL_P))
2262                         return 1;
2263                 data = vcpu->arch.mcg_ctl;
2264                 break;
2265         case MSR_IA32_MCG_STATUS:
2266                 data = vcpu->arch.mcg_status;
2267                 break;
2268         default:
2269                 if (msr >= MSR_IA32_MC0_CTL &&
2270                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2271                         u32 offset = msr - MSR_IA32_MC0_CTL;
2272                         data = vcpu->arch.mce_banks[offset];
2273                         break;
2274                 }
2275                 return 1;
2276         }
2277         *pdata = data;
2278         return 0;
2279 }
2280
2281 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2282 {
2283         switch (msr_info->index) {
2284         case MSR_IA32_PLATFORM_ID:
2285         case MSR_IA32_EBL_CR_POWERON:
2286         case MSR_IA32_DEBUGCTLMSR:
2287         case MSR_IA32_LASTBRANCHFROMIP:
2288         case MSR_IA32_LASTBRANCHTOIP:
2289         case MSR_IA32_LASTINTFROMIP:
2290         case MSR_IA32_LASTINTTOIP:
2291         case MSR_K8_SYSCFG:
2292         case MSR_K8_TSEG_ADDR:
2293         case MSR_K8_TSEG_MASK:
2294         case MSR_K7_HWCR:
2295         case MSR_VM_HSAVE_PA:
2296         case MSR_K8_INT_PENDING_MSG:
2297         case MSR_AMD64_NB_CFG:
2298         case MSR_FAM10H_MMIO_CONF_BASE:
2299         case MSR_AMD64_BU_CFG2:
2300                 msr_info->data = 0;
2301                 break;
2302         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2303         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2304         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2305         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2306                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2307                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2308                 msr_info->data = 0;
2309                 break;
2310         case MSR_IA32_UCODE_REV:
2311                 msr_info->data = 0x100000000ULL;
2312                 break;
2313         case MSR_MTRRcap:
2314         case 0x200 ... 0x2ff:
2315                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2316         case 0xcd: /* fsb frequency */
2317                 msr_info->data = 3;
2318                 break;
2319                 /*
2320                  * MSR_EBC_FREQUENCY_ID
2321                  * Conservative value valid for even the basic CPU models.
2322                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2323                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2324                  * and 266MHz for model 3, or 4. Set Core Clock
2325                  * Frequency to System Bus Frequency Ratio to 1 (bits
2326                  * 31:24) even though these are only valid for CPU
2327                  * models > 2, however guests may end up dividing or
2328                  * multiplying by zero otherwise.
2329                  */
2330         case MSR_EBC_FREQUENCY_ID:
2331                 msr_info->data = 1 << 24;
2332                 break;
2333         case MSR_IA32_APICBASE:
2334                 msr_info->data = kvm_get_apic_base(vcpu);
2335                 break;
2336         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2337                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2338                 break;
2339         case MSR_IA32_TSCDEADLINE:
2340                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2341                 break;
2342         case MSR_IA32_TSC_ADJUST:
2343                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2344                 break;
2345         case MSR_IA32_MISC_ENABLE:
2346                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2347                 break;
2348         case MSR_IA32_SMBASE:
2349                 if (!msr_info->host_initiated)
2350                         return 1;
2351                 msr_info->data = vcpu->arch.smbase;
2352                 break;
2353         case MSR_IA32_PERF_STATUS:
2354                 /* TSC increment by tick */
2355                 msr_info->data = 1000ULL;
2356                 /* CPU multiplier */
2357                 msr_info->data |= (((uint64_t)4ULL) << 40);
2358                 break;
2359         case MSR_EFER:
2360                 msr_info->data = vcpu->arch.efer;
2361                 break;
2362         case MSR_KVM_WALL_CLOCK:
2363         case MSR_KVM_WALL_CLOCK_NEW:
2364                 msr_info->data = vcpu->kvm->arch.wall_clock;
2365                 break;
2366         case MSR_KVM_SYSTEM_TIME:
2367         case MSR_KVM_SYSTEM_TIME_NEW:
2368                 msr_info->data = vcpu->arch.time;
2369                 break;
2370         case MSR_KVM_ASYNC_PF_EN:
2371                 msr_info->data = vcpu->arch.apf.msr_val;
2372                 break;
2373         case MSR_KVM_STEAL_TIME:
2374                 msr_info->data = vcpu->arch.st.msr_val;
2375                 break;
2376         case MSR_KVM_PV_EOI_EN:
2377                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2378                 break;
2379         case MSR_IA32_P5_MC_ADDR:
2380         case MSR_IA32_P5_MC_TYPE:
2381         case MSR_IA32_MCG_CAP:
2382         case MSR_IA32_MCG_CTL:
2383         case MSR_IA32_MCG_STATUS:
2384         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2385                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2386         case MSR_K7_CLK_CTL:
2387                 /*
2388                  * Provide expected ramp-up count for K7. All other
2389                  * are set to zero, indicating minimum divisors for
2390                  * every field.
2391                  *
2392                  * This prevents guest kernels on AMD host with CPU
2393                  * type 6, model 8 and higher from exploding due to
2394                  * the rdmsr failing.
2395                  */
2396                 msr_info->data = 0x20000000;
2397                 break;
2398         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2399         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2400         case HV_X64_MSR_CRASH_CTL:
2401         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2402                 return kvm_hv_get_msr_common(vcpu,
2403                                              msr_info->index, &msr_info->data);
2404                 break;
2405         case MSR_IA32_BBL_CR_CTL3:
2406                 /* This legacy MSR exists but isn't fully documented in current
2407                  * silicon.  It is however accessed by winxp in very narrow
2408                  * scenarios where it sets bit #19, itself documented as
2409                  * a "reserved" bit.  Best effort attempt to source coherent
2410                  * read data here should the balance of the register be
2411                  * interpreted by the guest:
2412                  *
2413                  * L2 cache control register 3: 64GB range, 256KB size,
2414                  * enabled, latency 0x1, configured
2415                  */
2416                 msr_info->data = 0xbe702111;
2417                 break;
2418         case MSR_AMD64_OSVW_ID_LENGTH:
2419                 if (!guest_cpuid_has_osvw(vcpu))
2420                         return 1;
2421                 msr_info->data = vcpu->arch.osvw.length;
2422                 break;
2423         case MSR_AMD64_OSVW_STATUS:
2424                 if (!guest_cpuid_has_osvw(vcpu))
2425                         return 1;
2426                 msr_info->data = vcpu->arch.osvw.status;
2427                 break;
2428         default:
2429                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2430                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2431                 if (!ignore_msrs) {
2432                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2433                         return 1;
2434                 } else {
2435                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2436                         msr_info->data = 0;
2437                 }
2438                 break;
2439         }
2440         return 0;
2441 }
2442 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2443
2444 /*
2445  * Read or write a bunch of msrs. All parameters are kernel addresses.
2446  *
2447  * @return number of msrs set successfully.
2448  */
2449 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2450                     struct kvm_msr_entry *entries,
2451                     int (*do_msr)(struct kvm_vcpu *vcpu,
2452                                   unsigned index, u64 *data))
2453 {
2454         int i, idx;
2455
2456         idx = srcu_read_lock(&vcpu->kvm->srcu);
2457         for (i = 0; i < msrs->nmsrs; ++i)
2458                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2459                         break;
2460         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2461
2462         return i;
2463 }
2464
2465 /*
2466  * Read or write a bunch of msrs. Parameters are user addresses.
2467  *
2468  * @return number of msrs set successfully.
2469  */
2470 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2471                   int (*do_msr)(struct kvm_vcpu *vcpu,
2472                                 unsigned index, u64 *data),
2473                   int writeback)
2474 {
2475         struct kvm_msrs msrs;
2476         struct kvm_msr_entry *entries;
2477         int r, n;
2478         unsigned size;
2479
2480         r = -EFAULT;
2481         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2482                 goto out;
2483
2484         r = -E2BIG;
2485         if (msrs.nmsrs >= MAX_IO_MSRS)
2486                 goto out;
2487
2488         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2489         entries = memdup_user(user_msrs->entries, size);
2490         if (IS_ERR(entries)) {
2491                 r = PTR_ERR(entries);
2492                 goto out;
2493         }
2494
2495         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2496         if (r < 0)
2497                 goto out_free;
2498
2499         r = -EFAULT;
2500         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2501                 goto out_free;
2502
2503         r = n;
2504
2505 out_free:
2506         kfree(entries);
2507 out:
2508         return r;
2509 }
2510
2511 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2512 {
2513         int r;
2514
2515         switch (ext) {
2516         case KVM_CAP_IRQCHIP:
2517         case KVM_CAP_HLT:
2518         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2519         case KVM_CAP_SET_TSS_ADDR:
2520         case KVM_CAP_EXT_CPUID:
2521         case KVM_CAP_EXT_EMUL_CPUID:
2522         case KVM_CAP_CLOCKSOURCE:
2523         case KVM_CAP_PIT:
2524         case KVM_CAP_NOP_IO_DELAY:
2525         case KVM_CAP_MP_STATE:
2526         case KVM_CAP_SYNC_MMU:
2527         case KVM_CAP_USER_NMI:
2528         case KVM_CAP_REINJECT_CONTROL:
2529         case KVM_CAP_IRQ_INJECT_STATUS:
2530         case KVM_CAP_IOEVENTFD:
2531         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2532         case KVM_CAP_PIT2:
2533         case KVM_CAP_PIT_STATE2:
2534         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2535         case KVM_CAP_XEN_HVM:
2536         case KVM_CAP_ADJUST_CLOCK:
2537         case KVM_CAP_VCPU_EVENTS:
2538         case KVM_CAP_HYPERV:
2539         case KVM_CAP_HYPERV_VAPIC:
2540         case KVM_CAP_HYPERV_SPIN:
2541         case KVM_CAP_HYPERV_SYNIC:
2542         case KVM_CAP_PCI_SEGMENT:
2543         case KVM_CAP_DEBUGREGS:
2544         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2545         case KVM_CAP_XSAVE:
2546         case KVM_CAP_ASYNC_PF:
2547         case KVM_CAP_GET_TSC_KHZ:
2548         case KVM_CAP_KVMCLOCK_CTRL:
2549         case KVM_CAP_READONLY_MEM:
2550         case KVM_CAP_HYPERV_TIME:
2551         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2552         case KVM_CAP_TSC_DEADLINE_TIMER:
2553         case KVM_CAP_ENABLE_CAP_VM:
2554         case KVM_CAP_DISABLE_QUIRKS:
2555         case KVM_CAP_SET_BOOT_CPU_ID:
2556         case KVM_CAP_SPLIT_IRQCHIP:
2557 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2558         case KVM_CAP_ASSIGN_DEV_IRQ:
2559         case KVM_CAP_PCI_2_3:
2560 #endif
2561                 r = 1;
2562                 break;
2563         case KVM_CAP_X86_SMM:
2564                 /* SMBASE is usually relocated above 1M on modern chipsets,
2565                  * and SMM handlers might indeed rely on 4G segment limits,
2566                  * so do not report SMM to be available if real mode is
2567                  * emulated via vm86 mode.  Still, do not go to great lengths
2568                  * to avoid userspace's usage of the feature, because it is a
2569                  * fringe case that is not enabled except via specific settings
2570                  * of the module parameters.
2571                  */
2572                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2573                 break;
2574         case KVM_CAP_COALESCED_MMIO:
2575                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2576                 break;
2577         case KVM_CAP_VAPIC:
2578                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2579                 break;
2580         case KVM_CAP_NR_VCPUS:
2581                 r = KVM_SOFT_MAX_VCPUS;
2582                 break;
2583         case KVM_CAP_MAX_VCPUS:
2584                 r = KVM_MAX_VCPUS;
2585                 break;
2586         case KVM_CAP_NR_MEMSLOTS:
2587                 r = KVM_USER_MEM_SLOTS;
2588                 break;
2589         case KVM_CAP_PV_MMU:    /* obsolete */
2590                 r = 0;
2591                 break;
2592 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2593         case KVM_CAP_IOMMU:
2594                 r = iommu_present(&pci_bus_type);
2595                 break;
2596 #endif
2597         case KVM_CAP_MCE:
2598                 r = KVM_MAX_MCE_BANKS;
2599                 break;
2600         case KVM_CAP_XCRS:
2601                 r = cpu_has_xsave;
2602                 break;
2603         case KVM_CAP_TSC_CONTROL:
2604                 r = kvm_has_tsc_control;
2605                 break;
2606         default:
2607                 r = 0;
2608                 break;
2609         }
2610         return r;
2611
2612 }
2613
2614 long kvm_arch_dev_ioctl(struct file *filp,
2615                         unsigned int ioctl, unsigned long arg)
2616 {
2617         void __user *argp = (void __user *)arg;
2618         long r;
2619
2620         switch (ioctl) {
2621         case KVM_GET_MSR_INDEX_LIST: {
2622                 struct kvm_msr_list __user *user_msr_list = argp;
2623                 struct kvm_msr_list msr_list;
2624                 unsigned n;
2625
2626                 r = -EFAULT;
2627                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2628                         goto out;
2629                 n = msr_list.nmsrs;
2630                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2631                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2632                         goto out;
2633                 r = -E2BIG;
2634                 if (n < msr_list.nmsrs)
2635                         goto out;
2636                 r = -EFAULT;
2637                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2638                                  num_msrs_to_save * sizeof(u32)))
2639                         goto out;
2640                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2641                                  &emulated_msrs,
2642                                  num_emulated_msrs * sizeof(u32)))
2643                         goto out;
2644                 r = 0;
2645                 break;
2646         }
2647         case KVM_GET_SUPPORTED_CPUID:
2648         case KVM_GET_EMULATED_CPUID: {
2649                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2650                 struct kvm_cpuid2 cpuid;
2651
2652                 r = -EFAULT;
2653                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2654                         goto out;
2655
2656                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2657                                             ioctl);
2658                 if (r)
2659                         goto out;
2660
2661                 r = -EFAULT;
2662                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2663                         goto out;
2664                 r = 0;
2665                 break;
2666         }
2667         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2668                 u64 mce_cap;
2669
2670                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2671                 r = -EFAULT;
2672                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2673                         goto out;
2674                 r = 0;
2675                 break;
2676         }
2677         default:
2678                 r = -EINVAL;
2679         }
2680 out:
2681         return r;
2682 }
2683
2684 static void wbinvd_ipi(void *garbage)
2685 {
2686         wbinvd();
2687 }
2688
2689 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2690 {
2691         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2692 }
2693
2694 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2695 {
2696         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2697 }
2698
2699 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2700 {
2701         /* Address WBINVD may be executed by guest */
2702         if (need_emulate_wbinvd(vcpu)) {
2703                 if (kvm_x86_ops->has_wbinvd_exit())
2704                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2705                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2706                         smp_call_function_single(vcpu->cpu,
2707                                         wbinvd_ipi, NULL, 1);
2708         }
2709
2710         kvm_x86_ops->vcpu_load(vcpu, cpu);
2711
2712         /* Apply any externally detected TSC adjustments (due to suspend) */
2713         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2714                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2715                 vcpu->arch.tsc_offset_adjustment = 0;
2716                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2717         }
2718
2719         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2720                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2721                                 rdtsc() - vcpu->arch.last_host_tsc;
2722                 if (tsc_delta < 0)
2723                         mark_tsc_unstable("KVM discovered backwards TSC");
2724                 if (check_tsc_unstable()) {
2725                         u64 offset = kvm_compute_tsc_offset(vcpu,
2726                                                 vcpu->arch.last_guest_tsc);
2727                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2728                         vcpu->arch.tsc_catchup = 1;
2729                 }
2730                 /*
2731                  * On a host with synchronized TSC, there is no need to update
2732                  * kvmclock on vcpu->cpu migration
2733                  */
2734                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2735                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2736                 if (vcpu->cpu != cpu)
2737                         kvm_migrate_timers(vcpu);
2738                 vcpu->cpu = cpu;
2739         }
2740
2741         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2742 }
2743
2744 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2745 {
2746         kvm_x86_ops->vcpu_put(vcpu);
2747         kvm_put_guest_fpu(vcpu);
2748         vcpu->arch.last_host_tsc = rdtsc();
2749 }
2750
2751 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2752                                     struct kvm_lapic_state *s)
2753 {
2754         if (vcpu->arch.apicv_active)
2755                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2756
2757         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2758
2759         return 0;
2760 }
2761
2762 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2763                                     struct kvm_lapic_state *s)
2764 {
2765         kvm_apic_post_state_restore(vcpu, s);
2766         update_cr8_intercept(vcpu);
2767
2768         return 0;
2769 }
2770
2771 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2772 {
2773         return (!lapic_in_kernel(vcpu) ||
2774                 kvm_apic_accept_pic_intr(vcpu));
2775 }
2776
2777 /*
2778  * if userspace requested an interrupt window, check that the
2779  * interrupt window is open.
2780  *
2781  * No need to exit to userspace if we already have an interrupt queued.
2782  */
2783 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2784 {
2785         return kvm_arch_interrupt_allowed(vcpu) &&
2786                 !kvm_cpu_has_interrupt(vcpu) &&
2787                 !kvm_event_needs_reinjection(vcpu) &&
2788                 kvm_cpu_accept_dm_intr(vcpu);
2789 }
2790
2791 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2792                                     struct kvm_interrupt *irq)
2793 {
2794         if (irq->irq >= KVM_NR_INTERRUPTS)
2795                 return -EINVAL;
2796
2797         if (!irqchip_in_kernel(vcpu->kvm)) {
2798                 kvm_queue_interrupt(vcpu, irq->irq, false);
2799                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2800                 return 0;
2801         }
2802
2803         /*
2804          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2805          * fail for in-kernel 8259.
2806          */
2807         if (pic_in_kernel(vcpu->kvm))
2808                 return -ENXIO;
2809
2810         if (vcpu->arch.pending_external_vector != -1)
2811                 return -EEXIST;
2812
2813         vcpu->arch.pending_external_vector = irq->irq;
2814         kvm_make_request(KVM_REQ_EVENT, vcpu);
2815         return 0;
2816 }
2817
2818 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2819 {
2820         kvm_inject_nmi(vcpu);
2821
2822         return 0;
2823 }
2824
2825 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2826 {
2827         kvm_make_request(KVM_REQ_SMI, vcpu);
2828
2829         return 0;
2830 }
2831
2832 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2833                                            struct kvm_tpr_access_ctl *tac)
2834 {
2835         if (tac->flags)
2836                 return -EINVAL;
2837         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2838         return 0;
2839 }
2840
2841 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2842                                         u64 mcg_cap)
2843 {
2844         int r;
2845         unsigned bank_num = mcg_cap & 0xff, bank;
2846
2847         r = -EINVAL;
2848         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2849                 goto out;
2850         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2851                 goto out;
2852         r = 0;
2853         vcpu->arch.mcg_cap = mcg_cap;
2854         /* Init IA32_MCG_CTL to all 1s */
2855         if (mcg_cap & MCG_CTL_P)
2856                 vcpu->arch.mcg_ctl = ~(u64)0;
2857         /* Init IA32_MCi_CTL to all 1s */
2858         for (bank = 0; bank < bank_num; bank++)
2859                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2860 out:
2861         return r;
2862 }
2863
2864 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2865                                       struct kvm_x86_mce *mce)
2866 {
2867         u64 mcg_cap = vcpu->arch.mcg_cap;
2868         unsigned bank_num = mcg_cap & 0xff;
2869         u64 *banks = vcpu->arch.mce_banks;
2870
2871         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2872                 return -EINVAL;
2873         /*
2874          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2875          * reporting is disabled
2876          */
2877         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2878             vcpu->arch.mcg_ctl != ~(u64)0)
2879                 return 0;
2880         banks += 4 * mce->bank;
2881         /*
2882          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2883          * reporting is disabled for the bank
2884          */
2885         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2886                 return 0;
2887         if (mce->status & MCI_STATUS_UC) {
2888                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2889                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2890                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2891                         return 0;
2892                 }
2893                 if (banks[1] & MCI_STATUS_VAL)
2894                         mce->status |= MCI_STATUS_OVER;
2895                 banks[2] = mce->addr;
2896                 banks[3] = mce->misc;
2897                 vcpu->arch.mcg_status = mce->mcg_status;
2898                 banks[1] = mce->status;
2899                 kvm_queue_exception(vcpu, MC_VECTOR);
2900         } else if (!(banks[1] & MCI_STATUS_VAL)
2901                    || !(banks[1] & MCI_STATUS_UC)) {
2902                 if (banks[1] & MCI_STATUS_VAL)
2903                         mce->status |= MCI_STATUS_OVER;
2904                 banks[2] = mce->addr;
2905                 banks[3] = mce->misc;
2906                 banks[1] = mce->status;
2907         } else
2908                 banks[1] |= MCI_STATUS_OVER;
2909         return 0;
2910 }
2911
2912 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2913                                                struct kvm_vcpu_events *events)
2914 {
2915         process_nmi(vcpu);
2916         events->exception.injected =
2917                 vcpu->arch.exception.pending &&
2918                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2919         events->exception.nr = vcpu->arch.exception.nr;
2920         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2921         events->exception.pad = 0;
2922         events->exception.error_code = vcpu->arch.exception.error_code;
2923
2924         events->interrupt.injected =
2925                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2926         events->interrupt.nr = vcpu->arch.interrupt.nr;
2927         events->interrupt.soft = 0;
2928         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2929
2930         events->nmi.injected = vcpu->arch.nmi_injected;
2931         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2932         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2933         events->nmi.pad = 0;
2934
2935         events->sipi_vector = 0; /* never valid when reporting to user space */
2936
2937         events->smi.smm = is_smm(vcpu);
2938         events->smi.pending = vcpu->arch.smi_pending;
2939         events->smi.smm_inside_nmi =
2940                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2941         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2942
2943         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2944                          | KVM_VCPUEVENT_VALID_SHADOW
2945                          | KVM_VCPUEVENT_VALID_SMM);
2946         memset(&events->reserved, 0, sizeof(events->reserved));
2947 }
2948
2949 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2950                                               struct kvm_vcpu_events *events)
2951 {
2952         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2953                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2954                               | KVM_VCPUEVENT_VALID_SHADOW
2955                               | KVM_VCPUEVENT_VALID_SMM))
2956                 return -EINVAL;
2957
2958         process_nmi(vcpu);
2959         vcpu->arch.exception.pending = events->exception.injected;
2960         vcpu->arch.exception.nr = events->exception.nr;
2961         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2962         vcpu->arch.exception.error_code = events->exception.error_code;
2963
2964         vcpu->arch.interrupt.pending = events->interrupt.injected;
2965         vcpu->arch.interrupt.nr = events->interrupt.nr;
2966         vcpu->arch.interrupt.soft = events->interrupt.soft;
2967         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2968                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2969                                                   events->interrupt.shadow);
2970
2971         vcpu->arch.nmi_injected = events->nmi.injected;
2972         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2973                 vcpu->arch.nmi_pending = events->nmi.pending;
2974         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2975
2976         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2977             lapic_in_kernel(vcpu))
2978                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2979
2980         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2981                 if (events->smi.smm)
2982                         vcpu->arch.hflags |= HF_SMM_MASK;
2983                 else
2984                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2985                 vcpu->arch.smi_pending = events->smi.pending;
2986                 if (events->smi.smm_inside_nmi)
2987                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2988                 else
2989                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2990                 if (lapic_in_kernel(vcpu)) {
2991                         if (events->smi.latched_init)
2992                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2993                         else
2994                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2995                 }
2996         }
2997
2998         kvm_make_request(KVM_REQ_EVENT, vcpu);
2999
3000         return 0;
3001 }
3002
3003 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3004                                              struct kvm_debugregs *dbgregs)
3005 {
3006         unsigned long val;
3007
3008         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3009         kvm_get_dr(vcpu, 6, &val);
3010         dbgregs->dr6 = val;
3011         dbgregs->dr7 = vcpu->arch.dr7;
3012         dbgregs->flags = 0;
3013         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3014 }
3015
3016 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3017                                             struct kvm_debugregs *dbgregs)
3018 {
3019         if (dbgregs->flags)
3020                 return -EINVAL;
3021
3022         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3023         kvm_update_dr0123(vcpu);
3024         vcpu->arch.dr6 = dbgregs->dr6;
3025         kvm_update_dr6(vcpu);
3026         vcpu->arch.dr7 = dbgregs->dr7;
3027         kvm_update_dr7(vcpu);
3028
3029         return 0;
3030 }
3031
3032 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3033
3034 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3035 {
3036         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3037         u64 xstate_bv = xsave->header.xfeatures;
3038         u64 valid;
3039
3040         /*
3041          * Copy legacy XSAVE area, to avoid complications with CPUID
3042          * leaves 0 and 1 in the loop below.
3043          */
3044         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3045
3046         /* Set XSTATE_BV */
3047         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3048
3049         /*
3050          * Copy each region from the possibly compacted offset to the
3051          * non-compacted offset.
3052          */
3053         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3054         while (valid) {
3055                 u64 feature = valid & -valid;
3056                 int index = fls64(feature) - 1;
3057                 void *src = get_xsave_addr(xsave, feature);
3058
3059                 if (src) {
3060                         u32 size, offset, ecx, edx;
3061                         cpuid_count(XSTATE_CPUID, index,
3062                                     &size, &offset, &ecx, &edx);
3063                         memcpy(dest + offset, src, size);
3064                 }
3065
3066                 valid -= feature;
3067         }
3068 }
3069
3070 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3071 {
3072         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3073         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3074         u64 valid;
3075
3076         /*
3077          * Copy legacy XSAVE area, to avoid complications with CPUID
3078          * leaves 0 and 1 in the loop below.
3079          */
3080         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3081
3082         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3083         xsave->header.xfeatures = xstate_bv;
3084         if (cpu_has_xsaves)
3085                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3086
3087         /*
3088          * Copy each region from the non-compacted offset to the
3089          * possibly compacted offset.
3090          */
3091         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3092         while (valid) {
3093                 u64 feature = valid & -valid;
3094                 int index = fls64(feature) - 1;
3095                 void *dest = get_xsave_addr(xsave, feature);
3096
3097                 if (dest) {
3098                         u32 size, offset, ecx, edx;
3099                         cpuid_count(XSTATE_CPUID, index,
3100                                     &size, &offset, &ecx, &edx);
3101                         memcpy(dest, src + offset, size);
3102                 }
3103
3104                 valid -= feature;
3105         }
3106 }
3107
3108 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3109                                          struct kvm_xsave *guest_xsave)
3110 {
3111         if (cpu_has_xsave) {
3112                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3113                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3114         } else {
3115                 memcpy(guest_xsave->region,
3116                         &vcpu->arch.guest_fpu.state.fxsave,
3117                         sizeof(struct fxregs_state));
3118                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3119                         XFEATURE_MASK_FPSSE;
3120         }
3121 }
3122
3123 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3124                                         struct kvm_xsave *guest_xsave)
3125 {
3126         u64 xstate_bv =
3127                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3128
3129         if (cpu_has_xsave) {
3130                 /*
3131                  * Here we allow setting states that are not present in
3132                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3133                  * with old userspace.
3134                  */
3135                 if (xstate_bv & ~kvm_supported_xcr0())
3136                         return -EINVAL;
3137                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3138         } else {
3139                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3140                         return -EINVAL;
3141                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3142                         guest_xsave->region, sizeof(struct fxregs_state));
3143         }
3144         return 0;
3145 }
3146
3147 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3148                                         struct kvm_xcrs *guest_xcrs)
3149 {
3150         if (!cpu_has_xsave) {
3151                 guest_xcrs->nr_xcrs = 0;
3152                 return;
3153         }
3154
3155         guest_xcrs->nr_xcrs = 1;
3156         guest_xcrs->flags = 0;
3157         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3158         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3159 }
3160
3161 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3162                                        struct kvm_xcrs *guest_xcrs)
3163 {
3164         int i, r = 0;
3165
3166         if (!cpu_has_xsave)
3167                 return -EINVAL;
3168
3169         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3170                 return -EINVAL;
3171
3172         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3173                 /* Only support XCR0 currently */
3174                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3175                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3176                                 guest_xcrs->xcrs[i].value);
3177                         break;
3178                 }
3179         if (r)
3180                 r = -EINVAL;
3181         return r;
3182 }
3183
3184 /*
3185  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3186  * stopped by the hypervisor.  This function will be called from the host only.
3187  * EINVAL is returned when the host attempts to set the flag for a guest that
3188  * does not support pv clocks.
3189  */
3190 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3191 {
3192         if (!vcpu->arch.pv_time_enabled)
3193                 return -EINVAL;
3194         vcpu->arch.pvclock_set_guest_stopped_request = true;
3195         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3196         return 0;
3197 }
3198
3199 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3200                                      struct kvm_enable_cap *cap)
3201 {
3202         if (cap->flags)
3203                 return -EINVAL;
3204
3205         switch (cap->cap) {
3206         case KVM_CAP_HYPERV_SYNIC:
3207                 return kvm_hv_activate_synic(vcpu);
3208         default:
3209                 return -EINVAL;
3210         }
3211 }
3212
3213 long kvm_arch_vcpu_ioctl(struct file *filp,
3214                          unsigned int ioctl, unsigned long arg)
3215 {
3216         struct kvm_vcpu *vcpu = filp->private_data;
3217         void __user *argp = (void __user *)arg;
3218         int r;
3219         union {
3220                 struct kvm_lapic_state *lapic;
3221                 struct kvm_xsave *xsave;
3222                 struct kvm_xcrs *xcrs;
3223                 void *buffer;
3224         } u;
3225
3226         u.buffer = NULL;
3227         switch (ioctl) {
3228         case KVM_GET_LAPIC: {
3229                 r = -EINVAL;
3230                 if (!lapic_in_kernel(vcpu))
3231                         goto out;
3232                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3233
3234                 r = -ENOMEM;
3235                 if (!u.lapic)
3236                         goto out;
3237                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3238                 if (r)
3239                         goto out;
3240                 r = -EFAULT;
3241                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3242                         goto out;
3243                 r = 0;
3244                 break;
3245         }
3246         case KVM_SET_LAPIC: {
3247                 r = -EINVAL;
3248                 if (!lapic_in_kernel(vcpu))
3249                         goto out;
3250                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3251                 if (IS_ERR(u.lapic))
3252                         return PTR_ERR(u.lapic);
3253
3254                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3255                 break;
3256         }
3257         case KVM_INTERRUPT: {
3258                 struct kvm_interrupt irq;
3259
3260                 r = -EFAULT;
3261                 if (copy_from_user(&irq, argp, sizeof irq))
3262                         goto out;
3263                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3264                 break;
3265         }
3266         case KVM_NMI: {
3267                 r = kvm_vcpu_ioctl_nmi(vcpu);
3268                 break;
3269         }
3270         case KVM_SMI: {
3271                 r = kvm_vcpu_ioctl_smi(vcpu);
3272                 break;
3273         }
3274         case KVM_SET_CPUID: {
3275                 struct kvm_cpuid __user *cpuid_arg = argp;
3276                 struct kvm_cpuid cpuid;
3277
3278                 r = -EFAULT;
3279                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3280                         goto out;
3281                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3282                 break;
3283         }
3284         case KVM_SET_CPUID2: {
3285                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3286                 struct kvm_cpuid2 cpuid;
3287
3288                 r = -EFAULT;
3289                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3290                         goto out;
3291                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3292                                               cpuid_arg->entries);
3293                 break;
3294         }
3295         case KVM_GET_CPUID2: {
3296                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3297                 struct kvm_cpuid2 cpuid;
3298
3299                 r = -EFAULT;
3300                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3301                         goto out;
3302                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3303                                               cpuid_arg->entries);
3304                 if (r)
3305                         goto out;
3306                 r = -EFAULT;
3307                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3308                         goto out;
3309                 r = 0;
3310                 break;
3311         }
3312         case KVM_GET_MSRS:
3313                 r = msr_io(vcpu, argp, do_get_msr, 1);
3314                 break;
3315         case KVM_SET_MSRS:
3316                 r = msr_io(vcpu, argp, do_set_msr, 0);
3317                 break;
3318         case KVM_TPR_ACCESS_REPORTING: {
3319                 struct kvm_tpr_access_ctl tac;
3320
3321                 r = -EFAULT;
3322                 if (copy_from_user(&tac, argp, sizeof tac))
3323                         goto out;
3324                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3325                 if (r)
3326                         goto out;
3327                 r = -EFAULT;
3328                 if (copy_to_user(argp, &tac, sizeof tac))
3329                         goto out;
3330                 r = 0;
3331                 break;
3332         };
3333         case KVM_SET_VAPIC_ADDR: {
3334                 struct kvm_vapic_addr va;
3335
3336                 r = -EINVAL;
3337                 if (!lapic_in_kernel(vcpu))
3338                         goto out;
3339                 r = -EFAULT;
3340                 if (copy_from_user(&va, argp, sizeof va))
3341                         goto out;
3342                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3343                 break;
3344         }
3345         case KVM_X86_SETUP_MCE: {
3346                 u64 mcg_cap;
3347
3348                 r = -EFAULT;
3349                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3350                         goto out;
3351                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3352                 break;
3353         }
3354         case KVM_X86_SET_MCE: {
3355                 struct kvm_x86_mce mce;
3356
3357                 r = -EFAULT;
3358                 if (copy_from_user(&mce, argp, sizeof mce))
3359                         goto out;
3360                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3361                 break;
3362         }
3363         case KVM_GET_VCPU_EVENTS: {
3364                 struct kvm_vcpu_events events;
3365
3366                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3367
3368                 r = -EFAULT;
3369                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3370                         break;
3371                 r = 0;
3372                 break;
3373         }
3374         case KVM_SET_VCPU_EVENTS: {
3375                 struct kvm_vcpu_events events;
3376
3377                 r = -EFAULT;
3378                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3379                         break;
3380
3381                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3382                 break;
3383         }
3384         case KVM_GET_DEBUGREGS: {
3385                 struct kvm_debugregs dbgregs;
3386
3387                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3388
3389                 r = -EFAULT;
3390                 if (copy_to_user(argp, &dbgregs,
3391                                  sizeof(struct kvm_debugregs)))
3392                         break;
3393                 r = 0;
3394                 break;
3395         }
3396         case KVM_SET_DEBUGREGS: {
3397                 struct kvm_debugregs dbgregs;
3398
3399                 r = -EFAULT;
3400                 if (copy_from_user(&dbgregs, argp,
3401                                    sizeof(struct kvm_debugregs)))
3402                         break;
3403
3404                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3405                 break;
3406         }
3407         case KVM_GET_XSAVE: {
3408                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3409                 r = -ENOMEM;
3410                 if (!u.xsave)
3411                         break;
3412
3413                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3414
3415                 r = -EFAULT;
3416                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3417                         break;
3418                 r = 0;
3419                 break;
3420         }
3421         case KVM_SET_XSAVE: {
3422                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3423                 if (IS_ERR(u.xsave))
3424                         return PTR_ERR(u.xsave);
3425
3426                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3427                 break;
3428         }
3429         case KVM_GET_XCRS: {
3430                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3431                 r = -ENOMEM;
3432                 if (!u.xcrs)
3433                         break;
3434
3435                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3436
3437                 r = -EFAULT;
3438                 if (copy_to_user(argp, u.xcrs,
3439                                  sizeof(struct kvm_xcrs)))
3440                         break;
3441                 r = 0;
3442                 break;
3443         }
3444         case KVM_SET_XCRS: {
3445                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3446                 if (IS_ERR(u.xcrs))
3447                         return PTR_ERR(u.xcrs);
3448
3449                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3450                 break;
3451         }
3452         case KVM_SET_TSC_KHZ: {
3453                 u32 user_tsc_khz;
3454
3455                 r = -EINVAL;
3456                 user_tsc_khz = (u32)arg;
3457
3458                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3459                         goto out;
3460
3461                 if (user_tsc_khz == 0)
3462                         user_tsc_khz = tsc_khz;
3463
3464                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3465                         r = 0;
3466
3467                 goto out;
3468         }
3469         case KVM_GET_TSC_KHZ: {
3470                 r = vcpu->arch.virtual_tsc_khz;
3471                 goto out;
3472         }
3473         case KVM_KVMCLOCK_CTRL: {
3474                 r = kvm_set_guest_paused(vcpu);
3475                 goto out;
3476         }
3477         case KVM_ENABLE_CAP: {
3478                 struct kvm_enable_cap cap;
3479
3480                 r = -EFAULT;
3481                 if (copy_from_user(&cap, argp, sizeof(cap)))
3482                         goto out;
3483                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3484                 break;
3485         }
3486         default:
3487                 r = -EINVAL;
3488         }
3489 out:
3490         kfree(u.buffer);
3491         return r;
3492 }
3493
3494 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3495 {
3496         return VM_FAULT_SIGBUS;
3497 }
3498
3499 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3500 {
3501         int ret;
3502
3503         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3504                 return -EINVAL;
3505         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3506         return ret;
3507 }
3508
3509 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3510                                               u64 ident_addr)
3511 {
3512         kvm->arch.ept_identity_map_addr = ident_addr;
3513         return 0;
3514 }
3515
3516 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3517                                           u32 kvm_nr_mmu_pages)
3518 {
3519         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3520                 return -EINVAL;
3521
3522         mutex_lock(&kvm->slots_lock);
3523
3524         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3525         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3526
3527         mutex_unlock(&kvm->slots_lock);
3528         return 0;
3529 }
3530
3531 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3532 {
3533         return kvm->arch.n_max_mmu_pages;
3534 }
3535
3536 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3537 {
3538         int r;
3539
3540         r = 0;
3541         switch (chip->chip_id) {
3542         case KVM_IRQCHIP_PIC_MASTER:
3543                 memcpy(&chip->chip.pic,
3544                         &pic_irqchip(kvm)->pics[0],
3545                         sizeof(struct kvm_pic_state));
3546                 break;
3547         case KVM_IRQCHIP_PIC_SLAVE:
3548                 memcpy(&chip->chip.pic,
3549                         &pic_irqchip(kvm)->pics[1],
3550                         sizeof(struct kvm_pic_state));
3551                 break;
3552         case KVM_IRQCHIP_IOAPIC:
3553                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3554                 break;
3555         default:
3556                 r = -EINVAL;
3557                 break;
3558         }
3559         return r;
3560 }
3561
3562 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3563 {
3564         int r;
3565
3566         r = 0;
3567         switch (chip->chip_id) {
3568         case KVM_IRQCHIP_PIC_MASTER:
3569                 spin_lock(&pic_irqchip(kvm)->lock);
3570                 memcpy(&pic_irqchip(kvm)->pics[0],
3571                         &chip->chip.pic,
3572                         sizeof(struct kvm_pic_state));
3573                 spin_unlock(&pic_irqchip(kvm)->lock);
3574                 break;
3575         case KVM_IRQCHIP_PIC_SLAVE:
3576                 spin_lock(&pic_irqchip(kvm)->lock);
3577                 memcpy(&pic_irqchip(kvm)->pics[1],
3578                         &chip->chip.pic,
3579                         sizeof(struct kvm_pic_state));
3580                 spin_unlock(&pic_irqchip(kvm)->lock);
3581                 break;
3582         case KVM_IRQCHIP_IOAPIC:
3583                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3584                 break;
3585         default:
3586                 r = -EINVAL;
3587                 break;
3588         }
3589         kvm_pic_update_irq(pic_irqchip(kvm));
3590         return r;
3591 }
3592
3593 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3594 {
3595         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3596
3597         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3598
3599         mutex_lock(&kps->lock);
3600         memcpy(ps, &kps->channels, sizeof(*ps));
3601         mutex_unlock(&kps->lock);
3602         return 0;
3603 }
3604
3605 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3606 {
3607         int i;
3608         struct kvm_pit *pit = kvm->arch.vpit;
3609
3610         mutex_lock(&pit->pit_state.lock);
3611         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3612         for (i = 0; i < 3; i++)
3613                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3614         mutex_unlock(&pit->pit_state.lock);
3615         return 0;
3616 }
3617
3618 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3619 {
3620         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3621         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3622                 sizeof(ps->channels));
3623         ps->flags = kvm->arch.vpit->pit_state.flags;
3624         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3625         memset(&ps->reserved, 0, sizeof(ps->reserved));
3626         return 0;
3627 }
3628
3629 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3630 {
3631         int start = 0;
3632         int i;
3633         u32 prev_legacy, cur_legacy;
3634         struct kvm_pit *pit = kvm->arch.vpit;
3635
3636         mutex_lock(&pit->pit_state.lock);
3637         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3638         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3639         if (!prev_legacy && cur_legacy)
3640                 start = 1;
3641         memcpy(&pit->pit_state.channels, &ps->channels,
3642                sizeof(pit->pit_state.channels));
3643         pit->pit_state.flags = ps->flags;
3644         for (i = 0; i < 3; i++)
3645                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3646                                    start && i == 0);
3647         mutex_unlock(&pit->pit_state.lock);
3648         return 0;
3649 }
3650
3651 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3652                                  struct kvm_reinject_control *control)
3653 {
3654         struct kvm_pit *pit = kvm->arch.vpit;
3655
3656         if (!pit)
3657                 return -ENXIO;
3658
3659         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3660          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3661          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3662          */
3663         mutex_lock(&pit->pit_state.lock);
3664         kvm_pit_set_reinject(pit, control->pit_reinject);
3665         mutex_unlock(&pit->pit_state.lock);
3666
3667         return 0;
3668 }
3669
3670 /**
3671  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3672  * @kvm: kvm instance
3673  * @log: slot id and address to which we copy the log
3674  *
3675  * Steps 1-4 below provide general overview of dirty page logging. See
3676  * kvm_get_dirty_log_protect() function description for additional details.
3677  *
3678  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3679  * always flush the TLB (step 4) even if previous step failed  and the dirty
3680  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3681  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3682  * writes will be marked dirty for next log read.
3683  *
3684  *   1. Take a snapshot of the bit and clear it if needed.
3685  *   2. Write protect the corresponding page.
3686  *   3. Copy the snapshot to the userspace.
3687  *   4. Flush TLB's if needed.
3688  */
3689 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3690 {
3691         bool is_dirty = false;
3692         int r;
3693
3694         mutex_lock(&kvm->slots_lock);
3695
3696         /*
3697          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3698          */
3699         if (kvm_x86_ops->flush_log_dirty)
3700                 kvm_x86_ops->flush_log_dirty(kvm);
3701
3702         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3703
3704         /*
3705          * All the TLBs can be flushed out of mmu lock, see the comments in
3706          * kvm_mmu_slot_remove_write_access().
3707          */
3708         lockdep_assert_held(&kvm->slots_lock);
3709         if (is_dirty)
3710                 kvm_flush_remote_tlbs(kvm);
3711
3712         mutex_unlock(&kvm->slots_lock);
3713         return r;
3714 }
3715
3716 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3717                         bool line_status)
3718 {
3719         if (!irqchip_in_kernel(kvm))
3720                 return -ENXIO;
3721
3722         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3723                                         irq_event->irq, irq_event->level,
3724                                         line_status);
3725         return 0;
3726 }
3727
3728 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3729                                    struct kvm_enable_cap *cap)
3730 {
3731         int r;
3732
3733         if (cap->flags)
3734                 return -EINVAL;
3735
3736         switch (cap->cap) {
3737         case KVM_CAP_DISABLE_QUIRKS:
3738                 kvm->arch.disabled_quirks = cap->args[0];
3739                 r = 0;
3740                 break;
3741         case KVM_CAP_SPLIT_IRQCHIP: {
3742                 mutex_lock(&kvm->lock);
3743                 r = -EINVAL;
3744                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3745                         goto split_irqchip_unlock;
3746                 r = -EEXIST;
3747                 if (irqchip_in_kernel(kvm))
3748                         goto split_irqchip_unlock;
3749                 if (atomic_read(&kvm->online_vcpus))
3750                         goto split_irqchip_unlock;
3751                 r = kvm_setup_empty_irq_routing(kvm);
3752                 if (r)
3753                         goto split_irqchip_unlock;
3754                 /* Pairs with irqchip_in_kernel. */
3755                 smp_wmb();
3756                 kvm->arch.irqchip_split = true;
3757                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3758                 r = 0;
3759 split_irqchip_unlock:
3760                 mutex_unlock(&kvm->lock);
3761                 break;
3762         }
3763         default:
3764                 r = -EINVAL;
3765                 break;
3766         }
3767         return r;
3768 }
3769
3770 long kvm_arch_vm_ioctl(struct file *filp,
3771                        unsigned int ioctl, unsigned long arg)
3772 {
3773         struct kvm *kvm = filp->private_data;
3774         void __user *argp = (void __user *)arg;
3775         int r = -ENOTTY;
3776         /*
3777          * This union makes it completely explicit to gcc-3.x
3778          * that these two variables' stack usage should be
3779          * combined, not added together.
3780          */
3781         union {
3782                 struct kvm_pit_state ps;
3783                 struct kvm_pit_state2 ps2;
3784                 struct kvm_pit_config pit_config;
3785         } u;
3786
3787         switch (ioctl) {
3788         case KVM_SET_TSS_ADDR:
3789                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3790                 break;
3791         case KVM_SET_IDENTITY_MAP_ADDR: {
3792                 u64 ident_addr;
3793
3794                 r = -EFAULT;
3795                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3796                         goto out;
3797                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3798                 break;
3799         }
3800         case KVM_SET_NR_MMU_PAGES:
3801                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3802                 break;
3803         case KVM_GET_NR_MMU_PAGES:
3804                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3805                 break;
3806         case KVM_CREATE_IRQCHIP: {
3807                 struct kvm_pic *vpic;
3808
3809                 mutex_lock(&kvm->lock);
3810                 r = -EEXIST;
3811                 if (kvm->arch.vpic)
3812                         goto create_irqchip_unlock;
3813                 r = -EINVAL;
3814                 if (atomic_read(&kvm->online_vcpus))
3815                         goto create_irqchip_unlock;
3816                 r = -ENOMEM;
3817                 vpic = kvm_create_pic(kvm);
3818                 if (vpic) {
3819                         r = kvm_ioapic_init(kvm);
3820                         if (r) {
3821                                 mutex_lock(&kvm->slots_lock);
3822                                 kvm_destroy_pic(vpic);
3823                                 mutex_unlock(&kvm->slots_lock);
3824                                 goto create_irqchip_unlock;
3825                         }
3826                 } else
3827                         goto create_irqchip_unlock;
3828                 r = kvm_setup_default_irq_routing(kvm);
3829                 if (r) {
3830                         mutex_lock(&kvm->slots_lock);
3831                         mutex_lock(&kvm->irq_lock);
3832                         kvm_ioapic_destroy(kvm);
3833                         kvm_destroy_pic(vpic);
3834                         mutex_unlock(&kvm->irq_lock);
3835                         mutex_unlock(&kvm->slots_lock);
3836                         goto create_irqchip_unlock;
3837                 }
3838                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3839                 smp_wmb();
3840                 kvm->arch.vpic = vpic;
3841         create_irqchip_unlock:
3842                 mutex_unlock(&kvm->lock);
3843                 break;
3844         }
3845         case KVM_CREATE_PIT:
3846                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3847                 goto create_pit;
3848         case KVM_CREATE_PIT2:
3849                 r = -EFAULT;
3850                 if (copy_from_user(&u.pit_config, argp,
3851                                    sizeof(struct kvm_pit_config)))
3852                         goto out;
3853         create_pit:
3854                 mutex_lock(&kvm->slots_lock);
3855                 r = -EEXIST;
3856                 if (kvm->arch.vpit)
3857                         goto create_pit_unlock;
3858                 r = -ENOMEM;
3859                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3860                 if (kvm->arch.vpit)
3861                         r = 0;
3862         create_pit_unlock:
3863                 mutex_unlock(&kvm->slots_lock);
3864                 break;
3865         case KVM_GET_IRQCHIP: {
3866                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3867                 struct kvm_irqchip *chip;
3868
3869                 chip = memdup_user(argp, sizeof(*chip));
3870                 if (IS_ERR(chip)) {
3871                         r = PTR_ERR(chip);
3872                         goto out;
3873                 }
3874
3875                 r = -ENXIO;
3876                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3877                         goto get_irqchip_out;
3878                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3879                 if (r)
3880                         goto get_irqchip_out;
3881                 r = -EFAULT;
3882                 if (copy_to_user(argp, chip, sizeof *chip))
3883                         goto get_irqchip_out;
3884                 r = 0;
3885         get_irqchip_out:
3886                 kfree(chip);
3887                 break;
3888         }
3889         case KVM_SET_IRQCHIP: {
3890                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3891                 struct kvm_irqchip *chip;
3892
3893                 chip = memdup_user(argp, sizeof(*chip));
3894                 if (IS_ERR(chip)) {
3895                         r = PTR_ERR(chip);
3896                         goto out;
3897                 }
3898
3899                 r = -ENXIO;
3900                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3901                         goto set_irqchip_out;
3902                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3903                 if (r)
3904                         goto set_irqchip_out;
3905                 r = 0;
3906         set_irqchip_out:
3907                 kfree(chip);
3908                 break;
3909         }
3910         case KVM_GET_PIT: {
3911                 r = -EFAULT;
3912                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3913                         goto out;
3914                 r = -ENXIO;
3915                 if (!kvm->arch.vpit)
3916                         goto out;
3917                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3918                 if (r)
3919                         goto out;
3920                 r = -EFAULT;
3921                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3922                         goto out;
3923                 r = 0;
3924                 break;
3925         }
3926         case KVM_SET_PIT: {
3927                 r = -EFAULT;
3928                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3929                         goto out;
3930                 r = -ENXIO;
3931                 if (!kvm->arch.vpit)
3932                         goto out;
3933                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3934                 break;
3935         }
3936         case KVM_GET_PIT2: {
3937                 r = -ENXIO;
3938                 if (!kvm->arch.vpit)
3939                         goto out;
3940                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3941                 if (r)
3942                         goto out;
3943                 r = -EFAULT;
3944                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3945                         goto out;
3946                 r = 0;
3947                 break;
3948         }
3949         case KVM_SET_PIT2: {
3950                 r = -EFAULT;
3951                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3952                         goto out;
3953                 r = -ENXIO;
3954                 if (!kvm->arch.vpit)
3955                         goto out;
3956                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3957                 break;
3958         }
3959         case KVM_REINJECT_CONTROL: {
3960                 struct kvm_reinject_control control;
3961                 r =  -EFAULT;
3962                 if (copy_from_user(&control, argp, sizeof(control)))
3963                         goto out;
3964                 r = kvm_vm_ioctl_reinject(kvm, &control);
3965                 break;
3966         }
3967         case KVM_SET_BOOT_CPU_ID:
3968                 r = 0;
3969                 mutex_lock(&kvm->lock);
3970                 if (atomic_read(&kvm->online_vcpus) != 0)
3971                         r = -EBUSY;
3972                 else
3973                         kvm->arch.bsp_vcpu_id = arg;
3974                 mutex_unlock(&kvm->lock);
3975                 break;
3976         case KVM_XEN_HVM_CONFIG: {
3977                 r = -EFAULT;
3978                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3979                                    sizeof(struct kvm_xen_hvm_config)))
3980                         goto out;
3981                 r = -EINVAL;
3982                 if (kvm->arch.xen_hvm_config.flags)
3983                         goto out;
3984                 r = 0;
3985                 break;
3986         }
3987         case KVM_SET_CLOCK: {
3988                 struct kvm_clock_data user_ns;
3989                 u64 now_ns;
3990                 s64 delta;
3991
3992                 r = -EFAULT;
3993                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3994                         goto out;
3995
3996                 r = -EINVAL;
3997                 if (user_ns.flags)
3998                         goto out;
3999
4000                 r = 0;
4001                 local_irq_disable();
4002                 now_ns = get_kernel_ns();
4003                 delta = user_ns.clock - now_ns;
4004                 local_irq_enable();
4005                 kvm->arch.kvmclock_offset = delta;
4006                 kvm_gen_update_masterclock(kvm);
4007                 break;
4008         }
4009         case KVM_GET_CLOCK: {
4010                 struct kvm_clock_data user_ns;
4011                 u64 now_ns;
4012
4013                 local_irq_disable();
4014                 now_ns = get_kernel_ns();
4015                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4016                 local_irq_enable();
4017                 user_ns.flags = 0;
4018                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4019
4020                 r = -EFAULT;
4021                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4022                         goto out;
4023                 r = 0;
4024                 break;
4025         }
4026         case KVM_ENABLE_CAP: {
4027                 struct kvm_enable_cap cap;
4028
4029                 r = -EFAULT;
4030                 if (copy_from_user(&cap, argp, sizeof(cap)))
4031                         goto out;
4032                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4033                 break;
4034         }
4035         default:
4036                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4037         }
4038 out:
4039         return r;
4040 }
4041
4042 static void kvm_init_msr_list(void)
4043 {
4044         u32 dummy[2];
4045         unsigned i, j;
4046
4047         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4048                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4049                         continue;
4050
4051                 /*
4052                  * Even MSRs that are valid in the host may not be exposed
4053                  * to the guests in some cases.
4054                  */
4055                 switch (msrs_to_save[i]) {
4056                 case MSR_IA32_BNDCFGS:
4057                         if (!kvm_x86_ops->mpx_supported())
4058                                 continue;
4059                         break;
4060                 case MSR_TSC_AUX:
4061                         if (!kvm_x86_ops->rdtscp_supported())
4062                                 continue;
4063                         break;
4064                 default:
4065                         break;
4066                 }
4067
4068                 if (j < i)
4069                         msrs_to_save[j] = msrs_to_save[i];
4070                 j++;
4071         }
4072         num_msrs_to_save = j;
4073
4074         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4075                 switch (emulated_msrs[i]) {
4076                 case MSR_IA32_SMBASE:
4077                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4078                                 continue;
4079                         break;
4080                 default:
4081                         break;
4082                 }
4083
4084                 if (j < i)
4085                         emulated_msrs[j] = emulated_msrs[i];
4086                 j++;
4087         }
4088         num_emulated_msrs = j;
4089 }
4090
4091 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4092                            const void *v)
4093 {
4094         int handled = 0;
4095         int n;
4096
4097         do {
4098                 n = min(len, 8);
4099                 if (!(lapic_in_kernel(vcpu) &&
4100                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4101                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4102                         break;
4103                 handled += n;
4104                 addr += n;
4105                 len -= n;
4106                 v += n;
4107         } while (len);
4108
4109         return handled;
4110 }
4111
4112 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4113 {
4114         int handled = 0;
4115         int n;
4116
4117         do {
4118                 n = min(len, 8);
4119                 if (!(lapic_in_kernel(vcpu) &&
4120                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4121                                          addr, n, v))
4122                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4123                         break;
4124                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4125                 handled += n;
4126                 addr += n;
4127                 len -= n;
4128                 v += n;
4129         } while (len);
4130
4131         return handled;
4132 }
4133
4134 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4135                         struct kvm_segment *var, int seg)
4136 {
4137         kvm_x86_ops->set_segment(vcpu, var, seg);
4138 }
4139
4140 void kvm_get_segment(struct kvm_vcpu *vcpu,
4141                      struct kvm_segment *var, int seg)
4142 {
4143         kvm_x86_ops->get_segment(vcpu, var, seg);
4144 }
4145
4146 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4147                            struct x86_exception *exception)
4148 {
4149         gpa_t t_gpa;
4150
4151         BUG_ON(!mmu_is_nested(vcpu));
4152
4153         /* NPT walks are always user-walks */
4154         access |= PFERR_USER_MASK;
4155         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4156
4157         return t_gpa;
4158 }
4159
4160 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4161                               struct x86_exception *exception)
4162 {
4163         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4164         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4165 }
4166
4167  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4168                                 struct x86_exception *exception)
4169 {
4170         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4171         access |= PFERR_FETCH_MASK;
4172         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4173 }
4174
4175 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4176                                struct x86_exception *exception)
4177 {
4178         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4179         access |= PFERR_WRITE_MASK;
4180         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4181 }
4182
4183 /* uses this to access any guest's mapped memory without checking CPL */
4184 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4185                                 struct x86_exception *exception)
4186 {
4187         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4188 }
4189
4190 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4191                                       struct kvm_vcpu *vcpu, u32 access,
4192                                       struct x86_exception *exception)
4193 {
4194         void *data = val;
4195         int r = X86EMUL_CONTINUE;
4196
4197         while (bytes) {
4198                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4199                                                             exception);
4200                 unsigned offset = addr & (PAGE_SIZE-1);
4201                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4202                 int ret;
4203
4204                 if (gpa == UNMAPPED_GVA)
4205                         return X86EMUL_PROPAGATE_FAULT;
4206                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4207                                                offset, toread);
4208                 if (ret < 0) {
4209                         r = X86EMUL_IO_NEEDED;
4210                         goto out;
4211                 }
4212
4213                 bytes -= toread;
4214                 data += toread;
4215                 addr += toread;
4216         }
4217 out:
4218         return r;
4219 }
4220
4221 /* used for instruction fetching */
4222 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4223                                 gva_t addr, void *val, unsigned int bytes,
4224                                 struct x86_exception *exception)
4225 {
4226         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4227         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4228         unsigned offset;
4229         int ret;
4230
4231         /* Inline kvm_read_guest_virt_helper for speed.  */
4232         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4233                                                     exception);
4234         if (unlikely(gpa == UNMAPPED_GVA))
4235                 return X86EMUL_PROPAGATE_FAULT;
4236
4237         offset = addr & (PAGE_SIZE-1);
4238         if (WARN_ON(offset + bytes > PAGE_SIZE))
4239                 bytes = (unsigned)PAGE_SIZE - offset;
4240         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4241                                        offset, bytes);
4242         if (unlikely(ret < 0))
4243                 return X86EMUL_IO_NEEDED;
4244
4245         return X86EMUL_CONTINUE;
4246 }
4247
4248 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4249                                gva_t addr, void *val, unsigned int bytes,
4250                                struct x86_exception *exception)
4251 {
4252         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4253         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4254
4255         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4256                                           exception);
4257 }
4258 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4259
4260 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4261                                       gva_t addr, void *val, unsigned int bytes,
4262                                       struct x86_exception *exception)
4263 {
4264         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4265         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4266 }
4267
4268 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4269                 unsigned long addr, void *val, unsigned int bytes)
4270 {
4271         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4272         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4273
4274         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4275 }
4276
4277 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4278                                        gva_t addr, void *val,
4279                                        unsigned int bytes,
4280                                        struct x86_exception *exception)
4281 {
4282         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4283         void *data = val;
4284         int r = X86EMUL_CONTINUE;
4285
4286         while (bytes) {
4287                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4288                                                              PFERR_WRITE_MASK,
4289                                                              exception);
4290                 unsigned offset = addr & (PAGE_SIZE-1);
4291                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4292                 int ret;
4293
4294                 if (gpa == UNMAPPED_GVA)
4295                         return X86EMUL_PROPAGATE_FAULT;
4296                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4297                 if (ret < 0) {
4298                         r = X86EMUL_IO_NEEDED;
4299                         goto out;
4300                 }
4301
4302                 bytes -= towrite;
4303                 data += towrite;
4304                 addr += towrite;
4305         }
4306 out:
4307         return r;
4308 }
4309 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4310
4311 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4312                                 gpa_t *gpa, struct x86_exception *exception,
4313                                 bool write)
4314 {
4315         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4316                 | (write ? PFERR_WRITE_MASK : 0);
4317
4318         /*
4319          * currently PKRU is only applied to ept enabled guest so
4320          * there is no pkey in EPT page table for L1 guest or EPT
4321          * shadow page table for L2 guest.
4322          */
4323         if (vcpu_match_mmio_gva(vcpu, gva)
4324             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4325                                  vcpu->arch.access, 0, access)) {
4326                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4327                                         (gva & (PAGE_SIZE - 1));
4328                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4329                 return 1;
4330         }
4331
4332         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4333
4334         if (*gpa == UNMAPPED_GVA)
4335                 return -1;
4336
4337         /* For APIC access vmexit */
4338         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4339                 return 1;
4340
4341         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4342                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4343                 return 1;
4344         }
4345
4346         return 0;
4347 }
4348
4349 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4350                         const void *val, int bytes)
4351 {
4352         int ret;
4353
4354         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4355         if (ret < 0)
4356                 return 0;
4357         kvm_page_track_write(vcpu, gpa, val, bytes);
4358         return 1;
4359 }
4360
4361 struct read_write_emulator_ops {
4362         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4363                                   int bytes);
4364         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4365                                   void *val, int bytes);
4366         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4367                                int bytes, void *val);
4368         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4369                                     void *val, int bytes);
4370         bool write;
4371 };
4372
4373 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4374 {
4375         if (vcpu->mmio_read_completed) {
4376                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4377                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4378                 vcpu->mmio_read_completed = 0;
4379                 return 1;
4380         }
4381
4382         return 0;
4383 }
4384
4385 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4386                         void *val, int bytes)
4387 {
4388         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4389 }
4390
4391 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4392                          void *val, int bytes)
4393 {
4394         return emulator_write_phys(vcpu, gpa, val, bytes);
4395 }
4396
4397 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4398 {
4399         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4400         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4401 }
4402
4403 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4404                           void *val, int bytes)
4405 {
4406         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4407         return X86EMUL_IO_NEEDED;
4408 }
4409
4410 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4411                            void *val, int bytes)
4412 {
4413         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4414
4415         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4416         return X86EMUL_CONTINUE;
4417 }
4418
4419 static const struct read_write_emulator_ops read_emultor = {
4420         .read_write_prepare = read_prepare,
4421         .read_write_emulate = read_emulate,
4422         .read_write_mmio = vcpu_mmio_read,
4423         .read_write_exit_mmio = read_exit_mmio,
4424 };
4425
4426 static const struct read_write_emulator_ops write_emultor = {
4427         .read_write_emulate = write_emulate,
4428         .read_write_mmio = write_mmio,
4429         .read_write_exit_mmio = write_exit_mmio,
4430         .write = true,
4431 };
4432
4433 static int emulator_read_write_onepage(unsigned long addr, void *val,
4434                                        unsigned int bytes,
4435                                        struct x86_exception *exception,
4436                                        struct kvm_vcpu *vcpu,
4437                                        const struct read_write_emulator_ops *ops)
4438 {
4439         gpa_t gpa;
4440         int handled, ret;
4441         bool write = ops->write;
4442         struct kvm_mmio_fragment *frag;
4443
4444         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4445
4446         if (ret < 0)
4447                 return X86EMUL_PROPAGATE_FAULT;
4448
4449         /* For APIC access vmexit */
4450         if (ret)
4451                 goto mmio;
4452
4453         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4454                 return X86EMUL_CONTINUE;
4455
4456 mmio:
4457         /*
4458          * Is this MMIO handled locally?
4459          */
4460         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4461         if (handled == bytes)
4462                 return X86EMUL_CONTINUE;
4463
4464         gpa += handled;
4465         bytes -= handled;
4466         val += handled;
4467
4468         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4469         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4470         frag->gpa = gpa;
4471         frag->data = val;
4472         frag->len = bytes;
4473         return X86EMUL_CONTINUE;
4474 }
4475
4476 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4477                         unsigned long addr,
4478                         void *val, unsigned int bytes,
4479                         struct x86_exception *exception,
4480                         const struct read_write_emulator_ops *ops)
4481 {
4482         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4483         gpa_t gpa;
4484         int rc;
4485
4486         if (ops->read_write_prepare &&
4487                   ops->read_write_prepare(vcpu, val, bytes))
4488                 return X86EMUL_CONTINUE;
4489
4490         vcpu->mmio_nr_fragments = 0;
4491
4492         /* Crossing a page boundary? */
4493         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4494                 int now;
4495
4496                 now = -addr & ~PAGE_MASK;
4497                 rc = emulator_read_write_onepage(addr, val, now, exception,
4498                                                  vcpu, ops);
4499
4500                 if (rc != X86EMUL_CONTINUE)
4501                         return rc;
4502                 addr += now;
4503                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4504                         addr = (u32)addr;
4505                 val += now;
4506                 bytes -= now;
4507         }
4508
4509         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4510                                          vcpu, ops);
4511         if (rc != X86EMUL_CONTINUE)
4512                 return rc;
4513
4514         if (!vcpu->mmio_nr_fragments)
4515                 return rc;
4516
4517         gpa = vcpu->mmio_fragments[0].gpa;
4518
4519         vcpu->mmio_needed = 1;
4520         vcpu->mmio_cur_fragment = 0;
4521
4522         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4523         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4524         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4525         vcpu->run->mmio.phys_addr = gpa;
4526
4527         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4528 }
4529
4530 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4531                                   unsigned long addr,
4532                                   void *val,
4533                                   unsigned int bytes,
4534                                   struct x86_exception *exception)
4535 {
4536         return emulator_read_write(ctxt, addr, val, bytes,
4537                                    exception, &read_emultor);
4538 }
4539
4540 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4541                             unsigned long addr,
4542                             const void *val,
4543                             unsigned int bytes,
4544                             struct x86_exception *exception)
4545 {
4546         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4547                                    exception, &write_emultor);
4548 }
4549
4550 #define CMPXCHG_TYPE(t, ptr, old, new) \
4551         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4552
4553 #ifdef CONFIG_X86_64
4554 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4555 #else
4556 #  define CMPXCHG64(ptr, old, new) \
4557         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4558 #endif
4559
4560 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4561                                      unsigned long addr,
4562                                      const void *old,
4563                                      const void *new,
4564                                      unsigned int bytes,
4565                                      struct x86_exception *exception)
4566 {
4567         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4568         gpa_t gpa;
4569         struct page *page;
4570         char *kaddr;
4571         bool exchanged;
4572
4573         /* guests cmpxchg8b have to be emulated atomically */
4574         if (bytes > 8 || (bytes & (bytes - 1)))
4575                 goto emul_write;
4576
4577         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4578
4579         if (gpa == UNMAPPED_GVA ||
4580             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4581                 goto emul_write;
4582
4583         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4584                 goto emul_write;
4585
4586         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4587         if (is_error_page(page))
4588                 goto emul_write;
4589
4590         kaddr = kmap_atomic(page);
4591         kaddr += offset_in_page(gpa);
4592         switch (bytes) {
4593         case 1:
4594                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4595                 break;
4596         case 2:
4597                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4598                 break;
4599         case 4:
4600                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4601                 break;
4602         case 8:
4603                 exchanged = CMPXCHG64(kaddr, old, new);
4604                 break;
4605         default:
4606                 BUG();
4607         }
4608         kunmap_atomic(kaddr);
4609         kvm_release_page_dirty(page);
4610
4611         if (!exchanged)
4612                 return X86EMUL_CMPXCHG_FAILED;
4613
4614         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4615         kvm_page_track_write(vcpu, gpa, new, bytes);
4616
4617         return X86EMUL_CONTINUE;
4618
4619 emul_write:
4620         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4621
4622         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4623 }
4624
4625 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4626 {
4627         /* TODO: String I/O for in kernel device */
4628         int r;
4629
4630         if (vcpu->arch.pio.in)
4631                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4632                                     vcpu->arch.pio.size, pd);
4633         else
4634                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4635                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4636                                      pd);
4637         return r;
4638 }
4639
4640 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4641                                unsigned short port, void *val,
4642                                unsigned int count, bool in)
4643 {
4644         vcpu->arch.pio.port = port;
4645         vcpu->arch.pio.in = in;
4646         vcpu->arch.pio.count  = count;
4647         vcpu->arch.pio.size = size;
4648
4649         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4650                 vcpu->arch.pio.count = 0;
4651                 return 1;
4652         }
4653
4654         vcpu->run->exit_reason = KVM_EXIT_IO;
4655         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4656         vcpu->run->io.size = size;
4657         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4658         vcpu->run->io.count = count;
4659         vcpu->run->io.port = port;
4660
4661         return 0;
4662 }
4663
4664 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4665                                     int size, unsigned short port, void *val,
4666                                     unsigned int count)
4667 {
4668         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4669         int ret;
4670
4671         if (vcpu->arch.pio.count)
4672                 goto data_avail;
4673
4674         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4675         if (ret) {
4676 data_avail:
4677                 memcpy(val, vcpu->arch.pio_data, size * count);
4678                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4679                 vcpu->arch.pio.count = 0;
4680                 return 1;
4681         }
4682
4683         return 0;
4684 }
4685
4686 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4687                                      int size, unsigned short port,
4688                                      const void *val, unsigned int count)
4689 {
4690         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4691
4692         memcpy(vcpu->arch.pio_data, val, size * count);
4693         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4694         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4695 }
4696
4697 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4698 {
4699         return kvm_x86_ops->get_segment_base(vcpu, seg);
4700 }
4701
4702 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4703 {
4704         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4705 }
4706
4707 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4708 {
4709         if (!need_emulate_wbinvd(vcpu))
4710                 return X86EMUL_CONTINUE;
4711
4712         if (kvm_x86_ops->has_wbinvd_exit()) {
4713                 int cpu = get_cpu();
4714
4715                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4716                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4717                                 wbinvd_ipi, NULL, 1);
4718                 put_cpu();
4719                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4720         } else
4721                 wbinvd();
4722         return X86EMUL_CONTINUE;
4723 }
4724
4725 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4726 {
4727         kvm_x86_ops->skip_emulated_instruction(vcpu);
4728         return kvm_emulate_wbinvd_noskip(vcpu);
4729 }
4730 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4731
4732
4733
4734 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4735 {
4736         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4737 }
4738
4739 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4740                            unsigned long *dest)
4741 {
4742         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4743 }
4744
4745 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4746                            unsigned long value)
4747 {
4748
4749         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4750 }
4751
4752 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4753 {
4754         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4755 }
4756
4757 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4758 {
4759         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4760         unsigned long value;
4761
4762         switch (cr) {
4763         case 0:
4764                 value = kvm_read_cr0(vcpu);
4765                 break;
4766         case 2:
4767                 value = vcpu->arch.cr2;
4768                 break;
4769         case 3:
4770                 value = kvm_read_cr3(vcpu);
4771                 break;
4772         case 4:
4773                 value = kvm_read_cr4(vcpu);
4774                 break;
4775         case 8:
4776                 value = kvm_get_cr8(vcpu);
4777                 break;
4778         default:
4779                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4780                 return 0;
4781         }
4782
4783         return value;
4784 }
4785
4786 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4787 {
4788         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4789         int res = 0;
4790
4791         switch (cr) {
4792         case 0:
4793                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4794                 break;
4795         case 2:
4796                 vcpu->arch.cr2 = val;
4797                 break;
4798         case 3:
4799                 res = kvm_set_cr3(vcpu, val);
4800                 break;
4801         case 4:
4802                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4803                 break;
4804         case 8:
4805                 res = kvm_set_cr8(vcpu, val);
4806                 break;
4807         default:
4808                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4809                 res = -1;
4810         }
4811
4812         return res;
4813 }
4814
4815 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4816 {
4817         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4818 }
4819
4820 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4821 {
4822         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4823 }
4824
4825 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4826 {
4827         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4828 }
4829
4830 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4831 {
4832         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4833 }
4834
4835 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4836 {
4837         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4838 }
4839
4840 static unsigned long emulator_get_cached_segment_base(
4841         struct x86_emulate_ctxt *ctxt, int seg)
4842 {
4843         return get_segment_base(emul_to_vcpu(ctxt), seg);
4844 }
4845
4846 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4847                                  struct desc_struct *desc, u32 *base3,
4848                                  int seg)
4849 {
4850         struct kvm_segment var;
4851
4852         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4853         *selector = var.selector;
4854
4855         if (var.unusable) {
4856                 memset(desc, 0, sizeof(*desc));
4857                 return false;
4858         }
4859
4860         if (var.g)
4861                 var.limit >>= 12;
4862         set_desc_limit(desc, var.limit);
4863         set_desc_base(desc, (unsigned long)var.base);
4864 #ifdef CONFIG_X86_64
4865         if (base3)
4866                 *base3 = var.base >> 32;
4867 #endif
4868         desc->type = var.type;
4869         desc->s = var.s;
4870         desc->dpl = var.dpl;
4871         desc->p = var.present;
4872         desc->avl = var.avl;
4873         desc->l = var.l;
4874         desc->d = var.db;
4875         desc->g = var.g;
4876
4877         return true;
4878 }
4879
4880 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4881                                  struct desc_struct *desc, u32 base3,
4882                                  int seg)
4883 {
4884         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4885         struct kvm_segment var;
4886
4887         var.selector = selector;
4888         var.base = get_desc_base(desc);
4889 #ifdef CONFIG_X86_64
4890         var.base |= ((u64)base3) << 32;
4891 #endif
4892         var.limit = get_desc_limit(desc);
4893         if (desc->g)
4894                 var.limit = (var.limit << 12) | 0xfff;
4895         var.type = desc->type;
4896         var.dpl = desc->dpl;
4897         var.db = desc->d;
4898         var.s = desc->s;
4899         var.l = desc->l;
4900         var.g = desc->g;
4901         var.avl = desc->avl;
4902         var.present = desc->p;
4903         var.unusable = !var.present;
4904         var.padding = 0;
4905
4906         kvm_set_segment(vcpu, &var, seg);
4907         return;
4908 }
4909
4910 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4911                             u32 msr_index, u64 *pdata)
4912 {
4913         struct msr_data msr;
4914         int r;
4915
4916         msr.index = msr_index;
4917         msr.host_initiated = false;
4918         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4919         if (r)
4920                 return r;
4921
4922         *pdata = msr.data;
4923         return 0;
4924 }
4925
4926 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4927                             u32 msr_index, u64 data)
4928 {
4929         struct msr_data msr;
4930
4931         msr.data = data;
4932         msr.index = msr_index;
4933         msr.host_initiated = false;
4934         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4935 }
4936
4937 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4938 {
4939         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4940
4941         return vcpu->arch.smbase;
4942 }
4943
4944 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4945 {
4946         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4947
4948         vcpu->arch.smbase = smbase;
4949 }
4950
4951 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4952                               u32 pmc)
4953 {
4954         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4955 }
4956
4957 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4958                              u32 pmc, u64 *pdata)
4959 {
4960         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4961 }
4962
4963 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4964 {
4965         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4966 }
4967
4968 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4969 {
4970         preempt_disable();
4971         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4972         /*
4973          * CR0.TS may reference the host fpu state, not the guest fpu state,
4974          * so it may be clear at this point.
4975          */
4976         clts();
4977 }
4978
4979 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4980 {
4981         preempt_enable();
4982 }
4983
4984 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4985                               struct x86_instruction_info *info,
4986                               enum x86_intercept_stage stage)
4987 {
4988         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4989 }
4990
4991 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4992                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4993 {
4994         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4995 }
4996
4997 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4998 {
4999         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5000 }
5001
5002 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5003 {
5004         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5005 }
5006
5007 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5008 {
5009         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5010 }
5011
5012 static const struct x86_emulate_ops emulate_ops = {
5013         .read_gpr            = emulator_read_gpr,
5014         .write_gpr           = emulator_write_gpr,
5015         .read_std            = kvm_read_guest_virt_system,
5016         .write_std           = kvm_write_guest_virt_system,
5017         .read_phys           = kvm_read_guest_phys_system,
5018         .fetch               = kvm_fetch_guest_virt,
5019         .read_emulated       = emulator_read_emulated,
5020         .write_emulated      = emulator_write_emulated,
5021         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5022         .invlpg              = emulator_invlpg,
5023         .pio_in_emulated     = emulator_pio_in_emulated,
5024         .pio_out_emulated    = emulator_pio_out_emulated,
5025         .get_segment         = emulator_get_segment,
5026         .set_segment         = emulator_set_segment,
5027         .get_cached_segment_base = emulator_get_cached_segment_base,
5028         .get_gdt             = emulator_get_gdt,
5029         .get_idt             = emulator_get_idt,
5030         .set_gdt             = emulator_set_gdt,
5031         .set_idt             = emulator_set_idt,
5032         .get_cr              = emulator_get_cr,
5033         .set_cr              = emulator_set_cr,
5034         .cpl                 = emulator_get_cpl,
5035         .get_dr              = emulator_get_dr,
5036         .set_dr              = emulator_set_dr,
5037         .get_smbase          = emulator_get_smbase,
5038         .set_smbase          = emulator_set_smbase,
5039         .set_msr             = emulator_set_msr,
5040         .get_msr             = emulator_get_msr,
5041         .check_pmc           = emulator_check_pmc,
5042         .read_pmc            = emulator_read_pmc,
5043         .halt                = emulator_halt,
5044         .wbinvd              = emulator_wbinvd,
5045         .fix_hypercall       = emulator_fix_hypercall,
5046         .get_fpu             = emulator_get_fpu,
5047         .put_fpu             = emulator_put_fpu,
5048         .intercept           = emulator_intercept,
5049         .get_cpuid           = emulator_get_cpuid,
5050         .set_nmi_mask        = emulator_set_nmi_mask,
5051 };
5052
5053 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5054 {
5055         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5056         /*
5057          * an sti; sti; sequence only disable interrupts for the first
5058          * instruction. So, if the last instruction, be it emulated or
5059          * not, left the system with the INT_STI flag enabled, it
5060          * means that the last instruction is an sti. We should not
5061          * leave the flag on in this case. The same goes for mov ss
5062          */
5063         if (int_shadow & mask)
5064                 mask = 0;
5065         if (unlikely(int_shadow || mask)) {
5066                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5067                 if (!mask)
5068                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5069         }
5070 }
5071
5072 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5073 {
5074         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5075         if (ctxt->exception.vector == PF_VECTOR)
5076                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5077
5078         if (ctxt->exception.error_code_valid)
5079                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5080                                       ctxt->exception.error_code);
5081         else
5082                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5083         return false;
5084 }
5085
5086 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5087 {
5088         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5089         int cs_db, cs_l;
5090
5091         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5092
5093         ctxt->eflags = kvm_get_rflags(vcpu);
5094         ctxt->eip = kvm_rip_read(vcpu);
5095         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5096                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5097                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5098                      cs_db                              ? X86EMUL_MODE_PROT32 :
5099                                                           X86EMUL_MODE_PROT16;
5100         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5101         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5102         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5103         ctxt->emul_flags = vcpu->arch.hflags;
5104
5105         init_decode_cache(ctxt);
5106         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5107 }
5108
5109 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5110 {
5111         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5112         int ret;
5113
5114         init_emulate_ctxt(vcpu);
5115
5116         ctxt->op_bytes = 2;
5117         ctxt->ad_bytes = 2;
5118         ctxt->_eip = ctxt->eip + inc_eip;
5119         ret = emulate_int_real(ctxt, irq);
5120
5121         if (ret != X86EMUL_CONTINUE)
5122                 return EMULATE_FAIL;
5123
5124         ctxt->eip = ctxt->_eip;
5125         kvm_rip_write(vcpu, ctxt->eip);
5126         kvm_set_rflags(vcpu, ctxt->eflags);
5127
5128         if (irq == NMI_VECTOR)
5129                 vcpu->arch.nmi_pending = 0;
5130         else
5131                 vcpu->arch.interrupt.pending = false;
5132
5133         return EMULATE_DONE;
5134 }
5135 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5136
5137 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5138 {
5139         int r = EMULATE_DONE;
5140
5141         ++vcpu->stat.insn_emulation_fail;
5142         trace_kvm_emulate_insn_failed(vcpu);
5143         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5144                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5145                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5146                 vcpu->run->internal.ndata = 0;
5147                 r = EMULATE_FAIL;
5148         }
5149         kvm_queue_exception(vcpu, UD_VECTOR);
5150
5151         return r;
5152 }
5153
5154 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5155                                   bool write_fault_to_shadow_pgtable,
5156                                   int emulation_type)
5157 {
5158         gpa_t gpa = cr2;
5159         kvm_pfn_t pfn;
5160
5161         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5162                 return false;
5163
5164         if (!vcpu->arch.mmu.direct_map) {
5165                 /*
5166                  * Write permission should be allowed since only
5167                  * write access need to be emulated.
5168                  */
5169                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5170
5171                 /*
5172                  * If the mapping is invalid in guest, let cpu retry
5173                  * it to generate fault.
5174                  */
5175                 if (gpa == UNMAPPED_GVA)
5176                         return true;
5177         }
5178
5179         /*
5180          * Do not retry the unhandleable instruction if it faults on the
5181          * readonly host memory, otherwise it will goto a infinite loop:
5182          * retry instruction -> write #PF -> emulation fail -> retry
5183          * instruction -> ...
5184          */
5185         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5186
5187         /*
5188          * If the instruction failed on the error pfn, it can not be fixed,
5189          * report the error to userspace.
5190          */
5191         if (is_error_noslot_pfn(pfn))
5192                 return false;
5193
5194         kvm_release_pfn_clean(pfn);
5195
5196         /* The instructions are well-emulated on direct mmu. */
5197         if (vcpu->arch.mmu.direct_map) {
5198                 unsigned int indirect_shadow_pages;
5199
5200                 spin_lock(&vcpu->kvm->mmu_lock);
5201                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5202                 spin_unlock(&vcpu->kvm->mmu_lock);
5203
5204                 if (indirect_shadow_pages)
5205                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5206
5207                 return true;
5208         }
5209
5210         /*
5211          * if emulation was due to access to shadowed page table
5212          * and it failed try to unshadow page and re-enter the
5213          * guest to let CPU execute the instruction.
5214          */
5215         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5216
5217         /*
5218          * If the access faults on its page table, it can not
5219          * be fixed by unprotecting shadow page and it should
5220          * be reported to userspace.
5221          */
5222         return !write_fault_to_shadow_pgtable;
5223 }
5224
5225 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5226                               unsigned long cr2,  int emulation_type)
5227 {
5228         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5229         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5230
5231         last_retry_eip = vcpu->arch.last_retry_eip;
5232         last_retry_addr = vcpu->arch.last_retry_addr;
5233
5234         /*
5235          * If the emulation is caused by #PF and it is non-page_table
5236          * writing instruction, it means the VM-EXIT is caused by shadow
5237          * page protected, we can zap the shadow page and retry this
5238          * instruction directly.
5239          *
5240          * Note: if the guest uses a non-page-table modifying instruction
5241          * on the PDE that points to the instruction, then we will unmap
5242          * the instruction and go to an infinite loop. So, we cache the
5243          * last retried eip and the last fault address, if we meet the eip
5244          * and the address again, we can break out of the potential infinite
5245          * loop.
5246          */
5247         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5248
5249         if (!(emulation_type & EMULTYPE_RETRY))
5250                 return false;
5251
5252         if (x86_page_table_writing_insn(ctxt))
5253                 return false;
5254
5255         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5256                 return false;
5257
5258         vcpu->arch.last_retry_eip = ctxt->eip;
5259         vcpu->arch.last_retry_addr = cr2;
5260
5261         if (!vcpu->arch.mmu.direct_map)
5262                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5263
5264         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5265
5266         return true;
5267 }
5268
5269 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5270 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5271
5272 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5273 {
5274         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5275                 /* This is a good place to trace that we are exiting SMM.  */
5276                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5277
5278                 if (unlikely(vcpu->arch.smi_pending)) {
5279                         kvm_make_request(KVM_REQ_SMI, vcpu);
5280                         vcpu->arch.smi_pending = 0;
5281                 } else {
5282                         /* Process a latched INIT, if any.  */
5283                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5284                 }
5285         }
5286
5287         kvm_mmu_reset_context(vcpu);
5288 }
5289
5290 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5291 {
5292         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5293
5294         vcpu->arch.hflags = emul_flags;
5295
5296         if (changed & HF_SMM_MASK)
5297                 kvm_smm_changed(vcpu);
5298 }
5299
5300 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5301                                 unsigned long *db)
5302 {
5303         u32 dr6 = 0;
5304         int i;
5305         u32 enable, rwlen;
5306
5307         enable = dr7;
5308         rwlen = dr7 >> 16;
5309         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5310                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5311                         dr6 |= (1 << i);
5312         return dr6;
5313 }
5314
5315 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5316 {
5317         struct kvm_run *kvm_run = vcpu->run;
5318
5319         /*
5320          * rflags is the old, "raw" value of the flags.  The new value has
5321          * not been saved yet.
5322          *
5323          * This is correct even for TF set by the guest, because "the
5324          * processor will not generate this exception after the instruction
5325          * that sets the TF flag".
5326          */
5327         if (unlikely(rflags & X86_EFLAGS_TF)) {
5328                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5329                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5330                                                   DR6_RTM;
5331                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5332                         kvm_run->debug.arch.exception = DB_VECTOR;
5333                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5334                         *r = EMULATE_USER_EXIT;
5335                 } else {
5336                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5337                         /*
5338                          * "Certain debug exceptions may clear bit 0-3.  The
5339                          * remaining contents of the DR6 register are never
5340                          * cleared by the processor".
5341                          */
5342                         vcpu->arch.dr6 &= ~15;
5343                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5344                         kvm_queue_exception(vcpu, DB_VECTOR);
5345                 }
5346         }
5347 }
5348
5349 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5350 {
5351         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5352             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5353                 struct kvm_run *kvm_run = vcpu->run;
5354                 unsigned long eip = kvm_get_linear_rip(vcpu);
5355                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5356                                            vcpu->arch.guest_debug_dr7,
5357                                            vcpu->arch.eff_db);
5358
5359                 if (dr6 != 0) {
5360                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5361                         kvm_run->debug.arch.pc = eip;
5362                         kvm_run->debug.arch.exception = DB_VECTOR;
5363                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5364                         *r = EMULATE_USER_EXIT;
5365                         return true;
5366                 }
5367         }
5368
5369         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5370             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5371                 unsigned long eip = kvm_get_linear_rip(vcpu);
5372                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5373                                            vcpu->arch.dr7,
5374                                            vcpu->arch.db);
5375
5376                 if (dr6 != 0) {
5377                         vcpu->arch.dr6 &= ~15;
5378                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5379                         kvm_queue_exception(vcpu, DB_VECTOR);
5380                         *r = EMULATE_DONE;
5381                         return true;
5382                 }
5383         }
5384
5385         return false;
5386 }
5387
5388 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5389                             unsigned long cr2,
5390                             int emulation_type,
5391                             void *insn,
5392                             int insn_len)
5393 {
5394         int r;
5395         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5396         bool writeback = true;
5397         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5398
5399         /*
5400          * Clear write_fault_to_shadow_pgtable here to ensure it is
5401          * never reused.
5402          */
5403         vcpu->arch.write_fault_to_shadow_pgtable = false;
5404         kvm_clear_exception_queue(vcpu);
5405
5406         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5407                 init_emulate_ctxt(vcpu);
5408
5409                 /*
5410                  * We will reenter on the same instruction since
5411                  * we do not set complete_userspace_io.  This does not
5412                  * handle watchpoints yet, those would be handled in
5413                  * the emulate_ops.
5414                  */
5415                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5416                         return r;
5417
5418                 ctxt->interruptibility = 0;
5419                 ctxt->have_exception = false;
5420                 ctxt->exception.vector = -1;
5421                 ctxt->perm_ok = false;
5422
5423                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5424
5425                 r = x86_decode_insn(ctxt, insn, insn_len);
5426
5427                 trace_kvm_emulate_insn_start(vcpu);
5428                 ++vcpu->stat.insn_emulation;
5429                 if (r != EMULATION_OK)  {
5430                         if (emulation_type & EMULTYPE_TRAP_UD)
5431                                 return EMULATE_FAIL;
5432                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5433                                                 emulation_type))
5434                                 return EMULATE_DONE;
5435                         if (emulation_type & EMULTYPE_SKIP)
5436                                 return EMULATE_FAIL;
5437                         return handle_emulation_failure(vcpu);
5438                 }
5439         }
5440
5441         if (emulation_type & EMULTYPE_SKIP) {
5442                 kvm_rip_write(vcpu, ctxt->_eip);
5443                 if (ctxt->eflags & X86_EFLAGS_RF)
5444                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5445                 return EMULATE_DONE;
5446         }
5447
5448         if (retry_instruction(ctxt, cr2, emulation_type))
5449                 return EMULATE_DONE;
5450
5451         /* this is needed for vmware backdoor interface to work since it
5452            changes registers values  during IO operation */
5453         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5454                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5455                 emulator_invalidate_register_cache(ctxt);
5456         }
5457
5458 restart:
5459         r = x86_emulate_insn(ctxt);
5460
5461         if (r == EMULATION_INTERCEPTED)
5462                 return EMULATE_DONE;
5463
5464         if (r == EMULATION_FAILED) {
5465                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5466                                         emulation_type))
5467                         return EMULATE_DONE;
5468
5469                 return handle_emulation_failure(vcpu);
5470         }
5471
5472         if (ctxt->have_exception) {
5473                 r = EMULATE_DONE;
5474                 if (inject_emulated_exception(vcpu))
5475                         return r;
5476         } else if (vcpu->arch.pio.count) {
5477                 if (!vcpu->arch.pio.in) {
5478                         /* FIXME: return into emulator if single-stepping.  */
5479                         vcpu->arch.pio.count = 0;
5480                 } else {
5481                         writeback = false;
5482                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5483                 }
5484                 r = EMULATE_USER_EXIT;
5485         } else if (vcpu->mmio_needed) {
5486                 if (!vcpu->mmio_is_write)
5487                         writeback = false;
5488                 r = EMULATE_USER_EXIT;
5489                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5490         } else if (r == EMULATION_RESTART)
5491                 goto restart;
5492         else
5493                 r = EMULATE_DONE;
5494
5495         if (writeback) {
5496                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5497                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5498                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5499                 if (vcpu->arch.hflags != ctxt->emul_flags)
5500                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5501                 kvm_rip_write(vcpu, ctxt->eip);
5502                 if (r == EMULATE_DONE)
5503                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5504                 if (!ctxt->have_exception ||
5505                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5506                         __kvm_set_rflags(vcpu, ctxt->eflags);
5507
5508                 /*
5509                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5510                  * do nothing, and it will be requested again as soon as
5511                  * the shadow expires.  But we still need to check here,
5512                  * because POPF has no interrupt shadow.
5513                  */
5514                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5515                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5516         } else
5517                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5518
5519         return r;
5520 }
5521 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5522
5523 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5524 {
5525         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5526         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5527                                             size, port, &val, 1);
5528         /* do not return to emulator after return from userspace */
5529         vcpu->arch.pio.count = 0;
5530         return ret;
5531 }
5532 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5533
5534 static void tsc_bad(void *info)
5535 {
5536         __this_cpu_write(cpu_tsc_khz, 0);
5537 }
5538
5539 static void tsc_khz_changed(void *data)
5540 {
5541         struct cpufreq_freqs *freq = data;
5542         unsigned long khz = 0;
5543
5544         if (data)
5545                 khz = freq->new;
5546         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5547                 khz = cpufreq_quick_get(raw_smp_processor_id());
5548         if (!khz)
5549                 khz = tsc_khz;
5550         __this_cpu_write(cpu_tsc_khz, khz);
5551 }
5552
5553 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5554                                      void *data)
5555 {
5556         struct cpufreq_freqs *freq = data;
5557         struct kvm *kvm;
5558         struct kvm_vcpu *vcpu;
5559         int i, send_ipi = 0;
5560
5561         /*
5562          * We allow guests to temporarily run on slowing clocks,
5563          * provided we notify them after, or to run on accelerating
5564          * clocks, provided we notify them before.  Thus time never
5565          * goes backwards.
5566          *
5567          * However, we have a problem.  We can't atomically update
5568          * the frequency of a given CPU from this function; it is
5569          * merely a notifier, which can be called from any CPU.
5570          * Changing the TSC frequency at arbitrary points in time
5571          * requires a recomputation of local variables related to
5572          * the TSC for each VCPU.  We must flag these local variables
5573          * to be updated and be sure the update takes place with the
5574          * new frequency before any guests proceed.
5575          *
5576          * Unfortunately, the combination of hotplug CPU and frequency
5577          * change creates an intractable locking scenario; the order
5578          * of when these callouts happen is undefined with respect to
5579          * CPU hotplug, and they can race with each other.  As such,
5580          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5581          * undefined; you can actually have a CPU frequency change take
5582          * place in between the computation of X and the setting of the
5583          * variable.  To protect against this problem, all updates of
5584          * the per_cpu tsc_khz variable are done in an interrupt
5585          * protected IPI, and all callers wishing to update the value
5586          * must wait for a synchronous IPI to complete (which is trivial
5587          * if the caller is on the CPU already).  This establishes the
5588          * necessary total order on variable updates.
5589          *
5590          * Note that because a guest time update may take place
5591          * anytime after the setting of the VCPU's request bit, the
5592          * correct TSC value must be set before the request.  However,
5593          * to ensure the update actually makes it to any guest which
5594          * starts running in hardware virtualization between the set
5595          * and the acquisition of the spinlock, we must also ping the
5596          * CPU after setting the request bit.
5597          *
5598          */
5599
5600         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5601                 return 0;
5602         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5603                 return 0;
5604
5605         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5606
5607         spin_lock(&kvm_lock);
5608         list_for_each_entry(kvm, &vm_list, vm_list) {
5609                 kvm_for_each_vcpu(i, vcpu, kvm) {
5610                         if (vcpu->cpu != freq->cpu)
5611                                 continue;
5612                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5613                         if (vcpu->cpu != smp_processor_id())
5614                                 send_ipi = 1;
5615                 }
5616         }
5617         spin_unlock(&kvm_lock);
5618
5619         if (freq->old < freq->new && send_ipi) {
5620                 /*
5621                  * We upscale the frequency.  Must make the guest
5622                  * doesn't see old kvmclock values while running with
5623                  * the new frequency, otherwise we risk the guest sees
5624                  * time go backwards.
5625                  *
5626                  * In case we update the frequency for another cpu
5627                  * (which might be in guest context) send an interrupt
5628                  * to kick the cpu out of guest context.  Next time
5629                  * guest context is entered kvmclock will be updated,
5630                  * so the guest will not see stale values.
5631                  */
5632                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5633         }
5634         return 0;
5635 }
5636
5637 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5638         .notifier_call  = kvmclock_cpufreq_notifier
5639 };
5640
5641 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5642                                         unsigned long action, void *hcpu)
5643 {
5644         unsigned int cpu = (unsigned long)hcpu;
5645
5646         switch (action) {
5647                 case CPU_ONLINE:
5648                 case CPU_DOWN_FAILED:
5649                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5650                         break;
5651                 case CPU_DOWN_PREPARE:
5652                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5653                         break;
5654         }
5655         return NOTIFY_OK;
5656 }
5657
5658 static struct notifier_block kvmclock_cpu_notifier_block = {
5659         .notifier_call  = kvmclock_cpu_notifier,
5660         .priority = -INT_MAX
5661 };
5662
5663 static void kvm_timer_init(void)
5664 {
5665         int cpu;
5666
5667         max_tsc_khz = tsc_khz;
5668
5669         cpu_notifier_register_begin();
5670         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5671 #ifdef CONFIG_CPU_FREQ
5672                 struct cpufreq_policy policy;
5673                 memset(&policy, 0, sizeof(policy));
5674                 cpu = get_cpu();
5675                 cpufreq_get_policy(&policy, cpu);
5676                 if (policy.cpuinfo.max_freq)
5677                         max_tsc_khz = policy.cpuinfo.max_freq;
5678                 put_cpu();
5679 #endif
5680                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5681                                           CPUFREQ_TRANSITION_NOTIFIER);
5682         }
5683         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5684         for_each_online_cpu(cpu)
5685                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5686
5687         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5688         cpu_notifier_register_done();
5689
5690 }
5691
5692 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5693
5694 int kvm_is_in_guest(void)
5695 {
5696         return __this_cpu_read(current_vcpu) != NULL;
5697 }
5698
5699 static int kvm_is_user_mode(void)
5700 {
5701         int user_mode = 3;
5702
5703         if (__this_cpu_read(current_vcpu))
5704                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5705
5706         return user_mode != 0;
5707 }
5708
5709 static unsigned long kvm_get_guest_ip(void)
5710 {
5711         unsigned long ip = 0;
5712
5713         if (__this_cpu_read(current_vcpu))
5714                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5715
5716         return ip;
5717 }
5718
5719 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5720         .is_in_guest            = kvm_is_in_guest,
5721         .is_user_mode           = kvm_is_user_mode,
5722         .get_guest_ip           = kvm_get_guest_ip,
5723 };
5724
5725 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5726 {
5727         __this_cpu_write(current_vcpu, vcpu);
5728 }
5729 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5730
5731 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5732 {
5733         __this_cpu_write(current_vcpu, NULL);
5734 }
5735 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5736
5737 static void kvm_set_mmio_spte_mask(void)
5738 {
5739         u64 mask;
5740         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5741
5742         /*
5743          * Set the reserved bits and the present bit of an paging-structure
5744          * entry to generate page fault with PFER.RSV = 1.
5745          */
5746          /* Mask the reserved physical address bits. */
5747         mask = rsvd_bits(maxphyaddr, 51);
5748
5749         /* Bit 62 is always reserved for 32bit host. */
5750         mask |= 0x3ull << 62;
5751
5752         /* Set the present bit. */
5753         mask |= 1ull;
5754
5755 #ifdef CONFIG_X86_64
5756         /*
5757          * If reserved bit is not supported, clear the present bit to disable
5758          * mmio page fault.
5759          */
5760         if (maxphyaddr == 52)
5761                 mask &= ~1ull;
5762 #endif
5763
5764         kvm_mmu_set_mmio_spte_mask(mask);
5765 }
5766
5767 #ifdef CONFIG_X86_64
5768 static void pvclock_gtod_update_fn(struct work_struct *work)
5769 {
5770         struct kvm *kvm;
5771
5772         struct kvm_vcpu *vcpu;
5773         int i;
5774
5775         spin_lock(&kvm_lock);
5776         list_for_each_entry(kvm, &vm_list, vm_list)
5777                 kvm_for_each_vcpu(i, vcpu, kvm)
5778                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5779         atomic_set(&kvm_guest_has_master_clock, 0);
5780         spin_unlock(&kvm_lock);
5781 }
5782
5783 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5784
5785 /*
5786  * Notification about pvclock gtod data update.
5787  */
5788 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5789                                void *priv)
5790 {
5791         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5792         struct timekeeper *tk = priv;
5793
5794         update_pvclock_gtod(tk);
5795
5796         /* disable master clock if host does not trust, or does not
5797          * use, TSC clocksource
5798          */
5799         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5800             atomic_read(&kvm_guest_has_master_clock) != 0)
5801                 queue_work(system_long_wq, &pvclock_gtod_work);
5802
5803         return 0;
5804 }
5805
5806 static struct notifier_block pvclock_gtod_notifier = {
5807         .notifier_call = pvclock_gtod_notify,
5808 };
5809 #endif
5810
5811 int kvm_arch_init(void *opaque)
5812 {
5813         int r;
5814         struct kvm_x86_ops *ops = opaque;
5815
5816         if (kvm_x86_ops) {
5817                 printk(KERN_ERR "kvm: already loaded the other module\n");
5818                 r = -EEXIST;
5819                 goto out;
5820         }
5821
5822         if (!ops->cpu_has_kvm_support()) {
5823                 printk(KERN_ERR "kvm: no hardware support\n");
5824                 r = -EOPNOTSUPP;
5825                 goto out;
5826         }
5827         if (ops->disabled_by_bios()) {
5828                 printk(KERN_ERR "kvm: disabled by bios\n");
5829                 r = -EOPNOTSUPP;
5830                 goto out;
5831         }
5832
5833         r = -ENOMEM;
5834         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5835         if (!shared_msrs) {
5836                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5837                 goto out;
5838         }
5839
5840         r = kvm_mmu_module_init();
5841         if (r)
5842                 goto out_free_percpu;
5843
5844         kvm_set_mmio_spte_mask();
5845
5846         kvm_x86_ops = ops;
5847
5848         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5849                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5850
5851         kvm_timer_init();
5852
5853         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5854
5855         if (cpu_has_xsave)
5856                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5857
5858         kvm_lapic_init();
5859 #ifdef CONFIG_X86_64
5860         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5861 #endif
5862
5863         return 0;
5864
5865 out_free_percpu:
5866         free_percpu(shared_msrs);
5867 out:
5868         return r;
5869 }
5870
5871 void kvm_arch_exit(void)
5872 {
5873         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5874
5875         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5876                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5877                                             CPUFREQ_TRANSITION_NOTIFIER);
5878         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5879 #ifdef CONFIG_X86_64
5880         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5881 #endif
5882         kvm_x86_ops = NULL;
5883         kvm_mmu_module_exit();
5884         free_percpu(shared_msrs);
5885 }
5886
5887 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5888 {
5889         ++vcpu->stat.halt_exits;
5890         if (lapic_in_kernel(vcpu)) {
5891                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5892                 return 1;
5893         } else {
5894                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5895                 return 0;
5896         }
5897 }
5898 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5899
5900 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5901 {
5902         kvm_x86_ops->skip_emulated_instruction(vcpu);
5903         return kvm_vcpu_halt(vcpu);
5904 }
5905 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5906
5907 /*
5908  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5909  *
5910  * @apicid - apicid of vcpu to be kicked.
5911  */
5912 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5913 {
5914         struct kvm_lapic_irq lapic_irq;
5915
5916         lapic_irq.shorthand = 0;
5917         lapic_irq.dest_mode = 0;
5918         lapic_irq.dest_id = apicid;
5919         lapic_irq.msi_redir_hint = false;
5920
5921         lapic_irq.delivery_mode = APIC_DM_REMRD;
5922         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5923 }
5924
5925 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
5926 {
5927         vcpu->arch.apicv_active = false;
5928         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
5929 }
5930
5931 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5932 {
5933         unsigned long nr, a0, a1, a2, a3, ret;
5934         int op_64_bit, r = 1;
5935
5936         kvm_x86_ops->skip_emulated_instruction(vcpu);
5937
5938         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5939                 return kvm_hv_hypercall(vcpu);
5940
5941         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5942         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5943         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5944         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5945         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5946
5947         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5948
5949         op_64_bit = is_64_bit_mode(vcpu);
5950         if (!op_64_bit) {
5951                 nr &= 0xFFFFFFFF;
5952                 a0 &= 0xFFFFFFFF;
5953                 a1 &= 0xFFFFFFFF;
5954                 a2 &= 0xFFFFFFFF;
5955                 a3 &= 0xFFFFFFFF;
5956         }
5957
5958         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5959                 ret = -KVM_EPERM;
5960                 goto out;
5961         }
5962
5963         switch (nr) {
5964         case KVM_HC_VAPIC_POLL_IRQ:
5965                 ret = 0;
5966                 break;
5967         case KVM_HC_KICK_CPU:
5968                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5969                 ret = 0;
5970                 break;
5971         default:
5972                 ret = -KVM_ENOSYS;
5973                 break;
5974         }
5975 out:
5976         if (!op_64_bit)
5977                 ret = (u32)ret;
5978         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5979         ++vcpu->stat.hypercalls;
5980         return r;
5981 }
5982 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5983
5984 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5985 {
5986         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5987         char instruction[3];
5988         unsigned long rip = kvm_rip_read(vcpu);
5989
5990         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5991
5992         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5993 }
5994
5995 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5996 {
5997         return vcpu->run->request_interrupt_window &&
5998                 likely(!pic_in_kernel(vcpu->kvm));
5999 }
6000
6001 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6002 {
6003         struct kvm_run *kvm_run = vcpu->run;
6004
6005         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6006         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6007         kvm_run->cr8 = kvm_get_cr8(vcpu);
6008         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6009         kvm_run->ready_for_interrupt_injection =
6010                 pic_in_kernel(vcpu->kvm) ||
6011                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6012 }
6013
6014 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6015 {
6016         int max_irr, tpr;
6017
6018         if (!kvm_x86_ops->update_cr8_intercept)
6019                 return;
6020
6021         if (!lapic_in_kernel(vcpu))
6022                 return;
6023
6024         if (vcpu->arch.apicv_active)
6025                 return;
6026
6027         if (!vcpu->arch.apic->vapic_addr)
6028                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6029         else
6030                 max_irr = -1;
6031
6032         if (max_irr != -1)
6033                 max_irr >>= 4;
6034
6035         tpr = kvm_lapic_get_cr8(vcpu);
6036
6037         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6038 }
6039
6040 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6041 {
6042         int r;
6043
6044         /* try to reinject previous events if any */
6045         if (vcpu->arch.exception.pending) {
6046                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6047                                         vcpu->arch.exception.has_error_code,
6048                                         vcpu->arch.exception.error_code);
6049
6050                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6051                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6052                                              X86_EFLAGS_RF);
6053
6054                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6055                     (vcpu->arch.dr7 & DR7_GD)) {
6056                         vcpu->arch.dr7 &= ~DR7_GD;
6057                         kvm_update_dr7(vcpu);
6058                 }
6059
6060                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6061                                           vcpu->arch.exception.has_error_code,
6062                                           vcpu->arch.exception.error_code,
6063                                           vcpu->arch.exception.reinject);
6064                 return 0;
6065         }
6066
6067         if (vcpu->arch.nmi_injected) {
6068                 kvm_x86_ops->set_nmi(vcpu);
6069                 return 0;
6070         }
6071
6072         if (vcpu->arch.interrupt.pending) {
6073                 kvm_x86_ops->set_irq(vcpu);
6074                 return 0;
6075         }
6076
6077         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6078                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6079                 if (r != 0)
6080                         return r;
6081         }
6082
6083         /* try to inject new event if pending */
6084         if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6085                 --vcpu->arch.nmi_pending;
6086                 vcpu->arch.nmi_injected = true;
6087                 kvm_x86_ops->set_nmi(vcpu);
6088         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6089                 /*
6090                  * Because interrupts can be injected asynchronously, we are
6091                  * calling check_nested_events again here to avoid a race condition.
6092                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6093                  * proposal and current concerns.  Perhaps we should be setting
6094                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6095                  */
6096                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6097                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6098                         if (r != 0)
6099                                 return r;
6100                 }
6101                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6102                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6103                                             false);
6104                         kvm_x86_ops->set_irq(vcpu);
6105                 }
6106         }
6107         return 0;
6108 }
6109
6110 static void process_nmi(struct kvm_vcpu *vcpu)
6111 {
6112         unsigned limit = 2;
6113
6114         /*
6115          * x86 is limited to one NMI running, and one NMI pending after it.
6116          * If an NMI is already in progress, limit further NMIs to just one.
6117          * Otherwise, allow two (and we'll inject the first one immediately).
6118          */
6119         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6120                 limit = 1;
6121
6122         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6123         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6124         kvm_make_request(KVM_REQ_EVENT, vcpu);
6125 }
6126
6127 #define put_smstate(type, buf, offset, val)                       \
6128         *(type *)((buf) + (offset) - 0x7e00) = val
6129
6130 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6131 {
6132         u32 flags = 0;
6133         flags |= seg->g       << 23;
6134         flags |= seg->db      << 22;
6135         flags |= seg->l       << 21;
6136         flags |= seg->avl     << 20;
6137         flags |= seg->present << 15;
6138         flags |= seg->dpl     << 13;
6139         flags |= seg->s       << 12;
6140         flags |= seg->type    << 8;
6141         return flags;
6142 }
6143
6144 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6145 {
6146         struct kvm_segment seg;
6147         int offset;
6148
6149         kvm_get_segment(vcpu, &seg, n);
6150         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6151
6152         if (n < 3)
6153                 offset = 0x7f84 + n * 12;
6154         else
6155                 offset = 0x7f2c + (n - 3) * 12;
6156
6157         put_smstate(u32, buf, offset + 8, seg.base);
6158         put_smstate(u32, buf, offset + 4, seg.limit);
6159         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6160 }
6161
6162 #ifdef CONFIG_X86_64
6163 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6164 {
6165         struct kvm_segment seg;
6166         int offset;
6167         u16 flags;
6168
6169         kvm_get_segment(vcpu, &seg, n);
6170         offset = 0x7e00 + n * 16;
6171
6172         flags = process_smi_get_segment_flags(&seg) >> 8;
6173         put_smstate(u16, buf, offset, seg.selector);
6174         put_smstate(u16, buf, offset + 2, flags);
6175         put_smstate(u32, buf, offset + 4, seg.limit);
6176         put_smstate(u64, buf, offset + 8, seg.base);
6177 }
6178 #endif
6179
6180 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6181 {
6182         struct desc_ptr dt;
6183         struct kvm_segment seg;
6184         unsigned long val;
6185         int i;
6186
6187         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6188         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6189         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6190         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6191
6192         for (i = 0; i < 8; i++)
6193                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6194
6195         kvm_get_dr(vcpu, 6, &val);
6196         put_smstate(u32, buf, 0x7fcc, (u32)val);
6197         kvm_get_dr(vcpu, 7, &val);
6198         put_smstate(u32, buf, 0x7fc8, (u32)val);
6199
6200         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6201         put_smstate(u32, buf, 0x7fc4, seg.selector);
6202         put_smstate(u32, buf, 0x7f64, seg.base);
6203         put_smstate(u32, buf, 0x7f60, seg.limit);
6204         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6205
6206         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6207         put_smstate(u32, buf, 0x7fc0, seg.selector);
6208         put_smstate(u32, buf, 0x7f80, seg.base);
6209         put_smstate(u32, buf, 0x7f7c, seg.limit);
6210         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6211
6212         kvm_x86_ops->get_gdt(vcpu, &dt);
6213         put_smstate(u32, buf, 0x7f74, dt.address);
6214         put_smstate(u32, buf, 0x7f70, dt.size);
6215
6216         kvm_x86_ops->get_idt(vcpu, &dt);
6217         put_smstate(u32, buf, 0x7f58, dt.address);
6218         put_smstate(u32, buf, 0x7f54, dt.size);
6219
6220         for (i = 0; i < 6; i++)
6221                 process_smi_save_seg_32(vcpu, buf, i);
6222
6223         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6224
6225         /* revision id */
6226         put_smstate(u32, buf, 0x7efc, 0x00020000);
6227         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6228 }
6229
6230 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6231 {
6232 #ifdef CONFIG_X86_64
6233         struct desc_ptr dt;
6234         struct kvm_segment seg;
6235         unsigned long val;
6236         int i;
6237
6238         for (i = 0; i < 16; i++)
6239                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6240
6241         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6242         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6243
6244         kvm_get_dr(vcpu, 6, &val);
6245         put_smstate(u64, buf, 0x7f68, val);
6246         kvm_get_dr(vcpu, 7, &val);
6247         put_smstate(u64, buf, 0x7f60, val);
6248
6249         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6250         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6251         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6252
6253         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6254
6255         /* revision id */
6256         put_smstate(u32, buf, 0x7efc, 0x00020064);
6257
6258         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6259
6260         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6261         put_smstate(u16, buf, 0x7e90, seg.selector);
6262         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6263         put_smstate(u32, buf, 0x7e94, seg.limit);
6264         put_smstate(u64, buf, 0x7e98, seg.base);
6265
6266         kvm_x86_ops->get_idt(vcpu, &dt);
6267         put_smstate(u32, buf, 0x7e84, dt.size);
6268         put_smstate(u64, buf, 0x7e88, dt.address);
6269
6270         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6271         put_smstate(u16, buf, 0x7e70, seg.selector);
6272         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6273         put_smstate(u32, buf, 0x7e74, seg.limit);
6274         put_smstate(u64, buf, 0x7e78, seg.base);
6275
6276         kvm_x86_ops->get_gdt(vcpu, &dt);
6277         put_smstate(u32, buf, 0x7e64, dt.size);
6278         put_smstate(u64, buf, 0x7e68, dt.address);
6279
6280         for (i = 0; i < 6; i++)
6281                 process_smi_save_seg_64(vcpu, buf, i);
6282 #else
6283         WARN_ON_ONCE(1);
6284 #endif
6285 }
6286
6287 static void process_smi(struct kvm_vcpu *vcpu)
6288 {
6289         struct kvm_segment cs, ds;
6290         struct desc_ptr dt;
6291         char buf[512];
6292         u32 cr0;
6293
6294         if (is_smm(vcpu)) {
6295                 vcpu->arch.smi_pending = true;
6296                 return;
6297         }
6298
6299         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6300         vcpu->arch.hflags |= HF_SMM_MASK;
6301         memset(buf, 0, 512);
6302         if (guest_cpuid_has_longmode(vcpu))
6303                 process_smi_save_state_64(vcpu, buf);
6304         else
6305                 process_smi_save_state_32(vcpu, buf);
6306
6307         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6308
6309         if (kvm_x86_ops->get_nmi_mask(vcpu))
6310                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6311         else
6312                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6313
6314         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6315         kvm_rip_write(vcpu, 0x8000);
6316
6317         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6318         kvm_x86_ops->set_cr0(vcpu, cr0);
6319         vcpu->arch.cr0 = cr0;
6320
6321         kvm_x86_ops->set_cr4(vcpu, 0);
6322
6323         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6324         dt.address = dt.size = 0;
6325         kvm_x86_ops->set_idt(vcpu, &dt);
6326
6327         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6328
6329         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6330         cs.base = vcpu->arch.smbase;
6331
6332         ds.selector = 0;
6333         ds.base = 0;
6334
6335         cs.limit    = ds.limit = 0xffffffff;
6336         cs.type     = ds.type = 0x3;
6337         cs.dpl      = ds.dpl = 0;
6338         cs.db       = ds.db = 0;
6339         cs.s        = ds.s = 1;
6340         cs.l        = ds.l = 0;
6341         cs.g        = ds.g = 1;
6342         cs.avl      = ds.avl = 0;
6343         cs.present  = ds.present = 1;
6344         cs.unusable = ds.unusable = 0;
6345         cs.padding  = ds.padding = 0;
6346
6347         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6348         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6349         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6350         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6351         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6352         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6353
6354         if (guest_cpuid_has_longmode(vcpu))
6355                 kvm_x86_ops->set_efer(vcpu, 0);
6356
6357         kvm_update_cpuid(vcpu);
6358         kvm_mmu_reset_context(vcpu);
6359 }
6360
6361 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6362 {
6363         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6364 }
6365
6366 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6367 {
6368         u64 eoi_exit_bitmap[4];
6369
6370         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6371                 return;
6372
6373         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6374
6375         if (irqchip_split(vcpu->kvm))
6376                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6377         else {
6378                 if (vcpu->arch.apicv_active)
6379                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6380                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6381         }
6382         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6383                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6384         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6385 }
6386
6387 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6388 {
6389         ++vcpu->stat.tlb_flush;
6390         kvm_x86_ops->tlb_flush(vcpu);
6391 }
6392
6393 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6394 {
6395         struct page *page = NULL;
6396
6397         if (!lapic_in_kernel(vcpu))
6398                 return;
6399
6400         if (!kvm_x86_ops->set_apic_access_page_addr)
6401                 return;
6402
6403         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6404         if (is_error_page(page))
6405                 return;
6406         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6407
6408         /*
6409          * Do not pin apic access page in memory, the MMU notifier
6410          * will call us again if it is migrated or swapped out.
6411          */
6412         put_page(page);
6413 }
6414 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6415
6416 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6417                                            unsigned long address)
6418 {
6419         /*
6420          * The physical address of apic access page is stored in the VMCS.
6421          * Update it when it becomes invalid.
6422          */
6423         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6424                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6425 }
6426
6427 /*
6428  * Returns 1 to let vcpu_run() continue the guest execution loop without
6429  * exiting to the userspace.  Otherwise, the value will be returned to the
6430  * userspace.
6431  */
6432 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6433 {
6434         int r;
6435         bool req_int_win =
6436                 dm_request_for_irq_injection(vcpu) &&
6437                 kvm_cpu_accept_dm_intr(vcpu);
6438
6439         bool req_immediate_exit = false;
6440
6441         if (vcpu->requests) {
6442                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6443                         kvm_mmu_unload(vcpu);
6444                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6445                         __kvm_migrate_timers(vcpu);
6446                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6447                         kvm_gen_update_masterclock(vcpu->kvm);
6448                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6449                         kvm_gen_kvmclock_update(vcpu);
6450                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6451                         r = kvm_guest_time_update(vcpu);
6452                         if (unlikely(r))
6453                                 goto out;
6454                 }
6455                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6456                         kvm_mmu_sync_roots(vcpu);
6457                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6458                         kvm_vcpu_flush_tlb(vcpu);
6459                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6460                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6461                         r = 0;
6462                         goto out;
6463                 }
6464                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6465                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6466                         r = 0;
6467                         goto out;
6468                 }
6469                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6470                         vcpu->fpu_active = 0;
6471                         kvm_x86_ops->fpu_deactivate(vcpu);
6472                 }
6473                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6474                         /* Page is swapped out. Do synthetic halt */
6475                         vcpu->arch.apf.halted = true;
6476                         r = 1;
6477                         goto out;
6478                 }
6479                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6480                         record_steal_time(vcpu);
6481                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6482                         process_smi(vcpu);
6483                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6484                         process_nmi(vcpu);
6485                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6486                         kvm_pmu_handle_event(vcpu);
6487                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6488                         kvm_pmu_deliver_pmi(vcpu);
6489                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6490                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6491                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6492                                      vcpu->arch.ioapic_handled_vectors)) {
6493                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6494                                 vcpu->run->eoi.vector =
6495                                                 vcpu->arch.pending_ioapic_eoi;
6496                                 r = 0;
6497                                 goto out;
6498                         }
6499                 }
6500                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6501                         vcpu_scan_ioapic(vcpu);
6502                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6503                         kvm_vcpu_reload_apic_access_page(vcpu);
6504                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6505                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6506                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6507                         r = 0;
6508                         goto out;
6509                 }
6510                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6511                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6512                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6513                         r = 0;
6514                         goto out;
6515                 }
6516                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6517                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6518                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6519                         r = 0;
6520                         goto out;
6521                 }
6522
6523                 /*
6524                  * KVM_REQ_HV_STIMER has to be processed after
6525                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6526                  * depend on the guest clock being up-to-date
6527                  */
6528                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6529                         kvm_hv_process_stimers(vcpu);
6530         }
6531
6532         /*
6533          * KVM_REQ_EVENT is not set when posted interrupts are set by
6534          * VT-d hardware, so we have to update RVI unconditionally.
6535          */
6536         if (kvm_lapic_enabled(vcpu)) {
6537                 /*
6538                  * Update architecture specific hints for APIC
6539                  * virtual interrupt delivery.
6540                  */
6541                 if (vcpu->arch.apicv_active)
6542                         kvm_x86_ops->hwapic_irr_update(vcpu,
6543                                 kvm_lapic_find_highest_irr(vcpu));
6544         }
6545
6546         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6547                 kvm_apic_accept_events(vcpu);
6548                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6549                         r = 1;
6550                         goto out;
6551                 }
6552
6553                 if (inject_pending_event(vcpu, req_int_win) != 0)
6554                         req_immediate_exit = true;
6555                 /* enable NMI/IRQ window open exits if needed */
6556                 else {
6557                         if (vcpu->arch.nmi_pending)
6558                                 kvm_x86_ops->enable_nmi_window(vcpu);
6559                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6560                                 kvm_x86_ops->enable_irq_window(vcpu);
6561                 }
6562
6563                 if (kvm_lapic_enabled(vcpu)) {
6564                         update_cr8_intercept(vcpu);
6565                         kvm_lapic_sync_to_vapic(vcpu);
6566                 }
6567         }
6568
6569         r = kvm_mmu_reload(vcpu);
6570         if (unlikely(r)) {
6571                 goto cancel_injection;
6572         }
6573
6574         preempt_disable();
6575
6576         kvm_x86_ops->prepare_guest_switch(vcpu);
6577         if (vcpu->fpu_active)
6578                 kvm_load_guest_fpu(vcpu);
6579         vcpu->mode = IN_GUEST_MODE;
6580
6581         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6582
6583         /*
6584          * We should set ->mode before check ->requests,
6585          * Please see the comment in kvm_make_all_cpus_request.
6586          * This also orders the write to mode from any reads
6587          * to the page tables done while the VCPU is running.
6588          * Please see the comment in kvm_flush_remote_tlbs.
6589          */
6590         smp_mb__after_srcu_read_unlock();
6591
6592         local_irq_disable();
6593
6594         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6595             || need_resched() || signal_pending(current)) {
6596                 vcpu->mode = OUTSIDE_GUEST_MODE;
6597                 smp_wmb();
6598                 local_irq_enable();
6599                 preempt_enable();
6600                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6601                 r = 1;
6602                 goto cancel_injection;
6603         }
6604
6605         kvm_load_guest_xcr0(vcpu);
6606
6607         if (req_immediate_exit)
6608                 smp_send_reschedule(vcpu->cpu);
6609
6610         trace_kvm_entry(vcpu->vcpu_id);
6611         wait_lapic_expire(vcpu);
6612         __kvm_guest_enter();
6613
6614         if (unlikely(vcpu->arch.switch_db_regs)) {
6615                 set_debugreg(0, 7);
6616                 set_debugreg(vcpu->arch.eff_db[0], 0);
6617                 set_debugreg(vcpu->arch.eff_db[1], 1);
6618                 set_debugreg(vcpu->arch.eff_db[2], 2);
6619                 set_debugreg(vcpu->arch.eff_db[3], 3);
6620                 set_debugreg(vcpu->arch.dr6, 6);
6621                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6622         }
6623
6624         kvm_x86_ops->run(vcpu);
6625
6626         /*
6627          * Do this here before restoring debug registers on the host.  And
6628          * since we do this before handling the vmexit, a DR access vmexit
6629          * can (a) read the correct value of the debug registers, (b) set
6630          * KVM_DEBUGREG_WONT_EXIT again.
6631          */
6632         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6633                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6634                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6635                 kvm_update_dr0123(vcpu);
6636                 kvm_update_dr6(vcpu);
6637                 kvm_update_dr7(vcpu);
6638                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6639         }
6640
6641         /*
6642          * If the guest has used debug registers, at least dr7
6643          * will be disabled while returning to the host.
6644          * If we don't have active breakpoints in the host, we don't
6645          * care about the messed up debug address registers. But if
6646          * we have some of them active, restore the old state.
6647          */
6648         if (hw_breakpoint_active())
6649                 hw_breakpoint_restore();
6650
6651         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6652
6653         vcpu->mode = OUTSIDE_GUEST_MODE;
6654         smp_wmb();
6655
6656         kvm_put_guest_xcr0(vcpu);
6657
6658         /* Interrupt is enabled by handle_external_intr() */
6659         kvm_x86_ops->handle_external_intr(vcpu);
6660
6661         ++vcpu->stat.exits;
6662
6663         /*
6664          * We must have an instruction between local_irq_enable() and
6665          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6666          * the interrupt shadow.  The stat.exits increment will do nicely.
6667          * But we need to prevent reordering, hence this barrier():
6668          */
6669         barrier();
6670
6671         kvm_guest_exit();
6672
6673         preempt_enable();
6674
6675         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6676
6677         /*
6678          * Profile KVM exit RIPs:
6679          */
6680         if (unlikely(prof_on == KVM_PROFILING)) {
6681                 unsigned long rip = kvm_rip_read(vcpu);
6682                 profile_hit(KVM_PROFILING, (void *)rip);
6683         }
6684
6685         if (unlikely(vcpu->arch.tsc_always_catchup))
6686                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6687
6688         if (vcpu->arch.apic_attention)
6689                 kvm_lapic_sync_from_vapic(vcpu);
6690
6691         r = kvm_x86_ops->handle_exit(vcpu);
6692         return r;
6693
6694 cancel_injection:
6695         kvm_x86_ops->cancel_injection(vcpu);
6696         if (unlikely(vcpu->arch.apic_attention))
6697                 kvm_lapic_sync_from_vapic(vcpu);
6698 out:
6699         return r;
6700 }
6701
6702 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6703 {
6704         if (!kvm_arch_vcpu_runnable(vcpu) &&
6705             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6706                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6707                 kvm_vcpu_block(vcpu);
6708                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6709
6710                 if (kvm_x86_ops->post_block)
6711                         kvm_x86_ops->post_block(vcpu);
6712
6713                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6714                         return 1;
6715         }
6716
6717         kvm_apic_accept_events(vcpu);
6718         switch(vcpu->arch.mp_state) {
6719         case KVM_MP_STATE_HALTED:
6720                 vcpu->arch.pv.pv_unhalted = false;
6721                 vcpu->arch.mp_state =
6722                         KVM_MP_STATE_RUNNABLE;
6723         case KVM_MP_STATE_RUNNABLE:
6724                 vcpu->arch.apf.halted = false;
6725                 break;
6726         case KVM_MP_STATE_INIT_RECEIVED:
6727                 break;
6728         default:
6729                 return -EINTR;
6730                 break;
6731         }
6732         return 1;
6733 }
6734
6735 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6736 {
6737         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6738                 !vcpu->arch.apf.halted);
6739 }
6740
6741 static int vcpu_run(struct kvm_vcpu *vcpu)
6742 {
6743         int r;
6744         struct kvm *kvm = vcpu->kvm;
6745
6746         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6747
6748         for (;;) {
6749                 if (kvm_vcpu_running(vcpu)) {
6750                         r = vcpu_enter_guest(vcpu);
6751                 } else {
6752                         r = vcpu_block(kvm, vcpu);
6753                 }
6754
6755                 if (r <= 0)
6756                         break;
6757
6758                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6759                 if (kvm_cpu_has_pending_timer(vcpu))
6760                         kvm_inject_pending_timer_irqs(vcpu);
6761
6762                 if (dm_request_for_irq_injection(vcpu) &&
6763                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6764                         r = 0;
6765                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6766                         ++vcpu->stat.request_irq_exits;
6767                         break;
6768                 }
6769
6770                 kvm_check_async_pf_completion(vcpu);
6771
6772                 if (signal_pending(current)) {
6773                         r = -EINTR;
6774                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6775                         ++vcpu->stat.signal_exits;
6776                         break;
6777                 }
6778                 if (need_resched()) {
6779                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6780                         cond_resched();
6781                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6782                 }
6783         }
6784
6785         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6786
6787         return r;
6788 }
6789
6790 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6791 {
6792         int r;
6793         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6794         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6795         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6796         if (r != EMULATE_DONE)
6797                 return 0;
6798         return 1;
6799 }
6800
6801 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6802 {
6803         BUG_ON(!vcpu->arch.pio.count);
6804
6805         return complete_emulated_io(vcpu);
6806 }
6807
6808 /*
6809  * Implements the following, as a state machine:
6810  *
6811  * read:
6812  *   for each fragment
6813  *     for each mmio piece in the fragment
6814  *       write gpa, len
6815  *       exit
6816  *       copy data
6817  *   execute insn
6818  *
6819  * write:
6820  *   for each fragment
6821  *     for each mmio piece in the fragment
6822  *       write gpa, len
6823  *       copy data
6824  *       exit
6825  */
6826 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6827 {
6828         struct kvm_run *run = vcpu->run;
6829         struct kvm_mmio_fragment *frag;
6830         unsigned len;
6831
6832         BUG_ON(!vcpu->mmio_needed);
6833
6834         /* Complete previous fragment */
6835         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6836         len = min(8u, frag->len);
6837         if (!vcpu->mmio_is_write)
6838                 memcpy(frag->data, run->mmio.data, len);
6839
6840         if (frag->len <= 8) {
6841                 /* Switch to the next fragment. */
6842                 frag++;
6843                 vcpu->mmio_cur_fragment++;
6844         } else {
6845                 /* Go forward to the next mmio piece. */
6846                 frag->data += len;
6847                 frag->gpa += len;
6848                 frag->len -= len;
6849         }
6850
6851         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6852                 vcpu->mmio_needed = 0;
6853
6854                 /* FIXME: return into emulator if single-stepping.  */
6855                 if (vcpu->mmio_is_write)
6856                         return 1;
6857                 vcpu->mmio_read_completed = 1;
6858                 return complete_emulated_io(vcpu);
6859         }
6860
6861         run->exit_reason = KVM_EXIT_MMIO;
6862         run->mmio.phys_addr = frag->gpa;
6863         if (vcpu->mmio_is_write)
6864                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6865         run->mmio.len = min(8u, frag->len);
6866         run->mmio.is_write = vcpu->mmio_is_write;
6867         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6868         return 0;
6869 }
6870
6871
6872 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6873 {
6874         struct fpu *fpu = &current->thread.fpu;
6875         int r;
6876         sigset_t sigsaved;
6877
6878         fpu__activate_curr(fpu);
6879
6880         if (vcpu->sigset_active)
6881                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6882
6883         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6884                 kvm_vcpu_block(vcpu);
6885                 kvm_apic_accept_events(vcpu);
6886                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6887                 r = -EAGAIN;
6888                 goto out;
6889         }
6890
6891         /* re-sync apic's tpr */
6892         if (!lapic_in_kernel(vcpu)) {
6893                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6894                         r = -EINVAL;
6895                         goto out;
6896                 }
6897         }
6898
6899         if (unlikely(vcpu->arch.complete_userspace_io)) {
6900                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6901                 vcpu->arch.complete_userspace_io = NULL;
6902                 r = cui(vcpu);
6903                 if (r <= 0)
6904                         goto out;
6905         } else
6906                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6907
6908         r = vcpu_run(vcpu);
6909
6910 out:
6911         post_kvm_run_save(vcpu);
6912         if (vcpu->sigset_active)
6913                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6914
6915         return r;
6916 }
6917
6918 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6919 {
6920         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6921                 /*
6922                  * We are here if userspace calls get_regs() in the middle of
6923                  * instruction emulation. Registers state needs to be copied
6924                  * back from emulation context to vcpu. Userspace shouldn't do
6925                  * that usually, but some bad designed PV devices (vmware
6926                  * backdoor interface) need this to work
6927                  */
6928                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6929                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6930         }
6931         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6932         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6933         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6934         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6935         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6936         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6937         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6938         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6939 #ifdef CONFIG_X86_64
6940         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6941         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6942         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6943         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6944         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6945         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6946         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6947         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6948 #endif
6949
6950         regs->rip = kvm_rip_read(vcpu);
6951         regs->rflags = kvm_get_rflags(vcpu);
6952
6953         return 0;
6954 }
6955
6956 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6957 {
6958         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6959         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6960
6961         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6962         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6963         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6964         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6965         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6966         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6967         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6968         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6969 #ifdef CONFIG_X86_64
6970         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6971         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6972         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6973         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6974         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6975         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6976         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6977         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6978 #endif
6979
6980         kvm_rip_write(vcpu, regs->rip);
6981         kvm_set_rflags(vcpu, regs->rflags);
6982
6983         vcpu->arch.exception.pending = false;
6984
6985         kvm_make_request(KVM_REQ_EVENT, vcpu);
6986
6987         return 0;
6988 }
6989
6990 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6991 {
6992         struct kvm_segment cs;
6993
6994         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6995         *db = cs.db;
6996         *l = cs.l;
6997 }
6998 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6999
7000 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7001                                   struct kvm_sregs *sregs)
7002 {
7003         struct desc_ptr dt;
7004
7005         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7006         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7007         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7008         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7009         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7010         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7011
7012         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7013         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7014
7015         kvm_x86_ops->get_idt(vcpu, &dt);
7016         sregs->idt.limit = dt.size;
7017         sregs->idt.base = dt.address;
7018         kvm_x86_ops->get_gdt(vcpu, &dt);
7019         sregs->gdt.limit = dt.size;
7020         sregs->gdt.base = dt.address;
7021
7022         sregs->cr0 = kvm_read_cr0(vcpu);
7023         sregs->cr2 = vcpu->arch.cr2;
7024         sregs->cr3 = kvm_read_cr3(vcpu);
7025         sregs->cr4 = kvm_read_cr4(vcpu);
7026         sregs->cr8 = kvm_get_cr8(vcpu);
7027         sregs->efer = vcpu->arch.efer;
7028         sregs->apic_base = kvm_get_apic_base(vcpu);
7029
7030         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7031
7032         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7033                 set_bit(vcpu->arch.interrupt.nr,
7034                         (unsigned long *)sregs->interrupt_bitmap);
7035
7036         return 0;
7037 }
7038
7039 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7040                                     struct kvm_mp_state *mp_state)
7041 {
7042         kvm_apic_accept_events(vcpu);
7043         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7044                                         vcpu->arch.pv.pv_unhalted)
7045                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7046         else
7047                 mp_state->mp_state = vcpu->arch.mp_state;
7048
7049         return 0;
7050 }
7051
7052 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7053                                     struct kvm_mp_state *mp_state)
7054 {
7055         if (!lapic_in_kernel(vcpu) &&
7056             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7057                 return -EINVAL;
7058
7059         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7060                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7061                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7062         } else
7063                 vcpu->arch.mp_state = mp_state->mp_state;
7064         kvm_make_request(KVM_REQ_EVENT, vcpu);
7065         return 0;
7066 }
7067
7068 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7069                     int reason, bool has_error_code, u32 error_code)
7070 {
7071         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7072         int ret;
7073
7074         init_emulate_ctxt(vcpu);
7075
7076         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7077                                    has_error_code, error_code);
7078
7079         if (ret)
7080                 return EMULATE_FAIL;
7081
7082         kvm_rip_write(vcpu, ctxt->eip);
7083         kvm_set_rflags(vcpu, ctxt->eflags);
7084         kvm_make_request(KVM_REQ_EVENT, vcpu);
7085         return EMULATE_DONE;
7086 }
7087 EXPORT_SYMBOL_GPL(kvm_task_switch);
7088
7089 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7090                                   struct kvm_sregs *sregs)
7091 {
7092         struct msr_data apic_base_msr;
7093         int mmu_reset_needed = 0;
7094         int pending_vec, max_bits, idx;
7095         struct desc_ptr dt;
7096
7097         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7098                 return -EINVAL;
7099
7100         dt.size = sregs->idt.limit;
7101         dt.address = sregs->idt.base;
7102         kvm_x86_ops->set_idt(vcpu, &dt);
7103         dt.size = sregs->gdt.limit;
7104         dt.address = sregs->gdt.base;
7105         kvm_x86_ops->set_gdt(vcpu, &dt);
7106
7107         vcpu->arch.cr2 = sregs->cr2;
7108         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7109         vcpu->arch.cr3 = sregs->cr3;
7110         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7111
7112         kvm_set_cr8(vcpu, sregs->cr8);
7113
7114         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7115         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7116         apic_base_msr.data = sregs->apic_base;
7117         apic_base_msr.host_initiated = true;
7118         kvm_set_apic_base(vcpu, &apic_base_msr);
7119
7120         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7121         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7122         vcpu->arch.cr0 = sregs->cr0;
7123
7124         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7125         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7126         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7127                 kvm_update_cpuid(vcpu);
7128
7129         idx = srcu_read_lock(&vcpu->kvm->srcu);
7130         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7131                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7132                 mmu_reset_needed = 1;
7133         }
7134         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7135
7136         if (mmu_reset_needed)
7137                 kvm_mmu_reset_context(vcpu);
7138
7139         max_bits = KVM_NR_INTERRUPTS;
7140         pending_vec = find_first_bit(
7141                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7142         if (pending_vec < max_bits) {
7143                 kvm_queue_interrupt(vcpu, pending_vec, false);
7144                 pr_debug("Set back pending irq %d\n", pending_vec);
7145         }
7146
7147         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7148         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7149         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7150         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7151         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7152         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7153
7154         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7155         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7156
7157         update_cr8_intercept(vcpu);
7158
7159         /* Older userspace won't unhalt the vcpu on reset. */
7160         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7161             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7162             !is_protmode(vcpu))
7163                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7164
7165         kvm_make_request(KVM_REQ_EVENT, vcpu);
7166
7167         return 0;
7168 }
7169
7170 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7171                                         struct kvm_guest_debug *dbg)
7172 {
7173         unsigned long rflags;
7174         int i, r;
7175
7176         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7177                 r = -EBUSY;
7178                 if (vcpu->arch.exception.pending)
7179                         goto out;
7180                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7181                         kvm_queue_exception(vcpu, DB_VECTOR);
7182                 else
7183                         kvm_queue_exception(vcpu, BP_VECTOR);
7184         }
7185
7186         /*
7187          * Read rflags as long as potentially injected trace flags are still
7188          * filtered out.
7189          */
7190         rflags = kvm_get_rflags(vcpu);
7191
7192         vcpu->guest_debug = dbg->control;
7193         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7194                 vcpu->guest_debug = 0;
7195
7196         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7197                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7198                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7199                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7200         } else {
7201                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7202                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7203         }
7204         kvm_update_dr7(vcpu);
7205
7206         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7207                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7208                         get_segment_base(vcpu, VCPU_SREG_CS);
7209
7210         /*
7211          * Trigger an rflags update that will inject or remove the trace
7212          * flags.
7213          */
7214         kvm_set_rflags(vcpu, rflags);
7215
7216         kvm_x86_ops->update_bp_intercept(vcpu);
7217
7218         r = 0;
7219
7220 out:
7221
7222         return r;
7223 }
7224
7225 /*
7226  * Translate a guest virtual address to a guest physical address.
7227  */
7228 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7229                                     struct kvm_translation *tr)
7230 {
7231         unsigned long vaddr = tr->linear_address;
7232         gpa_t gpa;
7233         int idx;
7234
7235         idx = srcu_read_lock(&vcpu->kvm->srcu);
7236         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7237         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7238         tr->physical_address = gpa;
7239         tr->valid = gpa != UNMAPPED_GVA;
7240         tr->writeable = 1;
7241         tr->usermode = 0;
7242
7243         return 0;
7244 }
7245
7246 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7247 {
7248         struct fxregs_state *fxsave =
7249                         &vcpu->arch.guest_fpu.state.fxsave;
7250
7251         memcpy(fpu->fpr, fxsave->st_space, 128);
7252         fpu->fcw = fxsave->cwd;
7253         fpu->fsw = fxsave->swd;
7254         fpu->ftwx = fxsave->twd;
7255         fpu->last_opcode = fxsave->fop;
7256         fpu->last_ip = fxsave->rip;
7257         fpu->last_dp = fxsave->rdp;
7258         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7259
7260         return 0;
7261 }
7262
7263 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7264 {
7265         struct fxregs_state *fxsave =
7266                         &vcpu->arch.guest_fpu.state.fxsave;
7267
7268         memcpy(fxsave->st_space, fpu->fpr, 128);
7269         fxsave->cwd = fpu->fcw;
7270         fxsave->swd = fpu->fsw;
7271         fxsave->twd = fpu->ftwx;
7272         fxsave->fop = fpu->last_opcode;
7273         fxsave->rip = fpu->last_ip;
7274         fxsave->rdp = fpu->last_dp;
7275         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7276
7277         return 0;
7278 }
7279
7280 static void fx_init(struct kvm_vcpu *vcpu)
7281 {
7282         fpstate_init(&vcpu->arch.guest_fpu.state);
7283         if (cpu_has_xsaves)
7284                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7285                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7286
7287         /*
7288          * Ensure guest xcr0 is valid for loading
7289          */
7290         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7291
7292         vcpu->arch.cr0 |= X86_CR0_ET;
7293 }
7294
7295 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7296 {
7297         if (vcpu->guest_fpu_loaded)
7298                 return;
7299
7300         /*
7301          * Restore all possible states in the guest,
7302          * and assume host would use all available bits.
7303          * Guest xcr0 would be loaded later.
7304          */
7305         vcpu->guest_fpu_loaded = 1;
7306         __kernel_fpu_begin();
7307         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7308         trace_kvm_fpu(1);
7309 }
7310
7311 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7312 {
7313         if (!vcpu->guest_fpu_loaded) {
7314                 vcpu->fpu_counter = 0;
7315                 return;
7316         }
7317
7318         vcpu->guest_fpu_loaded = 0;
7319         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7320         __kernel_fpu_end();
7321         ++vcpu->stat.fpu_reload;
7322         /*
7323          * If using eager FPU mode, or if the guest is a frequent user
7324          * of the FPU, just leave the FPU active for next time.
7325          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7326          * the FPU in bursts will revert to loading it on demand.
7327          */
7328         if (!use_eager_fpu()) {
7329                 if (++vcpu->fpu_counter < 5)
7330                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7331         }
7332         trace_kvm_fpu(0);
7333 }
7334
7335 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7336 {
7337         kvmclock_reset(vcpu);
7338
7339         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7340         kvm_x86_ops->vcpu_free(vcpu);
7341 }
7342
7343 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7344                                                 unsigned int id)
7345 {
7346         struct kvm_vcpu *vcpu;
7347
7348         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7349                 printk_once(KERN_WARNING
7350                 "kvm: SMP vm created on host with unstable TSC; "
7351                 "guest TSC will not be reliable\n");
7352
7353         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7354
7355         return vcpu;
7356 }
7357
7358 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7359 {
7360         int r;
7361
7362         kvm_vcpu_mtrr_init(vcpu);
7363         r = vcpu_load(vcpu);
7364         if (r)
7365                 return r;
7366         kvm_vcpu_reset(vcpu, false);
7367         kvm_mmu_setup(vcpu);
7368         vcpu_put(vcpu);
7369         return r;
7370 }
7371
7372 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7373 {
7374         struct msr_data msr;
7375         struct kvm *kvm = vcpu->kvm;
7376
7377         if (vcpu_load(vcpu))
7378                 return;
7379         msr.data = 0x0;
7380         msr.index = MSR_IA32_TSC;
7381         msr.host_initiated = true;
7382         kvm_write_tsc(vcpu, &msr);
7383         vcpu_put(vcpu);
7384
7385         if (!kvmclock_periodic_sync)
7386                 return;
7387
7388         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7389                                         KVMCLOCK_SYNC_PERIOD);
7390 }
7391
7392 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7393 {
7394         int r;
7395         vcpu->arch.apf.msr_val = 0;
7396
7397         r = vcpu_load(vcpu);
7398         BUG_ON(r);
7399         kvm_mmu_unload(vcpu);
7400         vcpu_put(vcpu);
7401
7402         kvm_x86_ops->vcpu_free(vcpu);
7403 }
7404
7405 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7406 {
7407         vcpu->arch.hflags = 0;
7408
7409         atomic_set(&vcpu->arch.nmi_queued, 0);
7410         vcpu->arch.nmi_pending = 0;
7411         vcpu->arch.nmi_injected = false;
7412         kvm_clear_interrupt_queue(vcpu);
7413         kvm_clear_exception_queue(vcpu);
7414
7415         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7416         kvm_update_dr0123(vcpu);
7417         vcpu->arch.dr6 = DR6_INIT;
7418         kvm_update_dr6(vcpu);
7419         vcpu->arch.dr7 = DR7_FIXED_1;
7420         kvm_update_dr7(vcpu);
7421
7422         vcpu->arch.cr2 = 0;
7423
7424         kvm_make_request(KVM_REQ_EVENT, vcpu);
7425         vcpu->arch.apf.msr_val = 0;
7426         vcpu->arch.st.msr_val = 0;
7427
7428         kvmclock_reset(vcpu);
7429
7430         kvm_clear_async_pf_completion_queue(vcpu);
7431         kvm_async_pf_hash_reset(vcpu);
7432         vcpu->arch.apf.halted = false;
7433
7434         if (!init_event) {
7435                 kvm_pmu_reset(vcpu);
7436                 vcpu->arch.smbase = 0x30000;
7437         }
7438
7439         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7440         vcpu->arch.regs_avail = ~0;
7441         vcpu->arch.regs_dirty = ~0;
7442
7443         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7444 }
7445
7446 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7447 {
7448         struct kvm_segment cs;
7449
7450         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7451         cs.selector = vector << 8;
7452         cs.base = vector << 12;
7453         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7454         kvm_rip_write(vcpu, 0);
7455 }
7456
7457 int kvm_arch_hardware_enable(void)
7458 {
7459         struct kvm *kvm;
7460         struct kvm_vcpu *vcpu;
7461         int i;
7462         int ret;
7463         u64 local_tsc;
7464         u64 max_tsc = 0;
7465         bool stable, backwards_tsc = false;
7466
7467         kvm_shared_msr_cpu_online();
7468         ret = kvm_x86_ops->hardware_enable();
7469         if (ret != 0)
7470                 return ret;
7471
7472         local_tsc = rdtsc();
7473         stable = !check_tsc_unstable();
7474         list_for_each_entry(kvm, &vm_list, vm_list) {
7475                 kvm_for_each_vcpu(i, vcpu, kvm) {
7476                         if (!stable && vcpu->cpu == smp_processor_id())
7477                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7478                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7479                                 backwards_tsc = true;
7480                                 if (vcpu->arch.last_host_tsc > max_tsc)
7481                                         max_tsc = vcpu->arch.last_host_tsc;
7482                         }
7483                 }
7484         }
7485
7486         /*
7487          * Sometimes, even reliable TSCs go backwards.  This happens on
7488          * platforms that reset TSC during suspend or hibernate actions, but
7489          * maintain synchronization.  We must compensate.  Fortunately, we can
7490          * detect that condition here, which happens early in CPU bringup,
7491          * before any KVM threads can be running.  Unfortunately, we can't
7492          * bring the TSCs fully up to date with real time, as we aren't yet far
7493          * enough into CPU bringup that we know how much real time has actually
7494          * elapsed; our helper function, get_kernel_ns() will be using boot
7495          * variables that haven't been updated yet.
7496          *
7497          * So we simply find the maximum observed TSC above, then record the
7498          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7499          * the adjustment will be applied.  Note that we accumulate
7500          * adjustments, in case multiple suspend cycles happen before some VCPU
7501          * gets a chance to run again.  In the event that no KVM threads get a
7502          * chance to run, we will miss the entire elapsed period, as we'll have
7503          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7504          * loose cycle time.  This isn't too big a deal, since the loss will be
7505          * uniform across all VCPUs (not to mention the scenario is extremely
7506          * unlikely). It is possible that a second hibernate recovery happens
7507          * much faster than a first, causing the observed TSC here to be
7508          * smaller; this would require additional padding adjustment, which is
7509          * why we set last_host_tsc to the local tsc observed here.
7510          *
7511          * N.B. - this code below runs only on platforms with reliable TSC,
7512          * as that is the only way backwards_tsc is set above.  Also note
7513          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7514          * have the same delta_cyc adjustment applied if backwards_tsc
7515          * is detected.  Note further, this adjustment is only done once,
7516          * as we reset last_host_tsc on all VCPUs to stop this from being
7517          * called multiple times (one for each physical CPU bringup).
7518          *
7519          * Platforms with unreliable TSCs don't have to deal with this, they
7520          * will be compensated by the logic in vcpu_load, which sets the TSC to
7521          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7522          * guarantee that they stay in perfect synchronization.
7523          */
7524         if (backwards_tsc) {
7525                 u64 delta_cyc = max_tsc - local_tsc;
7526                 backwards_tsc_observed = true;
7527                 list_for_each_entry(kvm, &vm_list, vm_list) {
7528                         kvm_for_each_vcpu(i, vcpu, kvm) {
7529                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7530                                 vcpu->arch.last_host_tsc = local_tsc;
7531                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7532                         }
7533
7534                         /*
7535                          * We have to disable TSC offset matching.. if you were
7536                          * booting a VM while issuing an S4 host suspend....
7537                          * you may have some problem.  Solving this issue is
7538                          * left as an exercise to the reader.
7539                          */
7540                         kvm->arch.last_tsc_nsec = 0;
7541                         kvm->arch.last_tsc_write = 0;
7542                 }
7543
7544         }
7545         return 0;
7546 }
7547
7548 void kvm_arch_hardware_disable(void)
7549 {
7550         kvm_x86_ops->hardware_disable();
7551         drop_user_return_notifiers();
7552 }
7553
7554 int kvm_arch_hardware_setup(void)
7555 {
7556         int r;
7557
7558         r = kvm_x86_ops->hardware_setup();
7559         if (r != 0)
7560                 return r;
7561
7562         if (kvm_has_tsc_control) {
7563                 /*
7564                  * Make sure the user can only configure tsc_khz values that
7565                  * fit into a signed integer.
7566                  * A min value is not calculated needed because it will always
7567                  * be 1 on all machines.
7568                  */
7569                 u64 max = min(0x7fffffffULL,
7570                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7571                 kvm_max_guest_tsc_khz = max;
7572
7573                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7574         }
7575
7576         kvm_init_msr_list();
7577         return 0;
7578 }
7579
7580 void kvm_arch_hardware_unsetup(void)
7581 {
7582         kvm_x86_ops->hardware_unsetup();
7583 }
7584
7585 void kvm_arch_check_processor_compat(void *rtn)
7586 {
7587         kvm_x86_ops->check_processor_compatibility(rtn);
7588 }
7589
7590 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7591 {
7592         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7593 }
7594 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7595
7596 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7597 {
7598         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7599 }
7600
7601 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7602 {
7603         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7604 }
7605
7606 struct static_key kvm_no_apic_vcpu __read_mostly;
7607 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7608
7609 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7610 {
7611         struct page *page;
7612         struct kvm *kvm;
7613         int r;
7614
7615         BUG_ON(vcpu->kvm == NULL);
7616         kvm = vcpu->kvm;
7617
7618         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7619         vcpu->arch.pv.pv_unhalted = false;
7620         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7621         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7622                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7623         else
7624                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7625
7626         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7627         if (!page) {
7628                 r = -ENOMEM;
7629                 goto fail;
7630         }
7631         vcpu->arch.pio_data = page_address(page);
7632
7633         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7634
7635         r = kvm_mmu_create(vcpu);
7636         if (r < 0)
7637                 goto fail_free_pio_data;
7638
7639         if (irqchip_in_kernel(kvm)) {
7640                 r = kvm_create_lapic(vcpu);
7641                 if (r < 0)
7642                         goto fail_mmu_destroy;
7643         } else
7644                 static_key_slow_inc(&kvm_no_apic_vcpu);
7645
7646         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7647                                        GFP_KERNEL);
7648         if (!vcpu->arch.mce_banks) {
7649                 r = -ENOMEM;
7650                 goto fail_free_lapic;
7651         }
7652         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7653
7654         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7655                 r = -ENOMEM;
7656                 goto fail_free_mce_banks;
7657         }
7658
7659         fx_init(vcpu);
7660
7661         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7662         vcpu->arch.pv_time_enabled = false;
7663
7664         vcpu->arch.guest_supported_xcr0 = 0;
7665         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7666
7667         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7668
7669         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7670
7671         kvm_async_pf_hash_reset(vcpu);
7672         kvm_pmu_init(vcpu);
7673
7674         vcpu->arch.pending_external_vector = -1;
7675
7676         kvm_hv_vcpu_init(vcpu);
7677
7678         return 0;
7679
7680 fail_free_mce_banks:
7681         kfree(vcpu->arch.mce_banks);
7682 fail_free_lapic:
7683         kvm_free_lapic(vcpu);
7684 fail_mmu_destroy:
7685         kvm_mmu_destroy(vcpu);
7686 fail_free_pio_data:
7687         free_page((unsigned long)vcpu->arch.pio_data);
7688 fail:
7689         return r;
7690 }
7691
7692 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7693 {
7694         int idx;
7695
7696         kvm_hv_vcpu_uninit(vcpu);
7697         kvm_pmu_destroy(vcpu);
7698         kfree(vcpu->arch.mce_banks);
7699         kvm_free_lapic(vcpu);
7700         idx = srcu_read_lock(&vcpu->kvm->srcu);
7701         kvm_mmu_destroy(vcpu);
7702         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7703         free_page((unsigned long)vcpu->arch.pio_data);
7704         if (!lapic_in_kernel(vcpu))
7705                 static_key_slow_dec(&kvm_no_apic_vcpu);
7706 }
7707
7708 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7709 {
7710         kvm_x86_ops->sched_in(vcpu, cpu);
7711 }
7712
7713 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7714 {
7715         if (type)
7716                 return -EINVAL;
7717
7718         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7719         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7720         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7721         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7722         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7723
7724         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7725         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7726         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7727         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7728                 &kvm->arch.irq_sources_bitmap);
7729
7730         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7731         mutex_init(&kvm->arch.apic_map_lock);
7732         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7733
7734         pvclock_update_vm_gtod_copy(kvm);
7735
7736         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7737         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7738
7739         kvm_page_track_init(kvm);
7740         kvm_mmu_init_vm(kvm);
7741
7742         return 0;
7743 }
7744
7745 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7746 {
7747         int r;
7748         r = vcpu_load(vcpu);
7749         BUG_ON(r);
7750         kvm_mmu_unload(vcpu);
7751         vcpu_put(vcpu);
7752 }
7753
7754 static void kvm_free_vcpus(struct kvm *kvm)
7755 {
7756         unsigned int i;
7757         struct kvm_vcpu *vcpu;
7758
7759         /*
7760          * Unpin any mmu pages first.
7761          */
7762         kvm_for_each_vcpu(i, vcpu, kvm) {
7763                 kvm_clear_async_pf_completion_queue(vcpu);
7764                 kvm_unload_vcpu_mmu(vcpu);
7765         }
7766         kvm_for_each_vcpu(i, vcpu, kvm)
7767                 kvm_arch_vcpu_free(vcpu);
7768
7769         mutex_lock(&kvm->lock);
7770         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7771                 kvm->vcpus[i] = NULL;
7772
7773         atomic_set(&kvm->online_vcpus, 0);
7774         mutex_unlock(&kvm->lock);
7775 }
7776
7777 void kvm_arch_sync_events(struct kvm *kvm)
7778 {
7779         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7780         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7781         kvm_free_all_assigned_devices(kvm);
7782         kvm_free_pit(kvm);
7783 }
7784
7785 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7786 {
7787         int i, r;
7788         unsigned long hva;
7789         struct kvm_memslots *slots = kvm_memslots(kvm);
7790         struct kvm_memory_slot *slot, old;
7791
7792         /* Called with kvm->slots_lock held.  */
7793         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7794                 return -EINVAL;
7795
7796         slot = id_to_memslot(slots, id);
7797         if (size) {
7798                 if (WARN_ON(slot->npages))
7799                         return -EEXIST;
7800
7801                 /*
7802                  * MAP_SHARED to prevent internal slot pages from being moved
7803                  * by fork()/COW.
7804                  */
7805                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7806                               MAP_SHARED | MAP_ANONYMOUS, 0);
7807                 if (IS_ERR((void *)hva))
7808                         return PTR_ERR((void *)hva);
7809         } else {
7810                 if (!slot->npages)
7811                         return 0;
7812
7813                 hva = 0;
7814         }
7815
7816         old = *slot;
7817         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7818                 struct kvm_userspace_memory_region m;
7819
7820                 m.slot = id | (i << 16);
7821                 m.flags = 0;
7822                 m.guest_phys_addr = gpa;
7823                 m.userspace_addr = hva;
7824                 m.memory_size = size;
7825                 r = __kvm_set_memory_region(kvm, &m);
7826                 if (r < 0)
7827                         return r;
7828         }
7829
7830         if (!size) {
7831                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7832                 WARN_ON(r < 0);
7833         }
7834
7835         return 0;
7836 }
7837 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7838
7839 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7840 {
7841         int r;
7842
7843         mutex_lock(&kvm->slots_lock);
7844         r = __x86_set_memory_region(kvm, id, gpa, size);
7845         mutex_unlock(&kvm->slots_lock);
7846
7847         return r;
7848 }
7849 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7850
7851 void kvm_arch_destroy_vm(struct kvm *kvm)
7852 {
7853         if (current->mm == kvm->mm) {
7854                 /*
7855                  * Free memory regions allocated on behalf of userspace,
7856                  * unless the the memory map has changed due to process exit
7857                  * or fd copying.
7858                  */
7859                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7860                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7861                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7862         }
7863         kvm_iommu_unmap_guest(kvm);
7864         kfree(kvm->arch.vpic);
7865         kfree(kvm->arch.vioapic);
7866         kvm_free_vcpus(kvm);
7867         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7868         kvm_mmu_uninit_vm(kvm);
7869 }
7870
7871 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7872                            struct kvm_memory_slot *dont)
7873 {
7874         int i;
7875
7876         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7877                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7878                         kvfree(free->arch.rmap[i]);
7879                         free->arch.rmap[i] = NULL;
7880                 }
7881                 if (i == 0)
7882                         continue;
7883
7884                 if (!dont || free->arch.lpage_info[i - 1] !=
7885                              dont->arch.lpage_info[i - 1]) {
7886                         kvfree(free->arch.lpage_info[i - 1]);
7887                         free->arch.lpage_info[i - 1] = NULL;
7888                 }
7889         }
7890
7891         kvm_page_track_free_memslot(free, dont);
7892 }
7893
7894 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7895                             unsigned long npages)
7896 {
7897         int i;
7898
7899         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7900                 struct kvm_lpage_info *linfo;
7901                 unsigned long ugfn;
7902                 int lpages;
7903                 int level = i + 1;
7904
7905                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7906                                       slot->base_gfn, level) + 1;
7907
7908                 slot->arch.rmap[i] =
7909                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7910                 if (!slot->arch.rmap[i])
7911                         goto out_free;
7912                 if (i == 0)
7913                         continue;
7914
7915                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
7916                 if (!linfo)
7917                         goto out_free;
7918
7919                 slot->arch.lpage_info[i - 1] = linfo;
7920
7921                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7922                         linfo[0].disallow_lpage = 1;
7923                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7924                         linfo[lpages - 1].disallow_lpage = 1;
7925                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7926                 /*
7927                  * If the gfn and userspace address are not aligned wrt each
7928                  * other, or if explicitly asked to, disable large page
7929                  * support for this slot
7930                  */
7931                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7932                     !kvm_largepages_enabled()) {
7933                         unsigned long j;
7934
7935                         for (j = 0; j < lpages; ++j)
7936                                 linfo[j].disallow_lpage = 1;
7937                 }
7938         }
7939
7940         if (kvm_page_track_create_memslot(slot, npages))
7941                 goto out_free;
7942
7943         return 0;
7944
7945 out_free:
7946         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7947                 kvfree(slot->arch.rmap[i]);
7948                 slot->arch.rmap[i] = NULL;
7949                 if (i == 0)
7950                         continue;
7951
7952                 kvfree(slot->arch.lpage_info[i - 1]);
7953                 slot->arch.lpage_info[i - 1] = NULL;
7954         }
7955         return -ENOMEM;
7956 }
7957
7958 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7959 {
7960         /*
7961          * memslots->generation has been incremented.
7962          * mmio generation may have reached its maximum value.
7963          */
7964         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7965 }
7966
7967 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7968                                 struct kvm_memory_slot *memslot,
7969                                 const struct kvm_userspace_memory_region *mem,
7970                                 enum kvm_mr_change change)
7971 {
7972         return 0;
7973 }
7974
7975 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7976                                      struct kvm_memory_slot *new)
7977 {
7978         /* Still write protect RO slot */
7979         if (new->flags & KVM_MEM_READONLY) {
7980                 kvm_mmu_slot_remove_write_access(kvm, new);
7981                 return;
7982         }
7983
7984         /*
7985          * Call kvm_x86_ops dirty logging hooks when they are valid.
7986          *
7987          * kvm_x86_ops->slot_disable_log_dirty is called when:
7988          *
7989          *  - KVM_MR_CREATE with dirty logging is disabled
7990          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7991          *
7992          * The reason is, in case of PML, we need to set D-bit for any slots
7993          * with dirty logging disabled in order to eliminate unnecessary GPA
7994          * logging in PML buffer (and potential PML buffer full VMEXT). This
7995          * guarantees leaving PML enabled during guest's lifetime won't have
7996          * any additonal overhead from PML when guest is running with dirty
7997          * logging disabled for memory slots.
7998          *
7999          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8000          * to dirty logging mode.
8001          *
8002          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8003          *
8004          * In case of write protect:
8005          *
8006          * Write protect all pages for dirty logging.
8007          *
8008          * All the sptes including the large sptes which point to this
8009          * slot are set to readonly. We can not create any new large
8010          * spte on this slot until the end of the logging.
8011          *
8012          * See the comments in fast_page_fault().
8013          */
8014         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8015                 if (kvm_x86_ops->slot_enable_log_dirty)
8016                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8017                 else
8018                         kvm_mmu_slot_remove_write_access(kvm, new);
8019         } else {
8020                 if (kvm_x86_ops->slot_disable_log_dirty)
8021                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8022         }
8023 }
8024
8025 void kvm_arch_commit_memory_region(struct kvm *kvm,
8026                                 const struct kvm_userspace_memory_region *mem,
8027                                 const struct kvm_memory_slot *old,
8028                                 const struct kvm_memory_slot *new,
8029                                 enum kvm_mr_change change)
8030 {
8031         int nr_mmu_pages = 0;
8032
8033         if (!kvm->arch.n_requested_mmu_pages)
8034                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8035
8036         if (nr_mmu_pages)
8037                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8038
8039         /*
8040          * Dirty logging tracks sptes in 4k granularity, meaning that large
8041          * sptes have to be split.  If live migration is successful, the guest
8042          * in the source machine will be destroyed and large sptes will be
8043          * created in the destination. However, if the guest continues to run
8044          * in the source machine (for example if live migration fails), small
8045          * sptes will remain around and cause bad performance.
8046          *
8047          * Scan sptes if dirty logging has been stopped, dropping those
8048          * which can be collapsed into a single large-page spte.  Later
8049          * page faults will create the large-page sptes.
8050          */
8051         if ((change != KVM_MR_DELETE) &&
8052                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8053                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8054                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8055
8056         /*
8057          * Set up write protection and/or dirty logging for the new slot.
8058          *
8059          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8060          * been zapped so no dirty logging staff is needed for old slot. For
8061          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8062          * new and it's also covered when dealing with the new slot.
8063          *
8064          * FIXME: const-ify all uses of struct kvm_memory_slot.
8065          */
8066         if (change != KVM_MR_DELETE)
8067                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8068 }
8069
8070 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8071 {
8072         kvm_mmu_invalidate_zap_all_pages(kvm);
8073 }
8074
8075 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8076                                    struct kvm_memory_slot *slot)
8077 {
8078         kvm_mmu_invalidate_zap_all_pages(kvm);
8079 }
8080
8081 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8082 {
8083         if (!list_empty_careful(&vcpu->async_pf.done))
8084                 return true;
8085
8086         if (kvm_apic_has_events(vcpu))
8087                 return true;
8088
8089         if (vcpu->arch.pv.pv_unhalted)
8090                 return true;
8091
8092         if (atomic_read(&vcpu->arch.nmi_queued))
8093                 return true;
8094
8095         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8096                 return true;
8097
8098         if (kvm_arch_interrupt_allowed(vcpu) &&
8099             kvm_cpu_has_interrupt(vcpu))
8100                 return true;
8101
8102         if (kvm_hv_has_stimer_pending(vcpu))
8103                 return true;
8104
8105         return false;
8106 }
8107
8108 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8109 {
8110         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8111                 kvm_x86_ops->check_nested_events(vcpu, false);
8112
8113         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8114 }
8115
8116 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8117 {
8118         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8119 }
8120
8121 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8122 {
8123         return kvm_x86_ops->interrupt_allowed(vcpu);
8124 }
8125
8126 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8127 {
8128         if (is_64_bit_mode(vcpu))
8129                 return kvm_rip_read(vcpu);
8130         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8131                      kvm_rip_read(vcpu));
8132 }
8133 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8134
8135 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8136 {
8137         return kvm_get_linear_rip(vcpu) == linear_rip;
8138 }
8139 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8140
8141 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8142 {
8143         unsigned long rflags;
8144
8145         rflags = kvm_x86_ops->get_rflags(vcpu);
8146         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8147                 rflags &= ~X86_EFLAGS_TF;
8148         return rflags;
8149 }
8150 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8151
8152 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8153 {
8154         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8155             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8156                 rflags |= X86_EFLAGS_TF;
8157         kvm_x86_ops->set_rflags(vcpu, rflags);
8158 }
8159
8160 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8161 {
8162         __kvm_set_rflags(vcpu, rflags);
8163         kvm_make_request(KVM_REQ_EVENT, vcpu);
8164 }
8165 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8166
8167 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8168 {
8169         int r;
8170
8171         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8172               work->wakeup_all)
8173                 return;
8174
8175         r = kvm_mmu_reload(vcpu);
8176         if (unlikely(r))
8177                 return;
8178
8179         if (!vcpu->arch.mmu.direct_map &&
8180               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8181                 return;
8182
8183         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8184 }
8185
8186 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8187 {
8188         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8189 }
8190
8191 static inline u32 kvm_async_pf_next_probe(u32 key)
8192 {
8193         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8194 }
8195
8196 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8197 {
8198         u32 key = kvm_async_pf_hash_fn(gfn);
8199
8200         while (vcpu->arch.apf.gfns[key] != ~0)
8201                 key = kvm_async_pf_next_probe(key);
8202
8203         vcpu->arch.apf.gfns[key] = gfn;
8204 }
8205
8206 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8207 {
8208         int i;
8209         u32 key = kvm_async_pf_hash_fn(gfn);
8210
8211         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8212                      (vcpu->arch.apf.gfns[key] != gfn &&
8213                       vcpu->arch.apf.gfns[key] != ~0); i++)
8214                 key = kvm_async_pf_next_probe(key);
8215
8216         return key;
8217 }
8218
8219 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8220 {
8221         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8222 }
8223
8224 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8225 {
8226         u32 i, j, k;
8227
8228         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8229         while (true) {
8230                 vcpu->arch.apf.gfns[i] = ~0;
8231                 do {
8232                         j = kvm_async_pf_next_probe(j);
8233                         if (vcpu->arch.apf.gfns[j] == ~0)
8234                                 return;
8235                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8236                         /*
8237                          * k lies cyclically in ]i,j]
8238                          * |    i.k.j |
8239                          * |....j i.k.| or  |.k..j i...|
8240                          */
8241                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8242                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8243                 i = j;
8244         }
8245 }
8246
8247 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8248 {
8249
8250         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8251                                       sizeof(val));
8252 }
8253
8254 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8255                                      struct kvm_async_pf *work)
8256 {
8257         struct x86_exception fault;
8258
8259         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8260         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8261
8262         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8263             (vcpu->arch.apf.send_user_only &&
8264              kvm_x86_ops->get_cpl(vcpu) == 0))
8265                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8266         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8267                 fault.vector = PF_VECTOR;
8268                 fault.error_code_valid = true;
8269                 fault.error_code = 0;
8270                 fault.nested_page_fault = false;
8271                 fault.address = work->arch.token;
8272                 kvm_inject_page_fault(vcpu, &fault);
8273         }
8274 }
8275
8276 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8277                                  struct kvm_async_pf *work)
8278 {
8279         struct x86_exception fault;
8280
8281         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8282         if (work->wakeup_all)
8283                 work->arch.token = ~0; /* broadcast wakeup */
8284         else
8285                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8286
8287         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8288             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8289                 fault.vector = PF_VECTOR;
8290                 fault.error_code_valid = true;
8291                 fault.error_code = 0;
8292                 fault.nested_page_fault = false;
8293                 fault.address = work->arch.token;
8294                 kvm_inject_page_fault(vcpu, &fault);
8295         }
8296         vcpu->arch.apf.halted = false;
8297         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8298 }
8299
8300 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8301 {
8302         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8303                 return true;
8304         else
8305                 return !kvm_event_needs_reinjection(vcpu) &&
8306                         kvm_x86_ops->interrupt_allowed(vcpu);
8307 }
8308
8309 void kvm_arch_start_assignment(struct kvm *kvm)
8310 {
8311         atomic_inc(&kvm->arch.assigned_device_count);
8312 }
8313 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8314
8315 void kvm_arch_end_assignment(struct kvm *kvm)
8316 {
8317         atomic_dec(&kvm->arch.assigned_device_count);
8318 }
8319 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8320
8321 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8322 {
8323         return atomic_read(&kvm->arch.assigned_device_count);
8324 }
8325 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8326
8327 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8328 {
8329         atomic_inc(&kvm->arch.noncoherent_dma_count);
8330 }
8331 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8332
8333 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8334 {
8335         atomic_dec(&kvm->arch.noncoherent_dma_count);
8336 }
8337 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8338
8339 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8340 {
8341         return atomic_read(&kvm->arch.noncoherent_dma_count);
8342 }
8343 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8344
8345 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8346                                       struct irq_bypass_producer *prod)
8347 {
8348         struct kvm_kernel_irqfd *irqfd =
8349                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8350
8351         if (kvm_x86_ops->update_pi_irte) {
8352                 irqfd->producer = prod;
8353                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8354                                 prod->irq, irqfd->gsi, 1);
8355         }
8356
8357         return -EINVAL;
8358 }
8359
8360 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8361                                       struct irq_bypass_producer *prod)
8362 {
8363         int ret;
8364         struct kvm_kernel_irqfd *irqfd =
8365                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8366
8367         if (!kvm_x86_ops->update_pi_irte) {
8368                 WARN_ON(irqfd->producer != NULL);
8369                 return;
8370         }
8371
8372         WARN_ON(irqfd->producer != prod);
8373         irqfd->producer = NULL;
8374
8375         /*
8376          * When producer of consumer is unregistered, we change back to
8377          * remapped mode, so we can re-use the current implementation
8378          * when the irq is masked/disabed or the consumer side (KVM
8379          * int this case doesn't want to receive the interrupts.
8380         */
8381         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8382         if (ret)
8383                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8384                        " fails: %d\n", irqfd->consumer.token, ret);
8385 }
8386
8387 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8388                                    uint32_t guest_irq, bool set)
8389 {
8390         if (!kvm_x86_ops->update_pi_irte)
8391                 return -EINVAL;
8392
8393         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8394 }
8395
8396 bool kvm_vector_hashing_enabled(void)
8397 {
8398         return vector_hashing;
8399 }
8400 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8401
8402 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8403 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8404 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8413 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8414 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8415 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8416 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8417 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8418 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);