2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
67 * - enable syscall per default because its emulated by KVM
68 * - enable LME and LMA per default on 64 bit KVM
72 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
74 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
80 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
82 struct kvm_cpuid_entry2 __user *entries);
84 struct kvm_x86_ops *kvm_x86_ops;
85 EXPORT_SYMBOL_GPL(kvm_x86_ops);
88 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
90 bool kvm_has_tsc_control;
91 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
92 u32 kvm_max_guest_tsc_khz;
93 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
95 #define KVM_NR_SHARED_MSRS 16
97 struct kvm_shared_msrs_global {
99 u32 msrs[KVM_NR_SHARED_MSRS];
102 struct kvm_shared_msrs {
103 struct user_return_notifier urn;
105 struct kvm_shared_msr_values {
108 } values[KVM_NR_SHARED_MSRS];
111 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
112 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
114 struct kvm_stats_debugfs_item debugfs_entries[] = {
115 { "pf_fixed", VCPU_STAT(pf_fixed) },
116 { "pf_guest", VCPU_STAT(pf_guest) },
117 { "tlb_flush", VCPU_STAT(tlb_flush) },
118 { "invlpg", VCPU_STAT(invlpg) },
119 { "exits", VCPU_STAT(exits) },
120 { "io_exits", VCPU_STAT(io_exits) },
121 { "mmio_exits", VCPU_STAT(mmio_exits) },
122 { "signal_exits", VCPU_STAT(signal_exits) },
123 { "irq_window", VCPU_STAT(irq_window_exits) },
124 { "nmi_window", VCPU_STAT(nmi_window_exits) },
125 { "halt_exits", VCPU_STAT(halt_exits) },
126 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
127 { "hypercalls", VCPU_STAT(hypercalls) },
128 { "request_irq", VCPU_STAT(request_irq_exits) },
129 { "irq_exits", VCPU_STAT(irq_exits) },
130 { "host_state_reload", VCPU_STAT(host_state_reload) },
131 { "efer_reload", VCPU_STAT(efer_reload) },
132 { "fpu_reload", VCPU_STAT(fpu_reload) },
133 { "insn_emulation", VCPU_STAT(insn_emulation) },
134 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
135 { "irq_injections", VCPU_STAT(irq_injections) },
136 { "nmi_injections", VCPU_STAT(nmi_injections) },
137 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
138 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
139 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
140 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
141 { "mmu_flooded", VM_STAT(mmu_flooded) },
142 { "mmu_recycled", VM_STAT(mmu_recycled) },
143 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
144 { "mmu_unsync", VM_STAT(mmu_unsync) },
145 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
146 { "largepages", VM_STAT(lpages) },
150 u64 __read_mostly host_xcr0;
152 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
155 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
156 vcpu->arch.apf.gfns[i] = ~0;
159 static void kvm_on_user_return(struct user_return_notifier *urn)
162 struct kvm_shared_msrs *locals
163 = container_of(urn, struct kvm_shared_msrs, urn);
164 struct kvm_shared_msr_values *values;
166 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
167 values = &locals->values[slot];
168 if (values->host != values->curr) {
169 wrmsrl(shared_msrs_global.msrs[slot], values->host);
170 values->curr = values->host;
173 locals->registered = false;
174 user_return_notifier_unregister(urn);
177 static void shared_msr_update(unsigned slot, u32 msr)
179 struct kvm_shared_msrs *smsr;
182 smsr = &__get_cpu_var(shared_msrs);
183 /* only read, and nobody should modify it at this time,
184 * so don't need lock */
185 if (slot >= shared_msrs_global.nr) {
186 printk(KERN_ERR "kvm: invalid MSR slot!");
189 rdmsrl_safe(msr, &value);
190 smsr->values[slot].host = value;
191 smsr->values[slot].curr = value;
194 void kvm_define_shared_msr(unsigned slot, u32 msr)
196 if (slot >= shared_msrs_global.nr)
197 shared_msrs_global.nr = slot + 1;
198 shared_msrs_global.msrs[slot] = msr;
199 /* we need ensured the shared_msr_global have been updated */
202 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
204 static void kvm_shared_msr_cpu_online(void)
208 for (i = 0; i < shared_msrs_global.nr; ++i)
209 shared_msr_update(i, shared_msrs_global.msrs[i]);
212 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
214 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
216 if (((value ^ smsr->values[slot].curr) & mask) == 0)
218 smsr->values[slot].curr = value;
219 wrmsrl(shared_msrs_global.msrs[slot], value);
220 if (!smsr->registered) {
221 smsr->urn.on_user_return = kvm_on_user_return;
222 user_return_notifier_register(&smsr->urn);
223 smsr->registered = true;
226 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
228 static void drop_user_return_notifiers(void *ignore)
230 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
232 if (smsr->registered)
233 kvm_on_user_return(&smsr->urn);
236 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
238 if (irqchip_in_kernel(vcpu->kvm))
239 return vcpu->arch.apic_base;
241 return vcpu->arch.apic_base;
243 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
245 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
247 /* TODO: reserve bits check */
248 if (irqchip_in_kernel(vcpu->kvm))
249 kvm_lapic_set_base(vcpu, data);
251 vcpu->arch.apic_base = data;
253 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
255 #define EXCPT_BENIGN 0
256 #define EXCPT_CONTRIBUTORY 1
259 static int exception_class(int vector)
269 return EXCPT_CONTRIBUTORY;
276 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
277 unsigned nr, bool has_error, u32 error_code,
283 kvm_make_request(KVM_REQ_EVENT, vcpu);
285 if (!vcpu->arch.exception.pending) {
287 vcpu->arch.exception.pending = true;
288 vcpu->arch.exception.has_error_code = has_error;
289 vcpu->arch.exception.nr = nr;
290 vcpu->arch.exception.error_code = error_code;
291 vcpu->arch.exception.reinject = reinject;
295 /* to check exception */
296 prev_nr = vcpu->arch.exception.nr;
297 if (prev_nr == DF_VECTOR) {
298 /* triple fault -> shutdown */
299 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
302 class1 = exception_class(prev_nr);
303 class2 = exception_class(nr);
304 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
305 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
306 /* generate double fault per SDM Table 5-5 */
307 vcpu->arch.exception.pending = true;
308 vcpu->arch.exception.has_error_code = true;
309 vcpu->arch.exception.nr = DF_VECTOR;
310 vcpu->arch.exception.error_code = 0;
312 /* replace previous exception with a new one in a hope
313 that instruction re-execution will regenerate lost
318 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
320 kvm_multiple_exception(vcpu, nr, false, 0, false);
322 EXPORT_SYMBOL_GPL(kvm_queue_exception);
324 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
326 kvm_multiple_exception(vcpu, nr, false, 0, true);
328 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
330 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
333 kvm_inject_gp(vcpu, 0);
335 kvm_x86_ops->skip_emulated_instruction(vcpu);
337 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
339 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
341 ++vcpu->stat.pf_guest;
342 vcpu->arch.cr2 = fault->address;
343 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
346 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
348 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
349 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
351 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
354 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
356 kvm_make_request(KVM_REQ_EVENT, vcpu);
357 vcpu->arch.nmi_pending = 1;
359 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
361 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
363 kvm_multiple_exception(vcpu, nr, true, error_code, false);
365 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
367 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
369 kvm_multiple_exception(vcpu, nr, true, error_code, true);
371 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
374 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
375 * a #GP and return false.
377 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
379 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
381 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
384 EXPORT_SYMBOL_GPL(kvm_require_cpl);
387 * This function will be used to read from the physical memory of the currently
388 * running guest. The difference to kvm_read_guest_page is that this function
389 * can read from guest physical or from the guest's guest physical memory.
391 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
392 gfn_t ngfn, void *data, int offset, int len,
398 ngpa = gfn_to_gpa(ngfn);
399 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
400 if (real_gfn == UNMAPPED_GVA)
403 real_gfn = gpa_to_gfn(real_gfn);
405 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
407 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
409 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
410 void *data, int offset, int len, u32 access)
412 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
413 data, offset, len, access);
417 * Load the pae pdptrs. Return true is they are all valid.
419 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
421 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
422 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
425 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
427 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
428 offset * sizeof(u64), sizeof(pdpte),
429 PFERR_USER_MASK|PFERR_WRITE_MASK);
434 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
435 if (is_present_gpte(pdpte[i]) &&
436 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
443 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
444 __set_bit(VCPU_EXREG_PDPTR,
445 (unsigned long *)&vcpu->arch.regs_avail);
446 __set_bit(VCPU_EXREG_PDPTR,
447 (unsigned long *)&vcpu->arch.regs_dirty);
452 EXPORT_SYMBOL_GPL(load_pdptrs);
454 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
456 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
462 if (is_long_mode(vcpu) || !is_pae(vcpu))
465 if (!test_bit(VCPU_EXREG_PDPTR,
466 (unsigned long *)&vcpu->arch.regs_avail))
469 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
470 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
471 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
472 PFERR_USER_MASK | PFERR_WRITE_MASK);
475 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
481 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
483 unsigned long old_cr0 = kvm_read_cr0(vcpu);
484 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
485 X86_CR0_CD | X86_CR0_NW;
490 if (cr0 & 0xffffffff00000000UL)
494 cr0 &= ~CR0_RESERVED_BITS;
496 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
499 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
502 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
504 if ((vcpu->arch.efer & EFER_LME)) {
509 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
514 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
519 kvm_x86_ops->set_cr0(vcpu, cr0);
521 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
522 kvm_clear_async_pf_completion_queue(vcpu);
523 kvm_async_pf_hash_reset(vcpu);
526 if ((cr0 ^ old_cr0) & update_bits)
527 kvm_mmu_reset_context(vcpu);
530 EXPORT_SYMBOL_GPL(kvm_set_cr0);
532 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
534 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
536 EXPORT_SYMBOL_GPL(kvm_lmsw);
538 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
542 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
543 if (index != XCR_XFEATURE_ENABLED_MASK)
546 if (kvm_x86_ops->get_cpl(vcpu) != 0)
548 if (!(xcr0 & XSTATE_FP))
550 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
552 if (xcr0 & ~host_xcr0)
554 vcpu->arch.xcr0 = xcr0;
555 vcpu->guest_xcr0_loaded = 0;
559 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
561 if (__kvm_set_xcr(vcpu, index, xcr)) {
562 kvm_inject_gp(vcpu, 0);
567 EXPORT_SYMBOL_GPL(kvm_set_xcr);
569 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
571 struct kvm_cpuid_entry2 *best;
573 best = kvm_find_cpuid_entry(vcpu, 1, 0);
574 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
577 static void update_cpuid(struct kvm_vcpu *vcpu)
579 struct kvm_cpuid_entry2 *best;
581 best = kvm_find_cpuid_entry(vcpu, 1, 0);
585 /* Update OSXSAVE bit */
586 if (cpu_has_xsave && best->function == 0x1) {
587 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
588 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
589 best->ecx |= bit(X86_FEATURE_OSXSAVE);
593 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
595 unsigned long old_cr4 = kvm_read_cr4(vcpu);
596 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
598 if (cr4 & CR4_RESERVED_BITS)
601 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
604 if (is_long_mode(vcpu)) {
605 if (!(cr4 & X86_CR4_PAE))
607 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
608 && ((cr4 ^ old_cr4) & pdptr_bits)
609 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
613 if (cr4 & X86_CR4_VMXE)
616 kvm_x86_ops->set_cr4(vcpu, cr4);
618 if ((cr4 ^ old_cr4) & pdptr_bits)
619 kvm_mmu_reset_context(vcpu);
621 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
626 EXPORT_SYMBOL_GPL(kvm_set_cr4);
628 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
630 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
631 kvm_mmu_sync_roots(vcpu);
632 kvm_mmu_flush_tlb(vcpu);
636 if (is_long_mode(vcpu)) {
637 if (cr3 & CR3_L_MODE_RESERVED_BITS)
641 if (cr3 & CR3_PAE_RESERVED_BITS)
643 if (is_paging(vcpu) &&
644 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
648 * We don't check reserved bits in nonpae mode, because
649 * this isn't enforced, and VMware depends on this.
654 * Does the new cr3 value map to physical memory? (Note, we
655 * catch an invalid cr3 even in real-mode, because it would
656 * cause trouble later on when we turn on paging anyway.)
658 * A real CPU would silently accept an invalid cr3 and would
659 * attempt to use it - with largely undefined (and often hard
660 * to debug) behavior on the guest side.
662 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
664 vcpu->arch.cr3 = cr3;
665 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
666 vcpu->arch.mmu.new_cr3(vcpu);
669 EXPORT_SYMBOL_GPL(kvm_set_cr3);
671 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
673 if (cr8 & CR8_RESERVED_BITS)
675 if (irqchip_in_kernel(vcpu->kvm))
676 kvm_lapic_set_tpr(vcpu, cr8);
678 vcpu->arch.cr8 = cr8;
681 EXPORT_SYMBOL_GPL(kvm_set_cr8);
683 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
685 if (irqchip_in_kernel(vcpu->kvm))
686 return kvm_lapic_get_cr8(vcpu);
688 return vcpu->arch.cr8;
690 EXPORT_SYMBOL_GPL(kvm_get_cr8);
692 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
696 vcpu->arch.db[dr] = val;
697 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
698 vcpu->arch.eff_db[dr] = val;
701 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
705 if (val & 0xffffffff00000000ULL)
707 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
710 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
714 if (val & 0xffffffff00000000ULL)
716 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
717 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
718 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
719 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
727 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
731 res = __kvm_set_dr(vcpu, dr, val);
733 kvm_queue_exception(vcpu, UD_VECTOR);
735 kvm_inject_gp(vcpu, 0);
739 EXPORT_SYMBOL_GPL(kvm_set_dr);
741 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
745 *val = vcpu->arch.db[dr];
748 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
752 *val = vcpu->arch.dr6;
755 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
759 *val = vcpu->arch.dr7;
766 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
768 if (_kvm_get_dr(vcpu, dr, val)) {
769 kvm_queue_exception(vcpu, UD_VECTOR);
774 EXPORT_SYMBOL_GPL(kvm_get_dr);
777 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
778 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
780 * This list is modified at module load time to reflect the
781 * capabilities of the host cpu. This capabilities test skips MSRs that are
782 * kvm-specific. Those are put in the beginning of the list.
785 #define KVM_SAVE_MSRS_BEGIN 8
786 static u32 msrs_to_save[] = {
787 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
788 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
789 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
790 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
791 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
794 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
796 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
799 static unsigned num_msrs_to_save;
801 static u32 emulated_msrs[] = {
802 MSR_IA32_MISC_ENABLE,
807 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
809 u64 old_efer = vcpu->arch.efer;
811 if (efer & efer_reserved_bits)
815 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
818 if (efer & EFER_FFXSR) {
819 struct kvm_cpuid_entry2 *feat;
821 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
822 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
826 if (efer & EFER_SVME) {
827 struct kvm_cpuid_entry2 *feat;
829 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
830 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
835 efer |= vcpu->arch.efer & EFER_LMA;
837 kvm_x86_ops->set_efer(vcpu, efer);
839 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
841 /* Update reserved bits */
842 if ((efer ^ old_efer) & EFER_NX)
843 kvm_mmu_reset_context(vcpu);
848 void kvm_enable_efer_bits(u64 mask)
850 efer_reserved_bits &= ~mask;
852 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
856 * Writes msr value into into the appropriate "register".
857 * Returns 0 on success, non-0 otherwise.
858 * Assumes vcpu_load() was already called.
860 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
862 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
866 * Adapt set_msr() to msr_io()'s calling convention
868 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
870 return kvm_set_msr(vcpu, index, *data);
873 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
877 struct pvclock_wall_clock wc;
878 struct timespec boot;
883 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
888 ++version; /* first time write, random junk */
892 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
895 * The guest calculates current wall clock time by adding
896 * system time (updated by kvm_guest_time_update below) to the
897 * wall clock specified here. guest system time equals host
898 * system time for us, thus we must fill in host boot time here.
902 wc.sec = boot.tv_sec;
903 wc.nsec = boot.tv_nsec;
904 wc.version = version;
906 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
909 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
912 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
914 uint32_t quotient, remainder;
916 /* Don't try to replace with do_div(), this one calculates
917 * "(dividend << 32) / divisor" */
919 : "=a" (quotient), "=d" (remainder)
920 : "0" (0), "1" (dividend), "r" (divisor) );
924 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
925 s8 *pshift, u32 *pmultiplier)
932 tps64 = base_khz * 1000LL;
933 scaled64 = scaled_khz * 1000LL;
934 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
939 tps32 = (uint32_t)tps64;
940 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
941 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
949 *pmultiplier = div_frac(scaled64, tps32);
951 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
952 __func__, base_khz, scaled_khz, shift, *pmultiplier);
955 static inline u64 get_kernel_ns(void)
959 WARN_ON(preemptible());
961 monotonic_to_bootbased(&ts);
962 return timespec_to_ns(&ts);
965 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
966 unsigned long max_tsc_khz;
968 static inline int kvm_tsc_changes_freq(void)
971 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
972 cpufreq_quick_get(cpu) != 0;
977 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
979 if (vcpu->arch.virtual_tsc_khz)
980 return vcpu->arch.virtual_tsc_khz;
982 return __this_cpu_read(cpu_tsc_khz);
985 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
989 WARN_ON(preemptible());
990 if (kvm_tsc_changes_freq())
991 printk_once(KERN_WARNING
992 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
993 ret = nsec * vcpu_tsc_khz(vcpu);
994 do_div(ret, USEC_PER_SEC);
998 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1000 /* Compute a scale to convert nanoseconds in TSC cycles */
1001 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1002 &vcpu->arch.tsc_catchup_shift,
1003 &vcpu->arch.tsc_catchup_mult);
1006 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1008 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1009 vcpu->arch.tsc_catchup_mult,
1010 vcpu->arch.tsc_catchup_shift);
1011 tsc += vcpu->arch.last_tsc_write;
1015 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1017 struct kvm *kvm = vcpu->kvm;
1018 u64 offset, ns, elapsed;
1019 unsigned long flags;
1022 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1023 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1024 ns = get_kernel_ns();
1025 elapsed = ns - kvm->arch.last_tsc_nsec;
1026 sdiff = data - kvm->arch.last_tsc_write;
1031 * Special case: close write to TSC within 5 seconds of
1032 * another CPU is interpreted as an attempt to synchronize
1033 * The 5 seconds is to accommodate host load / swapping as
1034 * well as any reset of TSC during the boot process.
1036 * In that case, for a reliable TSC, we can match TSC offsets,
1037 * or make a best guest using elapsed value.
1039 if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1040 elapsed < 5ULL * NSEC_PER_SEC) {
1041 if (!check_tsc_unstable()) {
1042 offset = kvm->arch.last_tsc_offset;
1043 pr_debug("kvm: matched tsc offset for %llu\n", data);
1045 u64 delta = nsec_to_cycles(vcpu, elapsed);
1047 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1049 ns = kvm->arch.last_tsc_nsec;
1051 kvm->arch.last_tsc_nsec = ns;
1052 kvm->arch.last_tsc_write = data;
1053 kvm->arch.last_tsc_offset = offset;
1054 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1055 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1057 /* Reset of TSC must disable overshoot protection below */
1058 vcpu->arch.hv_clock.tsc_timestamp = 0;
1059 vcpu->arch.last_tsc_write = data;
1060 vcpu->arch.last_tsc_nsec = ns;
1062 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1064 static int kvm_guest_time_update(struct kvm_vcpu *v)
1066 unsigned long flags;
1067 struct kvm_vcpu_arch *vcpu = &v->arch;
1069 unsigned long this_tsc_khz;
1070 s64 kernel_ns, max_kernel_ns;
1073 /* Keep irq disabled to prevent changes to the clock */
1074 local_irq_save(flags);
1075 kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1076 kernel_ns = get_kernel_ns();
1077 this_tsc_khz = vcpu_tsc_khz(v);
1078 if (unlikely(this_tsc_khz == 0)) {
1079 local_irq_restore(flags);
1080 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1085 * We may have to catch up the TSC to match elapsed wall clock
1086 * time for two reasons, even if kvmclock is used.
1087 * 1) CPU could have been running below the maximum TSC rate
1088 * 2) Broken TSC compensation resets the base at each VCPU
1089 * entry to avoid unknown leaps of TSC even when running
1090 * again on the same CPU. This may cause apparent elapsed
1091 * time to disappear, and the guest to stand still or run
1094 if (vcpu->tsc_catchup) {
1095 u64 tsc = compute_guest_tsc(v, kernel_ns);
1096 if (tsc > tsc_timestamp) {
1097 kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1098 tsc_timestamp = tsc;
1102 local_irq_restore(flags);
1104 if (!vcpu->time_page)
1108 * Time as measured by the TSC may go backwards when resetting the base
1109 * tsc_timestamp. The reason for this is that the TSC resolution is
1110 * higher than the resolution of the other clock scales. Thus, many
1111 * possible measurments of the TSC correspond to one measurement of any
1112 * other clock, and so a spread of values is possible. This is not a
1113 * problem for the computation of the nanosecond clock; with TSC rates
1114 * around 1GHZ, there can only be a few cycles which correspond to one
1115 * nanosecond value, and any path through this code will inevitably
1116 * take longer than that. However, with the kernel_ns value itself,
1117 * the precision may be much lower, down to HZ granularity. If the
1118 * first sampling of TSC against kernel_ns ends in the low part of the
1119 * range, and the second in the high end of the range, we can get:
1121 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1123 * As the sampling errors potentially range in the thousands of cycles,
1124 * it is possible such a time value has already been observed by the
1125 * guest. To protect against this, we must compute the system time as
1126 * observed by the guest and ensure the new system time is greater.
1129 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1130 max_kernel_ns = vcpu->last_guest_tsc -
1131 vcpu->hv_clock.tsc_timestamp;
1132 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1133 vcpu->hv_clock.tsc_to_system_mul,
1134 vcpu->hv_clock.tsc_shift);
1135 max_kernel_ns += vcpu->last_kernel_ns;
1138 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1139 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1140 &vcpu->hv_clock.tsc_shift,
1141 &vcpu->hv_clock.tsc_to_system_mul);
1142 vcpu->hw_tsc_khz = this_tsc_khz;
1145 if (max_kernel_ns > kernel_ns)
1146 kernel_ns = max_kernel_ns;
1148 /* With all the info we got, fill in the values */
1149 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1150 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1151 vcpu->last_kernel_ns = kernel_ns;
1152 vcpu->last_guest_tsc = tsc_timestamp;
1153 vcpu->hv_clock.flags = 0;
1156 * The interface expects us to write an even number signaling that the
1157 * update is finished. Since the guest won't see the intermediate
1158 * state, we just increase by 2 at the end.
1160 vcpu->hv_clock.version += 2;
1162 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1164 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1165 sizeof(vcpu->hv_clock));
1167 kunmap_atomic(shared_kaddr, KM_USER0);
1169 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1173 static bool msr_mtrr_valid(unsigned msr)
1176 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1177 case MSR_MTRRfix64K_00000:
1178 case MSR_MTRRfix16K_80000:
1179 case MSR_MTRRfix16K_A0000:
1180 case MSR_MTRRfix4K_C0000:
1181 case MSR_MTRRfix4K_C8000:
1182 case MSR_MTRRfix4K_D0000:
1183 case MSR_MTRRfix4K_D8000:
1184 case MSR_MTRRfix4K_E0000:
1185 case MSR_MTRRfix4K_E8000:
1186 case MSR_MTRRfix4K_F0000:
1187 case MSR_MTRRfix4K_F8000:
1188 case MSR_MTRRdefType:
1189 case MSR_IA32_CR_PAT:
1197 static bool valid_pat_type(unsigned t)
1199 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1202 static bool valid_mtrr_type(unsigned t)
1204 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1207 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1211 if (!msr_mtrr_valid(msr))
1214 if (msr == MSR_IA32_CR_PAT) {
1215 for (i = 0; i < 8; i++)
1216 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1219 } else if (msr == MSR_MTRRdefType) {
1222 return valid_mtrr_type(data & 0xff);
1223 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1224 for (i = 0; i < 8 ; i++)
1225 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1230 /* variable MTRRs */
1231 return valid_mtrr_type(data & 0xff);
1234 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1236 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1238 if (!mtrr_valid(vcpu, msr, data))
1241 if (msr == MSR_MTRRdefType) {
1242 vcpu->arch.mtrr_state.def_type = data;
1243 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1244 } else if (msr == MSR_MTRRfix64K_00000)
1246 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1247 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1248 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1249 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1250 else if (msr == MSR_IA32_CR_PAT)
1251 vcpu->arch.pat = data;
1252 else { /* Variable MTRRs */
1253 int idx, is_mtrr_mask;
1256 idx = (msr - 0x200) / 2;
1257 is_mtrr_mask = msr - 0x200 - 2 * idx;
1260 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1263 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1267 kvm_mmu_reset_context(vcpu);
1271 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1273 u64 mcg_cap = vcpu->arch.mcg_cap;
1274 unsigned bank_num = mcg_cap & 0xff;
1277 case MSR_IA32_MCG_STATUS:
1278 vcpu->arch.mcg_status = data;
1280 case MSR_IA32_MCG_CTL:
1281 if (!(mcg_cap & MCG_CTL_P))
1283 if (data != 0 && data != ~(u64)0)
1285 vcpu->arch.mcg_ctl = data;
1288 if (msr >= MSR_IA32_MC0_CTL &&
1289 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1290 u32 offset = msr - MSR_IA32_MC0_CTL;
1291 /* only 0 or all 1s can be written to IA32_MCi_CTL
1292 * some Linux kernels though clear bit 10 in bank 4 to
1293 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1294 * this to avoid an uncatched #GP in the guest
1296 if ((offset & 0x3) == 0 &&
1297 data != 0 && (data | (1 << 10)) != ~(u64)0)
1299 vcpu->arch.mce_banks[offset] = data;
1307 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1309 struct kvm *kvm = vcpu->kvm;
1310 int lm = is_long_mode(vcpu);
1311 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1312 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1313 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1314 : kvm->arch.xen_hvm_config.blob_size_32;
1315 u32 page_num = data & ~PAGE_MASK;
1316 u64 page_addr = data & PAGE_MASK;
1321 if (page_num >= blob_size)
1324 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1328 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1330 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1339 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1341 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1344 static bool kvm_hv_msr_partition_wide(u32 msr)
1348 case HV_X64_MSR_GUEST_OS_ID:
1349 case HV_X64_MSR_HYPERCALL:
1357 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1359 struct kvm *kvm = vcpu->kvm;
1362 case HV_X64_MSR_GUEST_OS_ID:
1363 kvm->arch.hv_guest_os_id = data;
1364 /* setting guest os id to zero disables hypercall page */
1365 if (!kvm->arch.hv_guest_os_id)
1366 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1368 case HV_X64_MSR_HYPERCALL: {
1373 /* if guest os id is not set hypercall should remain disabled */
1374 if (!kvm->arch.hv_guest_os_id)
1376 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1377 kvm->arch.hv_hypercall = data;
1380 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1381 addr = gfn_to_hva(kvm, gfn);
1382 if (kvm_is_error_hva(addr))
1384 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1385 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1386 if (copy_to_user((void __user *)addr, instructions, 4))
1388 kvm->arch.hv_hypercall = data;
1392 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1393 "data 0x%llx\n", msr, data);
1399 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1402 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1405 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1406 vcpu->arch.hv_vapic = data;
1409 addr = gfn_to_hva(vcpu->kvm, data >>
1410 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1411 if (kvm_is_error_hva(addr))
1413 if (clear_user((void __user *)addr, PAGE_SIZE))
1415 vcpu->arch.hv_vapic = data;
1418 case HV_X64_MSR_EOI:
1419 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1420 case HV_X64_MSR_ICR:
1421 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1422 case HV_X64_MSR_TPR:
1423 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1425 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1426 "data 0x%llx\n", msr, data);
1433 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1435 gpa_t gpa = data & ~0x3f;
1437 /* Bits 2:5 are resrved, Should be zero */
1441 vcpu->arch.apf.msr_val = data;
1443 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1444 kvm_clear_async_pf_completion_queue(vcpu);
1445 kvm_async_pf_hash_reset(vcpu);
1449 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1452 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1453 kvm_async_pf_wakeup_all(vcpu);
1457 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1459 if (vcpu->arch.time_page) {
1460 kvm_release_page_dirty(vcpu->arch.time_page);
1461 vcpu->arch.time_page = NULL;
1465 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1469 return set_efer(vcpu, data);
1471 data &= ~(u64)0x40; /* ignore flush filter disable */
1472 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1474 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1479 case MSR_FAM10H_MMIO_CONF_BASE:
1481 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1486 case MSR_AMD64_NB_CFG:
1488 case MSR_IA32_DEBUGCTLMSR:
1490 /* We support the non-activated case already */
1492 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1493 /* Values other than LBR and BTF are vendor-specific,
1494 thus reserved and should throw a #GP */
1497 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1500 case MSR_IA32_UCODE_REV:
1501 case MSR_IA32_UCODE_WRITE:
1502 case MSR_VM_HSAVE_PA:
1503 case MSR_AMD64_PATCH_LOADER:
1505 case 0x200 ... 0x2ff:
1506 return set_msr_mtrr(vcpu, msr, data);
1507 case MSR_IA32_APICBASE:
1508 kvm_set_apic_base(vcpu, data);
1510 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1511 return kvm_x2apic_msr_write(vcpu, msr, data);
1512 case MSR_IA32_MISC_ENABLE:
1513 vcpu->arch.ia32_misc_enable_msr = data;
1515 case MSR_KVM_WALL_CLOCK_NEW:
1516 case MSR_KVM_WALL_CLOCK:
1517 vcpu->kvm->arch.wall_clock = data;
1518 kvm_write_wall_clock(vcpu->kvm, data);
1520 case MSR_KVM_SYSTEM_TIME_NEW:
1521 case MSR_KVM_SYSTEM_TIME: {
1522 kvmclock_reset(vcpu);
1524 vcpu->arch.time = data;
1525 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1527 /* we verify if the enable bit is set... */
1531 /* ...but clean it before doing the actual write */
1532 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1534 vcpu->arch.time_page =
1535 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1537 if (is_error_page(vcpu->arch.time_page)) {
1538 kvm_release_page_clean(vcpu->arch.time_page);
1539 vcpu->arch.time_page = NULL;
1543 case MSR_KVM_ASYNC_PF_EN:
1544 if (kvm_pv_enable_async_pf(vcpu, data))
1547 case MSR_IA32_MCG_CTL:
1548 case MSR_IA32_MCG_STATUS:
1549 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1550 return set_msr_mce(vcpu, msr, data);
1552 /* Performance counters are not protected by a CPUID bit,
1553 * so we should check all of them in the generic path for the sake of
1554 * cross vendor migration.
1555 * Writing a zero into the event select MSRs disables them,
1556 * which we perfectly emulate ;-). Any other value should be at least
1557 * reported, some guests depend on them.
1559 case MSR_P6_EVNTSEL0:
1560 case MSR_P6_EVNTSEL1:
1561 case MSR_K7_EVNTSEL0:
1562 case MSR_K7_EVNTSEL1:
1563 case MSR_K7_EVNTSEL2:
1564 case MSR_K7_EVNTSEL3:
1566 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1567 "0x%x data 0x%llx\n", msr, data);
1569 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1570 * so we ignore writes to make it happy.
1572 case MSR_P6_PERFCTR0:
1573 case MSR_P6_PERFCTR1:
1574 case MSR_K7_PERFCTR0:
1575 case MSR_K7_PERFCTR1:
1576 case MSR_K7_PERFCTR2:
1577 case MSR_K7_PERFCTR3:
1578 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1579 "0x%x data 0x%llx\n", msr, data);
1581 case MSR_K7_CLK_CTL:
1583 * Ignore all writes to this no longer documented MSR.
1584 * Writes are only relevant for old K7 processors,
1585 * all pre-dating SVM, but a recommended workaround from
1586 * AMD for these chips. It is possible to speicify the
1587 * affected processor models on the command line, hence
1588 * the need to ignore the workaround.
1591 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1592 if (kvm_hv_msr_partition_wide(msr)) {
1594 mutex_lock(&vcpu->kvm->lock);
1595 r = set_msr_hyperv_pw(vcpu, msr, data);
1596 mutex_unlock(&vcpu->kvm->lock);
1599 return set_msr_hyperv(vcpu, msr, data);
1601 case MSR_IA32_BBL_CR_CTL3:
1602 /* Drop writes to this legacy MSR -- see rdmsr
1603 * counterpart for further detail.
1605 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1608 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1609 return xen_hvm_config(vcpu, data);
1611 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1615 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1622 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1626 * Reads an msr value (of 'msr_index') into 'pdata'.
1627 * Returns 0 on success, non-0 otherwise.
1628 * Assumes vcpu_load() was already called.
1630 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1632 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1635 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1637 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1639 if (!msr_mtrr_valid(msr))
1642 if (msr == MSR_MTRRdefType)
1643 *pdata = vcpu->arch.mtrr_state.def_type +
1644 (vcpu->arch.mtrr_state.enabled << 10);
1645 else if (msr == MSR_MTRRfix64K_00000)
1647 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1648 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1649 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1650 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1651 else if (msr == MSR_IA32_CR_PAT)
1652 *pdata = vcpu->arch.pat;
1653 else { /* Variable MTRRs */
1654 int idx, is_mtrr_mask;
1657 idx = (msr - 0x200) / 2;
1658 is_mtrr_mask = msr - 0x200 - 2 * idx;
1661 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1664 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1671 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1674 u64 mcg_cap = vcpu->arch.mcg_cap;
1675 unsigned bank_num = mcg_cap & 0xff;
1678 case MSR_IA32_P5_MC_ADDR:
1679 case MSR_IA32_P5_MC_TYPE:
1682 case MSR_IA32_MCG_CAP:
1683 data = vcpu->arch.mcg_cap;
1685 case MSR_IA32_MCG_CTL:
1686 if (!(mcg_cap & MCG_CTL_P))
1688 data = vcpu->arch.mcg_ctl;
1690 case MSR_IA32_MCG_STATUS:
1691 data = vcpu->arch.mcg_status;
1694 if (msr >= MSR_IA32_MC0_CTL &&
1695 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1696 u32 offset = msr - MSR_IA32_MC0_CTL;
1697 data = vcpu->arch.mce_banks[offset];
1706 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1709 struct kvm *kvm = vcpu->kvm;
1712 case HV_X64_MSR_GUEST_OS_ID:
1713 data = kvm->arch.hv_guest_os_id;
1715 case HV_X64_MSR_HYPERCALL:
1716 data = kvm->arch.hv_hypercall;
1719 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1727 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1732 case HV_X64_MSR_VP_INDEX: {
1735 kvm_for_each_vcpu(r, v, vcpu->kvm)
1740 case HV_X64_MSR_EOI:
1741 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1742 case HV_X64_MSR_ICR:
1743 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1744 case HV_X64_MSR_TPR:
1745 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1747 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1754 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1759 case MSR_IA32_PLATFORM_ID:
1760 case MSR_IA32_UCODE_REV:
1761 case MSR_IA32_EBL_CR_POWERON:
1762 case MSR_IA32_DEBUGCTLMSR:
1763 case MSR_IA32_LASTBRANCHFROMIP:
1764 case MSR_IA32_LASTBRANCHTOIP:
1765 case MSR_IA32_LASTINTFROMIP:
1766 case MSR_IA32_LASTINTTOIP:
1769 case MSR_VM_HSAVE_PA:
1770 case MSR_P6_PERFCTR0:
1771 case MSR_P6_PERFCTR1:
1772 case MSR_P6_EVNTSEL0:
1773 case MSR_P6_EVNTSEL1:
1774 case MSR_K7_EVNTSEL0:
1775 case MSR_K7_PERFCTR0:
1776 case MSR_K8_INT_PENDING_MSG:
1777 case MSR_AMD64_NB_CFG:
1778 case MSR_FAM10H_MMIO_CONF_BASE:
1782 data = 0x500 | KVM_NR_VAR_MTRR;
1784 case 0x200 ... 0x2ff:
1785 return get_msr_mtrr(vcpu, msr, pdata);
1786 case 0xcd: /* fsb frequency */
1790 * MSR_EBC_FREQUENCY_ID
1791 * Conservative value valid for even the basic CPU models.
1792 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1793 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1794 * and 266MHz for model 3, or 4. Set Core Clock
1795 * Frequency to System Bus Frequency Ratio to 1 (bits
1796 * 31:24) even though these are only valid for CPU
1797 * models > 2, however guests may end up dividing or
1798 * multiplying by zero otherwise.
1800 case MSR_EBC_FREQUENCY_ID:
1803 case MSR_IA32_APICBASE:
1804 data = kvm_get_apic_base(vcpu);
1806 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1807 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1809 case MSR_IA32_MISC_ENABLE:
1810 data = vcpu->arch.ia32_misc_enable_msr;
1812 case MSR_IA32_PERF_STATUS:
1813 /* TSC increment by tick */
1815 /* CPU multiplier */
1816 data |= (((uint64_t)4ULL) << 40);
1819 data = vcpu->arch.efer;
1821 case MSR_KVM_WALL_CLOCK:
1822 case MSR_KVM_WALL_CLOCK_NEW:
1823 data = vcpu->kvm->arch.wall_clock;
1825 case MSR_KVM_SYSTEM_TIME:
1826 case MSR_KVM_SYSTEM_TIME_NEW:
1827 data = vcpu->arch.time;
1829 case MSR_KVM_ASYNC_PF_EN:
1830 data = vcpu->arch.apf.msr_val;
1832 case MSR_IA32_P5_MC_ADDR:
1833 case MSR_IA32_P5_MC_TYPE:
1834 case MSR_IA32_MCG_CAP:
1835 case MSR_IA32_MCG_CTL:
1836 case MSR_IA32_MCG_STATUS:
1837 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1838 return get_msr_mce(vcpu, msr, pdata);
1839 case MSR_K7_CLK_CTL:
1841 * Provide expected ramp-up count for K7. All other
1842 * are set to zero, indicating minimum divisors for
1845 * This prevents guest kernels on AMD host with CPU
1846 * type 6, model 8 and higher from exploding due to
1847 * the rdmsr failing.
1851 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1852 if (kvm_hv_msr_partition_wide(msr)) {
1854 mutex_lock(&vcpu->kvm->lock);
1855 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1856 mutex_unlock(&vcpu->kvm->lock);
1859 return get_msr_hyperv(vcpu, msr, pdata);
1861 case MSR_IA32_BBL_CR_CTL3:
1862 /* This legacy MSR exists but isn't fully documented in current
1863 * silicon. It is however accessed by winxp in very narrow
1864 * scenarios where it sets bit #19, itself documented as
1865 * a "reserved" bit. Best effort attempt to source coherent
1866 * read data here should the balance of the register be
1867 * interpreted by the guest:
1869 * L2 cache control register 3: 64GB range, 256KB size,
1870 * enabled, latency 0x1, configured
1876 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1879 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1887 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1890 * Read or write a bunch of msrs. All parameters are kernel addresses.
1892 * @return number of msrs set successfully.
1894 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1895 struct kvm_msr_entry *entries,
1896 int (*do_msr)(struct kvm_vcpu *vcpu,
1897 unsigned index, u64 *data))
1901 idx = srcu_read_lock(&vcpu->kvm->srcu);
1902 for (i = 0; i < msrs->nmsrs; ++i)
1903 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1905 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1911 * Read or write a bunch of msrs. Parameters are user addresses.
1913 * @return number of msrs set successfully.
1915 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1916 int (*do_msr)(struct kvm_vcpu *vcpu,
1917 unsigned index, u64 *data),
1920 struct kvm_msrs msrs;
1921 struct kvm_msr_entry *entries;
1926 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1930 if (msrs.nmsrs >= MAX_IO_MSRS)
1934 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1935 entries = kmalloc(size, GFP_KERNEL);
1940 if (copy_from_user(entries, user_msrs->entries, size))
1943 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1948 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1959 int kvm_dev_ioctl_check_extension(long ext)
1964 case KVM_CAP_IRQCHIP:
1966 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1967 case KVM_CAP_SET_TSS_ADDR:
1968 case KVM_CAP_EXT_CPUID:
1969 case KVM_CAP_CLOCKSOURCE:
1971 case KVM_CAP_NOP_IO_DELAY:
1972 case KVM_CAP_MP_STATE:
1973 case KVM_CAP_SYNC_MMU:
1974 case KVM_CAP_USER_NMI:
1975 case KVM_CAP_REINJECT_CONTROL:
1976 case KVM_CAP_IRQ_INJECT_STATUS:
1977 case KVM_CAP_ASSIGN_DEV_IRQ:
1979 case KVM_CAP_IOEVENTFD:
1981 case KVM_CAP_PIT_STATE2:
1982 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1983 case KVM_CAP_XEN_HVM:
1984 case KVM_CAP_ADJUST_CLOCK:
1985 case KVM_CAP_VCPU_EVENTS:
1986 case KVM_CAP_HYPERV:
1987 case KVM_CAP_HYPERV_VAPIC:
1988 case KVM_CAP_HYPERV_SPIN:
1989 case KVM_CAP_PCI_SEGMENT:
1990 case KVM_CAP_DEBUGREGS:
1991 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1993 case KVM_CAP_ASYNC_PF:
1994 case KVM_CAP_GET_TSC_KHZ:
1997 case KVM_CAP_COALESCED_MMIO:
1998 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2001 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2003 case KVM_CAP_NR_VCPUS:
2006 case KVM_CAP_NR_MEMSLOTS:
2007 r = KVM_MEMORY_SLOTS;
2009 case KVM_CAP_PV_MMU: /* obsolete */
2016 r = KVM_MAX_MCE_BANKS;
2021 case KVM_CAP_TSC_CONTROL:
2022 r = kvm_has_tsc_control;
2032 long kvm_arch_dev_ioctl(struct file *filp,
2033 unsigned int ioctl, unsigned long arg)
2035 void __user *argp = (void __user *)arg;
2039 case KVM_GET_MSR_INDEX_LIST: {
2040 struct kvm_msr_list __user *user_msr_list = argp;
2041 struct kvm_msr_list msr_list;
2045 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2048 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2049 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2052 if (n < msr_list.nmsrs)
2055 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2056 num_msrs_to_save * sizeof(u32)))
2058 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2060 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2065 case KVM_GET_SUPPORTED_CPUID: {
2066 struct kvm_cpuid2 __user *cpuid_arg = argp;
2067 struct kvm_cpuid2 cpuid;
2070 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2072 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2073 cpuid_arg->entries);
2078 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2083 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2086 mce_cap = KVM_MCE_CAP_SUPPORTED;
2088 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2100 static void wbinvd_ipi(void *garbage)
2105 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2107 return vcpu->kvm->arch.iommu_domain &&
2108 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2111 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2113 /* Address WBINVD may be executed by guest */
2114 if (need_emulate_wbinvd(vcpu)) {
2115 if (kvm_x86_ops->has_wbinvd_exit())
2116 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2117 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2118 smp_call_function_single(vcpu->cpu,
2119 wbinvd_ipi, NULL, 1);
2122 kvm_x86_ops->vcpu_load(vcpu, cpu);
2123 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2124 /* Make sure TSC doesn't go backwards */
2128 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2129 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2130 tsc - vcpu->arch.last_guest_tsc;
2133 mark_tsc_unstable("KVM discovered backwards TSC");
2134 if (check_tsc_unstable()) {
2135 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2136 vcpu->arch.tsc_catchup = 1;
2138 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2139 if (vcpu->cpu != cpu)
2140 kvm_migrate_timers(vcpu);
2145 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2147 kvm_x86_ops->vcpu_put(vcpu);
2148 kvm_put_guest_fpu(vcpu);
2149 vcpu->arch.last_host_tsc = native_read_tsc();
2152 static int is_efer_nx(void)
2154 unsigned long long efer = 0;
2156 rdmsrl_safe(MSR_EFER, &efer);
2157 return efer & EFER_NX;
2160 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2163 struct kvm_cpuid_entry2 *e, *entry;
2166 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2167 e = &vcpu->arch.cpuid_entries[i];
2168 if (e->function == 0x80000001) {
2173 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2174 entry->edx &= ~(1 << 20);
2175 printk(KERN_INFO "kvm: guest NX capability removed\n");
2179 /* when an old userspace process fills a new kernel module */
2180 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2181 struct kvm_cpuid *cpuid,
2182 struct kvm_cpuid_entry __user *entries)
2185 struct kvm_cpuid_entry *cpuid_entries;
2188 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2191 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2195 if (copy_from_user(cpuid_entries, entries,
2196 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2198 for (i = 0; i < cpuid->nent; i++) {
2199 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2200 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2201 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2202 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2203 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2204 vcpu->arch.cpuid_entries[i].index = 0;
2205 vcpu->arch.cpuid_entries[i].flags = 0;
2206 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2207 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2208 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2210 vcpu->arch.cpuid_nent = cpuid->nent;
2211 cpuid_fix_nx_cap(vcpu);
2213 kvm_apic_set_version(vcpu);
2214 kvm_x86_ops->cpuid_update(vcpu);
2218 vfree(cpuid_entries);
2223 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2224 struct kvm_cpuid2 *cpuid,
2225 struct kvm_cpuid_entry2 __user *entries)
2230 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2233 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2234 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2236 vcpu->arch.cpuid_nent = cpuid->nent;
2237 kvm_apic_set_version(vcpu);
2238 kvm_x86_ops->cpuid_update(vcpu);
2246 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2247 struct kvm_cpuid2 *cpuid,
2248 struct kvm_cpuid_entry2 __user *entries)
2253 if (cpuid->nent < vcpu->arch.cpuid_nent)
2256 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2257 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2262 cpuid->nent = vcpu->arch.cpuid_nent;
2266 static void cpuid_mask(u32 *word, int wordnum)
2268 *word &= boot_cpu_data.x86_capability[wordnum];
2271 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2274 entry->function = function;
2275 entry->index = index;
2276 cpuid_count(entry->function, entry->index,
2277 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2281 #define F(x) bit(X86_FEATURE_##x)
2283 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2284 u32 index, int *nent, int maxnent)
2286 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2287 #ifdef CONFIG_X86_64
2288 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2290 unsigned f_lm = F(LM);
2292 unsigned f_gbpages = 0;
2295 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2298 const u32 kvm_supported_word0_x86_features =
2299 F(FPU) | F(VME) | F(DE) | F(PSE) |
2300 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2301 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2302 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2303 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2304 0 /* Reserved, DS, ACPI */ | F(MMX) |
2305 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2306 0 /* HTT, TM, Reserved, PBE */;
2307 /* cpuid 0x80000001.edx */
2308 const u32 kvm_supported_word1_x86_features =
2309 F(FPU) | F(VME) | F(DE) | F(PSE) |
2310 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2311 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2312 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2313 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2314 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2315 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2316 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2318 const u32 kvm_supported_word4_x86_features =
2319 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2320 0 /* DS-CPL, VMX, SMX, EST */ |
2321 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2322 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2323 0 /* Reserved, DCA */ | F(XMM4_1) |
2324 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2325 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2327 /* cpuid 0x80000001.ecx */
2328 const u32 kvm_supported_word6_x86_features =
2329 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2330 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2331 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2332 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2334 /* all calls to cpuid_count() should be made on the same cpu */
2336 do_cpuid_1_ent(entry, function, index);
2341 entry->eax = min(entry->eax, (u32)0xd);
2344 entry->edx &= kvm_supported_word0_x86_features;
2345 cpuid_mask(&entry->edx, 0);
2346 entry->ecx &= kvm_supported_word4_x86_features;
2347 cpuid_mask(&entry->ecx, 4);
2348 /* we support x2apic emulation even if host does not support
2349 * it since we emulate x2apic in software */
2350 entry->ecx |= F(X2APIC);
2352 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2353 * may return different values. This forces us to get_cpu() before
2354 * issuing the first command, and also to emulate this annoying behavior
2355 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2357 int t, times = entry->eax & 0xff;
2359 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2360 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2361 for (t = 1; t < times && *nent < maxnent; ++t) {
2362 do_cpuid_1_ent(&entry[t], function, 0);
2363 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2368 /* function 4 and 0xb have additional index. */
2372 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2373 /* read more entries until cache_type is zero */
2374 for (i = 1; *nent < maxnent; ++i) {
2375 cache_type = entry[i - 1].eax & 0x1f;
2378 do_cpuid_1_ent(&entry[i], function, i);
2380 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2388 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2389 /* read more entries until level_type is zero */
2390 for (i = 1; *nent < maxnent; ++i) {
2391 level_type = entry[i - 1].ecx & 0xff00;
2394 do_cpuid_1_ent(&entry[i], function, i);
2396 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2404 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2405 for (i = 1; *nent < maxnent && i < 64; ++i) {
2406 if (entry[i].eax == 0)
2408 do_cpuid_1_ent(&entry[i], function, i);
2410 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2415 case KVM_CPUID_SIGNATURE: {
2416 char signature[12] = "KVMKVMKVM\0\0";
2417 u32 *sigptr = (u32 *)signature;
2419 entry->ebx = sigptr[0];
2420 entry->ecx = sigptr[1];
2421 entry->edx = sigptr[2];
2424 case KVM_CPUID_FEATURES:
2425 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2426 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2427 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2428 (1 << KVM_FEATURE_ASYNC_PF) |
2429 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2435 entry->eax = min(entry->eax, 0x8000001a);
2438 entry->edx &= kvm_supported_word1_x86_features;
2439 cpuid_mask(&entry->edx, 1);
2440 entry->ecx &= kvm_supported_word6_x86_features;
2441 cpuid_mask(&entry->ecx, 6);
2445 kvm_x86_ops->set_supported_cpuid(function, entry);
2452 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2453 struct kvm_cpuid_entry2 __user *entries)
2455 struct kvm_cpuid_entry2 *cpuid_entries;
2456 int limit, nent = 0, r = -E2BIG;
2459 if (cpuid->nent < 1)
2461 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2462 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2464 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2468 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2469 limit = cpuid_entries[0].eax;
2470 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2471 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2472 &nent, cpuid->nent);
2474 if (nent >= cpuid->nent)
2477 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2478 limit = cpuid_entries[nent - 1].eax;
2479 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2480 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2481 &nent, cpuid->nent);
2486 if (nent >= cpuid->nent)
2489 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2493 if (nent >= cpuid->nent)
2496 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2500 if (nent >= cpuid->nent)
2504 if (copy_to_user(entries, cpuid_entries,
2505 nent * sizeof(struct kvm_cpuid_entry2)))
2511 vfree(cpuid_entries);
2516 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2517 struct kvm_lapic_state *s)
2519 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2524 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2525 struct kvm_lapic_state *s)
2527 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2528 kvm_apic_post_state_restore(vcpu);
2529 update_cr8_intercept(vcpu);
2534 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2535 struct kvm_interrupt *irq)
2537 if (irq->irq < 0 || irq->irq >= 256)
2539 if (irqchip_in_kernel(vcpu->kvm))
2542 kvm_queue_interrupt(vcpu, irq->irq, false);
2543 kvm_make_request(KVM_REQ_EVENT, vcpu);
2548 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2550 kvm_inject_nmi(vcpu);
2555 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2556 struct kvm_tpr_access_ctl *tac)
2560 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2564 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2568 unsigned bank_num = mcg_cap & 0xff, bank;
2571 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2573 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2576 vcpu->arch.mcg_cap = mcg_cap;
2577 /* Init IA32_MCG_CTL to all 1s */
2578 if (mcg_cap & MCG_CTL_P)
2579 vcpu->arch.mcg_ctl = ~(u64)0;
2580 /* Init IA32_MCi_CTL to all 1s */
2581 for (bank = 0; bank < bank_num; bank++)
2582 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2587 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2588 struct kvm_x86_mce *mce)
2590 u64 mcg_cap = vcpu->arch.mcg_cap;
2591 unsigned bank_num = mcg_cap & 0xff;
2592 u64 *banks = vcpu->arch.mce_banks;
2594 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2597 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2598 * reporting is disabled
2600 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2601 vcpu->arch.mcg_ctl != ~(u64)0)
2603 banks += 4 * mce->bank;
2605 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2606 * reporting is disabled for the bank
2608 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2610 if (mce->status & MCI_STATUS_UC) {
2611 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2612 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2613 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2616 if (banks[1] & MCI_STATUS_VAL)
2617 mce->status |= MCI_STATUS_OVER;
2618 banks[2] = mce->addr;
2619 banks[3] = mce->misc;
2620 vcpu->arch.mcg_status = mce->mcg_status;
2621 banks[1] = mce->status;
2622 kvm_queue_exception(vcpu, MC_VECTOR);
2623 } else if (!(banks[1] & MCI_STATUS_VAL)
2624 || !(banks[1] & MCI_STATUS_UC)) {
2625 if (banks[1] & MCI_STATUS_VAL)
2626 mce->status |= MCI_STATUS_OVER;
2627 banks[2] = mce->addr;
2628 banks[3] = mce->misc;
2629 banks[1] = mce->status;
2631 banks[1] |= MCI_STATUS_OVER;
2635 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2636 struct kvm_vcpu_events *events)
2638 events->exception.injected =
2639 vcpu->arch.exception.pending &&
2640 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2641 events->exception.nr = vcpu->arch.exception.nr;
2642 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2643 events->exception.pad = 0;
2644 events->exception.error_code = vcpu->arch.exception.error_code;
2646 events->interrupt.injected =
2647 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2648 events->interrupt.nr = vcpu->arch.interrupt.nr;
2649 events->interrupt.soft = 0;
2650 events->interrupt.shadow =
2651 kvm_x86_ops->get_interrupt_shadow(vcpu,
2652 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2654 events->nmi.injected = vcpu->arch.nmi_injected;
2655 events->nmi.pending = vcpu->arch.nmi_pending;
2656 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2657 events->nmi.pad = 0;
2659 events->sipi_vector = vcpu->arch.sipi_vector;
2661 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2662 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2663 | KVM_VCPUEVENT_VALID_SHADOW);
2664 memset(&events->reserved, 0, sizeof(events->reserved));
2667 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2668 struct kvm_vcpu_events *events)
2670 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2671 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2672 | KVM_VCPUEVENT_VALID_SHADOW))
2675 vcpu->arch.exception.pending = events->exception.injected;
2676 vcpu->arch.exception.nr = events->exception.nr;
2677 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2678 vcpu->arch.exception.error_code = events->exception.error_code;
2680 vcpu->arch.interrupt.pending = events->interrupt.injected;
2681 vcpu->arch.interrupt.nr = events->interrupt.nr;
2682 vcpu->arch.interrupt.soft = events->interrupt.soft;
2683 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2684 kvm_x86_ops->set_interrupt_shadow(vcpu,
2685 events->interrupt.shadow);
2687 vcpu->arch.nmi_injected = events->nmi.injected;
2688 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2689 vcpu->arch.nmi_pending = events->nmi.pending;
2690 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2692 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2693 vcpu->arch.sipi_vector = events->sipi_vector;
2695 kvm_make_request(KVM_REQ_EVENT, vcpu);
2700 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2701 struct kvm_debugregs *dbgregs)
2703 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2704 dbgregs->dr6 = vcpu->arch.dr6;
2705 dbgregs->dr7 = vcpu->arch.dr7;
2707 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2710 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2711 struct kvm_debugregs *dbgregs)
2716 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2717 vcpu->arch.dr6 = dbgregs->dr6;
2718 vcpu->arch.dr7 = dbgregs->dr7;
2723 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2724 struct kvm_xsave *guest_xsave)
2727 memcpy(guest_xsave->region,
2728 &vcpu->arch.guest_fpu.state->xsave,
2731 memcpy(guest_xsave->region,
2732 &vcpu->arch.guest_fpu.state->fxsave,
2733 sizeof(struct i387_fxsave_struct));
2734 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2739 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2740 struct kvm_xsave *guest_xsave)
2743 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2746 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2747 guest_xsave->region, xstate_size);
2749 if (xstate_bv & ~XSTATE_FPSSE)
2751 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2752 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2757 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2758 struct kvm_xcrs *guest_xcrs)
2760 if (!cpu_has_xsave) {
2761 guest_xcrs->nr_xcrs = 0;
2765 guest_xcrs->nr_xcrs = 1;
2766 guest_xcrs->flags = 0;
2767 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2768 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2771 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2772 struct kvm_xcrs *guest_xcrs)
2779 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2782 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2783 /* Only support XCR0 currently */
2784 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2785 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2786 guest_xcrs->xcrs[0].value);
2794 long kvm_arch_vcpu_ioctl(struct file *filp,
2795 unsigned int ioctl, unsigned long arg)
2797 struct kvm_vcpu *vcpu = filp->private_data;
2798 void __user *argp = (void __user *)arg;
2801 struct kvm_lapic_state *lapic;
2802 struct kvm_xsave *xsave;
2803 struct kvm_xcrs *xcrs;
2809 case KVM_GET_LAPIC: {
2811 if (!vcpu->arch.apic)
2813 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2818 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2822 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2827 case KVM_SET_LAPIC: {
2829 if (!vcpu->arch.apic)
2831 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2836 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2838 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2844 case KVM_INTERRUPT: {
2845 struct kvm_interrupt irq;
2848 if (copy_from_user(&irq, argp, sizeof irq))
2850 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2857 r = kvm_vcpu_ioctl_nmi(vcpu);
2863 case KVM_SET_CPUID: {
2864 struct kvm_cpuid __user *cpuid_arg = argp;
2865 struct kvm_cpuid cpuid;
2868 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2870 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2875 case KVM_SET_CPUID2: {
2876 struct kvm_cpuid2 __user *cpuid_arg = argp;
2877 struct kvm_cpuid2 cpuid;
2880 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2882 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2883 cpuid_arg->entries);
2888 case KVM_GET_CPUID2: {
2889 struct kvm_cpuid2 __user *cpuid_arg = argp;
2890 struct kvm_cpuid2 cpuid;
2893 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2895 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2896 cpuid_arg->entries);
2900 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2906 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2909 r = msr_io(vcpu, argp, do_set_msr, 0);
2911 case KVM_TPR_ACCESS_REPORTING: {
2912 struct kvm_tpr_access_ctl tac;
2915 if (copy_from_user(&tac, argp, sizeof tac))
2917 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2921 if (copy_to_user(argp, &tac, sizeof tac))
2926 case KVM_SET_VAPIC_ADDR: {
2927 struct kvm_vapic_addr va;
2930 if (!irqchip_in_kernel(vcpu->kvm))
2933 if (copy_from_user(&va, argp, sizeof va))
2936 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2939 case KVM_X86_SETUP_MCE: {
2943 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2945 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2948 case KVM_X86_SET_MCE: {
2949 struct kvm_x86_mce mce;
2952 if (copy_from_user(&mce, argp, sizeof mce))
2954 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2957 case KVM_GET_VCPU_EVENTS: {
2958 struct kvm_vcpu_events events;
2960 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2963 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2968 case KVM_SET_VCPU_EVENTS: {
2969 struct kvm_vcpu_events events;
2972 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2975 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2978 case KVM_GET_DEBUGREGS: {
2979 struct kvm_debugregs dbgregs;
2981 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2984 if (copy_to_user(argp, &dbgregs,
2985 sizeof(struct kvm_debugregs)))
2990 case KVM_SET_DEBUGREGS: {
2991 struct kvm_debugregs dbgregs;
2994 if (copy_from_user(&dbgregs, argp,
2995 sizeof(struct kvm_debugregs)))
2998 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3001 case KVM_GET_XSAVE: {
3002 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3007 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3010 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3015 case KVM_SET_XSAVE: {
3016 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3022 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3025 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3028 case KVM_GET_XCRS: {
3029 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3034 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3037 if (copy_to_user(argp, u.xcrs,
3038 sizeof(struct kvm_xcrs)))
3043 case KVM_SET_XCRS: {
3044 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3050 if (copy_from_user(u.xcrs, argp,
3051 sizeof(struct kvm_xcrs)))
3054 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3057 case KVM_SET_TSC_KHZ: {
3061 if (!kvm_has_tsc_control)
3064 user_tsc_khz = (u32)arg;
3066 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3069 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3074 case KVM_GET_TSC_KHZ: {
3076 if (check_tsc_unstable())
3079 r = vcpu_tsc_khz(vcpu);
3091 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3095 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3097 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3101 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3104 kvm->arch.ept_identity_map_addr = ident_addr;
3108 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3109 u32 kvm_nr_mmu_pages)
3111 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3114 mutex_lock(&kvm->slots_lock);
3115 spin_lock(&kvm->mmu_lock);
3117 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3118 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3120 spin_unlock(&kvm->mmu_lock);
3121 mutex_unlock(&kvm->slots_lock);
3125 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3127 return kvm->arch.n_max_mmu_pages;
3130 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3135 switch (chip->chip_id) {
3136 case KVM_IRQCHIP_PIC_MASTER:
3137 memcpy(&chip->chip.pic,
3138 &pic_irqchip(kvm)->pics[0],
3139 sizeof(struct kvm_pic_state));
3141 case KVM_IRQCHIP_PIC_SLAVE:
3142 memcpy(&chip->chip.pic,
3143 &pic_irqchip(kvm)->pics[1],
3144 sizeof(struct kvm_pic_state));
3146 case KVM_IRQCHIP_IOAPIC:
3147 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3156 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3161 switch (chip->chip_id) {
3162 case KVM_IRQCHIP_PIC_MASTER:
3163 spin_lock(&pic_irqchip(kvm)->lock);
3164 memcpy(&pic_irqchip(kvm)->pics[0],
3166 sizeof(struct kvm_pic_state));
3167 spin_unlock(&pic_irqchip(kvm)->lock);
3169 case KVM_IRQCHIP_PIC_SLAVE:
3170 spin_lock(&pic_irqchip(kvm)->lock);
3171 memcpy(&pic_irqchip(kvm)->pics[1],
3173 sizeof(struct kvm_pic_state));
3174 spin_unlock(&pic_irqchip(kvm)->lock);
3176 case KVM_IRQCHIP_IOAPIC:
3177 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3183 kvm_pic_update_irq(pic_irqchip(kvm));
3187 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3191 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3192 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3193 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3197 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3201 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3202 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3203 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3204 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3208 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3212 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3213 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3214 sizeof(ps->channels));
3215 ps->flags = kvm->arch.vpit->pit_state.flags;
3216 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3217 memset(&ps->reserved, 0, sizeof(ps->reserved));
3221 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3223 int r = 0, start = 0;
3224 u32 prev_legacy, cur_legacy;
3225 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3226 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3227 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3228 if (!prev_legacy && cur_legacy)
3230 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3231 sizeof(kvm->arch.vpit->pit_state.channels));
3232 kvm->arch.vpit->pit_state.flags = ps->flags;
3233 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3234 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3238 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3239 struct kvm_reinject_control *control)
3241 if (!kvm->arch.vpit)
3243 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3244 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3245 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3250 * Get (and clear) the dirty memory log for a memory slot.
3252 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3253 struct kvm_dirty_log *log)
3256 struct kvm_memory_slot *memslot;
3258 unsigned long is_dirty = 0;
3260 mutex_lock(&kvm->slots_lock);
3263 if (log->slot >= KVM_MEMORY_SLOTS)
3266 memslot = &kvm->memslots->memslots[log->slot];
3268 if (!memslot->dirty_bitmap)
3271 n = kvm_dirty_bitmap_bytes(memslot);
3273 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3274 is_dirty = memslot->dirty_bitmap[i];
3276 /* If nothing is dirty, don't bother messing with page tables. */
3278 struct kvm_memslots *slots, *old_slots;
3279 unsigned long *dirty_bitmap;
3281 dirty_bitmap = memslot->dirty_bitmap_head;
3282 if (memslot->dirty_bitmap == dirty_bitmap)
3283 dirty_bitmap += n / sizeof(long);
3284 memset(dirty_bitmap, 0, n);
3287 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3290 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3291 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3292 slots->generation++;
3294 old_slots = kvm->memslots;
3295 rcu_assign_pointer(kvm->memslots, slots);
3296 synchronize_srcu_expedited(&kvm->srcu);
3297 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3300 spin_lock(&kvm->mmu_lock);
3301 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3302 spin_unlock(&kvm->mmu_lock);
3305 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3309 if (clear_user(log->dirty_bitmap, n))
3315 mutex_unlock(&kvm->slots_lock);
3319 long kvm_arch_vm_ioctl(struct file *filp,
3320 unsigned int ioctl, unsigned long arg)
3322 struct kvm *kvm = filp->private_data;
3323 void __user *argp = (void __user *)arg;
3326 * This union makes it completely explicit to gcc-3.x
3327 * that these two variables' stack usage should be
3328 * combined, not added together.
3331 struct kvm_pit_state ps;
3332 struct kvm_pit_state2 ps2;
3333 struct kvm_pit_config pit_config;
3337 case KVM_SET_TSS_ADDR:
3338 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3342 case KVM_SET_IDENTITY_MAP_ADDR: {
3346 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3348 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3353 case KVM_SET_NR_MMU_PAGES:
3354 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3358 case KVM_GET_NR_MMU_PAGES:
3359 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3361 case KVM_CREATE_IRQCHIP: {
3362 struct kvm_pic *vpic;
3364 mutex_lock(&kvm->lock);
3367 goto create_irqchip_unlock;
3369 vpic = kvm_create_pic(kvm);
3371 r = kvm_ioapic_init(kvm);
3373 mutex_lock(&kvm->slots_lock);
3374 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3376 mutex_unlock(&kvm->slots_lock);
3378 goto create_irqchip_unlock;
3381 goto create_irqchip_unlock;
3383 kvm->arch.vpic = vpic;
3385 r = kvm_setup_default_irq_routing(kvm);
3387 mutex_lock(&kvm->slots_lock);
3388 mutex_lock(&kvm->irq_lock);
3389 kvm_ioapic_destroy(kvm);
3390 kvm_destroy_pic(kvm);
3391 mutex_unlock(&kvm->irq_lock);
3392 mutex_unlock(&kvm->slots_lock);
3394 create_irqchip_unlock:
3395 mutex_unlock(&kvm->lock);
3398 case KVM_CREATE_PIT:
3399 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3401 case KVM_CREATE_PIT2:
3403 if (copy_from_user(&u.pit_config, argp,
3404 sizeof(struct kvm_pit_config)))
3407 mutex_lock(&kvm->slots_lock);
3410 goto create_pit_unlock;
3412 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3416 mutex_unlock(&kvm->slots_lock);
3418 case KVM_IRQ_LINE_STATUS:
3419 case KVM_IRQ_LINE: {
3420 struct kvm_irq_level irq_event;
3423 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3426 if (irqchip_in_kernel(kvm)) {
3428 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3429 irq_event.irq, irq_event.level);
3430 if (ioctl == KVM_IRQ_LINE_STATUS) {
3432 irq_event.status = status;
3433 if (copy_to_user(argp, &irq_event,
3441 case KVM_GET_IRQCHIP: {
3442 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3443 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3449 if (copy_from_user(chip, argp, sizeof *chip))
3450 goto get_irqchip_out;
3452 if (!irqchip_in_kernel(kvm))
3453 goto get_irqchip_out;
3454 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3456 goto get_irqchip_out;
3458 if (copy_to_user(argp, chip, sizeof *chip))
3459 goto get_irqchip_out;
3467 case KVM_SET_IRQCHIP: {
3468 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3469 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3475 if (copy_from_user(chip, argp, sizeof *chip))
3476 goto set_irqchip_out;
3478 if (!irqchip_in_kernel(kvm))
3479 goto set_irqchip_out;
3480 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3482 goto set_irqchip_out;
3492 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3495 if (!kvm->arch.vpit)
3497 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3501 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3508 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3511 if (!kvm->arch.vpit)
3513 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3519 case KVM_GET_PIT2: {
3521 if (!kvm->arch.vpit)
3523 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3527 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3532 case KVM_SET_PIT2: {
3534 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3537 if (!kvm->arch.vpit)
3539 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3545 case KVM_REINJECT_CONTROL: {
3546 struct kvm_reinject_control control;
3548 if (copy_from_user(&control, argp, sizeof(control)))
3550 r = kvm_vm_ioctl_reinject(kvm, &control);
3556 case KVM_XEN_HVM_CONFIG: {
3558 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3559 sizeof(struct kvm_xen_hvm_config)))
3562 if (kvm->arch.xen_hvm_config.flags)
3567 case KVM_SET_CLOCK: {
3568 struct kvm_clock_data user_ns;
3573 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3581 local_irq_disable();
3582 now_ns = get_kernel_ns();
3583 delta = user_ns.clock - now_ns;
3585 kvm->arch.kvmclock_offset = delta;
3588 case KVM_GET_CLOCK: {
3589 struct kvm_clock_data user_ns;
3592 local_irq_disable();
3593 now_ns = get_kernel_ns();
3594 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3597 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3600 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3613 static void kvm_init_msr_list(void)
3618 /* skip the first msrs in the list. KVM-specific */
3619 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3620 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3623 msrs_to_save[j] = msrs_to_save[i];
3626 num_msrs_to_save = j;
3629 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3637 if (!(vcpu->arch.apic &&
3638 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3639 && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3650 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3657 if (!(vcpu->arch.apic &&
3658 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3659 && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3661 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3671 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3672 struct kvm_segment *var, int seg)
3674 kvm_x86_ops->set_segment(vcpu, var, seg);
3677 void kvm_get_segment(struct kvm_vcpu *vcpu,
3678 struct kvm_segment *var, int seg)
3680 kvm_x86_ops->get_segment(vcpu, var, seg);
3683 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3688 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3691 struct x86_exception exception;
3693 BUG_ON(!mmu_is_nested(vcpu));
3695 /* NPT walks are always user-walks */
3696 access |= PFERR_USER_MASK;
3697 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3702 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3703 struct x86_exception *exception)
3705 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3706 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3709 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3710 struct x86_exception *exception)
3712 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3713 access |= PFERR_FETCH_MASK;
3714 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3717 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3718 struct x86_exception *exception)
3720 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3721 access |= PFERR_WRITE_MASK;
3722 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3725 /* uses this to access any guest's mapped memory without checking CPL */
3726 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3727 struct x86_exception *exception)
3729 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3732 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3733 struct kvm_vcpu *vcpu, u32 access,
3734 struct x86_exception *exception)
3737 int r = X86EMUL_CONTINUE;
3740 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3742 unsigned offset = addr & (PAGE_SIZE-1);
3743 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3746 if (gpa == UNMAPPED_GVA)
3747 return X86EMUL_PROPAGATE_FAULT;
3748 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3750 r = X86EMUL_IO_NEEDED;
3762 /* used for instruction fetching */
3763 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3764 struct kvm_vcpu *vcpu,
3765 struct x86_exception *exception)
3767 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3768 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3769 access | PFERR_FETCH_MASK,
3773 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3774 struct kvm_vcpu *vcpu,
3775 struct x86_exception *exception)
3777 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3778 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3782 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3783 struct kvm_vcpu *vcpu,
3784 struct x86_exception *exception)
3786 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3789 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3791 struct kvm_vcpu *vcpu,
3792 struct x86_exception *exception)
3795 int r = X86EMUL_CONTINUE;
3798 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3801 unsigned offset = addr & (PAGE_SIZE-1);
3802 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3805 if (gpa == UNMAPPED_GVA)
3806 return X86EMUL_PROPAGATE_FAULT;
3807 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3809 r = X86EMUL_IO_NEEDED;
3821 static int emulator_read_emulated(unsigned long addr,
3824 struct x86_exception *exception,
3825 struct kvm_vcpu *vcpu)
3830 if (vcpu->mmio_read_completed) {
3831 memcpy(val, vcpu->mmio_data, bytes);
3832 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3833 vcpu->mmio_phys_addr, *(u64 *)val);
3834 vcpu->mmio_read_completed = 0;
3835 return X86EMUL_CONTINUE;
3838 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3840 if (gpa == UNMAPPED_GVA)
3841 return X86EMUL_PROPAGATE_FAULT;
3843 /* For APIC access vmexit */
3844 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3847 if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3848 == X86EMUL_CONTINUE)
3849 return X86EMUL_CONTINUE;
3853 * Is this MMIO handled locally?
3855 handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
3857 if (handled == bytes)
3858 return X86EMUL_CONTINUE;
3864 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3866 vcpu->mmio_needed = 1;
3867 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3868 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3869 vcpu->mmio_size = bytes;
3870 vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3871 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3872 vcpu->mmio_index = 0;
3874 return X86EMUL_IO_NEEDED;
3877 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3878 const void *val, int bytes)
3882 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3885 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3889 static int emulator_write_emulated_onepage(unsigned long addr,
3892 struct x86_exception *exception,
3893 struct kvm_vcpu *vcpu)
3898 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3900 if (gpa == UNMAPPED_GVA)
3901 return X86EMUL_PROPAGATE_FAULT;
3903 /* For APIC access vmexit */
3904 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3907 if (emulator_write_phys(vcpu, gpa, val, bytes))
3908 return X86EMUL_CONTINUE;
3911 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3913 * Is this MMIO handled locally?
3915 handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
3916 if (handled == bytes)
3917 return X86EMUL_CONTINUE;
3923 vcpu->mmio_needed = 1;
3924 memcpy(vcpu->mmio_data, val, bytes);
3925 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3926 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3927 vcpu->mmio_size = bytes;
3928 vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3929 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3930 memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3931 vcpu->mmio_index = 0;
3933 return X86EMUL_CONTINUE;
3936 int emulator_write_emulated(unsigned long addr,
3939 struct x86_exception *exception,
3940 struct kvm_vcpu *vcpu)
3942 /* Crossing a page boundary? */
3943 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3946 now = -addr & ~PAGE_MASK;
3947 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3949 if (rc != X86EMUL_CONTINUE)
3955 return emulator_write_emulated_onepage(addr, val, bytes, exception,
3959 #define CMPXCHG_TYPE(t, ptr, old, new) \
3960 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3962 #ifdef CONFIG_X86_64
3963 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3965 # define CMPXCHG64(ptr, old, new) \
3966 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3969 static int emulator_cmpxchg_emulated(unsigned long addr,
3973 struct x86_exception *exception,
3974 struct kvm_vcpu *vcpu)
3981 /* guests cmpxchg8b have to be emulated atomically */
3982 if (bytes > 8 || (bytes & (bytes - 1)))
3985 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3987 if (gpa == UNMAPPED_GVA ||
3988 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3991 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3994 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3995 if (is_error_page(page)) {
3996 kvm_release_page_clean(page);
4000 kaddr = kmap_atomic(page, KM_USER0);
4001 kaddr += offset_in_page(gpa);
4004 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4007 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4010 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4013 exchanged = CMPXCHG64(kaddr, old, new);
4018 kunmap_atomic(kaddr, KM_USER0);
4019 kvm_release_page_dirty(page);
4022 return X86EMUL_CMPXCHG_FAILED;
4024 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4026 return X86EMUL_CONTINUE;
4029 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4031 return emulator_write_emulated(addr, new, bytes, exception, vcpu);
4034 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4036 /* TODO: String I/O for in kernel device */
4039 if (vcpu->arch.pio.in)
4040 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4041 vcpu->arch.pio.size, pd);
4043 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4044 vcpu->arch.pio.port, vcpu->arch.pio.size,
4050 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
4051 unsigned int count, struct kvm_vcpu *vcpu)
4053 if (vcpu->arch.pio.count)
4056 trace_kvm_pio(0, port, size, count);
4058 vcpu->arch.pio.port = port;
4059 vcpu->arch.pio.in = 1;
4060 vcpu->arch.pio.count = count;
4061 vcpu->arch.pio.size = size;
4063 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4065 memcpy(val, vcpu->arch.pio_data, size * count);
4066 vcpu->arch.pio.count = 0;
4070 vcpu->run->exit_reason = KVM_EXIT_IO;
4071 vcpu->run->io.direction = KVM_EXIT_IO_IN;
4072 vcpu->run->io.size = size;
4073 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4074 vcpu->run->io.count = count;
4075 vcpu->run->io.port = port;
4080 static int emulator_pio_out_emulated(int size, unsigned short port,
4081 const void *val, unsigned int count,
4082 struct kvm_vcpu *vcpu)
4084 trace_kvm_pio(1, port, size, count);
4086 vcpu->arch.pio.port = port;
4087 vcpu->arch.pio.in = 0;
4088 vcpu->arch.pio.count = count;
4089 vcpu->arch.pio.size = size;
4091 memcpy(vcpu->arch.pio_data, val, size * count);
4093 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4094 vcpu->arch.pio.count = 0;
4098 vcpu->run->exit_reason = KVM_EXIT_IO;
4099 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4100 vcpu->run->io.size = size;
4101 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4102 vcpu->run->io.count = count;
4103 vcpu->run->io.port = port;
4108 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4110 return kvm_x86_ops->get_segment_base(vcpu, seg);
4113 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4115 kvm_mmu_invlpg(vcpu, address);
4116 return X86EMUL_CONTINUE;
4119 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4121 if (!need_emulate_wbinvd(vcpu))
4122 return X86EMUL_CONTINUE;
4124 if (kvm_x86_ops->has_wbinvd_exit()) {
4125 int cpu = get_cpu();
4127 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4128 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4129 wbinvd_ipi, NULL, 1);
4131 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4134 return X86EMUL_CONTINUE;
4136 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4138 int emulate_clts(struct kvm_vcpu *vcpu)
4140 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4141 kvm_x86_ops->fpu_activate(vcpu);
4142 return X86EMUL_CONTINUE;
4145 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4147 return _kvm_get_dr(vcpu, dr, dest);
4150 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4153 return __kvm_set_dr(vcpu, dr, value);
4156 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4158 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4161 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4163 unsigned long value;
4167 value = kvm_read_cr0(vcpu);
4170 value = vcpu->arch.cr2;
4173 value = kvm_read_cr3(vcpu);
4176 value = kvm_read_cr4(vcpu);
4179 value = kvm_get_cr8(vcpu);
4182 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4189 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4195 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4198 vcpu->arch.cr2 = val;
4201 res = kvm_set_cr3(vcpu, val);
4204 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4207 res = kvm_set_cr8(vcpu, val);
4210 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4217 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4219 return kvm_x86_ops->get_cpl(vcpu);
4222 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4224 kvm_x86_ops->get_gdt(vcpu, dt);
4227 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4229 kvm_x86_ops->get_idt(vcpu, dt);
4232 static unsigned long emulator_get_cached_segment_base(int seg,
4233 struct kvm_vcpu *vcpu)
4235 return get_segment_base(vcpu, seg);
4238 static bool emulator_get_cached_descriptor(struct desc_struct *desc, u32 *base3,
4239 int seg, struct kvm_vcpu *vcpu)
4241 struct kvm_segment var;
4243 kvm_get_segment(vcpu, &var, seg);
4250 set_desc_limit(desc, var.limit);
4251 set_desc_base(desc, (unsigned long)var.base);
4252 #ifdef CONFIG_X86_64
4254 *base3 = var.base >> 32;
4256 desc->type = var.type;
4258 desc->dpl = var.dpl;
4259 desc->p = var.present;
4260 desc->avl = var.avl;
4268 static void emulator_set_cached_descriptor(struct desc_struct *desc, u32 base3,
4269 int seg, struct kvm_vcpu *vcpu)
4271 struct kvm_segment var;
4273 /* needed to preserve selector */
4274 kvm_get_segment(vcpu, &var, seg);
4276 var.base = get_desc_base(desc);
4277 #ifdef CONFIG_X86_64
4278 var.base |= ((u64)base3) << 32;
4280 var.limit = get_desc_limit(desc);
4282 var.limit = (var.limit << 12) | 0xfff;
4283 var.type = desc->type;
4284 var.present = desc->p;
4285 var.dpl = desc->dpl;
4290 var.avl = desc->avl;
4291 var.present = desc->p;
4292 var.unusable = !var.present;
4295 kvm_set_segment(vcpu, &var, seg);
4299 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4301 struct kvm_segment kvm_seg;
4303 kvm_get_segment(vcpu, &kvm_seg, seg);
4304 return kvm_seg.selector;
4307 static void emulator_set_segment_selector(u16 sel, int seg,
4308 struct kvm_vcpu *vcpu)
4310 struct kvm_segment kvm_seg;
4312 kvm_get_segment(vcpu, &kvm_seg, seg);
4313 kvm_seg.selector = sel;
4314 kvm_set_segment(vcpu, &kvm_seg, seg);
4317 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4320 kvm_load_guest_fpu(ctxt->vcpu);
4322 * CR0.TS may reference the host fpu state, not the guest fpu state,
4323 * so it may be clear at this point.
4328 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4333 static int emulator_intercept(struct kvm_vcpu *vcpu,
4334 struct x86_instruction_info *info,
4335 enum x86_intercept_stage stage)
4337 return kvm_x86_ops->check_intercept(vcpu, info, stage);
4340 static struct x86_emulate_ops emulate_ops = {
4341 .read_std = kvm_read_guest_virt_system,
4342 .write_std = kvm_write_guest_virt_system,
4343 .fetch = kvm_fetch_guest_virt,
4344 .read_emulated = emulator_read_emulated,
4345 .write_emulated = emulator_write_emulated,
4346 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4347 .pio_in_emulated = emulator_pio_in_emulated,
4348 .pio_out_emulated = emulator_pio_out_emulated,
4349 .get_cached_descriptor = emulator_get_cached_descriptor,
4350 .set_cached_descriptor = emulator_set_cached_descriptor,
4351 .get_segment_selector = emulator_get_segment_selector,
4352 .set_segment_selector = emulator_set_segment_selector,
4353 .get_cached_segment_base = emulator_get_cached_segment_base,
4354 .get_gdt = emulator_get_gdt,
4355 .get_idt = emulator_get_idt,
4356 .get_cr = emulator_get_cr,
4357 .set_cr = emulator_set_cr,
4358 .cpl = emulator_get_cpl,
4359 .get_dr = emulator_get_dr,
4360 .set_dr = emulator_set_dr,
4361 .set_msr = kvm_set_msr,
4362 .get_msr = kvm_get_msr,
4363 .get_fpu = emulator_get_fpu,
4364 .put_fpu = emulator_put_fpu,
4365 .intercept = emulator_intercept,
4368 static void cache_all_regs(struct kvm_vcpu *vcpu)
4370 kvm_register_read(vcpu, VCPU_REGS_RAX);
4371 kvm_register_read(vcpu, VCPU_REGS_RSP);
4372 kvm_register_read(vcpu, VCPU_REGS_RIP);
4373 vcpu->arch.regs_dirty = ~0;
4376 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4378 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4380 * an sti; sti; sequence only disable interrupts for the first
4381 * instruction. So, if the last instruction, be it emulated or
4382 * not, left the system with the INT_STI flag enabled, it
4383 * means that the last instruction is an sti. We should not
4384 * leave the flag on in this case. The same goes for mov ss
4386 if (!(int_shadow & mask))
4387 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4390 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4392 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4393 if (ctxt->exception.vector == PF_VECTOR)
4394 kvm_propagate_fault(vcpu, &ctxt->exception);
4395 else if (ctxt->exception.error_code_valid)
4396 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4397 ctxt->exception.error_code);
4399 kvm_queue_exception(vcpu, ctxt->exception.vector);
4402 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4404 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4407 cache_all_regs(vcpu);
4409 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4411 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4412 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
4413 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4414 vcpu->arch.emulate_ctxt.mode =
4415 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4416 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4417 ? X86EMUL_MODE_VM86 : cs_l
4418 ? X86EMUL_MODE_PROT64 : cs_db
4419 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4420 vcpu->arch.emulate_ctxt.guest_mode = is_guest_mode(vcpu);
4421 memset(c, 0, sizeof(struct decode_cache));
4422 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4423 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4426 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4428 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4431 init_emulate_ctxt(vcpu);
4433 vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4434 vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4435 vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip +
4437 ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4439 if (ret != X86EMUL_CONTINUE)
4440 return EMULATE_FAIL;
4442 vcpu->arch.emulate_ctxt.eip = c->eip;
4443 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4444 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4445 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4447 if (irq == NMI_VECTOR)
4448 vcpu->arch.nmi_pending = false;
4450 vcpu->arch.interrupt.pending = false;
4452 return EMULATE_DONE;
4454 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4456 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4458 int r = EMULATE_DONE;
4460 ++vcpu->stat.insn_emulation_fail;
4461 trace_kvm_emulate_insn_failed(vcpu);
4462 if (!is_guest_mode(vcpu)) {
4463 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4464 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4465 vcpu->run->internal.ndata = 0;
4468 kvm_queue_exception(vcpu, UD_VECTOR);
4473 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4481 * if emulation was due to access to shadowed page table
4482 * and it failed try to unshadow page and re-entetr the
4483 * guest to let CPU execute the instruction.
4485 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4488 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4490 if (gpa == UNMAPPED_GVA)
4491 return true; /* let cpu generate fault */
4493 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4499 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4506 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4507 bool writeback = true;
4509 kvm_clear_exception_queue(vcpu);
4510 vcpu->arch.mmio_fault_cr2 = cr2;
4512 * TODO: fix emulate.c to use guest_read/write_register
4513 * instead of direct ->regs accesses, can save hundred cycles
4514 * on Intel for instructions that don't read/change RSP, for
4517 cache_all_regs(vcpu);
4519 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4520 init_emulate_ctxt(vcpu);
4521 vcpu->arch.emulate_ctxt.interruptibility = 0;
4522 vcpu->arch.emulate_ctxt.have_exception = false;
4523 vcpu->arch.emulate_ctxt.perm_ok = false;
4525 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4526 = emulation_type & EMULTYPE_TRAP_UD;
4528 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4530 trace_kvm_emulate_insn_start(vcpu);
4531 ++vcpu->stat.insn_emulation;
4533 if (emulation_type & EMULTYPE_TRAP_UD)
4534 return EMULATE_FAIL;
4535 if (reexecute_instruction(vcpu, cr2))
4536 return EMULATE_DONE;
4537 if (emulation_type & EMULTYPE_SKIP)
4538 return EMULATE_FAIL;
4539 return handle_emulation_failure(vcpu);
4543 if (emulation_type & EMULTYPE_SKIP) {
4544 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4545 return EMULATE_DONE;
4548 /* this is needed for vmware backdoor interface to work since it
4549 changes registers values during IO operation */
4550 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4551 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4552 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4556 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4558 if (r == EMULATION_INTERCEPTED)
4559 return EMULATE_DONE;
4561 if (r == EMULATION_FAILED) {
4562 if (reexecute_instruction(vcpu, cr2))
4563 return EMULATE_DONE;
4565 return handle_emulation_failure(vcpu);
4568 if (vcpu->arch.emulate_ctxt.have_exception) {
4569 inject_emulated_exception(vcpu);
4571 } else if (vcpu->arch.pio.count) {
4572 if (!vcpu->arch.pio.in)
4573 vcpu->arch.pio.count = 0;
4576 r = EMULATE_DO_MMIO;
4577 } else if (vcpu->mmio_needed) {
4578 if (!vcpu->mmio_is_write)
4580 r = EMULATE_DO_MMIO;
4581 } else if (r == EMULATION_RESTART)
4587 toggle_interruptibility(vcpu,
4588 vcpu->arch.emulate_ctxt.interruptibility);
4589 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4590 kvm_make_request(KVM_REQ_EVENT, vcpu);
4591 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4592 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4593 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4595 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4599 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4601 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4603 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4604 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4605 /* do not return to emulator after return from userspace */
4606 vcpu->arch.pio.count = 0;
4609 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4611 static void tsc_bad(void *info)
4613 __this_cpu_write(cpu_tsc_khz, 0);
4616 static void tsc_khz_changed(void *data)
4618 struct cpufreq_freqs *freq = data;
4619 unsigned long khz = 0;
4623 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4624 khz = cpufreq_quick_get(raw_smp_processor_id());
4627 __this_cpu_write(cpu_tsc_khz, khz);
4630 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4633 struct cpufreq_freqs *freq = data;
4635 struct kvm_vcpu *vcpu;
4636 int i, send_ipi = 0;
4639 * We allow guests to temporarily run on slowing clocks,
4640 * provided we notify them after, or to run on accelerating
4641 * clocks, provided we notify them before. Thus time never
4644 * However, we have a problem. We can't atomically update
4645 * the frequency of a given CPU from this function; it is
4646 * merely a notifier, which can be called from any CPU.
4647 * Changing the TSC frequency at arbitrary points in time
4648 * requires a recomputation of local variables related to
4649 * the TSC for each VCPU. We must flag these local variables
4650 * to be updated and be sure the update takes place with the
4651 * new frequency before any guests proceed.
4653 * Unfortunately, the combination of hotplug CPU and frequency
4654 * change creates an intractable locking scenario; the order
4655 * of when these callouts happen is undefined with respect to
4656 * CPU hotplug, and they can race with each other. As such,
4657 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4658 * undefined; you can actually have a CPU frequency change take
4659 * place in between the computation of X and the setting of the
4660 * variable. To protect against this problem, all updates of
4661 * the per_cpu tsc_khz variable are done in an interrupt
4662 * protected IPI, and all callers wishing to update the value
4663 * must wait for a synchronous IPI to complete (which is trivial
4664 * if the caller is on the CPU already). This establishes the
4665 * necessary total order on variable updates.
4667 * Note that because a guest time update may take place
4668 * anytime after the setting of the VCPU's request bit, the
4669 * correct TSC value must be set before the request. However,
4670 * to ensure the update actually makes it to any guest which
4671 * starts running in hardware virtualization between the set
4672 * and the acquisition of the spinlock, we must also ping the
4673 * CPU after setting the request bit.
4677 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4679 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4682 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4684 raw_spin_lock(&kvm_lock);
4685 list_for_each_entry(kvm, &vm_list, vm_list) {
4686 kvm_for_each_vcpu(i, vcpu, kvm) {
4687 if (vcpu->cpu != freq->cpu)
4689 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4690 if (vcpu->cpu != smp_processor_id())
4694 raw_spin_unlock(&kvm_lock);
4696 if (freq->old < freq->new && send_ipi) {
4698 * We upscale the frequency. Must make the guest
4699 * doesn't see old kvmclock values while running with
4700 * the new frequency, otherwise we risk the guest sees
4701 * time go backwards.
4703 * In case we update the frequency for another cpu
4704 * (which might be in guest context) send an interrupt
4705 * to kick the cpu out of guest context. Next time
4706 * guest context is entered kvmclock will be updated,
4707 * so the guest will not see stale values.
4709 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4714 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4715 .notifier_call = kvmclock_cpufreq_notifier
4718 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4719 unsigned long action, void *hcpu)
4721 unsigned int cpu = (unsigned long)hcpu;
4725 case CPU_DOWN_FAILED:
4726 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4728 case CPU_DOWN_PREPARE:
4729 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4735 static struct notifier_block kvmclock_cpu_notifier_block = {
4736 .notifier_call = kvmclock_cpu_notifier,
4737 .priority = -INT_MAX
4740 static void kvm_timer_init(void)
4744 max_tsc_khz = tsc_khz;
4745 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4746 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4747 #ifdef CONFIG_CPU_FREQ
4748 struct cpufreq_policy policy;
4749 memset(&policy, 0, sizeof(policy));
4751 cpufreq_get_policy(&policy, cpu);
4752 if (policy.cpuinfo.max_freq)
4753 max_tsc_khz = policy.cpuinfo.max_freq;
4756 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4757 CPUFREQ_TRANSITION_NOTIFIER);
4759 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4760 for_each_online_cpu(cpu)
4761 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4764 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4766 static int kvm_is_in_guest(void)
4768 return percpu_read(current_vcpu) != NULL;
4771 static int kvm_is_user_mode(void)
4775 if (percpu_read(current_vcpu))
4776 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4778 return user_mode != 0;
4781 static unsigned long kvm_get_guest_ip(void)
4783 unsigned long ip = 0;
4785 if (percpu_read(current_vcpu))
4786 ip = kvm_rip_read(percpu_read(current_vcpu));
4791 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4792 .is_in_guest = kvm_is_in_guest,
4793 .is_user_mode = kvm_is_user_mode,
4794 .get_guest_ip = kvm_get_guest_ip,
4797 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4799 percpu_write(current_vcpu, vcpu);
4801 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4803 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4805 percpu_write(current_vcpu, NULL);
4807 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4809 int kvm_arch_init(void *opaque)
4812 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4815 printk(KERN_ERR "kvm: already loaded the other module\n");
4820 if (!ops->cpu_has_kvm_support()) {
4821 printk(KERN_ERR "kvm: no hardware support\n");
4825 if (ops->disabled_by_bios()) {
4826 printk(KERN_ERR "kvm: disabled by bios\n");
4831 r = kvm_mmu_module_init();
4835 kvm_init_msr_list();
4838 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4839 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4840 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4844 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4847 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4855 void kvm_arch_exit(void)
4857 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4859 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4860 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4861 CPUFREQ_TRANSITION_NOTIFIER);
4862 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4864 kvm_mmu_module_exit();
4867 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4869 ++vcpu->stat.halt_exits;
4870 if (irqchip_in_kernel(vcpu->kvm)) {
4871 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4874 vcpu->run->exit_reason = KVM_EXIT_HLT;
4878 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4880 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4883 if (is_long_mode(vcpu))
4886 return a0 | ((gpa_t)a1 << 32);
4889 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4891 u64 param, ingpa, outgpa, ret;
4892 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4893 bool fast, longmode;
4897 * hypercall generates UD from non zero cpl and real mode
4900 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4901 kvm_queue_exception(vcpu, UD_VECTOR);
4905 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4906 longmode = is_long_mode(vcpu) && cs_l == 1;
4909 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4910 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4911 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4912 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4913 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4914 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4916 #ifdef CONFIG_X86_64
4918 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4919 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4920 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4924 code = param & 0xffff;
4925 fast = (param >> 16) & 0x1;
4926 rep_cnt = (param >> 32) & 0xfff;
4927 rep_idx = (param >> 48) & 0xfff;
4929 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4932 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4933 kvm_vcpu_on_spin(vcpu);
4936 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4940 ret = res | (((u64)rep_done & 0xfff) << 32);
4942 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4944 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4945 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4951 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4953 unsigned long nr, a0, a1, a2, a3, ret;
4956 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4957 return kvm_hv_hypercall(vcpu);
4959 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4960 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4961 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4962 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4963 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4965 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4967 if (!is_long_mode(vcpu)) {
4975 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4981 case KVM_HC_VAPIC_POLL_IRQ:
4985 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4992 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4993 ++vcpu->stat.hypercalls;
4996 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4998 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
5000 char instruction[3];
5001 unsigned long rip = kvm_rip_read(vcpu);
5004 * Blow out the MMU to ensure that no other VCPU has an active mapping
5005 * to ensure that the updated hypercall appears atomically across all
5008 kvm_mmu_zap_all(vcpu->kvm);
5010 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5012 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
5015 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
5017 struct desc_ptr dt = { limit, base };
5019 kvm_x86_ops->set_gdt(vcpu, &dt);
5022 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
5024 struct desc_ptr dt = { limit, base };
5026 kvm_x86_ops->set_idt(vcpu, &dt);
5029 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5031 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5032 int j, nent = vcpu->arch.cpuid_nent;
5034 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5035 /* when no next entry is found, the current entry[i] is reselected */
5036 for (j = i + 1; ; j = (j + 1) % nent) {
5037 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5038 if (ej->function == e->function) {
5039 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5043 return 0; /* silence gcc, even though control never reaches here */
5046 /* find an entry with matching function, matching index (if needed), and that
5047 * should be read next (if it's stateful) */
5048 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5049 u32 function, u32 index)
5051 if (e->function != function)
5053 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5055 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5056 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5061 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5062 u32 function, u32 index)
5065 struct kvm_cpuid_entry2 *best = NULL;
5067 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5068 struct kvm_cpuid_entry2 *e;
5070 e = &vcpu->arch.cpuid_entries[i];
5071 if (is_matching_cpuid_entry(e, function, index)) {
5072 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5073 move_to_next_stateful_cpuid_entry(vcpu, i);
5080 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5082 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5084 struct kvm_cpuid_entry2 *best;
5086 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5087 if (!best || best->eax < 0x80000008)
5089 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5091 return best->eax & 0xff;
5097 * If no match is found, check whether we exceed the vCPU's limit
5098 * and return the content of the highest valid _standard_ leaf instead.
5099 * This is to satisfy the CPUID specification.
5101 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5102 u32 function, u32 index)
5104 struct kvm_cpuid_entry2 *maxlevel;
5106 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5107 if (!maxlevel || maxlevel->eax >= function)
5109 if (function & 0x80000000) {
5110 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5114 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5117 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5119 u32 function, index;
5120 struct kvm_cpuid_entry2 *best;
5122 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5123 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5124 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5125 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5126 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5127 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5128 best = kvm_find_cpuid_entry(vcpu, function, index);
5131 best = check_cpuid_limit(vcpu, function, index);
5134 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5135 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5136 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5137 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5139 kvm_x86_ops->skip_emulated_instruction(vcpu);
5140 trace_kvm_cpuid(function,
5141 kvm_register_read(vcpu, VCPU_REGS_RAX),
5142 kvm_register_read(vcpu, VCPU_REGS_RBX),
5143 kvm_register_read(vcpu, VCPU_REGS_RCX),
5144 kvm_register_read(vcpu, VCPU_REGS_RDX));
5146 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5149 * Check if userspace requested an interrupt window, and that the
5150 * interrupt window is open.
5152 * No need to exit to userspace if we already have an interrupt queued.
5154 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5156 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5157 vcpu->run->request_interrupt_window &&
5158 kvm_arch_interrupt_allowed(vcpu));
5161 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5163 struct kvm_run *kvm_run = vcpu->run;
5165 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5166 kvm_run->cr8 = kvm_get_cr8(vcpu);
5167 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5168 if (irqchip_in_kernel(vcpu->kvm))
5169 kvm_run->ready_for_interrupt_injection = 1;
5171 kvm_run->ready_for_interrupt_injection =
5172 kvm_arch_interrupt_allowed(vcpu) &&
5173 !kvm_cpu_has_interrupt(vcpu) &&
5174 !kvm_event_needs_reinjection(vcpu);
5177 static void vapic_enter(struct kvm_vcpu *vcpu)
5179 struct kvm_lapic *apic = vcpu->arch.apic;
5182 if (!apic || !apic->vapic_addr)
5185 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5187 vcpu->arch.apic->vapic_page = page;
5190 static void vapic_exit(struct kvm_vcpu *vcpu)
5192 struct kvm_lapic *apic = vcpu->arch.apic;
5195 if (!apic || !apic->vapic_addr)
5198 idx = srcu_read_lock(&vcpu->kvm->srcu);
5199 kvm_release_page_dirty(apic->vapic_page);
5200 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5201 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5204 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5208 if (!kvm_x86_ops->update_cr8_intercept)
5211 if (!vcpu->arch.apic)
5214 if (!vcpu->arch.apic->vapic_addr)
5215 max_irr = kvm_lapic_find_highest_irr(vcpu);
5222 tpr = kvm_lapic_get_cr8(vcpu);
5224 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5227 static void inject_pending_event(struct kvm_vcpu *vcpu)
5229 /* try to reinject previous events if any */
5230 if (vcpu->arch.exception.pending) {
5231 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5232 vcpu->arch.exception.has_error_code,
5233 vcpu->arch.exception.error_code);
5234 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5235 vcpu->arch.exception.has_error_code,
5236 vcpu->arch.exception.error_code,
5237 vcpu->arch.exception.reinject);
5241 if (vcpu->arch.nmi_injected) {
5242 kvm_x86_ops->set_nmi(vcpu);
5246 if (vcpu->arch.interrupt.pending) {
5247 kvm_x86_ops->set_irq(vcpu);
5251 /* try to inject new event if pending */
5252 if (vcpu->arch.nmi_pending) {
5253 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5254 vcpu->arch.nmi_pending = false;
5255 vcpu->arch.nmi_injected = true;
5256 kvm_x86_ops->set_nmi(vcpu);
5258 } else if (kvm_cpu_has_interrupt(vcpu)) {
5259 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5260 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5262 kvm_x86_ops->set_irq(vcpu);
5267 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5269 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5270 !vcpu->guest_xcr0_loaded) {
5271 /* kvm_set_xcr() also depends on this */
5272 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5273 vcpu->guest_xcr0_loaded = 1;
5277 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5279 if (vcpu->guest_xcr0_loaded) {
5280 if (vcpu->arch.xcr0 != host_xcr0)
5281 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5282 vcpu->guest_xcr0_loaded = 0;
5286 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5290 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5291 vcpu->run->request_interrupt_window;
5293 if (vcpu->requests) {
5294 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5295 kvm_mmu_unload(vcpu);
5296 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5297 __kvm_migrate_timers(vcpu);
5298 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5299 r = kvm_guest_time_update(vcpu);
5303 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5304 kvm_mmu_sync_roots(vcpu);
5305 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5306 kvm_x86_ops->tlb_flush(vcpu);
5307 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5308 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5312 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5313 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5317 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5318 vcpu->fpu_active = 0;
5319 kvm_x86_ops->fpu_deactivate(vcpu);
5321 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5322 /* Page is swapped out. Do synthetic halt */
5323 vcpu->arch.apf.halted = true;
5329 r = kvm_mmu_reload(vcpu);
5334 * An NMI can be injected between local nmi_pending read and
5335 * vcpu->arch.nmi_pending read inside inject_pending_event().
5336 * But in that case, KVM_REQ_EVENT will be set, which makes
5337 * the race described above benign.
5339 nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5341 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5342 inject_pending_event(vcpu);
5344 /* enable NMI/IRQ window open exits if needed */
5346 kvm_x86_ops->enable_nmi_window(vcpu);
5347 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5348 kvm_x86_ops->enable_irq_window(vcpu);
5350 if (kvm_lapic_enabled(vcpu)) {
5351 update_cr8_intercept(vcpu);
5352 kvm_lapic_sync_to_vapic(vcpu);
5358 kvm_x86_ops->prepare_guest_switch(vcpu);
5359 if (vcpu->fpu_active)
5360 kvm_load_guest_fpu(vcpu);
5361 kvm_load_guest_xcr0(vcpu);
5363 vcpu->mode = IN_GUEST_MODE;
5365 /* We should set ->mode before check ->requests,
5366 * see the comment in make_all_cpus_request.
5370 local_irq_disable();
5372 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5373 || need_resched() || signal_pending(current)) {
5374 vcpu->mode = OUTSIDE_GUEST_MODE;
5378 kvm_x86_ops->cancel_injection(vcpu);
5383 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5387 if (unlikely(vcpu->arch.switch_db_regs)) {
5389 set_debugreg(vcpu->arch.eff_db[0], 0);
5390 set_debugreg(vcpu->arch.eff_db[1], 1);
5391 set_debugreg(vcpu->arch.eff_db[2], 2);
5392 set_debugreg(vcpu->arch.eff_db[3], 3);
5395 trace_kvm_entry(vcpu->vcpu_id);
5396 kvm_x86_ops->run(vcpu);
5399 * If the guest has used debug registers, at least dr7
5400 * will be disabled while returning to the host.
5401 * If we don't have active breakpoints in the host, we don't
5402 * care about the messed up debug address registers. But if
5403 * we have some of them active, restore the old state.
5405 if (hw_breakpoint_active())
5406 hw_breakpoint_restore();
5408 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5410 vcpu->mode = OUTSIDE_GUEST_MODE;
5417 * We must have an instruction between local_irq_enable() and
5418 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5419 * the interrupt shadow. The stat.exits increment will do nicely.
5420 * But we need to prevent reordering, hence this barrier():
5428 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5431 * Profile KVM exit RIPs:
5433 if (unlikely(prof_on == KVM_PROFILING)) {
5434 unsigned long rip = kvm_rip_read(vcpu);
5435 profile_hit(KVM_PROFILING, (void *)rip);
5439 kvm_lapic_sync_from_vapic(vcpu);
5441 r = kvm_x86_ops->handle_exit(vcpu);
5447 static int __vcpu_run(struct kvm_vcpu *vcpu)
5450 struct kvm *kvm = vcpu->kvm;
5452 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5453 pr_debug("vcpu %d received sipi with vector # %x\n",
5454 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5455 kvm_lapic_reset(vcpu);
5456 r = kvm_arch_vcpu_reset(vcpu);
5459 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5462 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5467 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5468 !vcpu->arch.apf.halted)
5469 r = vcpu_enter_guest(vcpu);
5471 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5472 kvm_vcpu_block(vcpu);
5473 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5474 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5476 switch(vcpu->arch.mp_state) {
5477 case KVM_MP_STATE_HALTED:
5478 vcpu->arch.mp_state =
5479 KVM_MP_STATE_RUNNABLE;
5480 case KVM_MP_STATE_RUNNABLE:
5481 vcpu->arch.apf.halted = false;
5483 case KVM_MP_STATE_SIPI_RECEIVED:
5494 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5495 if (kvm_cpu_has_pending_timer(vcpu))
5496 kvm_inject_pending_timer_irqs(vcpu);
5498 if (dm_request_for_irq_injection(vcpu)) {
5500 vcpu->run->exit_reason = KVM_EXIT_INTR;
5501 ++vcpu->stat.request_irq_exits;
5504 kvm_check_async_pf_completion(vcpu);
5506 if (signal_pending(current)) {
5508 vcpu->run->exit_reason = KVM_EXIT_INTR;
5509 ++vcpu->stat.signal_exits;
5511 if (need_resched()) {
5512 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5514 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5518 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5525 static int complete_mmio(struct kvm_vcpu *vcpu)
5527 struct kvm_run *run = vcpu->run;
5530 if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5533 if (vcpu->mmio_needed) {
5534 vcpu->mmio_needed = 0;
5535 if (!vcpu->mmio_is_write)
5536 memcpy(vcpu->mmio_data, run->mmio.data, 8);
5537 vcpu->mmio_index += 8;
5538 if (vcpu->mmio_index < vcpu->mmio_size) {
5539 run->exit_reason = KVM_EXIT_MMIO;
5540 run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5541 memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5542 run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5543 run->mmio.is_write = vcpu->mmio_is_write;
5544 vcpu->mmio_needed = 1;
5547 if (vcpu->mmio_is_write)
5549 vcpu->mmio_read_completed = 1;
5551 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5552 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5553 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5554 if (r != EMULATE_DONE)
5559 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5564 if (!tsk_used_math(current) && init_fpu(current))
5567 if (vcpu->sigset_active)
5568 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5570 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5571 kvm_vcpu_block(vcpu);
5572 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5577 /* re-sync apic's tpr */
5578 if (!irqchip_in_kernel(vcpu->kvm)) {
5579 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5585 r = complete_mmio(vcpu);
5589 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5590 kvm_register_write(vcpu, VCPU_REGS_RAX,
5591 kvm_run->hypercall.ret);
5593 r = __vcpu_run(vcpu);
5596 post_kvm_run_save(vcpu);
5597 if (vcpu->sigset_active)
5598 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5603 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5605 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5607 * We are here if userspace calls get_regs() in the middle of
5608 * instruction emulation. Registers state needs to be copied
5609 * back from emulation context to vcpu. Usrapace shouldn't do
5610 * that usually, but some bad designed PV devices (vmware
5611 * backdoor interface) need this to work
5613 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5614 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5615 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5617 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5618 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5619 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5620 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5621 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5622 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5623 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5624 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5625 #ifdef CONFIG_X86_64
5626 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5627 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5628 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5629 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5630 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5631 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5632 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5633 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5636 regs->rip = kvm_rip_read(vcpu);
5637 regs->rflags = kvm_get_rflags(vcpu);
5642 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5644 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5645 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5647 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5648 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5649 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5650 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5651 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5652 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5653 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5654 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5655 #ifdef CONFIG_X86_64
5656 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5657 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5658 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5659 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5660 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5661 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5662 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5663 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5666 kvm_rip_write(vcpu, regs->rip);
5667 kvm_set_rflags(vcpu, regs->rflags);
5669 vcpu->arch.exception.pending = false;
5671 kvm_make_request(KVM_REQ_EVENT, vcpu);
5676 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5678 struct kvm_segment cs;
5680 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5684 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5686 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5687 struct kvm_sregs *sregs)
5691 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5692 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5693 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5694 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5695 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5696 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5698 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5699 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5701 kvm_x86_ops->get_idt(vcpu, &dt);
5702 sregs->idt.limit = dt.size;
5703 sregs->idt.base = dt.address;
5704 kvm_x86_ops->get_gdt(vcpu, &dt);
5705 sregs->gdt.limit = dt.size;
5706 sregs->gdt.base = dt.address;
5708 sregs->cr0 = kvm_read_cr0(vcpu);
5709 sregs->cr2 = vcpu->arch.cr2;
5710 sregs->cr3 = kvm_read_cr3(vcpu);
5711 sregs->cr4 = kvm_read_cr4(vcpu);
5712 sregs->cr8 = kvm_get_cr8(vcpu);
5713 sregs->efer = vcpu->arch.efer;
5714 sregs->apic_base = kvm_get_apic_base(vcpu);
5716 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5718 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5719 set_bit(vcpu->arch.interrupt.nr,
5720 (unsigned long *)sregs->interrupt_bitmap);
5725 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5726 struct kvm_mp_state *mp_state)
5728 mp_state->mp_state = vcpu->arch.mp_state;
5732 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5733 struct kvm_mp_state *mp_state)
5735 vcpu->arch.mp_state = mp_state->mp_state;
5736 kvm_make_request(KVM_REQ_EVENT, vcpu);
5740 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5741 bool has_error_code, u32 error_code)
5743 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5746 init_emulate_ctxt(vcpu);
5748 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5749 tss_selector, reason, has_error_code,
5753 return EMULATE_FAIL;
5755 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5756 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5757 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5758 kvm_make_request(KVM_REQ_EVENT, vcpu);
5759 return EMULATE_DONE;
5761 EXPORT_SYMBOL_GPL(kvm_task_switch);
5763 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5764 struct kvm_sregs *sregs)
5766 int mmu_reset_needed = 0;
5767 int pending_vec, max_bits, idx;
5770 dt.size = sregs->idt.limit;
5771 dt.address = sregs->idt.base;
5772 kvm_x86_ops->set_idt(vcpu, &dt);
5773 dt.size = sregs->gdt.limit;
5774 dt.address = sregs->gdt.base;
5775 kvm_x86_ops->set_gdt(vcpu, &dt);
5777 vcpu->arch.cr2 = sregs->cr2;
5778 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5779 vcpu->arch.cr3 = sregs->cr3;
5780 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5782 kvm_set_cr8(vcpu, sregs->cr8);
5784 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5785 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5786 kvm_set_apic_base(vcpu, sregs->apic_base);
5788 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5789 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5790 vcpu->arch.cr0 = sregs->cr0;
5792 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5793 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5794 if (sregs->cr4 & X86_CR4_OSXSAVE)
5797 idx = srcu_read_lock(&vcpu->kvm->srcu);
5798 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5799 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5800 mmu_reset_needed = 1;
5802 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5804 if (mmu_reset_needed)
5805 kvm_mmu_reset_context(vcpu);
5807 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5808 pending_vec = find_first_bit(
5809 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5810 if (pending_vec < max_bits) {
5811 kvm_queue_interrupt(vcpu, pending_vec, false);
5812 pr_debug("Set back pending irq %d\n", pending_vec);
5815 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5816 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5817 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5818 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5819 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5820 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5822 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5823 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5825 update_cr8_intercept(vcpu);
5827 /* Older userspace won't unhalt the vcpu on reset. */
5828 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5829 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5831 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5833 kvm_make_request(KVM_REQ_EVENT, vcpu);
5838 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5839 struct kvm_guest_debug *dbg)
5841 unsigned long rflags;
5844 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5846 if (vcpu->arch.exception.pending)
5848 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5849 kvm_queue_exception(vcpu, DB_VECTOR);
5851 kvm_queue_exception(vcpu, BP_VECTOR);
5855 * Read rflags as long as potentially injected trace flags are still
5858 rflags = kvm_get_rflags(vcpu);
5860 vcpu->guest_debug = dbg->control;
5861 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5862 vcpu->guest_debug = 0;
5864 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5865 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5866 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5867 vcpu->arch.switch_db_regs =
5868 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5870 for (i = 0; i < KVM_NR_DB_REGS; i++)
5871 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5872 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5875 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5876 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5877 get_segment_base(vcpu, VCPU_SREG_CS);
5880 * Trigger an rflags update that will inject or remove the trace
5883 kvm_set_rflags(vcpu, rflags);
5885 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5895 * Translate a guest virtual address to a guest physical address.
5897 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5898 struct kvm_translation *tr)
5900 unsigned long vaddr = tr->linear_address;
5904 idx = srcu_read_lock(&vcpu->kvm->srcu);
5905 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5906 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5907 tr->physical_address = gpa;
5908 tr->valid = gpa != UNMAPPED_GVA;
5915 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5917 struct i387_fxsave_struct *fxsave =
5918 &vcpu->arch.guest_fpu.state->fxsave;
5920 memcpy(fpu->fpr, fxsave->st_space, 128);
5921 fpu->fcw = fxsave->cwd;
5922 fpu->fsw = fxsave->swd;
5923 fpu->ftwx = fxsave->twd;
5924 fpu->last_opcode = fxsave->fop;
5925 fpu->last_ip = fxsave->rip;
5926 fpu->last_dp = fxsave->rdp;
5927 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5932 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5934 struct i387_fxsave_struct *fxsave =
5935 &vcpu->arch.guest_fpu.state->fxsave;
5937 memcpy(fxsave->st_space, fpu->fpr, 128);
5938 fxsave->cwd = fpu->fcw;
5939 fxsave->swd = fpu->fsw;
5940 fxsave->twd = fpu->ftwx;
5941 fxsave->fop = fpu->last_opcode;
5942 fxsave->rip = fpu->last_ip;
5943 fxsave->rdp = fpu->last_dp;
5944 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5949 int fx_init(struct kvm_vcpu *vcpu)
5953 err = fpu_alloc(&vcpu->arch.guest_fpu);
5957 fpu_finit(&vcpu->arch.guest_fpu);
5960 * Ensure guest xcr0 is valid for loading
5962 vcpu->arch.xcr0 = XSTATE_FP;
5964 vcpu->arch.cr0 |= X86_CR0_ET;
5968 EXPORT_SYMBOL_GPL(fx_init);
5970 static void fx_free(struct kvm_vcpu *vcpu)
5972 fpu_free(&vcpu->arch.guest_fpu);
5975 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5977 if (vcpu->guest_fpu_loaded)
5981 * Restore all possible states in the guest,
5982 * and assume host would use all available bits.
5983 * Guest xcr0 would be loaded later.
5985 kvm_put_guest_xcr0(vcpu);
5986 vcpu->guest_fpu_loaded = 1;
5987 unlazy_fpu(current);
5988 fpu_restore_checking(&vcpu->arch.guest_fpu);
5992 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5994 kvm_put_guest_xcr0(vcpu);
5996 if (!vcpu->guest_fpu_loaded)
5999 vcpu->guest_fpu_loaded = 0;
6000 fpu_save_init(&vcpu->arch.guest_fpu);
6001 ++vcpu->stat.fpu_reload;
6002 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6006 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6008 kvmclock_reset(vcpu);
6010 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6012 kvm_x86_ops->vcpu_free(vcpu);
6015 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6018 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6019 printk_once(KERN_WARNING
6020 "kvm: SMP vm created on host with unstable TSC; "
6021 "guest TSC will not be reliable\n");
6022 return kvm_x86_ops->vcpu_create(kvm, id);
6025 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6029 vcpu->arch.mtrr_state.have_fixed = 1;
6031 r = kvm_arch_vcpu_reset(vcpu);
6033 r = kvm_mmu_setup(vcpu);
6040 kvm_x86_ops->vcpu_free(vcpu);
6044 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6046 vcpu->arch.apf.msr_val = 0;
6049 kvm_mmu_unload(vcpu);
6053 kvm_x86_ops->vcpu_free(vcpu);
6056 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6058 vcpu->arch.nmi_pending = false;
6059 vcpu->arch.nmi_injected = false;
6061 vcpu->arch.switch_db_regs = 0;
6062 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6063 vcpu->arch.dr6 = DR6_FIXED_1;
6064 vcpu->arch.dr7 = DR7_FIXED_1;
6066 kvm_make_request(KVM_REQ_EVENT, vcpu);
6067 vcpu->arch.apf.msr_val = 0;
6069 kvmclock_reset(vcpu);
6071 kvm_clear_async_pf_completion_queue(vcpu);
6072 kvm_async_pf_hash_reset(vcpu);
6073 vcpu->arch.apf.halted = false;
6075 return kvm_x86_ops->vcpu_reset(vcpu);
6078 int kvm_arch_hardware_enable(void *garbage)
6081 struct kvm_vcpu *vcpu;
6084 kvm_shared_msr_cpu_online();
6085 list_for_each_entry(kvm, &vm_list, vm_list)
6086 kvm_for_each_vcpu(i, vcpu, kvm)
6087 if (vcpu->cpu == smp_processor_id())
6088 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6089 return kvm_x86_ops->hardware_enable(garbage);
6092 void kvm_arch_hardware_disable(void *garbage)
6094 kvm_x86_ops->hardware_disable(garbage);
6095 drop_user_return_notifiers(garbage);
6098 int kvm_arch_hardware_setup(void)
6100 return kvm_x86_ops->hardware_setup();
6103 void kvm_arch_hardware_unsetup(void)
6105 kvm_x86_ops->hardware_unsetup();
6108 void kvm_arch_check_processor_compat(void *rtn)
6110 kvm_x86_ops->check_processor_compatibility(rtn);
6113 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6119 BUG_ON(vcpu->kvm == NULL);
6122 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6123 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6124 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6125 vcpu->arch.mmu.translate_gpa = translate_gpa;
6126 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6127 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6128 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6130 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6132 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6137 vcpu->arch.pio_data = page_address(page);
6139 kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6141 r = kvm_mmu_create(vcpu);
6143 goto fail_free_pio_data;
6145 if (irqchip_in_kernel(kvm)) {
6146 r = kvm_create_lapic(vcpu);
6148 goto fail_mmu_destroy;
6151 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6153 if (!vcpu->arch.mce_banks) {
6155 goto fail_free_lapic;
6157 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6159 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6160 goto fail_free_mce_banks;
6162 kvm_async_pf_hash_reset(vcpu);
6165 fail_free_mce_banks:
6166 kfree(vcpu->arch.mce_banks);
6168 kvm_free_lapic(vcpu);
6170 kvm_mmu_destroy(vcpu);
6172 free_page((unsigned long)vcpu->arch.pio_data);
6177 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6181 kfree(vcpu->arch.mce_banks);
6182 kvm_free_lapic(vcpu);
6183 idx = srcu_read_lock(&vcpu->kvm->srcu);
6184 kvm_mmu_destroy(vcpu);
6185 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6186 free_page((unsigned long)vcpu->arch.pio_data);
6189 int kvm_arch_init_vm(struct kvm *kvm)
6191 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6192 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6194 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6195 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6197 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6202 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6205 kvm_mmu_unload(vcpu);
6209 static void kvm_free_vcpus(struct kvm *kvm)
6212 struct kvm_vcpu *vcpu;
6215 * Unpin any mmu pages first.
6217 kvm_for_each_vcpu(i, vcpu, kvm) {
6218 kvm_clear_async_pf_completion_queue(vcpu);
6219 kvm_unload_vcpu_mmu(vcpu);
6221 kvm_for_each_vcpu(i, vcpu, kvm)
6222 kvm_arch_vcpu_free(vcpu);
6224 mutex_lock(&kvm->lock);
6225 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6226 kvm->vcpus[i] = NULL;
6228 atomic_set(&kvm->online_vcpus, 0);
6229 mutex_unlock(&kvm->lock);
6232 void kvm_arch_sync_events(struct kvm *kvm)
6234 kvm_free_all_assigned_devices(kvm);
6238 void kvm_arch_destroy_vm(struct kvm *kvm)
6240 kvm_iommu_unmap_guest(kvm);
6241 kfree(kvm->arch.vpic);
6242 kfree(kvm->arch.vioapic);
6243 kvm_free_vcpus(kvm);
6244 if (kvm->arch.apic_access_page)
6245 put_page(kvm->arch.apic_access_page);
6246 if (kvm->arch.ept_identity_pagetable)
6247 put_page(kvm->arch.ept_identity_pagetable);
6250 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6251 struct kvm_memory_slot *memslot,
6252 struct kvm_memory_slot old,
6253 struct kvm_userspace_memory_region *mem,
6256 int npages = memslot->npages;
6257 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6259 /* Prevent internal slot pages from being moved by fork()/COW. */
6260 if (memslot->id >= KVM_MEMORY_SLOTS)
6261 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6263 /*To keep backward compatibility with older userspace,
6264 *x86 needs to hanlde !user_alloc case.
6267 if (npages && !old.rmap) {
6268 unsigned long userspace_addr;
6270 down_write(¤t->mm->mmap_sem);
6271 userspace_addr = do_mmap(NULL, 0,
6273 PROT_READ | PROT_WRITE,
6276 up_write(¤t->mm->mmap_sem);
6278 if (IS_ERR((void *)userspace_addr))
6279 return PTR_ERR((void *)userspace_addr);
6281 memslot->userspace_addr = userspace_addr;
6289 void kvm_arch_commit_memory_region(struct kvm *kvm,
6290 struct kvm_userspace_memory_region *mem,
6291 struct kvm_memory_slot old,
6295 int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6297 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6300 down_write(¤t->mm->mmap_sem);
6301 ret = do_munmap(current->mm, old.userspace_addr,
6302 old.npages * PAGE_SIZE);
6303 up_write(¤t->mm->mmap_sem);
6306 "kvm_vm_ioctl_set_memory_region: "
6307 "failed to munmap memory\n");
6310 if (!kvm->arch.n_requested_mmu_pages)
6311 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6313 spin_lock(&kvm->mmu_lock);
6315 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6316 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6317 spin_unlock(&kvm->mmu_lock);
6320 void kvm_arch_flush_shadow(struct kvm *kvm)
6322 kvm_mmu_zap_all(kvm);
6323 kvm_reload_remote_mmus(kvm);
6326 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6328 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6329 !vcpu->arch.apf.halted)
6330 || !list_empty_careful(&vcpu->async_pf.done)
6331 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6332 || vcpu->arch.nmi_pending ||
6333 (kvm_arch_interrupt_allowed(vcpu) &&
6334 kvm_cpu_has_interrupt(vcpu));
6337 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6340 int cpu = vcpu->cpu;
6342 if (waitqueue_active(&vcpu->wq)) {
6343 wake_up_interruptible(&vcpu->wq);
6344 ++vcpu->stat.halt_wakeup;
6348 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6349 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6350 smp_send_reschedule(cpu);
6354 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6356 return kvm_x86_ops->interrupt_allowed(vcpu);
6359 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6361 unsigned long current_rip = kvm_rip_read(vcpu) +
6362 get_segment_base(vcpu, VCPU_SREG_CS);
6364 return current_rip == linear_rip;
6366 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6368 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6370 unsigned long rflags;
6372 rflags = kvm_x86_ops->get_rflags(vcpu);
6373 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6374 rflags &= ~X86_EFLAGS_TF;
6377 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6379 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6381 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6382 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6383 rflags |= X86_EFLAGS_TF;
6384 kvm_x86_ops->set_rflags(vcpu, rflags);
6385 kvm_make_request(KVM_REQ_EVENT, vcpu);
6387 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6389 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6393 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6394 is_error_page(work->page))
6397 r = kvm_mmu_reload(vcpu);
6401 if (!vcpu->arch.mmu.direct_map &&
6402 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6405 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6408 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6410 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6413 static inline u32 kvm_async_pf_next_probe(u32 key)
6415 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6418 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6420 u32 key = kvm_async_pf_hash_fn(gfn);
6422 while (vcpu->arch.apf.gfns[key] != ~0)
6423 key = kvm_async_pf_next_probe(key);
6425 vcpu->arch.apf.gfns[key] = gfn;
6428 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6431 u32 key = kvm_async_pf_hash_fn(gfn);
6433 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6434 (vcpu->arch.apf.gfns[key] != gfn &&
6435 vcpu->arch.apf.gfns[key] != ~0); i++)
6436 key = kvm_async_pf_next_probe(key);
6441 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6443 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6446 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6450 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6452 vcpu->arch.apf.gfns[i] = ~0;
6454 j = kvm_async_pf_next_probe(j);
6455 if (vcpu->arch.apf.gfns[j] == ~0)
6457 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6459 * k lies cyclically in ]i,j]
6461 * |....j i.k.| or |.k..j i...|
6463 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6464 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6469 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6472 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6476 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6477 struct kvm_async_pf *work)
6479 struct x86_exception fault;
6481 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6482 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6484 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6485 (vcpu->arch.apf.send_user_only &&
6486 kvm_x86_ops->get_cpl(vcpu) == 0))
6487 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6488 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6489 fault.vector = PF_VECTOR;
6490 fault.error_code_valid = true;
6491 fault.error_code = 0;
6492 fault.nested_page_fault = false;
6493 fault.address = work->arch.token;
6494 kvm_inject_page_fault(vcpu, &fault);
6498 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6499 struct kvm_async_pf *work)
6501 struct x86_exception fault;
6503 trace_kvm_async_pf_ready(work->arch.token, work->gva);
6504 if (is_error_page(work->page))
6505 work->arch.token = ~0; /* broadcast wakeup */
6507 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6509 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6510 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6511 fault.vector = PF_VECTOR;
6512 fault.error_code_valid = true;
6513 fault.error_code = 0;
6514 fault.nested_page_fault = false;
6515 fault.address = work->arch.token;
6516 kvm_inject_page_fault(vcpu, &fault);
6518 vcpu->arch.apf.halted = false;
6521 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6523 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6526 return !kvm_event_needs_reinjection(vcpu) &&
6527 kvm_x86_ops->interrupt_allowed(vcpu);
6530 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6531 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6532 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6533 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6534 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6535 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6536 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6537 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6538 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6539 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6540 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6541 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);