2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/module.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <trace/events/kvm.h>
58 #define CREATE_TRACE_POINTS
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define MAX_IO_MSRS 256
72 #define KVM_MAX_MCE_BANKS 32
73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
75 #define emul_to_vcpu(ctxt) \
76 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
93 static void process_nmi(struct kvm_vcpu *vcpu);
94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
99 static bool __read_mostly ignore_msrs = 0;
100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
102 unsigned int min_timer_period_us = 500;
103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
105 static bool __read_mostly kvmclock_periodic_sync = true;
106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
108 bool __read_mostly kvm_has_tsc_control;
109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
110 u32 __read_mostly kvm_max_guest_tsc_khz;
111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
112 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
114 u64 __read_mostly kvm_max_tsc_scaling_ratio;
115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
119 static u32 __read_mostly tsc_tolerance_ppm = 250;
120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
126 static bool __read_mostly backwards_tsc_observed = false;
128 #define KVM_NR_SHARED_MSRS 16
130 struct kvm_shared_msrs_global {
132 u32 msrs[KVM_NR_SHARED_MSRS];
135 struct kvm_shared_msrs {
136 struct user_return_notifier urn;
138 struct kvm_shared_msr_values {
141 } values[KVM_NR_SHARED_MSRS];
144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
145 static struct kvm_shared_msrs __percpu *shared_msrs;
147 struct kvm_stats_debugfs_item debugfs_entries[] = {
148 { "pf_fixed", VCPU_STAT(pf_fixed) },
149 { "pf_guest", VCPU_STAT(pf_guest) },
150 { "tlb_flush", VCPU_STAT(tlb_flush) },
151 { "invlpg", VCPU_STAT(invlpg) },
152 { "exits", VCPU_STAT(exits) },
153 { "io_exits", VCPU_STAT(io_exits) },
154 { "mmio_exits", VCPU_STAT(mmio_exits) },
155 { "signal_exits", VCPU_STAT(signal_exits) },
156 { "irq_window", VCPU_STAT(irq_window_exits) },
157 { "nmi_window", VCPU_STAT(nmi_window_exits) },
158 { "halt_exits", VCPU_STAT(halt_exits) },
159 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
160 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
161 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
162 { "hypercalls", VCPU_STAT(hypercalls) },
163 { "request_irq", VCPU_STAT(request_irq_exits) },
164 { "irq_exits", VCPU_STAT(irq_exits) },
165 { "host_state_reload", VCPU_STAT(host_state_reload) },
166 { "efer_reload", VCPU_STAT(efer_reload) },
167 { "fpu_reload", VCPU_STAT(fpu_reload) },
168 { "insn_emulation", VCPU_STAT(insn_emulation) },
169 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
170 { "irq_injections", VCPU_STAT(irq_injections) },
171 { "nmi_injections", VCPU_STAT(nmi_injections) },
172 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
173 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
174 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
175 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
176 { "mmu_flooded", VM_STAT(mmu_flooded) },
177 { "mmu_recycled", VM_STAT(mmu_recycled) },
178 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
179 { "mmu_unsync", VM_STAT(mmu_unsync) },
180 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
181 { "largepages", VM_STAT(lpages) },
185 u64 __read_mostly host_xcr0;
187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
192 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
193 vcpu->arch.apf.gfns[i] = ~0;
196 static void kvm_on_user_return(struct user_return_notifier *urn)
199 struct kvm_shared_msrs *locals
200 = container_of(urn, struct kvm_shared_msrs, urn);
201 struct kvm_shared_msr_values *values;
203 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
204 values = &locals->values[slot];
205 if (values->host != values->curr) {
206 wrmsrl(shared_msrs_global.msrs[slot], values->host);
207 values->curr = values->host;
210 locals->registered = false;
211 user_return_notifier_unregister(urn);
214 static void shared_msr_update(unsigned slot, u32 msr)
217 unsigned int cpu = smp_processor_id();
218 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
220 /* only read, and nobody should modify it at this time,
221 * so don't need lock */
222 if (slot >= shared_msrs_global.nr) {
223 printk(KERN_ERR "kvm: invalid MSR slot!");
226 rdmsrl_safe(msr, &value);
227 smsr->values[slot].host = value;
228 smsr->values[slot].curr = value;
231 void kvm_define_shared_msr(unsigned slot, u32 msr)
233 BUG_ON(slot >= KVM_NR_SHARED_MSRS);
234 shared_msrs_global.msrs[slot] = msr;
235 if (slot >= shared_msrs_global.nr)
236 shared_msrs_global.nr = slot + 1;
238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
240 static void kvm_shared_msr_cpu_online(void)
244 for (i = 0; i < shared_msrs_global.nr; ++i)
245 shared_msr_update(i, shared_msrs_global.msrs[i]);
248 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
250 unsigned int cpu = smp_processor_id();
251 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
254 if (((value ^ smsr->values[slot].curr) & mask) == 0)
256 smsr->values[slot].curr = value;
257 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
261 if (!smsr->registered) {
262 smsr->urn.on_user_return = kvm_on_user_return;
263 user_return_notifier_register(&smsr->urn);
264 smsr->registered = true;
268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
270 static void drop_user_return_notifiers(void)
272 unsigned int cpu = smp_processor_id();
273 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
275 if (smsr->registered)
276 kvm_on_user_return(&smsr->urn);
279 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
281 return vcpu->arch.apic_base;
283 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
285 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
287 u64 old_state = vcpu->arch.apic_base &
288 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
289 u64 new_state = msr_info->data &
290 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
291 u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
292 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
294 if (!msr_info->host_initiated &&
295 ((msr_info->data & reserved_bits) != 0 ||
296 new_state == X2APIC_ENABLE ||
297 (new_state == MSR_IA32_APICBASE_ENABLE &&
298 old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
299 (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
303 kvm_lapic_set_base(vcpu, msr_info->data);
306 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
308 asmlinkage __visible void kvm_spurious_fault(void)
310 /* Fault while not rebooting. We want the trace. */
313 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
315 #define EXCPT_BENIGN 0
316 #define EXCPT_CONTRIBUTORY 1
319 static int exception_class(int vector)
329 return EXCPT_CONTRIBUTORY;
336 #define EXCPT_FAULT 0
338 #define EXCPT_ABORT 2
339 #define EXCPT_INTERRUPT 3
341 static int exception_type(int vector)
345 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
346 return EXCPT_INTERRUPT;
350 /* #DB is trap, as instruction watchpoints are handled elsewhere */
351 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
354 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
357 /* Reserved exceptions will result in fault */
361 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
362 unsigned nr, bool has_error, u32 error_code,
368 kvm_make_request(KVM_REQ_EVENT, vcpu);
370 if (!vcpu->arch.exception.pending) {
372 if (has_error && !is_protmode(vcpu))
374 vcpu->arch.exception.pending = true;
375 vcpu->arch.exception.has_error_code = has_error;
376 vcpu->arch.exception.nr = nr;
377 vcpu->arch.exception.error_code = error_code;
378 vcpu->arch.exception.reinject = reinject;
382 /* to check exception */
383 prev_nr = vcpu->arch.exception.nr;
384 if (prev_nr == DF_VECTOR) {
385 /* triple fault -> shutdown */
386 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
389 class1 = exception_class(prev_nr);
390 class2 = exception_class(nr);
391 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
392 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
393 /* generate double fault per SDM Table 5-5 */
394 vcpu->arch.exception.pending = true;
395 vcpu->arch.exception.has_error_code = true;
396 vcpu->arch.exception.nr = DF_VECTOR;
397 vcpu->arch.exception.error_code = 0;
399 /* replace previous exception with a new one in a hope
400 that instruction re-execution will regenerate lost
405 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
407 kvm_multiple_exception(vcpu, nr, false, 0, false);
409 EXPORT_SYMBOL_GPL(kvm_queue_exception);
411 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
413 kvm_multiple_exception(vcpu, nr, false, 0, true);
415 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
417 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
420 kvm_inject_gp(vcpu, 0);
422 kvm_x86_ops->skip_emulated_instruction(vcpu);
424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
426 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
428 ++vcpu->stat.pf_guest;
429 vcpu->arch.cr2 = fault->address;
430 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
434 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
436 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
437 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
439 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
441 return fault->nested_page_fault;
444 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
446 atomic_inc(&vcpu->arch.nmi_queued);
447 kvm_make_request(KVM_REQ_NMI, vcpu);
449 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
451 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
453 kvm_multiple_exception(vcpu, nr, true, error_code, false);
455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
457 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
459 kvm_multiple_exception(vcpu, nr, true, error_code, true);
461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
464 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
465 * a #GP and return false.
467 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
469 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
471 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
474 EXPORT_SYMBOL_GPL(kvm_require_cpl);
476 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
478 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
481 kvm_queue_exception(vcpu, UD_VECTOR);
484 EXPORT_SYMBOL_GPL(kvm_require_dr);
487 * This function will be used to read from the physical memory of the currently
488 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
489 * can read from guest physical or from the guest's guest physical memory.
491 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
492 gfn_t ngfn, void *data, int offset, int len,
495 struct x86_exception exception;
499 ngpa = gfn_to_gpa(ngfn);
500 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
501 if (real_gfn == UNMAPPED_GVA)
504 real_gfn = gpa_to_gfn(real_gfn);
506 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
510 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
511 void *data, int offset, int len, u32 access)
513 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
514 data, offset, len, access);
518 * Load the pae pdptrs. Return true is they are all valid.
520 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
522 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
523 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
526 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
528 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
529 offset * sizeof(u64), sizeof(pdpte),
530 PFERR_USER_MASK|PFERR_WRITE_MASK);
535 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
536 if (is_present_gpte(pdpte[i]) &&
538 vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
545 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
546 __set_bit(VCPU_EXREG_PDPTR,
547 (unsigned long *)&vcpu->arch.regs_avail);
548 __set_bit(VCPU_EXREG_PDPTR,
549 (unsigned long *)&vcpu->arch.regs_dirty);
554 EXPORT_SYMBOL_GPL(load_pdptrs);
556 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
558 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
564 if (is_long_mode(vcpu) || !is_pae(vcpu))
567 if (!test_bit(VCPU_EXREG_PDPTR,
568 (unsigned long *)&vcpu->arch.regs_avail))
571 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
572 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
573 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
574 PFERR_USER_MASK | PFERR_WRITE_MASK);
577 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
583 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
585 unsigned long old_cr0 = kvm_read_cr0(vcpu);
586 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
591 if (cr0 & 0xffffffff00000000UL)
595 cr0 &= ~CR0_RESERVED_BITS;
597 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
600 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
603 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
605 if ((vcpu->arch.efer & EFER_LME)) {
610 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
615 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
620 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
623 kvm_x86_ops->set_cr0(vcpu, cr0);
625 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
626 kvm_clear_async_pf_completion_queue(vcpu);
627 kvm_async_pf_hash_reset(vcpu);
630 if ((cr0 ^ old_cr0) & update_bits)
631 kvm_mmu_reset_context(vcpu);
633 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
634 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
635 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
636 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
640 EXPORT_SYMBOL_GPL(kvm_set_cr0);
642 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
644 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
646 EXPORT_SYMBOL_GPL(kvm_lmsw);
648 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
650 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
651 !vcpu->guest_xcr0_loaded) {
652 /* kvm_set_xcr() also depends on this */
653 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
654 vcpu->guest_xcr0_loaded = 1;
658 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
660 if (vcpu->guest_xcr0_loaded) {
661 if (vcpu->arch.xcr0 != host_xcr0)
662 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
663 vcpu->guest_xcr0_loaded = 0;
667 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
670 u64 old_xcr0 = vcpu->arch.xcr0;
673 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
674 if (index != XCR_XFEATURE_ENABLED_MASK)
676 if (!(xcr0 & XFEATURE_MASK_FP))
678 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
682 * Do not allow the guest to set bits that we do not support
683 * saving. However, xcr0 bit 0 is always set, even if the
684 * emulated CPU does not support XSAVE (see fx_init).
686 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
687 if (xcr0 & ~valid_bits)
690 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
691 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
694 if (xcr0 & XFEATURE_MASK_AVX512) {
695 if (!(xcr0 & XFEATURE_MASK_YMM))
697 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
700 kvm_put_guest_xcr0(vcpu);
701 vcpu->arch.xcr0 = xcr0;
703 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
704 kvm_update_cpuid(vcpu);
708 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
710 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
711 __kvm_set_xcr(vcpu, index, xcr)) {
712 kvm_inject_gp(vcpu, 0);
717 EXPORT_SYMBOL_GPL(kvm_set_xcr);
719 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
721 unsigned long old_cr4 = kvm_read_cr4(vcpu);
722 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
723 X86_CR4_SMEP | X86_CR4_SMAP;
725 if (cr4 & CR4_RESERVED_BITS)
728 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
731 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
734 if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
737 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
740 if (is_long_mode(vcpu)) {
741 if (!(cr4 & X86_CR4_PAE))
743 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
744 && ((cr4 ^ old_cr4) & pdptr_bits)
745 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
749 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
750 if (!guest_cpuid_has_pcid(vcpu))
753 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
754 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
758 if (kvm_x86_ops->set_cr4(vcpu, cr4))
761 if (((cr4 ^ old_cr4) & pdptr_bits) ||
762 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
763 kvm_mmu_reset_context(vcpu);
765 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
766 kvm_update_cpuid(vcpu);
770 EXPORT_SYMBOL_GPL(kvm_set_cr4);
772 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
775 cr3 &= ~CR3_PCID_INVD;
778 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
779 kvm_mmu_sync_roots(vcpu);
780 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
784 if (is_long_mode(vcpu)) {
785 if (cr3 & CR3_L_MODE_RESERVED_BITS)
787 } else if (is_pae(vcpu) && is_paging(vcpu) &&
788 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
791 vcpu->arch.cr3 = cr3;
792 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
793 kvm_mmu_new_cr3(vcpu);
796 EXPORT_SYMBOL_GPL(kvm_set_cr3);
798 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
800 if (cr8 & CR8_RESERVED_BITS)
802 if (lapic_in_kernel(vcpu))
803 kvm_lapic_set_tpr(vcpu, cr8);
805 vcpu->arch.cr8 = cr8;
808 EXPORT_SYMBOL_GPL(kvm_set_cr8);
810 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
812 if (lapic_in_kernel(vcpu))
813 return kvm_lapic_get_cr8(vcpu);
815 return vcpu->arch.cr8;
817 EXPORT_SYMBOL_GPL(kvm_get_cr8);
819 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
823 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
824 for (i = 0; i < KVM_NR_DB_REGS; i++)
825 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
826 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
830 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
832 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
833 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
836 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
840 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
841 dr7 = vcpu->arch.guest_debug_dr7;
843 dr7 = vcpu->arch.dr7;
844 kvm_x86_ops->set_dr7(vcpu, dr7);
845 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
846 if (dr7 & DR7_BP_EN_MASK)
847 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
850 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
852 u64 fixed = DR6_FIXED_1;
854 if (!guest_cpuid_has_rtm(vcpu))
859 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
863 vcpu->arch.db[dr] = val;
864 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
865 vcpu->arch.eff_db[dr] = val;
870 if (val & 0xffffffff00000000ULL)
872 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
873 kvm_update_dr6(vcpu);
878 if (val & 0xffffffff00000000ULL)
880 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
881 kvm_update_dr7(vcpu);
888 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
890 if (__kvm_set_dr(vcpu, dr, val)) {
891 kvm_inject_gp(vcpu, 0);
896 EXPORT_SYMBOL_GPL(kvm_set_dr);
898 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
902 *val = vcpu->arch.db[dr];
907 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
908 *val = vcpu->arch.dr6;
910 *val = kvm_x86_ops->get_dr6(vcpu);
915 *val = vcpu->arch.dr7;
920 EXPORT_SYMBOL_GPL(kvm_get_dr);
922 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
924 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
928 err = kvm_pmu_rdpmc(vcpu, ecx, &data);
931 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
932 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
935 EXPORT_SYMBOL_GPL(kvm_rdpmc);
938 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
939 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
941 * This list is modified at module load time to reflect the
942 * capabilities of the host cpu. This capabilities test skips MSRs that are
943 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
944 * may depend on host virtualization features rather than host cpu features.
947 static u32 msrs_to_save[] = {
948 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
951 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
953 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
954 MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
957 static unsigned num_msrs_to_save;
959 static u32 emulated_msrs[] = {
960 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
961 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
962 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
963 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
964 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
965 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
968 HV_X64_MSR_VP_RUNTIME,
970 HV_X64_MSR_STIMER0_CONFIG,
971 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
975 MSR_IA32_TSCDEADLINE,
976 MSR_IA32_MISC_ENABLE,
982 static unsigned num_emulated_msrs;
984 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
986 if (efer & efer_reserved_bits)
989 if (efer & EFER_FFXSR) {
990 struct kvm_cpuid_entry2 *feat;
992 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
993 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
997 if (efer & EFER_SVME) {
998 struct kvm_cpuid_entry2 *feat;
1000 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1001 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1007 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1009 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1011 u64 old_efer = vcpu->arch.efer;
1013 if (!kvm_valid_efer(vcpu, efer))
1017 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1021 efer |= vcpu->arch.efer & EFER_LMA;
1023 kvm_x86_ops->set_efer(vcpu, efer);
1025 /* Update reserved bits */
1026 if ((efer ^ old_efer) & EFER_NX)
1027 kvm_mmu_reset_context(vcpu);
1032 void kvm_enable_efer_bits(u64 mask)
1034 efer_reserved_bits &= ~mask;
1036 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1039 * Writes msr value into into the appropriate "register".
1040 * Returns 0 on success, non-0 otherwise.
1041 * Assumes vcpu_load() was already called.
1043 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1045 switch (msr->index) {
1048 case MSR_KERNEL_GS_BASE:
1051 if (is_noncanonical_address(msr->data))
1054 case MSR_IA32_SYSENTER_EIP:
1055 case MSR_IA32_SYSENTER_ESP:
1057 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1058 * non-canonical address is written on Intel but not on
1059 * AMD (which ignores the top 32-bits, because it does
1060 * not implement 64-bit SYSENTER).
1062 * 64-bit code should hence be able to write a non-canonical
1063 * value on AMD. Making the address canonical ensures that
1064 * vmentry does not fail on Intel after writing a non-canonical
1065 * value, and that something deterministic happens if the guest
1066 * invokes 64-bit SYSENTER.
1068 msr->data = get_canonical(msr->data);
1070 return kvm_x86_ops->set_msr(vcpu, msr);
1072 EXPORT_SYMBOL_GPL(kvm_set_msr);
1075 * Adapt set_msr() to msr_io()'s calling convention
1077 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1079 struct msr_data msr;
1083 msr.host_initiated = true;
1084 r = kvm_get_msr(vcpu, &msr);
1092 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1094 struct msr_data msr;
1098 msr.host_initiated = true;
1099 return kvm_set_msr(vcpu, &msr);
1102 #ifdef CONFIG_X86_64
1103 struct pvclock_gtod_data {
1106 struct { /* extract of a clocksource struct */
1118 static struct pvclock_gtod_data pvclock_gtod_data;
1120 static void update_pvclock_gtod(struct timekeeper *tk)
1122 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1125 boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1127 write_seqcount_begin(&vdata->seq);
1129 /* copy pvclock gtod data */
1130 vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
1131 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
1132 vdata->clock.mask = tk->tkr_mono.mask;
1133 vdata->clock.mult = tk->tkr_mono.mult;
1134 vdata->clock.shift = tk->tkr_mono.shift;
1136 vdata->boot_ns = boot_ns;
1137 vdata->nsec_base = tk->tkr_mono.xtime_nsec;
1139 write_seqcount_end(&vdata->seq);
1143 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1146 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1147 * vcpu_enter_guest. This function is only called from
1148 * the physical CPU that is running vcpu.
1150 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1153 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1157 struct pvclock_wall_clock wc;
1158 struct timespec boot;
1163 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1168 ++version; /* first time write, random junk */
1172 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1175 * The guest calculates current wall clock time by adding
1176 * system time (updated by kvm_guest_time_update below) to the
1177 * wall clock specified here. guest system time equals host
1178 * system time for us, thus we must fill in host boot time here.
1182 if (kvm->arch.kvmclock_offset) {
1183 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1184 boot = timespec_sub(boot, ts);
1186 wc.sec = boot.tv_sec;
1187 wc.nsec = boot.tv_nsec;
1188 wc.version = version;
1190 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1193 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1196 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1198 uint32_t quotient, remainder;
1200 /* Don't try to replace with do_div(), this one calculates
1201 * "(dividend << 32) / divisor" */
1203 : "=a" (quotient), "=d" (remainder)
1204 : "0" (0), "1" (dividend), "r" (divisor) );
1208 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1209 s8 *pshift, u32 *pmultiplier)
1216 tps64 = base_khz * 1000LL;
1217 scaled64 = scaled_khz * 1000LL;
1218 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1223 tps32 = (uint32_t)tps64;
1224 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1225 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1233 *pmultiplier = div_frac(scaled64, tps32);
1235 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1236 __func__, base_khz, scaled_khz, shift, *pmultiplier);
1239 #ifdef CONFIG_X86_64
1240 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1243 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1244 static unsigned long max_tsc_khz;
1246 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1248 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1249 vcpu->arch.virtual_tsc_shift);
1252 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1254 u64 v = (u64)khz * (1000000 + ppm);
1259 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1263 /* Guest TSC same frequency as host TSC? */
1265 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1269 /* TSC scaling supported? */
1270 if (!kvm_has_tsc_control) {
1271 if (user_tsc_khz > tsc_khz) {
1272 vcpu->arch.tsc_catchup = 1;
1273 vcpu->arch.tsc_always_catchup = 1;
1276 WARN(1, "user requested TSC rate below hardware speed\n");
1281 /* TSC scaling required - calculate ratio */
1282 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1283 user_tsc_khz, tsc_khz);
1285 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1286 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1291 vcpu->arch.tsc_scaling_ratio = ratio;
1295 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1297 u32 thresh_lo, thresh_hi;
1298 int use_scaling = 0;
1300 /* tsc_khz can be zero if TSC calibration fails */
1301 if (this_tsc_khz == 0) {
1302 /* set tsc_scaling_ratio to a safe value */
1303 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1307 /* Compute a scale to convert nanoseconds in TSC cycles */
1308 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1309 &vcpu->arch.virtual_tsc_shift,
1310 &vcpu->arch.virtual_tsc_mult);
1311 vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1314 * Compute the variation in TSC rate which is acceptable
1315 * within the range of tolerance and decide if the
1316 * rate being applied is within that bounds of the hardware
1317 * rate. If so, no scaling or compensation need be done.
1319 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1320 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1321 if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1322 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1325 return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1328 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1330 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1331 vcpu->arch.virtual_tsc_mult,
1332 vcpu->arch.virtual_tsc_shift);
1333 tsc += vcpu->arch.this_tsc_write;
1337 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1339 #ifdef CONFIG_X86_64
1341 struct kvm_arch *ka = &vcpu->kvm->arch;
1342 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1344 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1345 atomic_read(&vcpu->kvm->online_vcpus));
1348 * Once the masterclock is enabled, always perform request in
1349 * order to update it.
1351 * In order to enable masterclock, the host clocksource must be TSC
1352 * and the vcpus need to have matched TSCs. When that happens,
1353 * perform request to enable masterclock.
1355 if (ka->use_master_clock ||
1356 (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1357 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1359 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1360 atomic_read(&vcpu->kvm->online_vcpus),
1361 ka->use_master_clock, gtod->clock.vclock_mode);
1365 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1367 u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1368 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1372 * Multiply tsc by a fixed point number represented by ratio.
1374 * The most significant 64-N bits (mult) of ratio represent the
1375 * integral part of the fixed point number; the remaining N bits
1376 * (frac) represent the fractional part, ie. ratio represents a fixed
1377 * point number (mult + frac * 2^(-N)).
1379 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1381 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1383 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1386 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1389 u64 ratio = vcpu->arch.tsc_scaling_ratio;
1391 if (ratio != kvm_default_tsc_scaling_ratio)
1392 _tsc = __scale_tsc(ratio, tsc);
1396 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1398 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1402 tsc = kvm_scale_tsc(vcpu, rdtsc());
1404 return target_tsc - tsc;
1407 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1409 return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1411 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1413 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1415 struct kvm *kvm = vcpu->kvm;
1416 u64 offset, ns, elapsed;
1417 unsigned long flags;
1420 bool already_matched;
1421 u64 data = msr->data;
1423 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1424 offset = kvm_compute_tsc_offset(vcpu, data);
1425 ns = get_kernel_ns();
1426 elapsed = ns - kvm->arch.last_tsc_nsec;
1428 if (vcpu->arch.virtual_tsc_khz) {
1431 /* n.b - signed multiplication and division required */
1432 usdiff = data - kvm->arch.last_tsc_write;
1433 #ifdef CONFIG_X86_64
1434 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1436 /* do_div() only does unsigned */
1437 asm("1: idivl %[divisor]\n"
1438 "2: xor %%edx, %%edx\n"
1439 " movl $0, %[faulted]\n"
1441 ".section .fixup,\"ax\"\n"
1442 "4: movl $1, %[faulted]\n"
1446 _ASM_EXTABLE(1b, 4b)
1448 : "=A"(usdiff), [faulted] "=r" (faulted)
1449 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1452 do_div(elapsed, 1000);
1457 /* idivl overflow => difference is larger than USEC_PER_SEC */
1459 usdiff = USEC_PER_SEC;
1461 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1464 * Special case: TSC write with a small delta (1 second) of virtual
1465 * cycle time against real time is interpreted as an attempt to
1466 * synchronize the CPU.
1468 * For a reliable TSC, we can match TSC offsets, and for an unstable
1469 * TSC, we add elapsed time in this computation. We could let the
1470 * compensation code attempt to catch up if we fall behind, but
1471 * it's better to try to match offsets from the beginning.
1473 if (usdiff < USEC_PER_SEC &&
1474 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1475 if (!check_tsc_unstable()) {
1476 offset = kvm->arch.cur_tsc_offset;
1477 pr_debug("kvm: matched tsc offset for %llu\n", data);
1479 u64 delta = nsec_to_cycles(vcpu, elapsed);
1481 offset = kvm_compute_tsc_offset(vcpu, data);
1482 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1485 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1488 * We split periods of matched TSC writes into generations.
1489 * For each generation, we track the original measured
1490 * nanosecond time, offset, and write, so if TSCs are in
1491 * sync, we can match exact offset, and if not, we can match
1492 * exact software computation in compute_guest_tsc()
1494 * These values are tracked in kvm->arch.cur_xxx variables.
1496 kvm->arch.cur_tsc_generation++;
1497 kvm->arch.cur_tsc_nsec = ns;
1498 kvm->arch.cur_tsc_write = data;
1499 kvm->arch.cur_tsc_offset = offset;
1501 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1502 kvm->arch.cur_tsc_generation, data);
1506 * We also track th most recent recorded KHZ, write and time to
1507 * allow the matching interval to be extended at each write.
1509 kvm->arch.last_tsc_nsec = ns;
1510 kvm->arch.last_tsc_write = data;
1511 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1513 vcpu->arch.last_guest_tsc = data;
1515 /* Keep track of which generation this VCPU has synchronized to */
1516 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1517 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1518 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1520 if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1521 update_ia32_tsc_adjust_msr(vcpu, offset);
1522 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1523 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1525 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1527 kvm->arch.nr_vcpus_matched_tsc = 0;
1528 } else if (!already_matched) {
1529 kvm->arch.nr_vcpus_matched_tsc++;
1532 kvm_track_tsc_matching(vcpu);
1533 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1536 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1538 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1541 kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1544 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1546 if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1547 WARN_ON(adjustment < 0);
1548 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1549 kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1552 #ifdef CONFIG_X86_64
1554 static cycle_t read_tsc(void)
1556 cycle_t ret = (cycle_t)rdtsc_ordered();
1557 u64 last = pvclock_gtod_data.clock.cycle_last;
1559 if (likely(ret >= last))
1563 * GCC likes to generate cmov here, but this branch is extremely
1564 * predictable (it's just a funciton of time and the likely is
1565 * very likely) and there's a data dependence, so force GCC
1566 * to generate a branch instead. I don't barrier() because
1567 * we don't actually need a barrier, and if this function
1568 * ever gets inlined it will generate worse code.
1574 static inline u64 vgettsc(cycle_t *cycle_now)
1577 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1579 *cycle_now = read_tsc();
1581 v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1582 return v * gtod->clock.mult;
1585 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1587 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1593 seq = read_seqcount_begin(>od->seq);
1594 mode = gtod->clock.vclock_mode;
1595 ns = gtod->nsec_base;
1596 ns += vgettsc(cycle_now);
1597 ns >>= gtod->clock.shift;
1598 ns += gtod->boot_ns;
1599 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1605 /* returns true if host is using tsc clocksource */
1606 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1608 /* checked again under seqlock below */
1609 if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1612 return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1618 * Assuming a stable TSC across physical CPUS, and a stable TSC
1619 * across virtual CPUs, the following condition is possible.
1620 * Each numbered line represents an event visible to both
1621 * CPUs at the next numbered event.
1623 * "timespecX" represents host monotonic time. "tscX" represents
1626 * VCPU0 on CPU0 | VCPU1 on CPU1
1628 * 1. read timespec0,tsc0
1629 * 2. | timespec1 = timespec0 + N
1631 * 3. transition to guest | transition to guest
1632 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1633 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1634 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1636 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1639 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1641 * - 0 < N - M => M < N
1643 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1644 * always the case (the difference between two distinct xtime instances
1645 * might be smaller then the difference between corresponding TSC reads,
1646 * when updating guest vcpus pvclock areas).
1648 * To avoid that problem, do not allow visibility of distinct
1649 * system_timestamp/tsc_timestamp values simultaneously: use a master
1650 * copy of host monotonic time values. Update that master copy
1653 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1657 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1659 #ifdef CONFIG_X86_64
1660 struct kvm_arch *ka = &kvm->arch;
1662 bool host_tsc_clocksource, vcpus_matched;
1664 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1665 atomic_read(&kvm->online_vcpus));
1668 * If the host uses TSC clock, then passthrough TSC as stable
1671 host_tsc_clocksource = kvm_get_time_and_clockread(
1672 &ka->master_kernel_ns,
1673 &ka->master_cycle_now);
1675 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1676 && !backwards_tsc_observed
1677 && !ka->boot_vcpu_runs_old_kvmclock;
1679 if (ka->use_master_clock)
1680 atomic_set(&kvm_guest_has_master_clock, 1);
1682 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1683 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1688 static void kvm_gen_update_masterclock(struct kvm *kvm)
1690 #ifdef CONFIG_X86_64
1692 struct kvm_vcpu *vcpu;
1693 struct kvm_arch *ka = &kvm->arch;
1695 spin_lock(&ka->pvclock_gtod_sync_lock);
1696 kvm_make_mclock_inprogress_request(kvm);
1697 /* no guest entries from this point */
1698 pvclock_update_vm_gtod_copy(kvm);
1700 kvm_for_each_vcpu(i, vcpu, kvm)
1701 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1703 /* guest entries allowed */
1704 kvm_for_each_vcpu(i, vcpu, kvm)
1705 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1707 spin_unlock(&ka->pvclock_gtod_sync_lock);
1711 static int kvm_guest_time_update(struct kvm_vcpu *v)
1713 unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1714 struct kvm_vcpu_arch *vcpu = &v->arch;
1715 struct kvm_arch *ka = &v->kvm->arch;
1717 u64 tsc_timestamp, host_tsc;
1718 struct pvclock_vcpu_time_info guest_hv_clock;
1720 bool use_master_clock;
1726 * If the host uses TSC clock, then passthrough TSC as stable
1729 spin_lock(&ka->pvclock_gtod_sync_lock);
1730 use_master_clock = ka->use_master_clock;
1731 if (use_master_clock) {
1732 host_tsc = ka->master_cycle_now;
1733 kernel_ns = ka->master_kernel_ns;
1735 spin_unlock(&ka->pvclock_gtod_sync_lock);
1737 /* Keep irq disabled to prevent changes to the clock */
1738 local_irq_save(flags);
1739 this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1740 if (unlikely(this_tsc_khz == 0)) {
1741 local_irq_restore(flags);
1742 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1745 if (!use_master_clock) {
1747 kernel_ns = get_kernel_ns();
1750 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1753 * We may have to catch up the TSC to match elapsed wall clock
1754 * time for two reasons, even if kvmclock is used.
1755 * 1) CPU could have been running below the maximum TSC rate
1756 * 2) Broken TSC compensation resets the base at each VCPU
1757 * entry to avoid unknown leaps of TSC even when running
1758 * again on the same CPU. This may cause apparent elapsed
1759 * time to disappear, and the guest to stand still or run
1762 if (vcpu->tsc_catchup) {
1763 u64 tsc = compute_guest_tsc(v, kernel_ns);
1764 if (tsc > tsc_timestamp) {
1765 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1766 tsc_timestamp = tsc;
1770 local_irq_restore(flags);
1772 if (!vcpu->pv_time_enabled)
1775 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1776 tgt_tsc_khz = kvm_has_tsc_control ?
1777 vcpu->virtual_tsc_khz : this_tsc_khz;
1778 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1779 &vcpu->hv_clock.tsc_shift,
1780 &vcpu->hv_clock.tsc_to_system_mul);
1781 vcpu->hw_tsc_khz = this_tsc_khz;
1784 /* With all the info we got, fill in the values */
1785 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1786 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1787 vcpu->last_guest_tsc = tsc_timestamp;
1789 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1790 &guest_hv_clock, sizeof(guest_hv_clock))))
1793 /* This VCPU is paused, but it's legal for a guest to read another
1794 * VCPU's kvmclock, so we really have to follow the specification where
1795 * it says that version is odd if data is being modified, and even after
1798 * Version field updates must be kept separate. This is because
1799 * kvm_write_guest_cached might use a "rep movs" instruction, and
1800 * writes within a string instruction are weakly ordered. So there
1801 * are three writes overall.
1803 * As a small optimization, only write the version field in the first
1804 * and third write. The vcpu->pv_time cache is still valid, because the
1805 * version field is the first in the struct.
1807 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1809 vcpu->hv_clock.version = guest_hv_clock.version + 1;
1810 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1812 sizeof(vcpu->hv_clock.version));
1816 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1817 pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1819 if (vcpu->pvclock_set_guest_stopped_request) {
1820 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1821 vcpu->pvclock_set_guest_stopped_request = false;
1824 /* If the host uses TSC clocksource, then it is stable */
1825 if (use_master_clock)
1826 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1828 vcpu->hv_clock.flags = pvclock_flags;
1830 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1832 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1834 sizeof(vcpu->hv_clock));
1838 vcpu->hv_clock.version++;
1839 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1841 sizeof(vcpu->hv_clock.version));
1846 * kvmclock updates which are isolated to a given vcpu, such as
1847 * vcpu->cpu migration, should not allow system_timestamp from
1848 * the rest of the vcpus to remain static. Otherwise ntp frequency
1849 * correction applies to one vcpu's system_timestamp but not
1852 * So in those cases, request a kvmclock update for all vcpus.
1853 * We need to rate-limit these requests though, as they can
1854 * considerably slow guests that have a large number of vcpus.
1855 * The time for a remote vcpu to update its kvmclock is bound
1856 * by the delay we use to rate-limit the updates.
1859 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1861 static void kvmclock_update_fn(struct work_struct *work)
1864 struct delayed_work *dwork = to_delayed_work(work);
1865 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1866 kvmclock_update_work);
1867 struct kvm *kvm = container_of(ka, struct kvm, arch);
1868 struct kvm_vcpu *vcpu;
1870 kvm_for_each_vcpu(i, vcpu, kvm) {
1871 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1872 kvm_vcpu_kick(vcpu);
1876 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1878 struct kvm *kvm = v->kvm;
1880 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1881 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1882 KVMCLOCK_UPDATE_DELAY);
1885 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1887 static void kvmclock_sync_fn(struct work_struct *work)
1889 struct delayed_work *dwork = to_delayed_work(work);
1890 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1891 kvmclock_sync_work);
1892 struct kvm *kvm = container_of(ka, struct kvm, arch);
1894 if (!kvmclock_periodic_sync)
1897 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1898 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1899 KVMCLOCK_SYNC_PERIOD);
1902 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1904 u64 mcg_cap = vcpu->arch.mcg_cap;
1905 unsigned bank_num = mcg_cap & 0xff;
1908 case MSR_IA32_MCG_STATUS:
1909 vcpu->arch.mcg_status = data;
1911 case MSR_IA32_MCG_CTL:
1912 if (!(mcg_cap & MCG_CTL_P))
1914 if (data != 0 && data != ~(u64)0)
1916 vcpu->arch.mcg_ctl = data;
1919 if (msr >= MSR_IA32_MC0_CTL &&
1920 msr < MSR_IA32_MCx_CTL(bank_num)) {
1921 u32 offset = msr - MSR_IA32_MC0_CTL;
1922 /* only 0 or all 1s can be written to IA32_MCi_CTL
1923 * some Linux kernels though clear bit 10 in bank 4 to
1924 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1925 * this to avoid an uncatched #GP in the guest
1927 if ((offset & 0x3) == 0 &&
1928 data != 0 && (data | (1 << 10)) != ~(u64)0)
1930 vcpu->arch.mce_banks[offset] = data;
1938 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1940 struct kvm *kvm = vcpu->kvm;
1941 int lm = is_long_mode(vcpu);
1942 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1943 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1944 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1945 : kvm->arch.xen_hvm_config.blob_size_32;
1946 u32 page_num = data & ~PAGE_MASK;
1947 u64 page_addr = data & PAGE_MASK;
1952 if (page_num >= blob_size)
1955 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1960 if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1969 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1971 gpa_t gpa = data & ~0x3f;
1973 /* Bits 2:5 are reserved, Should be zero */
1977 vcpu->arch.apf.msr_val = data;
1979 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1980 kvm_clear_async_pf_completion_queue(vcpu);
1981 kvm_async_pf_hash_reset(vcpu);
1985 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1989 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1990 kvm_async_pf_wakeup_all(vcpu);
1994 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1996 vcpu->arch.pv_time_enabled = false;
1999 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2003 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2006 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2007 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2008 vcpu->arch.st.accum_steal = delta;
2011 static void record_steal_time(struct kvm_vcpu *vcpu)
2013 accumulate_steal_time(vcpu);
2015 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2018 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2019 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2022 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2023 vcpu->arch.st.steal.version += 2;
2024 vcpu->arch.st.accum_steal = 0;
2026 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2027 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2030 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2033 u32 msr = msr_info->index;
2034 u64 data = msr_info->data;
2037 case MSR_AMD64_NB_CFG:
2038 case MSR_IA32_UCODE_REV:
2039 case MSR_IA32_UCODE_WRITE:
2040 case MSR_VM_HSAVE_PA:
2041 case MSR_AMD64_PATCH_LOADER:
2042 case MSR_AMD64_BU_CFG2:
2046 return set_efer(vcpu, data);
2048 data &= ~(u64)0x40; /* ignore flush filter disable */
2049 data &= ~(u64)0x100; /* ignore ignne emulation enable */
2050 data &= ~(u64)0x8; /* ignore TLB cache disable */
2051 data &= ~(u64)0x40000; /* ignore Mc status write enable */
2053 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2058 case MSR_FAM10H_MMIO_CONF_BASE:
2060 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2065 case MSR_IA32_DEBUGCTLMSR:
2067 /* We support the non-activated case already */
2069 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2070 /* Values other than LBR and BTF are vendor-specific,
2071 thus reserved and should throw a #GP */
2074 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2077 case 0x200 ... 0x2ff:
2078 return kvm_mtrr_set_msr(vcpu, msr, data);
2079 case MSR_IA32_APICBASE:
2080 return kvm_set_apic_base(vcpu, msr_info);
2081 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2082 return kvm_x2apic_msr_write(vcpu, msr, data);
2083 case MSR_IA32_TSCDEADLINE:
2084 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2086 case MSR_IA32_TSC_ADJUST:
2087 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2088 if (!msr_info->host_initiated) {
2089 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2090 adjust_tsc_offset_guest(vcpu, adj);
2092 vcpu->arch.ia32_tsc_adjust_msr = data;
2095 case MSR_IA32_MISC_ENABLE:
2096 vcpu->arch.ia32_misc_enable_msr = data;
2098 case MSR_IA32_SMBASE:
2099 if (!msr_info->host_initiated)
2101 vcpu->arch.smbase = data;
2103 case MSR_KVM_WALL_CLOCK_NEW:
2104 case MSR_KVM_WALL_CLOCK:
2105 vcpu->kvm->arch.wall_clock = data;
2106 kvm_write_wall_clock(vcpu->kvm, data);
2108 case MSR_KVM_SYSTEM_TIME_NEW:
2109 case MSR_KVM_SYSTEM_TIME: {
2111 struct kvm_arch *ka = &vcpu->kvm->arch;
2113 kvmclock_reset(vcpu);
2115 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2116 bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2118 if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2119 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2122 ka->boot_vcpu_runs_old_kvmclock = tmp;
2125 vcpu->arch.time = data;
2126 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2128 /* we verify if the enable bit is set... */
2132 gpa_offset = data & ~(PAGE_MASK | 1);
2134 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2135 &vcpu->arch.pv_time, data & ~1ULL,
2136 sizeof(struct pvclock_vcpu_time_info)))
2137 vcpu->arch.pv_time_enabled = false;
2139 vcpu->arch.pv_time_enabled = true;
2143 case MSR_KVM_ASYNC_PF_EN:
2144 if (kvm_pv_enable_async_pf(vcpu, data))
2147 case MSR_KVM_STEAL_TIME:
2149 if (unlikely(!sched_info_on()))
2152 if (data & KVM_STEAL_RESERVED_MASK)
2155 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2156 data & KVM_STEAL_VALID_BITS,
2157 sizeof(struct kvm_steal_time)))
2160 vcpu->arch.st.msr_val = data;
2162 if (!(data & KVM_MSR_ENABLED))
2165 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2168 case MSR_KVM_PV_EOI_EN:
2169 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2173 case MSR_IA32_MCG_CTL:
2174 case MSR_IA32_MCG_STATUS:
2175 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2176 return set_msr_mce(vcpu, msr, data);
2178 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2179 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2180 pr = true; /* fall through */
2181 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2182 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2183 if (kvm_pmu_is_valid_msr(vcpu, msr))
2184 return kvm_pmu_set_msr(vcpu, msr_info);
2186 if (pr || data != 0)
2187 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2188 "0x%x data 0x%llx\n", msr, data);
2190 case MSR_K7_CLK_CTL:
2192 * Ignore all writes to this no longer documented MSR.
2193 * Writes are only relevant for old K7 processors,
2194 * all pre-dating SVM, but a recommended workaround from
2195 * AMD for these chips. It is possible to specify the
2196 * affected processor models on the command line, hence
2197 * the need to ignore the workaround.
2200 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2201 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2202 case HV_X64_MSR_CRASH_CTL:
2203 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2204 return kvm_hv_set_msr_common(vcpu, msr, data,
2205 msr_info->host_initiated);
2206 case MSR_IA32_BBL_CR_CTL3:
2207 /* Drop writes to this legacy MSR -- see rdmsr
2208 * counterpart for further detail.
2210 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2212 case MSR_AMD64_OSVW_ID_LENGTH:
2213 if (!guest_cpuid_has_osvw(vcpu))
2215 vcpu->arch.osvw.length = data;
2217 case MSR_AMD64_OSVW_STATUS:
2218 if (!guest_cpuid_has_osvw(vcpu))
2220 vcpu->arch.osvw.status = data;
2223 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2224 return xen_hvm_config(vcpu, data);
2225 if (kvm_pmu_is_valid_msr(vcpu, msr))
2226 return kvm_pmu_set_msr(vcpu, msr_info);
2228 vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2232 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2239 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2243 * Reads an msr value (of 'msr_index') into 'pdata'.
2244 * Returns 0 on success, non-0 otherwise.
2245 * Assumes vcpu_load() was already called.
2247 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2249 return kvm_x86_ops->get_msr(vcpu, msr);
2251 EXPORT_SYMBOL_GPL(kvm_get_msr);
2253 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2256 u64 mcg_cap = vcpu->arch.mcg_cap;
2257 unsigned bank_num = mcg_cap & 0xff;
2260 case MSR_IA32_P5_MC_ADDR:
2261 case MSR_IA32_P5_MC_TYPE:
2264 case MSR_IA32_MCG_CAP:
2265 data = vcpu->arch.mcg_cap;
2267 case MSR_IA32_MCG_CTL:
2268 if (!(mcg_cap & MCG_CTL_P))
2270 data = vcpu->arch.mcg_ctl;
2272 case MSR_IA32_MCG_STATUS:
2273 data = vcpu->arch.mcg_status;
2276 if (msr >= MSR_IA32_MC0_CTL &&
2277 msr < MSR_IA32_MCx_CTL(bank_num)) {
2278 u32 offset = msr - MSR_IA32_MC0_CTL;
2279 data = vcpu->arch.mce_banks[offset];
2288 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2290 switch (msr_info->index) {
2291 case MSR_IA32_PLATFORM_ID:
2292 case MSR_IA32_EBL_CR_POWERON:
2293 case MSR_IA32_DEBUGCTLMSR:
2294 case MSR_IA32_LASTBRANCHFROMIP:
2295 case MSR_IA32_LASTBRANCHTOIP:
2296 case MSR_IA32_LASTINTFROMIP:
2297 case MSR_IA32_LASTINTTOIP:
2299 case MSR_K8_TSEG_ADDR:
2300 case MSR_K8_TSEG_MASK:
2302 case MSR_VM_HSAVE_PA:
2303 case MSR_K8_INT_PENDING_MSG:
2304 case MSR_AMD64_NB_CFG:
2305 case MSR_FAM10H_MMIO_CONF_BASE:
2306 case MSR_AMD64_BU_CFG2:
2309 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2310 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2311 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2312 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2313 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2314 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2317 case MSR_IA32_UCODE_REV:
2318 msr_info->data = 0x100000000ULL;
2321 case 0x200 ... 0x2ff:
2322 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2323 case 0xcd: /* fsb frequency */
2327 * MSR_EBC_FREQUENCY_ID
2328 * Conservative value valid for even the basic CPU models.
2329 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2330 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2331 * and 266MHz for model 3, or 4. Set Core Clock
2332 * Frequency to System Bus Frequency Ratio to 1 (bits
2333 * 31:24) even though these are only valid for CPU
2334 * models > 2, however guests may end up dividing or
2335 * multiplying by zero otherwise.
2337 case MSR_EBC_FREQUENCY_ID:
2338 msr_info->data = 1 << 24;
2340 case MSR_IA32_APICBASE:
2341 msr_info->data = kvm_get_apic_base(vcpu);
2343 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2344 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2346 case MSR_IA32_TSCDEADLINE:
2347 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2349 case MSR_IA32_TSC_ADJUST:
2350 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2352 case MSR_IA32_MISC_ENABLE:
2353 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2355 case MSR_IA32_SMBASE:
2356 if (!msr_info->host_initiated)
2358 msr_info->data = vcpu->arch.smbase;
2360 case MSR_IA32_PERF_STATUS:
2361 /* TSC increment by tick */
2362 msr_info->data = 1000ULL;
2363 /* CPU multiplier */
2364 msr_info->data |= (((uint64_t)4ULL) << 40);
2367 msr_info->data = vcpu->arch.efer;
2369 case MSR_KVM_WALL_CLOCK:
2370 case MSR_KVM_WALL_CLOCK_NEW:
2371 msr_info->data = vcpu->kvm->arch.wall_clock;
2373 case MSR_KVM_SYSTEM_TIME:
2374 case MSR_KVM_SYSTEM_TIME_NEW:
2375 msr_info->data = vcpu->arch.time;
2377 case MSR_KVM_ASYNC_PF_EN:
2378 msr_info->data = vcpu->arch.apf.msr_val;
2380 case MSR_KVM_STEAL_TIME:
2381 msr_info->data = vcpu->arch.st.msr_val;
2383 case MSR_KVM_PV_EOI_EN:
2384 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2386 case MSR_IA32_P5_MC_ADDR:
2387 case MSR_IA32_P5_MC_TYPE:
2388 case MSR_IA32_MCG_CAP:
2389 case MSR_IA32_MCG_CTL:
2390 case MSR_IA32_MCG_STATUS:
2391 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2392 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2393 case MSR_K7_CLK_CTL:
2395 * Provide expected ramp-up count for K7. All other
2396 * are set to zero, indicating minimum divisors for
2399 * This prevents guest kernels on AMD host with CPU
2400 * type 6, model 8 and higher from exploding due to
2401 * the rdmsr failing.
2403 msr_info->data = 0x20000000;
2405 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2406 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2407 case HV_X64_MSR_CRASH_CTL:
2408 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2409 return kvm_hv_get_msr_common(vcpu,
2410 msr_info->index, &msr_info->data);
2412 case MSR_IA32_BBL_CR_CTL3:
2413 /* This legacy MSR exists but isn't fully documented in current
2414 * silicon. It is however accessed by winxp in very narrow
2415 * scenarios where it sets bit #19, itself documented as
2416 * a "reserved" bit. Best effort attempt to source coherent
2417 * read data here should the balance of the register be
2418 * interpreted by the guest:
2420 * L2 cache control register 3: 64GB range, 256KB size,
2421 * enabled, latency 0x1, configured
2423 msr_info->data = 0xbe702111;
2425 case MSR_AMD64_OSVW_ID_LENGTH:
2426 if (!guest_cpuid_has_osvw(vcpu))
2428 msr_info->data = vcpu->arch.osvw.length;
2430 case MSR_AMD64_OSVW_STATUS:
2431 if (!guest_cpuid_has_osvw(vcpu))
2433 msr_info->data = vcpu->arch.osvw.status;
2436 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2437 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2439 vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2442 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2449 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2452 * Read or write a bunch of msrs. All parameters are kernel addresses.
2454 * @return number of msrs set successfully.
2456 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2457 struct kvm_msr_entry *entries,
2458 int (*do_msr)(struct kvm_vcpu *vcpu,
2459 unsigned index, u64 *data))
2463 idx = srcu_read_lock(&vcpu->kvm->srcu);
2464 for (i = 0; i < msrs->nmsrs; ++i)
2465 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2467 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2473 * Read or write a bunch of msrs. Parameters are user addresses.
2475 * @return number of msrs set successfully.
2477 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2478 int (*do_msr)(struct kvm_vcpu *vcpu,
2479 unsigned index, u64 *data),
2482 struct kvm_msrs msrs;
2483 struct kvm_msr_entry *entries;
2488 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2492 if (msrs.nmsrs >= MAX_IO_MSRS)
2495 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2496 entries = memdup_user(user_msrs->entries, size);
2497 if (IS_ERR(entries)) {
2498 r = PTR_ERR(entries);
2502 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2507 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2518 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2523 case KVM_CAP_IRQCHIP:
2525 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2526 case KVM_CAP_SET_TSS_ADDR:
2527 case KVM_CAP_EXT_CPUID:
2528 case KVM_CAP_EXT_EMUL_CPUID:
2529 case KVM_CAP_CLOCKSOURCE:
2531 case KVM_CAP_NOP_IO_DELAY:
2532 case KVM_CAP_MP_STATE:
2533 case KVM_CAP_SYNC_MMU:
2534 case KVM_CAP_USER_NMI:
2535 case KVM_CAP_REINJECT_CONTROL:
2536 case KVM_CAP_IRQ_INJECT_STATUS:
2537 case KVM_CAP_IOEVENTFD:
2538 case KVM_CAP_IOEVENTFD_NO_LENGTH:
2540 case KVM_CAP_PIT_STATE2:
2541 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2542 case KVM_CAP_XEN_HVM:
2543 case KVM_CAP_ADJUST_CLOCK:
2544 case KVM_CAP_VCPU_EVENTS:
2545 case KVM_CAP_HYPERV:
2546 case KVM_CAP_HYPERV_VAPIC:
2547 case KVM_CAP_HYPERV_SPIN:
2548 case KVM_CAP_HYPERV_SYNIC:
2549 case KVM_CAP_PCI_SEGMENT:
2550 case KVM_CAP_DEBUGREGS:
2551 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2553 case KVM_CAP_ASYNC_PF:
2554 case KVM_CAP_GET_TSC_KHZ:
2555 case KVM_CAP_KVMCLOCK_CTRL:
2556 case KVM_CAP_READONLY_MEM:
2557 case KVM_CAP_HYPERV_TIME:
2558 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2559 case KVM_CAP_TSC_DEADLINE_TIMER:
2560 case KVM_CAP_ENABLE_CAP_VM:
2561 case KVM_CAP_DISABLE_QUIRKS:
2562 case KVM_CAP_SET_BOOT_CPU_ID:
2563 case KVM_CAP_SPLIT_IRQCHIP:
2564 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2565 case KVM_CAP_ASSIGN_DEV_IRQ:
2566 case KVM_CAP_PCI_2_3:
2570 case KVM_CAP_X86_SMM:
2571 /* SMBASE is usually relocated above 1M on modern chipsets,
2572 * and SMM handlers might indeed rely on 4G segment limits,
2573 * so do not report SMM to be available if real mode is
2574 * emulated via vm86 mode. Still, do not go to great lengths
2575 * to avoid userspace's usage of the feature, because it is a
2576 * fringe case that is not enabled except via specific settings
2577 * of the module parameters.
2579 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2581 case KVM_CAP_COALESCED_MMIO:
2582 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2585 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2587 case KVM_CAP_NR_VCPUS:
2588 r = KVM_SOFT_MAX_VCPUS;
2590 case KVM_CAP_MAX_VCPUS:
2593 case KVM_CAP_NR_MEMSLOTS:
2594 r = KVM_USER_MEM_SLOTS;
2596 case KVM_CAP_PV_MMU: /* obsolete */
2599 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2601 r = iommu_present(&pci_bus_type);
2605 r = KVM_MAX_MCE_BANKS;
2610 case KVM_CAP_TSC_CONTROL:
2611 r = kvm_has_tsc_control;
2621 long kvm_arch_dev_ioctl(struct file *filp,
2622 unsigned int ioctl, unsigned long arg)
2624 void __user *argp = (void __user *)arg;
2628 case KVM_GET_MSR_INDEX_LIST: {
2629 struct kvm_msr_list __user *user_msr_list = argp;
2630 struct kvm_msr_list msr_list;
2634 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2637 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2638 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2641 if (n < msr_list.nmsrs)
2644 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2645 num_msrs_to_save * sizeof(u32)))
2647 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2649 num_emulated_msrs * sizeof(u32)))
2654 case KVM_GET_SUPPORTED_CPUID:
2655 case KVM_GET_EMULATED_CPUID: {
2656 struct kvm_cpuid2 __user *cpuid_arg = argp;
2657 struct kvm_cpuid2 cpuid;
2660 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2663 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2669 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2674 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2677 mce_cap = KVM_MCE_CAP_SUPPORTED;
2679 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2691 static void wbinvd_ipi(void *garbage)
2696 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2698 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2701 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2703 /* Address WBINVD may be executed by guest */
2704 if (need_emulate_wbinvd(vcpu)) {
2705 if (kvm_x86_ops->has_wbinvd_exit())
2706 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2707 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2708 smp_call_function_single(vcpu->cpu,
2709 wbinvd_ipi, NULL, 1);
2712 kvm_x86_ops->vcpu_load(vcpu, cpu);
2714 /* Apply any externally detected TSC adjustments (due to suspend) */
2715 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2716 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2717 vcpu->arch.tsc_offset_adjustment = 0;
2718 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2721 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2722 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2723 rdtsc() - vcpu->arch.last_host_tsc;
2725 mark_tsc_unstable("KVM discovered backwards TSC");
2726 if (check_tsc_unstable()) {
2727 u64 offset = kvm_compute_tsc_offset(vcpu,
2728 vcpu->arch.last_guest_tsc);
2729 kvm_x86_ops->write_tsc_offset(vcpu, offset);
2730 vcpu->arch.tsc_catchup = 1;
2733 * On a host with synchronized TSC, there is no need to update
2734 * kvmclock on vcpu->cpu migration
2736 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2737 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2738 if (vcpu->cpu != cpu)
2739 kvm_migrate_timers(vcpu);
2743 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2746 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2748 kvm_x86_ops->vcpu_put(vcpu);
2749 kvm_put_guest_fpu(vcpu);
2750 vcpu->arch.last_host_tsc = rdtsc();
2753 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2754 struct kvm_lapic_state *s)
2756 if (vcpu->arch.apicv_active)
2757 kvm_x86_ops->sync_pir_to_irr(vcpu);
2759 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2764 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2765 struct kvm_lapic_state *s)
2767 kvm_apic_post_state_restore(vcpu, s);
2768 update_cr8_intercept(vcpu);
2773 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2775 return (!lapic_in_kernel(vcpu) ||
2776 kvm_apic_accept_pic_intr(vcpu));
2780 * if userspace requested an interrupt window, check that the
2781 * interrupt window is open.
2783 * No need to exit to userspace if we already have an interrupt queued.
2785 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2787 return kvm_arch_interrupt_allowed(vcpu) &&
2788 !kvm_cpu_has_interrupt(vcpu) &&
2789 !kvm_event_needs_reinjection(vcpu) &&
2790 kvm_cpu_accept_dm_intr(vcpu);
2793 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2794 struct kvm_interrupt *irq)
2796 if (irq->irq >= KVM_NR_INTERRUPTS)
2799 if (!irqchip_in_kernel(vcpu->kvm)) {
2800 kvm_queue_interrupt(vcpu, irq->irq, false);
2801 kvm_make_request(KVM_REQ_EVENT, vcpu);
2806 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2807 * fail for in-kernel 8259.
2809 if (pic_in_kernel(vcpu->kvm))
2812 if (vcpu->arch.pending_external_vector != -1)
2815 vcpu->arch.pending_external_vector = irq->irq;
2816 kvm_make_request(KVM_REQ_EVENT, vcpu);
2820 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2822 kvm_inject_nmi(vcpu);
2827 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2829 kvm_make_request(KVM_REQ_SMI, vcpu);
2834 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2835 struct kvm_tpr_access_ctl *tac)
2839 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2843 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2847 unsigned bank_num = mcg_cap & 0xff, bank;
2850 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2852 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2855 vcpu->arch.mcg_cap = mcg_cap;
2856 /* Init IA32_MCG_CTL to all 1s */
2857 if (mcg_cap & MCG_CTL_P)
2858 vcpu->arch.mcg_ctl = ~(u64)0;
2859 /* Init IA32_MCi_CTL to all 1s */
2860 for (bank = 0; bank < bank_num; bank++)
2861 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2866 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2867 struct kvm_x86_mce *mce)
2869 u64 mcg_cap = vcpu->arch.mcg_cap;
2870 unsigned bank_num = mcg_cap & 0xff;
2871 u64 *banks = vcpu->arch.mce_banks;
2873 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2876 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2877 * reporting is disabled
2879 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2880 vcpu->arch.mcg_ctl != ~(u64)0)
2882 banks += 4 * mce->bank;
2884 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2885 * reporting is disabled for the bank
2887 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2889 if (mce->status & MCI_STATUS_UC) {
2890 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2891 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2892 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2895 if (banks[1] & MCI_STATUS_VAL)
2896 mce->status |= MCI_STATUS_OVER;
2897 banks[2] = mce->addr;
2898 banks[3] = mce->misc;
2899 vcpu->arch.mcg_status = mce->mcg_status;
2900 banks[1] = mce->status;
2901 kvm_queue_exception(vcpu, MC_VECTOR);
2902 } else if (!(banks[1] & MCI_STATUS_VAL)
2903 || !(banks[1] & MCI_STATUS_UC)) {
2904 if (banks[1] & MCI_STATUS_VAL)
2905 mce->status |= MCI_STATUS_OVER;
2906 banks[2] = mce->addr;
2907 banks[3] = mce->misc;
2908 banks[1] = mce->status;
2910 banks[1] |= MCI_STATUS_OVER;
2914 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2915 struct kvm_vcpu_events *events)
2918 events->exception.injected =
2919 vcpu->arch.exception.pending &&
2920 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2921 events->exception.nr = vcpu->arch.exception.nr;
2922 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2923 events->exception.pad = 0;
2924 events->exception.error_code = vcpu->arch.exception.error_code;
2926 events->interrupt.injected =
2927 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2928 events->interrupt.nr = vcpu->arch.interrupt.nr;
2929 events->interrupt.soft = 0;
2930 events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2932 events->nmi.injected = vcpu->arch.nmi_injected;
2933 events->nmi.pending = vcpu->arch.nmi_pending != 0;
2934 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2935 events->nmi.pad = 0;
2937 events->sipi_vector = 0; /* never valid when reporting to user space */
2939 events->smi.smm = is_smm(vcpu);
2940 events->smi.pending = vcpu->arch.smi_pending;
2941 events->smi.smm_inside_nmi =
2942 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2943 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2945 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2946 | KVM_VCPUEVENT_VALID_SHADOW
2947 | KVM_VCPUEVENT_VALID_SMM);
2948 memset(&events->reserved, 0, sizeof(events->reserved));
2951 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2952 struct kvm_vcpu_events *events)
2954 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2955 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2956 | KVM_VCPUEVENT_VALID_SHADOW
2957 | KVM_VCPUEVENT_VALID_SMM))
2961 vcpu->arch.exception.pending = events->exception.injected;
2962 vcpu->arch.exception.nr = events->exception.nr;
2963 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2964 vcpu->arch.exception.error_code = events->exception.error_code;
2966 vcpu->arch.interrupt.pending = events->interrupt.injected;
2967 vcpu->arch.interrupt.nr = events->interrupt.nr;
2968 vcpu->arch.interrupt.soft = events->interrupt.soft;
2969 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2970 kvm_x86_ops->set_interrupt_shadow(vcpu,
2971 events->interrupt.shadow);
2973 vcpu->arch.nmi_injected = events->nmi.injected;
2974 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2975 vcpu->arch.nmi_pending = events->nmi.pending;
2976 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2978 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2979 kvm_vcpu_has_lapic(vcpu))
2980 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2982 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2983 if (events->smi.smm)
2984 vcpu->arch.hflags |= HF_SMM_MASK;
2986 vcpu->arch.hflags &= ~HF_SMM_MASK;
2987 vcpu->arch.smi_pending = events->smi.pending;
2988 if (events->smi.smm_inside_nmi)
2989 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2991 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2992 if (kvm_vcpu_has_lapic(vcpu)) {
2993 if (events->smi.latched_init)
2994 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2996 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3000 kvm_make_request(KVM_REQ_EVENT, vcpu);
3005 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3006 struct kvm_debugregs *dbgregs)
3010 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3011 kvm_get_dr(vcpu, 6, &val);
3013 dbgregs->dr7 = vcpu->arch.dr7;
3015 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3018 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3019 struct kvm_debugregs *dbgregs)
3024 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3025 kvm_update_dr0123(vcpu);
3026 vcpu->arch.dr6 = dbgregs->dr6;
3027 kvm_update_dr6(vcpu);
3028 vcpu->arch.dr7 = dbgregs->dr7;
3029 kvm_update_dr7(vcpu);
3034 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3036 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3038 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3039 u64 xstate_bv = xsave->header.xfeatures;
3043 * Copy legacy XSAVE area, to avoid complications with CPUID
3044 * leaves 0 and 1 in the loop below.
3046 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3049 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3052 * Copy each region from the possibly compacted offset to the
3053 * non-compacted offset.
3055 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3057 u64 feature = valid & -valid;
3058 int index = fls64(feature) - 1;
3059 void *src = get_xsave_addr(xsave, feature);
3062 u32 size, offset, ecx, edx;
3063 cpuid_count(XSTATE_CPUID, index,
3064 &size, &offset, &ecx, &edx);
3065 memcpy(dest + offset, src, size);
3072 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3074 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3075 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3079 * Copy legacy XSAVE area, to avoid complications with CPUID
3080 * leaves 0 and 1 in the loop below.
3082 memcpy(xsave, src, XSAVE_HDR_OFFSET);
3084 /* Set XSTATE_BV and possibly XCOMP_BV. */
3085 xsave->header.xfeatures = xstate_bv;
3087 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3090 * Copy each region from the non-compacted offset to the
3091 * possibly compacted offset.
3093 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3095 u64 feature = valid & -valid;
3096 int index = fls64(feature) - 1;
3097 void *dest = get_xsave_addr(xsave, feature);
3100 u32 size, offset, ecx, edx;
3101 cpuid_count(XSTATE_CPUID, index,
3102 &size, &offset, &ecx, &edx);
3103 memcpy(dest, src + offset, size);
3110 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3111 struct kvm_xsave *guest_xsave)
3113 if (cpu_has_xsave) {
3114 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3115 fill_xsave((u8 *) guest_xsave->region, vcpu);
3117 memcpy(guest_xsave->region,
3118 &vcpu->arch.guest_fpu.state.fxsave,
3119 sizeof(struct fxregs_state));
3120 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3121 XFEATURE_MASK_FPSSE;
3125 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3126 struct kvm_xsave *guest_xsave)
3129 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3131 if (cpu_has_xsave) {
3133 * Here we allow setting states that are not present in
3134 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3135 * with old userspace.
3137 if (xstate_bv & ~kvm_supported_xcr0())
3139 load_xsave(vcpu, (u8 *)guest_xsave->region);
3141 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3143 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3144 guest_xsave->region, sizeof(struct fxregs_state));
3149 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3150 struct kvm_xcrs *guest_xcrs)
3152 if (!cpu_has_xsave) {
3153 guest_xcrs->nr_xcrs = 0;
3157 guest_xcrs->nr_xcrs = 1;
3158 guest_xcrs->flags = 0;
3159 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3160 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3163 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3164 struct kvm_xcrs *guest_xcrs)
3171 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3174 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3175 /* Only support XCR0 currently */
3176 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3177 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3178 guest_xcrs->xcrs[i].value);
3187 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3188 * stopped by the hypervisor. This function will be called from the host only.
3189 * EINVAL is returned when the host attempts to set the flag for a guest that
3190 * does not support pv clocks.
3192 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3194 if (!vcpu->arch.pv_time_enabled)
3196 vcpu->arch.pvclock_set_guest_stopped_request = true;
3197 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3201 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3202 struct kvm_enable_cap *cap)
3208 case KVM_CAP_HYPERV_SYNIC:
3209 return kvm_hv_activate_synic(vcpu);
3215 long kvm_arch_vcpu_ioctl(struct file *filp,
3216 unsigned int ioctl, unsigned long arg)
3218 struct kvm_vcpu *vcpu = filp->private_data;
3219 void __user *argp = (void __user *)arg;
3222 struct kvm_lapic_state *lapic;
3223 struct kvm_xsave *xsave;
3224 struct kvm_xcrs *xcrs;
3230 case KVM_GET_LAPIC: {
3232 if (!vcpu->arch.apic)
3234 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3239 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3243 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3248 case KVM_SET_LAPIC: {
3250 if (!vcpu->arch.apic)
3252 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3253 if (IS_ERR(u.lapic))
3254 return PTR_ERR(u.lapic);
3256 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3259 case KVM_INTERRUPT: {
3260 struct kvm_interrupt irq;
3263 if (copy_from_user(&irq, argp, sizeof irq))
3265 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3269 r = kvm_vcpu_ioctl_nmi(vcpu);
3273 r = kvm_vcpu_ioctl_smi(vcpu);
3276 case KVM_SET_CPUID: {
3277 struct kvm_cpuid __user *cpuid_arg = argp;
3278 struct kvm_cpuid cpuid;
3281 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3283 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3286 case KVM_SET_CPUID2: {
3287 struct kvm_cpuid2 __user *cpuid_arg = argp;
3288 struct kvm_cpuid2 cpuid;
3291 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3293 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3294 cpuid_arg->entries);
3297 case KVM_GET_CPUID2: {
3298 struct kvm_cpuid2 __user *cpuid_arg = argp;
3299 struct kvm_cpuid2 cpuid;
3302 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3304 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3305 cpuid_arg->entries);
3309 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3315 r = msr_io(vcpu, argp, do_get_msr, 1);
3318 r = msr_io(vcpu, argp, do_set_msr, 0);
3320 case KVM_TPR_ACCESS_REPORTING: {
3321 struct kvm_tpr_access_ctl tac;
3324 if (copy_from_user(&tac, argp, sizeof tac))
3326 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3330 if (copy_to_user(argp, &tac, sizeof tac))
3335 case KVM_SET_VAPIC_ADDR: {
3336 struct kvm_vapic_addr va;
3339 if (!lapic_in_kernel(vcpu))
3342 if (copy_from_user(&va, argp, sizeof va))
3344 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3347 case KVM_X86_SETUP_MCE: {
3351 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3353 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3356 case KVM_X86_SET_MCE: {
3357 struct kvm_x86_mce mce;
3360 if (copy_from_user(&mce, argp, sizeof mce))
3362 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3365 case KVM_GET_VCPU_EVENTS: {
3366 struct kvm_vcpu_events events;
3368 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3371 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3376 case KVM_SET_VCPU_EVENTS: {
3377 struct kvm_vcpu_events events;
3380 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3383 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3386 case KVM_GET_DEBUGREGS: {
3387 struct kvm_debugregs dbgregs;
3389 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3392 if (copy_to_user(argp, &dbgregs,
3393 sizeof(struct kvm_debugregs)))
3398 case KVM_SET_DEBUGREGS: {
3399 struct kvm_debugregs dbgregs;
3402 if (copy_from_user(&dbgregs, argp,
3403 sizeof(struct kvm_debugregs)))
3406 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3409 case KVM_GET_XSAVE: {
3410 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3415 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3418 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3423 case KVM_SET_XSAVE: {
3424 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3425 if (IS_ERR(u.xsave))
3426 return PTR_ERR(u.xsave);
3428 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3431 case KVM_GET_XCRS: {
3432 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3437 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3440 if (copy_to_user(argp, u.xcrs,
3441 sizeof(struct kvm_xcrs)))
3446 case KVM_SET_XCRS: {
3447 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3449 return PTR_ERR(u.xcrs);
3451 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3454 case KVM_SET_TSC_KHZ: {
3458 user_tsc_khz = (u32)arg;
3460 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3463 if (user_tsc_khz == 0)
3464 user_tsc_khz = tsc_khz;
3466 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3471 case KVM_GET_TSC_KHZ: {
3472 r = vcpu->arch.virtual_tsc_khz;
3475 case KVM_KVMCLOCK_CTRL: {
3476 r = kvm_set_guest_paused(vcpu);
3479 case KVM_ENABLE_CAP: {
3480 struct kvm_enable_cap cap;
3483 if (copy_from_user(&cap, argp, sizeof(cap)))
3485 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3496 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3498 return VM_FAULT_SIGBUS;
3501 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3505 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3507 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3511 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3514 kvm->arch.ept_identity_map_addr = ident_addr;
3518 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3519 u32 kvm_nr_mmu_pages)
3521 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3524 mutex_lock(&kvm->slots_lock);
3526 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3527 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3529 mutex_unlock(&kvm->slots_lock);
3533 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3535 return kvm->arch.n_max_mmu_pages;
3538 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3543 switch (chip->chip_id) {
3544 case KVM_IRQCHIP_PIC_MASTER:
3545 memcpy(&chip->chip.pic,
3546 &pic_irqchip(kvm)->pics[0],
3547 sizeof(struct kvm_pic_state));
3549 case KVM_IRQCHIP_PIC_SLAVE:
3550 memcpy(&chip->chip.pic,
3551 &pic_irqchip(kvm)->pics[1],
3552 sizeof(struct kvm_pic_state));
3554 case KVM_IRQCHIP_IOAPIC:
3555 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3564 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3569 switch (chip->chip_id) {
3570 case KVM_IRQCHIP_PIC_MASTER:
3571 spin_lock(&pic_irqchip(kvm)->lock);
3572 memcpy(&pic_irqchip(kvm)->pics[0],
3574 sizeof(struct kvm_pic_state));
3575 spin_unlock(&pic_irqchip(kvm)->lock);
3577 case KVM_IRQCHIP_PIC_SLAVE:
3578 spin_lock(&pic_irqchip(kvm)->lock);
3579 memcpy(&pic_irqchip(kvm)->pics[1],
3581 sizeof(struct kvm_pic_state));
3582 spin_unlock(&pic_irqchip(kvm)->lock);
3584 case KVM_IRQCHIP_IOAPIC:
3585 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3591 kvm_pic_update_irq(pic_irqchip(kvm));
3595 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3597 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3598 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3599 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3603 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3605 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3606 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3607 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3608 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3612 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3614 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3615 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3616 sizeof(ps->channels));
3617 ps->flags = kvm->arch.vpit->pit_state.flags;
3618 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3619 memset(&ps->reserved, 0, sizeof(ps->reserved));
3623 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3626 u32 prev_legacy, cur_legacy;
3627 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3628 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3629 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3630 if (!prev_legacy && cur_legacy)
3632 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3633 sizeof(kvm->arch.vpit->pit_state.channels));
3634 kvm->arch.vpit->pit_state.flags = ps->flags;
3635 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3636 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3640 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3641 struct kvm_reinject_control *control)
3643 if (!kvm->arch.vpit)
3645 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3646 kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3647 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3652 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3653 * @kvm: kvm instance
3654 * @log: slot id and address to which we copy the log
3656 * Steps 1-4 below provide general overview of dirty page logging. See
3657 * kvm_get_dirty_log_protect() function description for additional details.
3659 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3660 * always flush the TLB (step 4) even if previous step failed and the dirty
3661 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3662 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3663 * writes will be marked dirty for next log read.
3665 * 1. Take a snapshot of the bit and clear it if needed.
3666 * 2. Write protect the corresponding page.
3667 * 3. Copy the snapshot to the userspace.
3668 * 4. Flush TLB's if needed.
3670 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3672 bool is_dirty = false;
3675 mutex_lock(&kvm->slots_lock);
3678 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3680 if (kvm_x86_ops->flush_log_dirty)
3681 kvm_x86_ops->flush_log_dirty(kvm);
3683 r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3686 * All the TLBs can be flushed out of mmu lock, see the comments in
3687 * kvm_mmu_slot_remove_write_access().
3689 lockdep_assert_held(&kvm->slots_lock);
3691 kvm_flush_remote_tlbs(kvm);
3693 mutex_unlock(&kvm->slots_lock);
3697 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3700 if (!irqchip_in_kernel(kvm))
3703 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3704 irq_event->irq, irq_event->level,
3709 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3710 struct kvm_enable_cap *cap)
3718 case KVM_CAP_DISABLE_QUIRKS:
3719 kvm->arch.disabled_quirks = cap->args[0];
3722 case KVM_CAP_SPLIT_IRQCHIP: {
3723 mutex_lock(&kvm->lock);
3725 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3726 goto split_irqchip_unlock;
3728 if (irqchip_in_kernel(kvm))
3729 goto split_irqchip_unlock;
3730 if (atomic_read(&kvm->online_vcpus))
3731 goto split_irqchip_unlock;
3732 r = kvm_setup_empty_irq_routing(kvm);
3734 goto split_irqchip_unlock;
3735 /* Pairs with irqchip_in_kernel. */
3737 kvm->arch.irqchip_split = true;
3738 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3740 split_irqchip_unlock:
3741 mutex_unlock(&kvm->lock);
3751 long kvm_arch_vm_ioctl(struct file *filp,
3752 unsigned int ioctl, unsigned long arg)
3754 struct kvm *kvm = filp->private_data;
3755 void __user *argp = (void __user *)arg;
3758 * This union makes it completely explicit to gcc-3.x
3759 * that these two variables' stack usage should be
3760 * combined, not added together.
3763 struct kvm_pit_state ps;
3764 struct kvm_pit_state2 ps2;
3765 struct kvm_pit_config pit_config;
3769 case KVM_SET_TSS_ADDR:
3770 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3772 case KVM_SET_IDENTITY_MAP_ADDR: {
3776 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3778 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3781 case KVM_SET_NR_MMU_PAGES:
3782 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3784 case KVM_GET_NR_MMU_PAGES:
3785 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3787 case KVM_CREATE_IRQCHIP: {
3788 struct kvm_pic *vpic;
3790 mutex_lock(&kvm->lock);
3793 goto create_irqchip_unlock;
3795 if (atomic_read(&kvm->online_vcpus))
3796 goto create_irqchip_unlock;
3798 vpic = kvm_create_pic(kvm);
3800 r = kvm_ioapic_init(kvm);
3802 mutex_lock(&kvm->slots_lock);
3803 kvm_destroy_pic(vpic);
3804 mutex_unlock(&kvm->slots_lock);
3805 goto create_irqchip_unlock;
3808 goto create_irqchip_unlock;
3809 r = kvm_setup_default_irq_routing(kvm);
3811 mutex_lock(&kvm->slots_lock);
3812 mutex_lock(&kvm->irq_lock);
3813 kvm_ioapic_destroy(kvm);
3814 kvm_destroy_pic(vpic);
3815 mutex_unlock(&kvm->irq_lock);
3816 mutex_unlock(&kvm->slots_lock);
3817 goto create_irqchip_unlock;
3819 /* Write kvm->irq_routing before kvm->arch.vpic. */
3821 kvm->arch.vpic = vpic;
3822 create_irqchip_unlock:
3823 mutex_unlock(&kvm->lock);
3826 case KVM_CREATE_PIT:
3827 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3829 case KVM_CREATE_PIT2:
3831 if (copy_from_user(&u.pit_config, argp,
3832 sizeof(struct kvm_pit_config)))
3835 mutex_lock(&kvm->slots_lock);
3838 goto create_pit_unlock;
3840 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3844 mutex_unlock(&kvm->slots_lock);
3846 case KVM_GET_IRQCHIP: {
3847 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3848 struct kvm_irqchip *chip;
3850 chip = memdup_user(argp, sizeof(*chip));
3857 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3858 goto get_irqchip_out;
3859 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3861 goto get_irqchip_out;
3863 if (copy_to_user(argp, chip, sizeof *chip))
3864 goto get_irqchip_out;
3870 case KVM_SET_IRQCHIP: {
3871 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3872 struct kvm_irqchip *chip;
3874 chip = memdup_user(argp, sizeof(*chip));
3881 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3882 goto set_irqchip_out;
3883 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3885 goto set_irqchip_out;
3893 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3896 if (!kvm->arch.vpit)
3898 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3902 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3909 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3912 if (!kvm->arch.vpit)
3914 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3917 case KVM_GET_PIT2: {
3919 if (!kvm->arch.vpit)
3921 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3925 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3930 case KVM_SET_PIT2: {
3932 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3935 if (!kvm->arch.vpit)
3937 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3940 case KVM_REINJECT_CONTROL: {
3941 struct kvm_reinject_control control;
3943 if (copy_from_user(&control, argp, sizeof(control)))
3945 r = kvm_vm_ioctl_reinject(kvm, &control);
3948 case KVM_SET_BOOT_CPU_ID:
3950 mutex_lock(&kvm->lock);
3951 if (atomic_read(&kvm->online_vcpus) != 0)
3954 kvm->arch.bsp_vcpu_id = arg;
3955 mutex_unlock(&kvm->lock);
3957 case KVM_XEN_HVM_CONFIG: {
3959 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3960 sizeof(struct kvm_xen_hvm_config)))
3963 if (kvm->arch.xen_hvm_config.flags)
3968 case KVM_SET_CLOCK: {
3969 struct kvm_clock_data user_ns;
3974 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3982 local_irq_disable();
3983 now_ns = get_kernel_ns();
3984 delta = user_ns.clock - now_ns;
3986 kvm->arch.kvmclock_offset = delta;
3987 kvm_gen_update_masterclock(kvm);
3990 case KVM_GET_CLOCK: {
3991 struct kvm_clock_data user_ns;
3994 local_irq_disable();
3995 now_ns = get_kernel_ns();
3996 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3999 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4002 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4007 case KVM_ENABLE_CAP: {
4008 struct kvm_enable_cap cap;
4011 if (copy_from_user(&cap, argp, sizeof(cap)))
4013 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4017 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4023 static void kvm_init_msr_list(void)
4028 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4029 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4033 * Even MSRs that are valid in the host may not be exposed
4034 * to the guests in some cases.
4036 switch (msrs_to_save[i]) {
4037 case MSR_IA32_BNDCFGS:
4038 if (!kvm_x86_ops->mpx_supported())
4042 if (!kvm_x86_ops->rdtscp_supported())
4050 msrs_to_save[j] = msrs_to_save[i];
4053 num_msrs_to_save = j;
4055 for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4056 switch (emulated_msrs[i]) {
4057 case MSR_IA32_SMBASE:
4058 if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4066 emulated_msrs[j] = emulated_msrs[i];
4069 num_emulated_msrs = j;
4072 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4080 if (!(vcpu->arch.apic &&
4081 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4082 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4093 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4100 if (!(vcpu->arch.apic &&
4101 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4103 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4105 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4115 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4116 struct kvm_segment *var, int seg)
4118 kvm_x86_ops->set_segment(vcpu, var, seg);
4121 void kvm_get_segment(struct kvm_vcpu *vcpu,
4122 struct kvm_segment *var, int seg)
4124 kvm_x86_ops->get_segment(vcpu, var, seg);
4127 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4128 struct x86_exception *exception)
4132 BUG_ON(!mmu_is_nested(vcpu));
4134 /* NPT walks are always user-walks */
4135 access |= PFERR_USER_MASK;
4136 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4141 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4142 struct x86_exception *exception)
4144 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4145 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4148 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4149 struct x86_exception *exception)
4151 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4152 access |= PFERR_FETCH_MASK;
4153 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4156 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4157 struct x86_exception *exception)
4159 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4160 access |= PFERR_WRITE_MASK;
4161 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4164 /* uses this to access any guest's mapped memory without checking CPL */
4165 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4166 struct x86_exception *exception)
4168 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4171 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4172 struct kvm_vcpu *vcpu, u32 access,
4173 struct x86_exception *exception)
4176 int r = X86EMUL_CONTINUE;
4179 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4181 unsigned offset = addr & (PAGE_SIZE-1);
4182 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4185 if (gpa == UNMAPPED_GVA)
4186 return X86EMUL_PROPAGATE_FAULT;
4187 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4190 r = X86EMUL_IO_NEEDED;
4202 /* used for instruction fetching */
4203 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4204 gva_t addr, void *val, unsigned int bytes,
4205 struct x86_exception *exception)
4207 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4208 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4212 /* Inline kvm_read_guest_virt_helper for speed. */
4213 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4215 if (unlikely(gpa == UNMAPPED_GVA))
4216 return X86EMUL_PROPAGATE_FAULT;
4218 offset = addr & (PAGE_SIZE-1);
4219 if (WARN_ON(offset + bytes > PAGE_SIZE))
4220 bytes = (unsigned)PAGE_SIZE - offset;
4221 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4223 if (unlikely(ret < 0))
4224 return X86EMUL_IO_NEEDED;
4226 return X86EMUL_CONTINUE;
4229 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4230 gva_t addr, void *val, unsigned int bytes,
4231 struct x86_exception *exception)
4233 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4234 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4236 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4239 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4241 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4242 gva_t addr, void *val, unsigned int bytes,
4243 struct x86_exception *exception)
4245 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4246 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4249 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4250 unsigned long addr, void *val, unsigned int bytes)
4252 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4253 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4255 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4258 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4259 gva_t addr, void *val,
4261 struct x86_exception *exception)
4263 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4265 int r = X86EMUL_CONTINUE;
4268 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4271 unsigned offset = addr & (PAGE_SIZE-1);
4272 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4275 if (gpa == UNMAPPED_GVA)
4276 return X86EMUL_PROPAGATE_FAULT;
4277 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4279 r = X86EMUL_IO_NEEDED;
4290 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4292 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4293 gpa_t *gpa, struct x86_exception *exception,
4296 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4297 | (write ? PFERR_WRITE_MASK : 0);
4299 if (vcpu_match_mmio_gva(vcpu, gva)
4300 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4301 vcpu->arch.access, access)) {
4302 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4303 (gva & (PAGE_SIZE - 1));
4304 trace_vcpu_match_mmio(gva, *gpa, write, false);
4308 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4310 if (*gpa == UNMAPPED_GVA)
4313 /* For APIC access vmexit */
4314 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4317 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4318 trace_vcpu_match_mmio(gva, *gpa, write, true);
4325 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4326 const void *val, int bytes)
4330 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4333 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4337 struct read_write_emulator_ops {
4338 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4340 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4341 void *val, int bytes);
4342 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4343 int bytes, void *val);
4344 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4345 void *val, int bytes);
4349 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4351 if (vcpu->mmio_read_completed) {
4352 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4353 vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4354 vcpu->mmio_read_completed = 0;
4361 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4362 void *val, int bytes)
4364 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4367 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4368 void *val, int bytes)
4370 return emulator_write_phys(vcpu, gpa, val, bytes);
4373 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4375 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4376 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4379 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4380 void *val, int bytes)
4382 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4383 return X86EMUL_IO_NEEDED;
4386 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4387 void *val, int bytes)
4389 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4391 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4392 return X86EMUL_CONTINUE;
4395 static const struct read_write_emulator_ops read_emultor = {
4396 .read_write_prepare = read_prepare,
4397 .read_write_emulate = read_emulate,
4398 .read_write_mmio = vcpu_mmio_read,
4399 .read_write_exit_mmio = read_exit_mmio,
4402 static const struct read_write_emulator_ops write_emultor = {
4403 .read_write_emulate = write_emulate,
4404 .read_write_mmio = write_mmio,
4405 .read_write_exit_mmio = write_exit_mmio,
4409 static int emulator_read_write_onepage(unsigned long addr, void *val,
4411 struct x86_exception *exception,
4412 struct kvm_vcpu *vcpu,
4413 const struct read_write_emulator_ops *ops)
4417 bool write = ops->write;
4418 struct kvm_mmio_fragment *frag;
4420 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4423 return X86EMUL_PROPAGATE_FAULT;
4425 /* For APIC access vmexit */
4429 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4430 return X86EMUL_CONTINUE;
4434 * Is this MMIO handled locally?
4436 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4437 if (handled == bytes)
4438 return X86EMUL_CONTINUE;
4444 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4445 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4449 return X86EMUL_CONTINUE;
4452 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4454 void *val, unsigned int bytes,
4455 struct x86_exception *exception,
4456 const struct read_write_emulator_ops *ops)
4458 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4462 if (ops->read_write_prepare &&
4463 ops->read_write_prepare(vcpu, val, bytes))
4464 return X86EMUL_CONTINUE;
4466 vcpu->mmio_nr_fragments = 0;
4468 /* Crossing a page boundary? */
4469 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4472 now = -addr & ~PAGE_MASK;
4473 rc = emulator_read_write_onepage(addr, val, now, exception,
4476 if (rc != X86EMUL_CONTINUE)
4479 if (ctxt->mode != X86EMUL_MODE_PROT64)
4485 rc = emulator_read_write_onepage(addr, val, bytes, exception,
4487 if (rc != X86EMUL_CONTINUE)
4490 if (!vcpu->mmio_nr_fragments)
4493 gpa = vcpu->mmio_fragments[0].gpa;
4495 vcpu->mmio_needed = 1;
4496 vcpu->mmio_cur_fragment = 0;
4498 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4499 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4500 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4501 vcpu->run->mmio.phys_addr = gpa;
4503 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4506 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4510 struct x86_exception *exception)
4512 return emulator_read_write(ctxt, addr, val, bytes,
4513 exception, &read_emultor);
4516 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4520 struct x86_exception *exception)
4522 return emulator_read_write(ctxt, addr, (void *)val, bytes,
4523 exception, &write_emultor);
4526 #define CMPXCHG_TYPE(t, ptr, old, new) \
4527 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4529 #ifdef CONFIG_X86_64
4530 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4532 # define CMPXCHG64(ptr, old, new) \
4533 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4536 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4541 struct x86_exception *exception)
4543 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4549 /* guests cmpxchg8b have to be emulated atomically */
4550 if (bytes > 8 || (bytes & (bytes - 1)))
4553 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4555 if (gpa == UNMAPPED_GVA ||
4556 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4559 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4562 page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4563 if (is_error_page(page))
4566 kaddr = kmap_atomic(page);
4567 kaddr += offset_in_page(gpa);
4570 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4573 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4576 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4579 exchanged = CMPXCHG64(kaddr, old, new);
4584 kunmap_atomic(kaddr);
4585 kvm_release_page_dirty(page);
4588 return X86EMUL_CMPXCHG_FAILED;
4590 kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4591 kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4593 return X86EMUL_CONTINUE;
4596 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4598 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4601 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4603 /* TODO: String I/O for in kernel device */
4606 if (vcpu->arch.pio.in)
4607 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4608 vcpu->arch.pio.size, pd);
4610 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4611 vcpu->arch.pio.port, vcpu->arch.pio.size,
4616 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4617 unsigned short port, void *val,
4618 unsigned int count, bool in)
4620 vcpu->arch.pio.port = port;
4621 vcpu->arch.pio.in = in;
4622 vcpu->arch.pio.count = count;
4623 vcpu->arch.pio.size = size;
4625 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4626 vcpu->arch.pio.count = 0;
4630 vcpu->run->exit_reason = KVM_EXIT_IO;
4631 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4632 vcpu->run->io.size = size;
4633 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4634 vcpu->run->io.count = count;
4635 vcpu->run->io.port = port;
4640 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4641 int size, unsigned short port, void *val,
4644 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4647 if (vcpu->arch.pio.count)
4650 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4653 memcpy(val, vcpu->arch.pio_data, size * count);
4654 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4655 vcpu->arch.pio.count = 0;
4662 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4663 int size, unsigned short port,
4664 const void *val, unsigned int count)
4666 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4668 memcpy(vcpu->arch.pio_data, val, size * count);
4669 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4670 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4673 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4675 return kvm_x86_ops->get_segment_base(vcpu, seg);
4678 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4680 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4683 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4685 if (!need_emulate_wbinvd(vcpu))
4686 return X86EMUL_CONTINUE;
4688 if (kvm_x86_ops->has_wbinvd_exit()) {
4689 int cpu = get_cpu();
4691 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4692 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4693 wbinvd_ipi, NULL, 1);
4695 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4698 return X86EMUL_CONTINUE;
4701 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4703 kvm_x86_ops->skip_emulated_instruction(vcpu);
4704 return kvm_emulate_wbinvd_noskip(vcpu);
4706 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4710 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4712 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4715 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4716 unsigned long *dest)
4718 return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4721 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4722 unsigned long value)
4725 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4728 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4730 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4733 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4735 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4736 unsigned long value;
4740 value = kvm_read_cr0(vcpu);
4743 value = vcpu->arch.cr2;
4746 value = kvm_read_cr3(vcpu);
4749 value = kvm_read_cr4(vcpu);
4752 value = kvm_get_cr8(vcpu);
4755 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4762 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4764 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4769 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4772 vcpu->arch.cr2 = val;
4775 res = kvm_set_cr3(vcpu, val);
4778 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4781 res = kvm_set_cr8(vcpu, val);
4784 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4791 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4793 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4796 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4798 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4801 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4803 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4806 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4808 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4811 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4813 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4816 static unsigned long emulator_get_cached_segment_base(
4817 struct x86_emulate_ctxt *ctxt, int seg)
4819 return get_segment_base(emul_to_vcpu(ctxt), seg);
4822 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4823 struct desc_struct *desc, u32 *base3,
4826 struct kvm_segment var;
4828 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4829 *selector = var.selector;
4832 memset(desc, 0, sizeof(*desc));
4838 set_desc_limit(desc, var.limit);
4839 set_desc_base(desc, (unsigned long)var.base);
4840 #ifdef CONFIG_X86_64
4842 *base3 = var.base >> 32;
4844 desc->type = var.type;
4846 desc->dpl = var.dpl;
4847 desc->p = var.present;
4848 desc->avl = var.avl;
4856 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4857 struct desc_struct *desc, u32 base3,
4860 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4861 struct kvm_segment var;
4863 var.selector = selector;
4864 var.base = get_desc_base(desc);
4865 #ifdef CONFIG_X86_64
4866 var.base |= ((u64)base3) << 32;
4868 var.limit = get_desc_limit(desc);
4870 var.limit = (var.limit << 12) | 0xfff;
4871 var.type = desc->type;
4872 var.dpl = desc->dpl;
4877 var.avl = desc->avl;
4878 var.present = desc->p;
4879 var.unusable = !var.present;
4882 kvm_set_segment(vcpu, &var, seg);
4886 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4887 u32 msr_index, u64 *pdata)
4889 struct msr_data msr;
4892 msr.index = msr_index;
4893 msr.host_initiated = false;
4894 r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4902 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4903 u32 msr_index, u64 data)
4905 struct msr_data msr;
4908 msr.index = msr_index;
4909 msr.host_initiated = false;
4910 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4913 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4915 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4917 return vcpu->arch.smbase;
4920 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4922 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4924 vcpu->arch.smbase = smbase;
4927 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4930 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4933 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4934 u32 pmc, u64 *pdata)
4936 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4939 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4941 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4944 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4947 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4949 * CR0.TS may reference the host fpu state, not the guest fpu state,
4950 * so it may be clear at this point.
4955 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4960 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4961 struct x86_instruction_info *info,
4962 enum x86_intercept_stage stage)
4964 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4967 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4968 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4970 kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4973 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4975 return kvm_register_read(emul_to_vcpu(ctxt), reg);
4978 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4980 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4983 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4985 kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4988 static const struct x86_emulate_ops emulate_ops = {
4989 .read_gpr = emulator_read_gpr,
4990 .write_gpr = emulator_write_gpr,
4991 .read_std = kvm_read_guest_virt_system,
4992 .write_std = kvm_write_guest_virt_system,
4993 .read_phys = kvm_read_guest_phys_system,
4994 .fetch = kvm_fetch_guest_virt,
4995 .read_emulated = emulator_read_emulated,
4996 .write_emulated = emulator_write_emulated,
4997 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4998 .invlpg = emulator_invlpg,
4999 .pio_in_emulated = emulator_pio_in_emulated,
5000 .pio_out_emulated = emulator_pio_out_emulated,
5001 .get_segment = emulator_get_segment,
5002 .set_segment = emulator_set_segment,
5003 .get_cached_segment_base = emulator_get_cached_segment_base,
5004 .get_gdt = emulator_get_gdt,
5005 .get_idt = emulator_get_idt,
5006 .set_gdt = emulator_set_gdt,
5007 .set_idt = emulator_set_idt,
5008 .get_cr = emulator_get_cr,
5009 .set_cr = emulator_set_cr,
5010 .cpl = emulator_get_cpl,
5011 .get_dr = emulator_get_dr,
5012 .set_dr = emulator_set_dr,
5013 .get_smbase = emulator_get_smbase,
5014 .set_smbase = emulator_set_smbase,
5015 .set_msr = emulator_set_msr,
5016 .get_msr = emulator_get_msr,
5017 .check_pmc = emulator_check_pmc,
5018 .read_pmc = emulator_read_pmc,
5019 .halt = emulator_halt,
5020 .wbinvd = emulator_wbinvd,
5021 .fix_hypercall = emulator_fix_hypercall,
5022 .get_fpu = emulator_get_fpu,
5023 .put_fpu = emulator_put_fpu,
5024 .intercept = emulator_intercept,
5025 .get_cpuid = emulator_get_cpuid,
5026 .set_nmi_mask = emulator_set_nmi_mask,
5029 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5031 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5033 * an sti; sti; sequence only disable interrupts for the first
5034 * instruction. So, if the last instruction, be it emulated or
5035 * not, left the system with the INT_STI flag enabled, it
5036 * means that the last instruction is an sti. We should not
5037 * leave the flag on in this case. The same goes for mov ss
5039 if (int_shadow & mask)
5041 if (unlikely(int_shadow || mask)) {
5042 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5044 kvm_make_request(KVM_REQ_EVENT, vcpu);
5048 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5050 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5051 if (ctxt->exception.vector == PF_VECTOR)
5052 return kvm_propagate_fault(vcpu, &ctxt->exception);
5054 if (ctxt->exception.error_code_valid)
5055 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5056 ctxt->exception.error_code);
5058 kvm_queue_exception(vcpu, ctxt->exception.vector);
5062 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5064 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5067 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5069 ctxt->eflags = kvm_get_rflags(vcpu);
5070 ctxt->eip = kvm_rip_read(vcpu);
5071 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5072 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
5073 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
5074 cs_db ? X86EMUL_MODE_PROT32 :
5075 X86EMUL_MODE_PROT16;
5076 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5077 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5078 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5079 ctxt->emul_flags = vcpu->arch.hflags;
5081 init_decode_cache(ctxt);
5082 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5085 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5087 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5090 init_emulate_ctxt(vcpu);
5094 ctxt->_eip = ctxt->eip + inc_eip;
5095 ret = emulate_int_real(ctxt, irq);
5097 if (ret != X86EMUL_CONTINUE)
5098 return EMULATE_FAIL;
5100 ctxt->eip = ctxt->_eip;
5101 kvm_rip_write(vcpu, ctxt->eip);
5102 kvm_set_rflags(vcpu, ctxt->eflags);
5104 if (irq == NMI_VECTOR)
5105 vcpu->arch.nmi_pending = 0;
5107 vcpu->arch.interrupt.pending = false;
5109 return EMULATE_DONE;
5111 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5113 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5115 int r = EMULATE_DONE;
5117 ++vcpu->stat.insn_emulation_fail;
5118 trace_kvm_emulate_insn_failed(vcpu);
5119 if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5120 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5121 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5122 vcpu->run->internal.ndata = 0;
5125 kvm_queue_exception(vcpu, UD_VECTOR);
5130 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5131 bool write_fault_to_shadow_pgtable,
5137 if (emulation_type & EMULTYPE_NO_REEXECUTE)
5140 if (!vcpu->arch.mmu.direct_map) {
5142 * Write permission should be allowed since only
5143 * write access need to be emulated.
5145 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5148 * If the mapping is invalid in guest, let cpu retry
5149 * it to generate fault.
5151 if (gpa == UNMAPPED_GVA)
5156 * Do not retry the unhandleable instruction if it faults on the
5157 * readonly host memory, otherwise it will goto a infinite loop:
5158 * retry instruction -> write #PF -> emulation fail -> retry
5159 * instruction -> ...
5161 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5164 * If the instruction failed on the error pfn, it can not be fixed,
5165 * report the error to userspace.
5167 if (is_error_noslot_pfn(pfn))
5170 kvm_release_pfn_clean(pfn);
5172 /* The instructions are well-emulated on direct mmu. */
5173 if (vcpu->arch.mmu.direct_map) {
5174 unsigned int indirect_shadow_pages;
5176 spin_lock(&vcpu->kvm->mmu_lock);
5177 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5178 spin_unlock(&vcpu->kvm->mmu_lock);
5180 if (indirect_shadow_pages)
5181 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5187 * if emulation was due to access to shadowed page table
5188 * and it failed try to unshadow page and re-enter the
5189 * guest to let CPU execute the instruction.
5191 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5194 * If the access faults on its page table, it can not
5195 * be fixed by unprotecting shadow page and it should
5196 * be reported to userspace.
5198 return !write_fault_to_shadow_pgtable;
5201 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5202 unsigned long cr2, int emulation_type)
5204 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5205 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5207 last_retry_eip = vcpu->arch.last_retry_eip;
5208 last_retry_addr = vcpu->arch.last_retry_addr;
5211 * If the emulation is caused by #PF and it is non-page_table
5212 * writing instruction, it means the VM-EXIT is caused by shadow
5213 * page protected, we can zap the shadow page and retry this
5214 * instruction directly.
5216 * Note: if the guest uses a non-page-table modifying instruction
5217 * on the PDE that points to the instruction, then we will unmap
5218 * the instruction and go to an infinite loop. So, we cache the
5219 * last retried eip and the last fault address, if we meet the eip
5220 * and the address again, we can break out of the potential infinite
5223 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5225 if (!(emulation_type & EMULTYPE_RETRY))
5228 if (x86_page_table_writing_insn(ctxt))
5231 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5234 vcpu->arch.last_retry_eip = ctxt->eip;
5235 vcpu->arch.last_retry_addr = cr2;
5237 if (!vcpu->arch.mmu.direct_map)
5238 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5240 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5245 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5246 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5248 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5250 if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5251 /* This is a good place to trace that we are exiting SMM. */
5252 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5254 if (unlikely(vcpu->arch.smi_pending)) {
5255 kvm_make_request(KVM_REQ_SMI, vcpu);
5256 vcpu->arch.smi_pending = 0;
5258 /* Process a latched INIT, if any. */
5259 kvm_make_request(KVM_REQ_EVENT, vcpu);
5263 kvm_mmu_reset_context(vcpu);
5266 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5268 unsigned changed = vcpu->arch.hflags ^ emul_flags;
5270 vcpu->arch.hflags = emul_flags;
5272 if (changed & HF_SMM_MASK)
5273 kvm_smm_changed(vcpu);
5276 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5285 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5286 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5291 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5293 struct kvm_run *kvm_run = vcpu->run;
5296 * rflags is the old, "raw" value of the flags. The new value has
5297 * not been saved yet.
5299 * This is correct even for TF set by the guest, because "the
5300 * processor will not generate this exception after the instruction
5301 * that sets the TF flag".
5303 if (unlikely(rflags & X86_EFLAGS_TF)) {
5304 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5305 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5307 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5308 kvm_run->debug.arch.exception = DB_VECTOR;
5309 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5310 *r = EMULATE_USER_EXIT;
5312 vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5314 * "Certain debug exceptions may clear bit 0-3. The
5315 * remaining contents of the DR6 register are never
5316 * cleared by the processor".
5318 vcpu->arch.dr6 &= ~15;
5319 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5320 kvm_queue_exception(vcpu, DB_VECTOR);
5325 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5327 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5328 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5329 struct kvm_run *kvm_run = vcpu->run;
5330 unsigned long eip = kvm_get_linear_rip(vcpu);
5331 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5332 vcpu->arch.guest_debug_dr7,
5336 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5337 kvm_run->debug.arch.pc = eip;
5338 kvm_run->debug.arch.exception = DB_VECTOR;
5339 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5340 *r = EMULATE_USER_EXIT;
5345 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5346 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5347 unsigned long eip = kvm_get_linear_rip(vcpu);
5348 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5353 vcpu->arch.dr6 &= ~15;
5354 vcpu->arch.dr6 |= dr6 | DR6_RTM;
5355 kvm_queue_exception(vcpu, DB_VECTOR);
5364 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5371 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5372 bool writeback = true;
5373 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5376 * Clear write_fault_to_shadow_pgtable here to ensure it is
5379 vcpu->arch.write_fault_to_shadow_pgtable = false;
5380 kvm_clear_exception_queue(vcpu);
5382 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5383 init_emulate_ctxt(vcpu);
5386 * We will reenter on the same instruction since
5387 * we do not set complete_userspace_io. This does not
5388 * handle watchpoints yet, those would be handled in
5391 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5394 ctxt->interruptibility = 0;
5395 ctxt->have_exception = false;
5396 ctxt->exception.vector = -1;
5397 ctxt->perm_ok = false;
5399 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5401 r = x86_decode_insn(ctxt, insn, insn_len);
5403 trace_kvm_emulate_insn_start(vcpu);
5404 ++vcpu->stat.insn_emulation;
5405 if (r != EMULATION_OK) {
5406 if (emulation_type & EMULTYPE_TRAP_UD)
5407 return EMULATE_FAIL;
5408 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5410 return EMULATE_DONE;
5411 if (emulation_type & EMULTYPE_SKIP)
5412 return EMULATE_FAIL;
5413 return handle_emulation_failure(vcpu);
5417 if (emulation_type & EMULTYPE_SKIP) {
5418 kvm_rip_write(vcpu, ctxt->_eip);
5419 if (ctxt->eflags & X86_EFLAGS_RF)
5420 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5421 return EMULATE_DONE;
5424 if (retry_instruction(ctxt, cr2, emulation_type))
5425 return EMULATE_DONE;
5427 /* this is needed for vmware backdoor interface to work since it
5428 changes registers values during IO operation */
5429 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5430 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5431 emulator_invalidate_register_cache(ctxt);
5435 r = x86_emulate_insn(ctxt);
5437 if (r == EMULATION_INTERCEPTED)
5438 return EMULATE_DONE;
5440 if (r == EMULATION_FAILED) {
5441 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5443 return EMULATE_DONE;
5445 return handle_emulation_failure(vcpu);
5448 if (ctxt->have_exception) {
5450 if (inject_emulated_exception(vcpu))
5452 } else if (vcpu->arch.pio.count) {
5453 if (!vcpu->arch.pio.in) {
5454 /* FIXME: return into emulator if single-stepping. */
5455 vcpu->arch.pio.count = 0;
5458 vcpu->arch.complete_userspace_io = complete_emulated_pio;
5460 r = EMULATE_USER_EXIT;
5461 } else if (vcpu->mmio_needed) {
5462 if (!vcpu->mmio_is_write)
5464 r = EMULATE_USER_EXIT;
5465 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5466 } else if (r == EMULATION_RESTART)
5472 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5473 toggle_interruptibility(vcpu, ctxt->interruptibility);
5474 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5475 if (vcpu->arch.hflags != ctxt->emul_flags)
5476 kvm_set_hflags(vcpu, ctxt->emul_flags);
5477 kvm_rip_write(vcpu, ctxt->eip);
5478 if (r == EMULATE_DONE)
5479 kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5480 if (!ctxt->have_exception ||
5481 exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5482 __kvm_set_rflags(vcpu, ctxt->eflags);
5485 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5486 * do nothing, and it will be requested again as soon as
5487 * the shadow expires. But we still need to check here,
5488 * because POPF has no interrupt shadow.
5490 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5491 kvm_make_request(KVM_REQ_EVENT, vcpu);
5493 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5497 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5499 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5501 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5502 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5503 size, port, &val, 1);
5504 /* do not return to emulator after return from userspace */
5505 vcpu->arch.pio.count = 0;
5508 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5510 static void tsc_bad(void *info)
5512 __this_cpu_write(cpu_tsc_khz, 0);
5515 static void tsc_khz_changed(void *data)
5517 struct cpufreq_freqs *freq = data;
5518 unsigned long khz = 0;
5522 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5523 khz = cpufreq_quick_get(raw_smp_processor_id());
5526 __this_cpu_write(cpu_tsc_khz, khz);
5529 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5532 struct cpufreq_freqs *freq = data;
5534 struct kvm_vcpu *vcpu;
5535 int i, send_ipi = 0;
5538 * We allow guests to temporarily run on slowing clocks,
5539 * provided we notify them after, or to run on accelerating
5540 * clocks, provided we notify them before. Thus time never
5543 * However, we have a problem. We can't atomically update
5544 * the frequency of a given CPU from this function; it is
5545 * merely a notifier, which can be called from any CPU.
5546 * Changing the TSC frequency at arbitrary points in time
5547 * requires a recomputation of local variables related to
5548 * the TSC for each VCPU. We must flag these local variables
5549 * to be updated and be sure the update takes place with the
5550 * new frequency before any guests proceed.
5552 * Unfortunately, the combination of hotplug CPU and frequency
5553 * change creates an intractable locking scenario; the order
5554 * of when these callouts happen is undefined with respect to
5555 * CPU hotplug, and they can race with each other. As such,
5556 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5557 * undefined; you can actually have a CPU frequency change take
5558 * place in between the computation of X and the setting of the
5559 * variable. To protect against this problem, all updates of
5560 * the per_cpu tsc_khz variable are done in an interrupt
5561 * protected IPI, and all callers wishing to update the value
5562 * must wait for a synchronous IPI to complete (which is trivial
5563 * if the caller is on the CPU already). This establishes the
5564 * necessary total order on variable updates.
5566 * Note that because a guest time update may take place
5567 * anytime after the setting of the VCPU's request bit, the
5568 * correct TSC value must be set before the request. However,
5569 * to ensure the update actually makes it to any guest which
5570 * starts running in hardware virtualization between the set
5571 * and the acquisition of the spinlock, we must also ping the
5572 * CPU after setting the request bit.
5576 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5578 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5581 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5583 spin_lock(&kvm_lock);
5584 list_for_each_entry(kvm, &vm_list, vm_list) {
5585 kvm_for_each_vcpu(i, vcpu, kvm) {
5586 if (vcpu->cpu != freq->cpu)
5588 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5589 if (vcpu->cpu != smp_processor_id())
5593 spin_unlock(&kvm_lock);
5595 if (freq->old < freq->new && send_ipi) {
5597 * We upscale the frequency. Must make the guest
5598 * doesn't see old kvmclock values while running with
5599 * the new frequency, otherwise we risk the guest sees
5600 * time go backwards.
5602 * In case we update the frequency for another cpu
5603 * (which might be in guest context) send an interrupt
5604 * to kick the cpu out of guest context. Next time
5605 * guest context is entered kvmclock will be updated,
5606 * so the guest will not see stale values.
5608 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5613 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5614 .notifier_call = kvmclock_cpufreq_notifier
5617 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5618 unsigned long action, void *hcpu)
5620 unsigned int cpu = (unsigned long)hcpu;
5624 case CPU_DOWN_FAILED:
5625 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5627 case CPU_DOWN_PREPARE:
5628 smp_call_function_single(cpu, tsc_bad, NULL, 1);
5634 static struct notifier_block kvmclock_cpu_notifier_block = {
5635 .notifier_call = kvmclock_cpu_notifier,
5636 .priority = -INT_MAX
5639 static void kvm_timer_init(void)
5643 max_tsc_khz = tsc_khz;
5645 cpu_notifier_register_begin();
5646 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5647 #ifdef CONFIG_CPU_FREQ
5648 struct cpufreq_policy policy;
5649 memset(&policy, 0, sizeof(policy));
5651 cpufreq_get_policy(&policy, cpu);
5652 if (policy.cpuinfo.max_freq)
5653 max_tsc_khz = policy.cpuinfo.max_freq;
5656 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5657 CPUFREQ_TRANSITION_NOTIFIER);
5659 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5660 for_each_online_cpu(cpu)
5661 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5663 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5664 cpu_notifier_register_done();
5668 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5670 int kvm_is_in_guest(void)
5672 return __this_cpu_read(current_vcpu) != NULL;
5675 static int kvm_is_user_mode(void)
5679 if (__this_cpu_read(current_vcpu))
5680 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5682 return user_mode != 0;
5685 static unsigned long kvm_get_guest_ip(void)
5687 unsigned long ip = 0;
5689 if (__this_cpu_read(current_vcpu))
5690 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5695 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5696 .is_in_guest = kvm_is_in_guest,
5697 .is_user_mode = kvm_is_user_mode,
5698 .get_guest_ip = kvm_get_guest_ip,
5701 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5703 __this_cpu_write(current_vcpu, vcpu);
5705 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5707 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5709 __this_cpu_write(current_vcpu, NULL);
5711 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5713 static void kvm_set_mmio_spte_mask(void)
5716 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5719 * Set the reserved bits and the present bit of an paging-structure
5720 * entry to generate page fault with PFER.RSV = 1.
5722 /* Mask the reserved physical address bits. */
5723 mask = rsvd_bits(maxphyaddr, 51);
5725 /* Bit 62 is always reserved for 32bit host. */
5726 mask |= 0x3ull << 62;
5728 /* Set the present bit. */
5731 #ifdef CONFIG_X86_64
5733 * If reserved bit is not supported, clear the present bit to disable
5736 if (maxphyaddr == 52)
5740 kvm_mmu_set_mmio_spte_mask(mask);
5743 #ifdef CONFIG_X86_64
5744 static void pvclock_gtod_update_fn(struct work_struct *work)
5748 struct kvm_vcpu *vcpu;
5751 spin_lock(&kvm_lock);
5752 list_for_each_entry(kvm, &vm_list, vm_list)
5753 kvm_for_each_vcpu(i, vcpu, kvm)
5754 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5755 atomic_set(&kvm_guest_has_master_clock, 0);
5756 spin_unlock(&kvm_lock);
5759 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5762 * Notification about pvclock gtod data update.
5764 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5767 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5768 struct timekeeper *tk = priv;
5770 update_pvclock_gtod(tk);
5772 /* disable master clock if host does not trust, or does not
5773 * use, TSC clocksource
5775 if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5776 atomic_read(&kvm_guest_has_master_clock) != 0)
5777 queue_work(system_long_wq, &pvclock_gtod_work);
5782 static struct notifier_block pvclock_gtod_notifier = {
5783 .notifier_call = pvclock_gtod_notify,
5787 int kvm_arch_init(void *opaque)
5790 struct kvm_x86_ops *ops = opaque;
5793 printk(KERN_ERR "kvm: already loaded the other module\n");
5798 if (!ops->cpu_has_kvm_support()) {
5799 printk(KERN_ERR "kvm: no hardware support\n");
5803 if (ops->disabled_by_bios()) {
5804 printk(KERN_ERR "kvm: disabled by bios\n");
5810 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5812 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5816 r = kvm_mmu_module_init();
5818 goto out_free_percpu;
5820 kvm_set_mmio_spte_mask();
5824 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5825 PT_DIRTY_MASK, PT64_NX_MASK, 0);
5829 perf_register_guest_info_callbacks(&kvm_guest_cbs);
5832 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5835 #ifdef CONFIG_X86_64
5836 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5842 free_percpu(shared_msrs);
5847 void kvm_arch_exit(void)
5849 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5851 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5852 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5853 CPUFREQ_TRANSITION_NOTIFIER);
5854 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5855 #ifdef CONFIG_X86_64
5856 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5859 kvm_mmu_module_exit();
5860 free_percpu(shared_msrs);
5863 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5865 ++vcpu->stat.halt_exits;
5866 if (lapic_in_kernel(vcpu)) {
5867 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5870 vcpu->run->exit_reason = KVM_EXIT_HLT;
5874 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5876 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5878 kvm_x86_ops->skip_emulated_instruction(vcpu);
5879 return kvm_vcpu_halt(vcpu);
5881 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5884 * kvm_pv_kick_cpu_op: Kick a vcpu.
5886 * @apicid - apicid of vcpu to be kicked.
5888 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5890 struct kvm_lapic_irq lapic_irq;
5892 lapic_irq.shorthand = 0;
5893 lapic_irq.dest_mode = 0;
5894 lapic_irq.dest_id = apicid;
5895 lapic_irq.msi_redir_hint = false;
5897 lapic_irq.delivery_mode = APIC_DM_REMRD;
5898 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5901 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
5903 vcpu->arch.apicv_active = false;
5904 kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
5907 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5909 unsigned long nr, a0, a1, a2, a3, ret;
5910 int op_64_bit, r = 1;
5912 kvm_x86_ops->skip_emulated_instruction(vcpu);
5914 if (kvm_hv_hypercall_enabled(vcpu->kvm))
5915 return kvm_hv_hypercall(vcpu);
5917 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5918 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5919 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5920 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5921 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5923 trace_kvm_hypercall(nr, a0, a1, a2, a3);
5925 op_64_bit = is_64_bit_mode(vcpu);
5934 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5940 case KVM_HC_VAPIC_POLL_IRQ:
5943 case KVM_HC_KICK_CPU:
5944 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5954 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5955 ++vcpu->stat.hypercalls;
5958 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5960 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5962 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5963 char instruction[3];
5964 unsigned long rip = kvm_rip_read(vcpu);
5966 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5968 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5971 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5973 return vcpu->run->request_interrupt_window &&
5974 likely(!pic_in_kernel(vcpu->kvm));
5977 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5979 struct kvm_run *kvm_run = vcpu->run;
5981 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5982 kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5983 kvm_run->cr8 = kvm_get_cr8(vcpu);
5984 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5985 kvm_run->ready_for_interrupt_injection =
5986 pic_in_kernel(vcpu->kvm) ||
5987 kvm_vcpu_ready_for_interrupt_injection(vcpu);
5990 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5994 if (!kvm_x86_ops->update_cr8_intercept)
5997 if (!vcpu->arch.apic)
6000 if (vcpu->arch.apicv_active)
6003 if (!vcpu->arch.apic->vapic_addr)
6004 max_irr = kvm_lapic_find_highest_irr(vcpu);
6011 tpr = kvm_lapic_get_cr8(vcpu);
6013 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6016 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6020 /* try to reinject previous events if any */
6021 if (vcpu->arch.exception.pending) {
6022 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6023 vcpu->arch.exception.has_error_code,
6024 vcpu->arch.exception.error_code);
6026 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6027 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6030 if (vcpu->arch.exception.nr == DB_VECTOR &&
6031 (vcpu->arch.dr7 & DR7_GD)) {
6032 vcpu->arch.dr7 &= ~DR7_GD;
6033 kvm_update_dr7(vcpu);
6036 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6037 vcpu->arch.exception.has_error_code,
6038 vcpu->arch.exception.error_code,
6039 vcpu->arch.exception.reinject);
6043 if (vcpu->arch.nmi_injected) {
6044 kvm_x86_ops->set_nmi(vcpu);
6048 if (vcpu->arch.interrupt.pending) {
6049 kvm_x86_ops->set_irq(vcpu);
6053 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6054 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6059 /* try to inject new event if pending */
6060 if (vcpu->arch.nmi_pending) {
6061 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6062 --vcpu->arch.nmi_pending;
6063 vcpu->arch.nmi_injected = true;
6064 kvm_x86_ops->set_nmi(vcpu);
6066 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6068 * Because interrupts can be injected asynchronously, we are
6069 * calling check_nested_events again here to avoid a race condition.
6070 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6071 * proposal and current concerns. Perhaps we should be setting
6072 * KVM_REQ_EVENT only on certain events and not unconditionally?
6074 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6075 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6079 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6080 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6082 kvm_x86_ops->set_irq(vcpu);
6088 static void process_nmi(struct kvm_vcpu *vcpu)
6093 * x86 is limited to one NMI running, and one NMI pending after it.
6094 * If an NMI is already in progress, limit further NMIs to just one.
6095 * Otherwise, allow two (and we'll inject the first one immediately).
6097 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6100 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6101 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6102 kvm_make_request(KVM_REQ_EVENT, vcpu);
6105 #define put_smstate(type, buf, offset, val) \
6106 *(type *)((buf) + (offset) - 0x7e00) = val
6108 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6111 flags |= seg->g << 23;
6112 flags |= seg->db << 22;
6113 flags |= seg->l << 21;
6114 flags |= seg->avl << 20;
6115 flags |= seg->present << 15;
6116 flags |= seg->dpl << 13;
6117 flags |= seg->s << 12;
6118 flags |= seg->type << 8;
6122 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6124 struct kvm_segment seg;
6127 kvm_get_segment(vcpu, &seg, n);
6128 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6131 offset = 0x7f84 + n * 12;
6133 offset = 0x7f2c + (n - 3) * 12;
6135 put_smstate(u32, buf, offset + 8, seg.base);
6136 put_smstate(u32, buf, offset + 4, seg.limit);
6137 put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6140 #ifdef CONFIG_X86_64
6141 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6143 struct kvm_segment seg;
6147 kvm_get_segment(vcpu, &seg, n);
6148 offset = 0x7e00 + n * 16;
6150 flags = process_smi_get_segment_flags(&seg) >> 8;
6151 put_smstate(u16, buf, offset, seg.selector);
6152 put_smstate(u16, buf, offset + 2, flags);
6153 put_smstate(u32, buf, offset + 4, seg.limit);
6154 put_smstate(u64, buf, offset + 8, seg.base);
6158 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6161 struct kvm_segment seg;
6165 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6166 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6167 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6168 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6170 for (i = 0; i < 8; i++)
6171 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6173 kvm_get_dr(vcpu, 6, &val);
6174 put_smstate(u32, buf, 0x7fcc, (u32)val);
6175 kvm_get_dr(vcpu, 7, &val);
6176 put_smstate(u32, buf, 0x7fc8, (u32)val);
6178 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6179 put_smstate(u32, buf, 0x7fc4, seg.selector);
6180 put_smstate(u32, buf, 0x7f64, seg.base);
6181 put_smstate(u32, buf, 0x7f60, seg.limit);
6182 put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6184 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6185 put_smstate(u32, buf, 0x7fc0, seg.selector);
6186 put_smstate(u32, buf, 0x7f80, seg.base);
6187 put_smstate(u32, buf, 0x7f7c, seg.limit);
6188 put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6190 kvm_x86_ops->get_gdt(vcpu, &dt);
6191 put_smstate(u32, buf, 0x7f74, dt.address);
6192 put_smstate(u32, buf, 0x7f70, dt.size);
6194 kvm_x86_ops->get_idt(vcpu, &dt);
6195 put_smstate(u32, buf, 0x7f58, dt.address);
6196 put_smstate(u32, buf, 0x7f54, dt.size);
6198 for (i = 0; i < 6; i++)
6199 process_smi_save_seg_32(vcpu, buf, i);
6201 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6204 put_smstate(u32, buf, 0x7efc, 0x00020000);
6205 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6208 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6210 #ifdef CONFIG_X86_64
6212 struct kvm_segment seg;
6216 for (i = 0; i < 16; i++)
6217 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6219 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6220 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6222 kvm_get_dr(vcpu, 6, &val);
6223 put_smstate(u64, buf, 0x7f68, val);
6224 kvm_get_dr(vcpu, 7, &val);
6225 put_smstate(u64, buf, 0x7f60, val);
6227 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6228 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6229 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6231 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6234 put_smstate(u32, buf, 0x7efc, 0x00020064);
6236 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6238 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6239 put_smstate(u16, buf, 0x7e90, seg.selector);
6240 put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6241 put_smstate(u32, buf, 0x7e94, seg.limit);
6242 put_smstate(u64, buf, 0x7e98, seg.base);
6244 kvm_x86_ops->get_idt(vcpu, &dt);
6245 put_smstate(u32, buf, 0x7e84, dt.size);
6246 put_smstate(u64, buf, 0x7e88, dt.address);
6248 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6249 put_smstate(u16, buf, 0x7e70, seg.selector);
6250 put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6251 put_smstate(u32, buf, 0x7e74, seg.limit);
6252 put_smstate(u64, buf, 0x7e78, seg.base);
6254 kvm_x86_ops->get_gdt(vcpu, &dt);
6255 put_smstate(u32, buf, 0x7e64, dt.size);
6256 put_smstate(u64, buf, 0x7e68, dt.address);
6258 for (i = 0; i < 6; i++)
6259 process_smi_save_seg_64(vcpu, buf, i);
6265 static void process_smi(struct kvm_vcpu *vcpu)
6267 struct kvm_segment cs, ds;
6273 vcpu->arch.smi_pending = true;
6277 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6278 vcpu->arch.hflags |= HF_SMM_MASK;
6279 memset(buf, 0, 512);
6280 if (guest_cpuid_has_longmode(vcpu))
6281 process_smi_save_state_64(vcpu, buf);
6283 process_smi_save_state_32(vcpu, buf);
6285 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6287 if (kvm_x86_ops->get_nmi_mask(vcpu))
6288 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6290 kvm_x86_ops->set_nmi_mask(vcpu, true);
6292 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6293 kvm_rip_write(vcpu, 0x8000);
6295 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6296 kvm_x86_ops->set_cr0(vcpu, cr0);
6297 vcpu->arch.cr0 = cr0;
6299 kvm_x86_ops->set_cr4(vcpu, 0);
6301 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6302 dt.address = dt.size = 0;
6303 kvm_x86_ops->set_idt(vcpu, &dt);
6305 __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6307 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6308 cs.base = vcpu->arch.smbase;
6313 cs.limit = ds.limit = 0xffffffff;
6314 cs.type = ds.type = 0x3;
6315 cs.dpl = ds.dpl = 0;
6320 cs.avl = ds.avl = 0;
6321 cs.present = ds.present = 1;
6322 cs.unusable = ds.unusable = 0;
6323 cs.padding = ds.padding = 0;
6325 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6326 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6327 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6328 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6329 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6330 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6332 if (guest_cpuid_has_longmode(vcpu))
6333 kvm_x86_ops->set_efer(vcpu, 0);
6335 kvm_update_cpuid(vcpu);
6336 kvm_mmu_reset_context(vcpu);
6339 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6341 u64 eoi_exit_bitmap[4];
6343 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6346 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6348 if (irqchip_split(vcpu->kvm))
6349 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6351 if (vcpu->arch.apicv_active)
6352 kvm_x86_ops->sync_pir_to_irr(vcpu);
6353 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6355 bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6356 vcpu_to_synic(vcpu)->vec_bitmap, 256);
6357 kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6360 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6362 ++vcpu->stat.tlb_flush;
6363 kvm_x86_ops->tlb_flush(vcpu);
6366 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6368 struct page *page = NULL;
6370 if (!lapic_in_kernel(vcpu))
6373 if (!kvm_x86_ops->set_apic_access_page_addr)
6376 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6377 if (is_error_page(page))
6379 kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6382 * Do not pin apic access page in memory, the MMU notifier
6383 * will call us again if it is migrated or swapped out.
6387 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6389 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6390 unsigned long address)
6393 * The physical address of apic access page is stored in the VMCS.
6394 * Update it when it becomes invalid.
6396 if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6397 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6401 * Returns 1 to let vcpu_run() continue the guest execution loop without
6402 * exiting to the userspace. Otherwise, the value will be returned to the
6405 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6409 dm_request_for_irq_injection(vcpu) &&
6410 kvm_cpu_accept_dm_intr(vcpu);
6412 bool req_immediate_exit = false;
6414 if (vcpu->requests) {
6415 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6416 kvm_mmu_unload(vcpu);
6417 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6418 __kvm_migrate_timers(vcpu);
6419 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6420 kvm_gen_update_masterclock(vcpu->kvm);
6421 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6422 kvm_gen_kvmclock_update(vcpu);
6423 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6424 r = kvm_guest_time_update(vcpu);
6428 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6429 kvm_mmu_sync_roots(vcpu);
6430 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6431 kvm_vcpu_flush_tlb(vcpu);
6432 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6433 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6437 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6438 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6442 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6443 vcpu->fpu_active = 0;
6444 kvm_x86_ops->fpu_deactivate(vcpu);
6446 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6447 /* Page is swapped out. Do synthetic halt */
6448 vcpu->arch.apf.halted = true;
6452 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6453 record_steal_time(vcpu);
6454 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6456 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6458 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6459 kvm_pmu_handle_event(vcpu);
6460 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6461 kvm_pmu_deliver_pmi(vcpu);
6462 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6463 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6464 if (test_bit(vcpu->arch.pending_ioapic_eoi,
6465 vcpu->arch.ioapic_handled_vectors)) {
6466 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6467 vcpu->run->eoi.vector =
6468 vcpu->arch.pending_ioapic_eoi;
6473 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6474 vcpu_scan_ioapic(vcpu);
6475 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6476 kvm_vcpu_reload_apic_access_page(vcpu);
6477 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6478 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6479 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6483 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6484 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6485 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6489 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6490 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6491 vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6495 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6496 kvm_hv_process_stimers(vcpu);
6500 * KVM_REQ_EVENT is not set when posted interrupts are set by
6501 * VT-d hardware, so we have to update RVI unconditionally.
6503 if (kvm_lapic_enabled(vcpu)) {
6505 * Update architecture specific hints for APIC
6506 * virtual interrupt delivery.
6508 if (vcpu->arch.apicv_active)
6509 kvm_x86_ops->hwapic_irr_update(vcpu,
6510 kvm_lapic_find_highest_irr(vcpu));
6513 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6514 kvm_apic_accept_events(vcpu);
6515 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6520 if (inject_pending_event(vcpu, req_int_win) != 0)
6521 req_immediate_exit = true;
6522 /* enable NMI/IRQ window open exits if needed */
6523 else if (vcpu->arch.nmi_pending)
6524 kvm_x86_ops->enable_nmi_window(vcpu);
6525 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6526 kvm_x86_ops->enable_irq_window(vcpu);
6528 if (kvm_lapic_enabled(vcpu)) {
6529 update_cr8_intercept(vcpu);
6530 kvm_lapic_sync_to_vapic(vcpu);
6534 r = kvm_mmu_reload(vcpu);
6536 goto cancel_injection;
6541 kvm_x86_ops->prepare_guest_switch(vcpu);
6542 if (vcpu->fpu_active)
6543 kvm_load_guest_fpu(vcpu);
6544 kvm_load_guest_xcr0(vcpu);
6546 vcpu->mode = IN_GUEST_MODE;
6548 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6550 /* We should set ->mode before check ->requests,
6551 * see the comment in make_all_cpus_request.
6553 smp_mb__after_srcu_read_unlock();
6555 local_irq_disable();
6557 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6558 || need_resched() || signal_pending(current)) {
6559 vcpu->mode = OUTSIDE_GUEST_MODE;
6563 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6565 goto cancel_injection;
6568 if (req_immediate_exit)
6569 smp_send_reschedule(vcpu->cpu);
6571 __kvm_guest_enter();
6573 if (unlikely(vcpu->arch.switch_db_regs)) {
6575 set_debugreg(vcpu->arch.eff_db[0], 0);
6576 set_debugreg(vcpu->arch.eff_db[1], 1);
6577 set_debugreg(vcpu->arch.eff_db[2], 2);
6578 set_debugreg(vcpu->arch.eff_db[3], 3);
6579 set_debugreg(vcpu->arch.dr6, 6);
6580 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6583 trace_kvm_entry(vcpu->vcpu_id);
6584 wait_lapic_expire(vcpu);
6585 kvm_x86_ops->run(vcpu);
6588 * Do this here before restoring debug registers on the host. And
6589 * since we do this before handling the vmexit, a DR access vmexit
6590 * can (a) read the correct value of the debug registers, (b) set
6591 * KVM_DEBUGREG_WONT_EXIT again.
6593 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6596 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6597 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6598 for (i = 0; i < KVM_NR_DB_REGS; i++)
6599 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6603 * If the guest has used debug registers, at least dr7
6604 * will be disabled while returning to the host.
6605 * If we don't have active breakpoints in the host, we don't
6606 * care about the messed up debug address registers. But if
6607 * we have some of them active, restore the old state.
6609 if (hw_breakpoint_active())
6610 hw_breakpoint_restore();
6612 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6614 vcpu->mode = OUTSIDE_GUEST_MODE;
6617 /* Interrupt is enabled by handle_external_intr() */
6618 kvm_x86_ops->handle_external_intr(vcpu);
6623 * We must have an instruction between local_irq_enable() and
6624 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6625 * the interrupt shadow. The stat.exits increment will do nicely.
6626 * But we need to prevent reordering, hence this barrier():
6634 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6637 * Profile KVM exit RIPs:
6639 if (unlikely(prof_on == KVM_PROFILING)) {
6640 unsigned long rip = kvm_rip_read(vcpu);
6641 profile_hit(KVM_PROFILING, (void *)rip);
6644 if (unlikely(vcpu->arch.tsc_always_catchup))
6645 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6647 if (vcpu->arch.apic_attention)
6648 kvm_lapic_sync_from_vapic(vcpu);
6650 r = kvm_x86_ops->handle_exit(vcpu);
6654 kvm_x86_ops->cancel_injection(vcpu);
6655 if (unlikely(vcpu->arch.apic_attention))
6656 kvm_lapic_sync_from_vapic(vcpu);
6661 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6663 if (!kvm_arch_vcpu_runnable(vcpu) &&
6664 (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6665 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6666 kvm_vcpu_block(vcpu);
6667 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6669 if (kvm_x86_ops->post_block)
6670 kvm_x86_ops->post_block(vcpu);
6672 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6676 kvm_apic_accept_events(vcpu);
6677 switch(vcpu->arch.mp_state) {
6678 case KVM_MP_STATE_HALTED:
6679 vcpu->arch.pv.pv_unhalted = false;
6680 vcpu->arch.mp_state =
6681 KVM_MP_STATE_RUNNABLE;
6682 case KVM_MP_STATE_RUNNABLE:
6683 vcpu->arch.apf.halted = false;
6685 case KVM_MP_STATE_INIT_RECEIVED:
6694 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6696 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6697 !vcpu->arch.apf.halted);
6700 static int vcpu_run(struct kvm_vcpu *vcpu)
6703 struct kvm *kvm = vcpu->kvm;
6705 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6708 if (kvm_vcpu_running(vcpu)) {
6709 r = vcpu_enter_guest(vcpu);
6711 r = vcpu_block(kvm, vcpu);
6717 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6718 if (kvm_cpu_has_pending_timer(vcpu))
6719 kvm_inject_pending_timer_irqs(vcpu);
6721 if (dm_request_for_irq_injection(vcpu) &&
6722 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6724 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6725 ++vcpu->stat.request_irq_exits;
6729 kvm_check_async_pf_completion(vcpu);
6731 if (signal_pending(current)) {
6733 vcpu->run->exit_reason = KVM_EXIT_INTR;
6734 ++vcpu->stat.signal_exits;
6737 if (need_resched()) {
6738 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6740 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6744 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6749 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6752 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6753 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6754 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6755 if (r != EMULATE_DONE)
6760 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6762 BUG_ON(!vcpu->arch.pio.count);
6764 return complete_emulated_io(vcpu);
6768 * Implements the following, as a state machine:
6772 * for each mmio piece in the fragment
6780 * for each mmio piece in the fragment
6785 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6787 struct kvm_run *run = vcpu->run;
6788 struct kvm_mmio_fragment *frag;
6791 BUG_ON(!vcpu->mmio_needed);
6793 /* Complete previous fragment */
6794 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6795 len = min(8u, frag->len);
6796 if (!vcpu->mmio_is_write)
6797 memcpy(frag->data, run->mmio.data, len);
6799 if (frag->len <= 8) {
6800 /* Switch to the next fragment. */
6802 vcpu->mmio_cur_fragment++;
6804 /* Go forward to the next mmio piece. */
6810 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6811 vcpu->mmio_needed = 0;
6813 /* FIXME: return into emulator if single-stepping. */
6814 if (vcpu->mmio_is_write)
6816 vcpu->mmio_read_completed = 1;
6817 return complete_emulated_io(vcpu);
6820 run->exit_reason = KVM_EXIT_MMIO;
6821 run->mmio.phys_addr = frag->gpa;
6822 if (vcpu->mmio_is_write)
6823 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6824 run->mmio.len = min(8u, frag->len);
6825 run->mmio.is_write = vcpu->mmio_is_write;
6826 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6831 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6833 struct fpu *fpu = ¤t->thread.fpu;
6837 fpu__activate_curr(fpu);
6839 if (vcpu->sigset_active)
6840 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6842 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6843 kvm_vcpu_block(vcpu);
6844 kvm_apic_accept_events(vcpu);
6845 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6850 /* re-sync apic's tpr */
6851 if (!lapic_in_kernel(vcpu)) {
6852 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6858 if (unlikely(vcpu->arch.complete_userspace_io)) {
6859 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6860 vcpu->arch.complete_userspace_io = NULL;
6865 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6870 post_kvm_run_save(vcpu);
6871 if (vcpu->sigset_active)
6872 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6877 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6879 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6881 * We are here if userspace calls get_regs() in the middle of
6882 * instruction emulation. Registers state needs to be copied
6883 * back from emulation context to vcpu. Userspace shouldn't do
6884 * that usually, but some bad designed PV devices (vmware
6885 * backdoor interface) need this to work
6887 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6888 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6890 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6891 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6892 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6893 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6894 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6895 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6896 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6897 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6898 #ifdef CONFIG_X86_64
6899 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6900 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6901 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6902 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6903 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6904 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6905 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6906 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6909 regs->rip = kvm_rip_read(vcpu);
6910 regs->rflags = kvm_get_rflags(vcpu);
6915 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6917 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6918 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6920 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6921 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6922 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6923 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6924 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6925 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6926 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6927 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6928 #ifdef CONFIG_X86_64
6929 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6930 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6931 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6932 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6933 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6934 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6935 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6936 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6939 kvm_rip_write(vcpu, regs->rip);
6940 kvm_set_rflags(vcpu, regs->rflags);
6942 vcpu->arch.exception.pending = false;
6944 kvm_make_request(KVM_REQ_EVENT, vcpu);
6949 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6951 struct kvm_segment cs;
6953 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6957 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6959 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6960 struct kvm_sregs *sregs)
6964 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6965 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6966 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6967 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6968 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6969 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6971 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6972 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6974 kvm_x86_ops->get_idt(vcpu, &dt);
6975 sregs->idt.limit = dt.size;
6976 sregs->idt.base = dt.address;
6977 kvm_x86_ops->get_gdt(vcpu, &dt);
6978 sregs->gdt.limit = dt.size;
6979 sregs->gdt.base = dt.address;
6981 sregs->cr0 = kvm_read_cr0(vcpu);
6982 sregs->cr2 = vcpu->arch.cr2;
6983 sregs->cr3 = kvm_read_cr3(vcpu);
6984 sregs->cr4 = kvm_read_cr4(vcpu);
6985 sregs->cr8 = kvm_get_cr8(vcpu);
6986 sregs->efer = vcpu->arch.efer;
6987 sregs->apic_base = kvm_get_apic_base(vcpu);
6989 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6991 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6992 set_bit(vcpu->arch.interrupt.nr,
6993 (unsigned long *)sregs->interrupt_bitmap);
6998 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6999 struct kvm_mp_state *mp_state)
7001 kvm_apic_accept_events(vcpu);
7002 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7003 vcpu->arch.pv.pv_unhalted)
7004 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7006 mp_state->mp_state = vcpu->arch.mp_state;
7011 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7012 struct kvm_mp_state *mp_state)
7014 if (!kvm_vcpu_has_lapic(vcpu) &&
7015 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7018 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7019 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7020 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7022 vcpu->arch.mp_state = mp_state->mp_state;
7023 kvm_make_request(KVM_REQ_EVENT, vcpu);
7027 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7028 int reason, bool has_error_code, u32 error_code)
7030 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7033 init_emulate_ctxt(vcpu);
7035 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7036 has_error_code, error_code);
7039 return EMULATE_FAIL;
7041 kvm_rip_write(vcpu, ctxt->eip);
7042 kvm_set_rflags(vcpu, ctxt->eflags);
7043 kvm_make_request(KVM_REQ_EVENT, vcpu);
7044 return EMULATE_DONE;
7046 EXPORT_SYMBOL_GPL(kvm_task_switch);
7048 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7049 struct kvm_sregs *sregs)
7051 struct msr_data apic_base_msr;
7052 int mmu_reset_needed = 0;
7053 int pending_vec, max_bits, idx;
7056 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7059 dt.size = sregs->idt.limit;
7060 dt.address = sregs->idt.base;
7061 kvm_x86_ops->set_idt(vcpu, &dt);
7062 dt.size = sregs->gdt.limit;
7063 dt.address = sregs->gdt.base;
7064 kvm_x86_ops->set_gdt(vcpu, &dt);
7066 vcpu->arch.cr2 = sregs->cr2;
7067 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7068 vcpu->arch.cr3 = sregs->cr3;
7069 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7071 kvm_set_cr8(vcpu, sregs->cr8);
7073 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7074 kvm_x86_ops->set_efer(vcpu, sregs->efer);
7075 apic_base_msr.data = sregs->apic_base;
7076 apic_base_msr.host_initiated = true;
7077 kvm_set_apic_base(vcpu, &apic_base_msr);
7079 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7080 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7081 vcpu->arch.cr0 = sregs->cr0;
7083 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7084 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7085 if (sregs->cr4 & X86_CR4_OSXSAVE)
7086 kvm_update_cpuid(vcpu);
7088 idx = srcu_read_lock(&vcpu->kvm->srcu);
7089 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7090 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7091 mmu_reset_needed = 1;
7093 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7095 if (mmu_reset_needed)
7096 kvm_mmu_reset_context(vcpu);
7098 max_bits = KVM_NR_INTERRUPTS;
7099 pending_vec = find_first_bit(
7100 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7101 if (pending_vec < max_bits) {
7102 kvm_queue_interrupt(vcpu, pending_vec, false);
7103 pr_debug("Set back pending irq %d\n", pending_vec);
7106 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7107 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7108 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7109 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7110 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7111 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7113 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7114 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7116 update_cr8_intercept(vcpu);
7118 /* Older userspace won't unhalt the vcpu on reset. */
7119 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7120 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7122 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7124 kvm_make_request(KVM_REQ_EVENT, vcpu);
7129 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7130 struct kvm_guest_debug *dbg)
7132 unsigned long rflags;
7135 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7137 if (vcpu->arch.exception.pending)
7139 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7140 kvm_queue_exception(vcpu, DB_VECTOR);
7142 kvm_queue_exception(vcpu, BP_VECTOR);
7146 * Read rflags as long as potentially injected trace flags are still
7149 rflags = kvm_get_rflags(vcpu);
7151 vcpu->guest_debug = dbg->control;
7152 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7153 vcpu->guest_debug = 0;
7155 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7156 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7157 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7158 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7160 for (i = 0; i < KVM_NR_DB_REGS; i++)
7161 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7163 kvm_update_dr7(vcpu);
7165 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7166 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7167 get_segment_base(vcpu, VCPU_SREG_CS);
7170 * Trigger an rflags update that will inject or remove the trace
7173 kvm_set_rflags(vcpu, rflags);
7175 kvm_x86_ops->update_bp_intercept(vcpu);
7185 * Translate a guest virtual address to a guest physical address.
7187 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7188 struct kvm_translation *tr)
7190 unsigned long vaddr = tr->linear_address;
7194 idx = srcu_read_lock(&vcpu->kvm->srcu);
7195 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7196 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7197 tr->physical_address = gpa;
7198 tr->valid = gpa != UNMAPPED_GVA;
7205 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7207 struct fxregs_state *fxsave =
7208 &vcpu->arch.guest_fpu.state.fxsave;
7210 memcpy(fpu->fpr, fxsave->st_space, 128);
7211 fpu->fcw = fxsave->cwd;
7212 fpu->fsw = fxsave->swd;
7213 fpu->ftwx = fxsave->twd;
7214 fpu->last_opcode = fxsave->fop;
7215 fpu->last_ip = fxsave->rip;
7216 fpu->last_dp = fxsave->rdp;
7217 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7222 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7224 struct fxregs_state *fxsave =
7225 &vcpu->arch.guest_fpu.state.fxsave;
7227 memcpy(fxsave->st_space, fpu->fpr, 128);
7228 fxsave->cwd = fpu->fcw;
7229 fxsave->swd = fpu->fsw;
7230 fxsave->twd = fpu->ftwx;
7231 fxsave->fop = fpu->last_opcode;
7232 fxsave->rip = fpu->last_ip;
7233 fxsave->rdp = fpu->last_dp;
7234 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7239 static void fx_init(struct kvm_vcpu *vcpu)
7241 fpstate_init(&vcpu->arch.guest_fpu.state);
7243 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7244 host_xcr0 | XSTATE_COMPACTION_ENABLED;
7247 * Ensure guest xcr0 is valid for loading
7249 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7251 vcpu->arch.cr0 |= X86_CR0_ET;
7254 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7256 if (vcpu->guest_fpu_loaded)
7260 * Restore all possible states in the guest,
7261 * and assume host would use all available bits.
7262 * Guest xcr0 would be loaded later.
7264 kvm_put_guest_xcr0(vcpu);
7265 vcpu->guest_fpu_loaded = 1;
7266 __kernel_fpu_begin();
7267 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7271 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7273 kvm_put_guest_xcr0(vcpu);
7275 if (!vcpu->guest_fpu_loaded) {
7276 vcpu->fpu_counter = 0;
7280 vcpu->guest_fpu_loaded = 0;
7281 copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7283 ++vcpu->stat.fpu_reload;
7285 * If using eager FPU mode, or if the guest is a frequent user
7286 * of the FPU, just leave the FPU active for next time.
7287 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7288 * the FPU in bursts will revert to loading it on demand.
7290 if (!vcpu->arch.eager_fpu) {
7291 if (++vcpu->fpu_counter < 5)
7292 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7297 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7299 kvmclock_reset(vcpu);
7301 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7302 kvm_x86_ops->vcpu_free(vcpu);
7305 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7308 struct kvm_vcpu *vcpu;
7310 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7311 printk_once(KERN_WARNING
7312 "kvm: SMP vm created on host with unstable TSC; "
7313 "guest TSC will not be reliable\n");
7315 vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7320 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7324 kvm_vcpu_mtrr_init(vcpu);
7325 r = vcpu_load(vcpu);
7328 kvm_vcpu_reset(vcpu, false);
7329 kvm_mmu_setup(vcpu);
7334 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7336 struct msr_data msr;
7337 struct kvm *kvm = vcpu->kvm;
7339 if (vcpu_load(vcpu))
7342 msr.index = MSR_IA32_TSC;
7343 msr.host_initiated = true;
7344 kvm_write_tsc(vcpu, &msr);
7347 if (!kvmclock_periodic_sync)
7350 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7351 KVMCLOCK_SYNC_PERIOD);
7354 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7357 vcpu->arch.apf.msr_val = 0;
7359 r = vcpu_load(vcpu);
7361 kvm_mmu_unload(vcpu);
7364 kvm_x86_ops->vcpu_free(vcpu);
7367 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7369 vcpu->arch.hflags = 0;
7371 atomic_set(&vcpu->arch.nmi_queued, 0);
7372 vcpu->arch.nmi_pending = 0;
7373 vcpu->arch.nmi_injected = false;
7374 kvm_clear_interrupt_queue(vcpu);
7375 kvm_clear_exception_queue(vcpu);
7377 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7378 kvm_update_dr0123(vcpu);
7379 vcpu->arch.dr6 = DR6_INIT;
7380 kvm_update_dr6(vcpu);
7381 vcpu->arch.dr7 = DR7_FIXED_1;
7382 kvm_update_dr7(vcpu);
7386 kvm_make_request(KVM_REQ_EVENT, vcpu);
7387 vcpu->arch.apf.msr_val = 0;
7388 vcpu->arch.st.msr_val = 0;
7390 kvmclock_reset(vcpu);
7392 kvm_clear_async_pf_completion_queue(vcpu);
7393 kvm_async_pf_hash_reset(vcpu);
7394 vcpu->arch.apf.halted = false;
7397 kvm_pmu_reset(vcpu);
7398 vcpu->arch.smbase = 0x30000;
7401 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7402 vcpu->arch.regs_avail = ~0;
7403 vcpu->arch.regs_dirty = ~0;
7405 kvm_x86_ops->vcpu_reset(vcpu, init_event);
7408 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7410 struct kvm_segment cs;
7412 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7413 cs.selector = vector << 8;
7414 cs.base = vector << 12;
7415 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7416 kvm_rip_write(vcpu, 0);
7419 int kvm_arch_hardware_enable(void)
7422 struct kvm_vcpu *vcpu;
7427 bool stable, backwards_tsc = false;
7429 kvm_shared_msr_cpu_online();
7430 ret = kvm_x86_ops->hardware_enable();
7434 local_tsc = rdtsc();
7435 stable = !check_tsc_unstable();
7436 list_for_each_entry(kvm, &vm_list, vm_list) {
7437 kvm_for_each_vcpu(i, vcpu, kvm) {
7438 if (!stable && vcpu->cpu == smp_processor_id())
7439 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7440 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7441 backwards_tsc = true;
7442 if (vcpu->arch.last_host_tsc > max_tsc)
7443 max_tsc = vcpu->arch.last_host_tsc;
7449 * Sometimes, even reliable TSCs go backwards. This happens on
7450 * platforms that reset TSC during suspend or hibernate actions, but
7451 * maintain synchronization. We must compensate. Fortunately, we can
7452 * detect that condition here, which happens early in CPU bringup,
7453 * before any KVM threads can be running. Unfortunately, we can't
7454 * bring the TSCs fully up to date with real time, as we aren't yet far
7455 * enough into CPU bringup that we know how much real time has actually
7456 * elapsed; our helper function, get_kernel_ns() will be using boot
7457 * variables that haven't been updated yet.
7459 * So we simply find the maximum observed TSC above, then record the
7460 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7461 * the adjustment will be applied. Note that we accumulate
7462 * adjustments, in case multiple suspend cycles happen before some VCPU
7463 * gets a chance to run again. In the event that no KVM threads get a
7464 * chance to run, we will miss the entire elapsed period, as we'll have
7465 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7466 * loose cycle time. This isn't too big a deal, since the loss will be
7467 * uniform across all VCPUs (not to mention the scenario is extremely
7468 * unlikely). It is possible that a second hibernate recovery happens
7469 * much faster than a first, causing the observed TSC here to be
7470 * smaller; this would require additional padding adjustment, which is
7471 * why we set last_host_tsc to the local tsc observed here.
7473 * N.B. - this code below runs only on platforms with reliable TSC,
7474 * as that is the only way backwards_tsc is set above. Also note
7475 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7476 * have the same delta_cyc adjustment applied if backwards_tsc
7477 * is detected. Note further, this adjustment is only done once,
7478 * as we reset last_host_tsc on all VCPUs to stop this from being
7479 * called multiple times (one for each physical CPU bringup).
7481 * Platforms with unreliable TSCs don't have to deal with this, they
7482 * will be compensated by the logic in vcpu_load, which sets the TSC to
7483 * catchup mode. This will catchup all VCPUs to real time, but cannot
7484 * guarantee that they stay in perfect synchronization.
7486 if (backwards_tsc) {
7487 u64 delta_cyc = max_tsc - local_tsc;
7488 backwards_tsc_observed = true;
7489 list_for_each_entry(kvm, &vm_list, vm_list) {
7490 kvm_for_each_vcpu(i, vcpu, kvm) {
7491 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7492 vcpu->arch.last_host_tsc = local_tsc;
7493 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7497 * We have to disable TSC offset matching.. if you were
7498 * booting a VM while issuing an S4 host suspend....
7499 * you may have some problem. Solving this issue is
7500 * left as an exercise to the reader.
7502 kvm->arch.last_tsc_nsec = 0;
7503 kvm->arch.last_tsc_write = 0;
7510 void kvm_arch_hardware_disable(void)
7512 kvm_x86_ops->hardware_disable();
7513 drop_user_return_notifiers();
7516 int kvm_arch_hardware_setup(void)
7520 r = kvm_x86_ops->hardware_setup();
7524 if (kvm_has_tsc_control) {
7526 * Make sure the user can only configure tsc_khz values that
7527 * fit into a signed integer.
7528 * A min value is not calculated needed because it will always
7529 * be 1 on all machines.
7531 u64 max = min(0x7fffffffULL,
7532 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7533 kvm_max_guest_tsc_khz = max;
7535 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7538 kvm_init_msr_list();
7542 void kvm_arch_hardware_unsetup(void)
7544 kvm_x86_ops->hardware_unsetup();
7547 void kvm_arch_check_processor_compat(void *rtn)
7549 kvm_x86_ops->check_processor_compatibility(rtn);
7552 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7554 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7556 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7558 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7560 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7563 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7565 return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7568 struct static_key kvm_no_apic_vcpu __read_mostly;
7570 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7576 BUG_ON(vcpu->kvm == NULL);
7579 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7580 vcpu->arch.pv.pv_unhalted = false;
7581 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7582 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7583 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7585 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7587 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7592 vcpu->arch.pio_data = page_address(page);
7594 kvm_set_tsc_khz(vcpu, max_tsc_khz);
7596 r = kvm_mmu_create(vcpu);
7598 goto fail_free_pio_data;
7600 if (irqchip_in_kernel(kvm)) {
7601 r = kvm_create_lapic(vcpu);
7603 goto fail_mmu_destroy;
7605 static_key_slow_inc(&kvm_no_apic_vcpu);
7607 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7609 if (!vcpu->arch.mce_banks) {
7611 goto fail_free_lapic;
7613 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7615 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7617 goto fail_free_mce_banks;
7622 vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7623 vcpu->arch.pv_time_enabled = false;
7625 vcpu->arch.guest_supported_xcr0 = 0;
7626 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7628 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7630 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7632 kvm_async_pf_hash_reset(vcpu);
7635 vcpu->arch.pending_external_vector = -1;
7637 kvm_hv_vcpu_init(vcpu);
7641 fail_free_mce_banks:
7642 kfree(vcpu->arch.mce_banks);
7644 kvm_free_lapic(vcpu);
7646 kvm_mmu_destroy(vcpu);
7648 free_page((unsigned long)vcpu->arch.pio_data);
7653 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7657 kvm_hv_vcpu_uninit(vcpu);
7658 kvm_pmu_destroy(vcpu);
7659 kfree(vcpu->arch.mce_banks);
7660 kvm_free_lapic(vcpu);
7661 idx = srcu_read_lock(&vcpu->kvm->srcu);
7662 kvm_mmu_destroy(vcpu);
7663 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7664 free_page((unsigned long)vcpu->arch.pio_data);
7665 if (!lapic_in_kernel(vcpu))
7666 static_key_slow_dec(&kvm_no_apic_vcpu);
7669 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7671 kvm_x86_ops->sched_in(vcpu, cpu);
7674 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7679 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7680 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7681 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7682 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7683 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7685 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7686 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7687 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7688 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7689 &kvm->arch.irq_sources_bitmap);
7691 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7692 mutex_init(&kvm->arch.apic_map_lock);
7693 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7695 pvclock_update_vm_gtod_copy(kvm);
7697 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7698 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7703 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7706 r = vcpu_load(vcpu);
7708 kvm_mmu_unload(vcpu);
7712 static void kvm_free_vcpus(struct kvm *kvm)
7715 struct kvm_vcpu *vcpu;
7718 * Unpin any mmu pages first.
7720 kvm_for_each_vcpu(i, vcpu, kvm) {
7721 kvm_clear_async_pf_completion_queue(vcpu);
7722 kvm_unload_vcpu_mmu(vcpu);
7724 kvm_for_each_vcpu(i, vcpu, kvm)
7725 kvm_arch_vcpu_free(vcpu);
7727 mutex_lock(&kvm->lock);
7728 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7729 kvm->vcpus[i] = NULL;
7731 atomic_set(&kvm->online_vcpus, 0);
7732 mutex_unlock(&kvm->lock);
7735 void kvm_arch_sync_events(struct kvm *kvm)
7737 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7738 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7739 kvm_free_all_assigned_devices(kvm);
7743 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7747 struct kvm_memslots *slots = kvm_memslots(kvm);
7748 struct kvm_memory_slot *slot, old;
7750 /* Called with kvm->slots_lock held. */
7751 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7754 slot = id_to_memslot(slots, id);
7756 if (WARN_ON(slot->npages))
7760 * MAP_SHARED to prevent internal slot pages from being moved
7763 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7764 MAP_SHARED | MAP_ANONYMOUS, 0);
7765 if (IS_ERR((void *)hva))
7766 return PTR_ERR((void *)hva);
7775 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7776 struct kvm_userspace_memory_region m;
7778 m.slot = id | (i << 16);
7780 m.guest_phys_addr = gpa;
7781 m.userspace_addr = hva;
7782 m.memory_size = size;
7783 r = __kvm_set_memory_region(kvm, &m);
7789 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7795 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7797 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7801 mutex_lock(&kvm->slots_lock);
7802 r = __x86_set_memory_region(kvm, id, gpa, size);
7803 mutex_unlock(&kvm->slots_lock);
7807 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7809 void kvm_arch_destroy_vm(struct kvm *kvm)
7811 if (current->mm == kvm->mm) {
7813 * Free memory regions allocated on behalf of userspace,
7814 * unless the the memory map has changed due to process exit
7817 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7818 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7819 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7821 kvm_iommu_unmap_guest(kvm);
7822 kfree(kvm->arch.vpic);
7823 kfree(kvm->arch.vioapic);
7824 kvm_free_vcpus(kvm);
7825 kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7828 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7829 struct kvm_memory_slot *dont)
7833 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7834 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7835 kvfree(free->arch.rmap[i]);
7836 free->arch.rmap[i] = NULL;
7841 if (!dont || free->arch.lpage_info[i - 1] !=
7842 dont->arch.lpage_info[i - 1]) {
7843 kvfree(free->arch.lpage_info[i - 1]);
7844 free->arch.lpage_info[i - 1] = NULL;
7849 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7850 unsigned long npages)
7854 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7859 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7860 slot->base_gfn, level) + 1;
7862 slot->arch.rmap[i] =
7863 kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7864 if (!slot->arch.rmap[i])
7869 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7870 sizeof(*slot->arch.lpage_info[i - 1]));
7871 if (!slot->arch.lpage_info[i - 1])
7874 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7875 slot->arch.lpage_info[i - 1][0].write_count = 1;
7876 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7877 slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7878 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7880 * If the gfn and userspace address are not aligned wrt each
7881 * other, or if explicitly asked to, disable large page
7882 * support for this slot
7884 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7885 !kvm_largepages_enabled()) {
7888 for (j = 0; j < lpages; ++j)
7889 slot->arch.lpage_info[i - 1][j].write_count = 1;
7896 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7897 kvfree(slot->arch.rmap[i]);
7898 slot->arch.rmap[i] = NULL;
7902 kvfree(slot->arch.lpage_info[i - 1]);
7903 slot->arch.lpage_info[i - 1] = NULL;
7908 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7911 * memslots->generation has been incremented.
7912 * mmio generation may have reached its maximum value.
7914 kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7917 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7918 struct kvm_memory_slot *memslot,
7919 const struct kvm_userspace_memory_region *mem,
7920 enum kvm_mr_change change)
7925 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7926 struct kvm_memory_slot *new)
7928 /* Still write protect RO slot */
7929 if (new->flags & KVM_MEM_READONLY) {
7930 kvm_mmu_slot_remove_write_access(kvm, new);
7935 * Call kvm_x86_ops dirty logging hooks when they are valid.
7937 * kvm_x86_ops->slot_disable_log_dirty is called when:
7939 * - KVM_MR_CREATE with dirty logging is disabled
7940 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7942 * The reason is, in case of PML, we need to set D-bit for any slots
7943 * with dirty logging disabled in order to eliminate unnecessary GPA
7944 * logging in PML buffer (and potential PML buffer full VMEXT). This
7945 * guarantees leaving PML enabled during guest's lifetime won't have
7946 * any additonal overhead from PML when guest is running with dirty
7947 * logging disabled for memory slots.
7949 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7950 * to dirty logging mode.
7952 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7954 * In case of write protect:
7956 * Write protect all pages for dirty logging.
7958 * All the sptes including the large sptes which point to this
7959 * slot are set to readonly. We can not create any new large
7960 * spte on this slot until the end of the logging.
7962 * See the comments in fast_page_fault().
7964 if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7965 if (kvm_x86_ops->slot_enable_log_dirty)
7966 kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7968 kvm_mmu_slot_remove_write_access(kvm, new);
7970 if (kvm_x86_ops->slot_disable_log_dirty)
7971 kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7975 void kvm_arch_commit_memory_region(struct kvm *kvm,
7976 const struct kvm_userspace_memory_region *mem,
7977 const struct kvm_memory_slot *old,
7978 const struct kvm_memory_slot *new,
7979 enum kvm_mr_change change)
7981 int nr_mmu_pages = 0;
7983 if (!kvm->arch.n_requested_mmu_pages)
7984 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7987 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7990 * Dirty logging tracks sptes in 4k granularity, meaning that large
7991 * sptes have to be split. If live migration is successful, the guest
7992 * in the source machine will be destroyed and large sptes will be
7993 * created in the destination. However, if the guest continues to run
7994 * in the source machine (for example if live migration fails), small
7995 * sptes will remain around and cause bad performance.
7997 * Scan sptes if dirty logging has been stopped, dropping those
7998 * which can be collapsed into a single large-page spte. Later
7999 * page faults will create the large-page sptes.
8001 if ((change != KVM_MR_DELETE) &&
8002 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8003 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8004 kvm_mmu_zap_collapsible_sptes(kvm, new);
8007 * Set up write protection and/or dirty logging for the new slot.
8009 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8010 * been zapped so no dirty logging staff is needed for old slot. For
8011 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8012 * new and it's also covered when dealing with the new slot.
8014 * FIXME: const-ify all uses of struct kvm_memory_slot.
8016 if (change != KVM_MR_DELETE)
8017 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8020 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8022 kvm_mmu_invalidate_zap_all_pages(kvm);
8025 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8026 struct kvm_memory_slot *slot)
8028 kvm_mmu_invalidate_zap_all_pages(kvm);
8031 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8033 if (!list_empty_careful(&vcpu->async_pf.done))
8036 if (kvm_apic_has_events(vcpu))
8039 if (vcpu->arch.pv.pv_unhalted)
8042 if (atomic_read(&vcpu->arch.nmi_queued))
8045 if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8048 if (kvm_arch_interrupt_allowed(vcpu) &&
8049 kvm_cpu_has_interrupt(vcpu))
8052 if (kvm_hv_has_stimer_pending(vcpu))
8058 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8060 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8061 kvm_x86_ops->check_nested_events(vcpu, false);
8063 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8066 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8068 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8071 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8073 return kvm_x86_ops->interrupt_allowed(vcpu);
8076 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8078 if (is_64_bit_mode(vcpu))
8079 return kvm_rip_read(vcpu);
8080 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8081 kvm_rip_read(vcpu));
8083 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8085 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8087 return kvm_get_linear_rip(vcpu) == linear_rip;
8089 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8091 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8093 unsigned long rflags;
8095 rflags = kvm_x86_ops->get_rflags(vcpu);
8096 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8097 rflags &= ~X86_EFLAGS_TF;
8100 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8102 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8104 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8105 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8106 rflags |= X86_EFLAGS_TF;
8107 kvm_x86_ops->set_rflags(vcpu, rflags);
8110 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8112 __kvm_set_rflags(vcpu, rflags);
8113 kvm_make_request(KVM_REQ_EVENT, vcpu);
8115 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8117 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8121 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8125 r = kvm_mmu_reload(vcpu);
8129 if (!vcpu->arch.mmu.direct_map &&
8130 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8133 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8136 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8138 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8141 static inline u32 kvm_async_pf_next_probe(u32 key)
8143 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8146 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8148 u32 key = kvm_async_pf_hash_fn(gfn);
8150 while (vcpu->arch.apf.gfns[key] != ~0)
8151 key = kvm_async_pf_next_probe(key);
8153 vcpu->arch.apf.gfns[key] = gfn;
8156 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8159 u32 key = kvm_async_pf_hash_fn(gfn);
8161 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8162 (vcpu->arch.apf.gfns[key] != gfn &&
8163 vcpu->arch.apf.gfns[key] != ~0); i++)
8164 key = kvm_async_pf_next_probe(key);
8169 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8171 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8174 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8178 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8180 vcpu->arch.apf.gfns[i] = ~0;
8182 j = kvm_async_pf_next_probe(j);
8183 if (vcpu->arch.apf.gfns[j] == ~0)
8185 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8187 * k lies cyclically in ]i,j]
8189 * |....j i.k.| or |.k..j i...|
8191 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8192 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8197 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8200 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8204 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8205 struct kvm_async_pf *work)
8207 struct x86_exception fault;
8209 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8210 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8212 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8213 (vcpu->arch.apf.send_user_only &&
8214 kvm_x86_ops->get_cpl(vcpu) == 0))
8215 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8216 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8217 fault.vector = PF_VECTOR;
8218 fault.error_code_valid = true;
8219 fault.error_code = 0;
8220 fault.nested_page_fault = false;
8221 fault.address = work->arch.token;
8222 kvm_inject_page_fault(vcpu, &fault);
8226 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8227 struct kvm_async_pf *work)
8229 struct x86_exception fault;
8231 trace_kvm_async_pf_ready(work->arch.token, work->gva);
8232 if (work->wakeup_all)
8233 work->arch.token = ~0; /* broadcast wakeup */
8235 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8237 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8238 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8239 fault.vector = PF_VECTOR;
8240 fault.error_code_valid = true;
8241 fault.error_code = 0;
8242 fault.nested_page_fault = false;
8243 fault.address = work->arch.token;
8244 kvm_inject_page_fault(vcpu, &fault);
8246 vcpu->arch.apf.halted = false;
8247 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8250 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8252 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8255 return !kvm_event_needs_reinjection(vcpu) &&
8256 kvm_x86_ops->interrupt_allowed(vcpu);
8259 void kvm_arch_start_assignment(struct kvm *kvm)
8261 atomic_inc(&kvm->arch.assigned_device_count);
8263 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8265 void kvm_arch_end_assignment(struct kvm *kvm)
8267 atomic_dec(&kvm->arch.assigned_device_count);
8269 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8271 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8273 return atomic_read(&kvm->arch.assigned_device_count);
8275 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8277 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8279 atomic_inc(&kvm->arch.noncoherent_dma_count);
8281 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8283 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8285 atomic_dec(&kvm->arch.noncoherent_dma_count);
8287 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8289 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8291 return atomic_read(&kvm->arch.noncoherent_dma_count);
8293 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8295 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8296 struct irq_bypass_producer *prod)
8298 struct kvm_kernel_irqfd *irqfd =
8299 container_of(cons, struct kvm_kernel_irqfd, consumer);
8301 if (kvm_x86_ops->update_pi_irte) {
8302 irqfd->producer = prod;
8303 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8304 prod->irq, irqfd->gsi, 1);
8310 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8311 struct irq_bypass_producer *prod)
8314 struct kvm_kernel_irqfd *irqfd =
8315 container_of(cons, struct kvm_kernel_irqfd, consumer);
8317 if (!kvm_x86_ops->update_pi_irte) {
8318 WARN_ON(irqfd->producer != NULL);
8322 WARN_ON(irqfd->producer != prod);
8323 irqfd->producer = NULL;
8326 * When producer of consumer is unregistered, we change back to
8327 * remapped mode, so we can re-use the current implementation
8328 * when the irq is masked/disabed or the consumer side (KVM
8329 * int this case doesn't want to receive the interrupts.
8331 ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8333 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8334 " fails: %d\n", irqfd->consumer.token, ret);
8337 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8338 uint32_t guest_irq, bool set)
8340 if (!kvm_x86_ops->update_pi_irte)
8343 return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8346 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8347 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8348 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8349 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8350 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8351 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8352 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8353 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8354 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8355 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8356 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8357 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8358 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8359 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8360 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8361 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8362 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);