arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <trace/events/kvm.h>
  41 #undef TRACE_INCLUDE_FILE
  42 #define CREATE_TRACE_POINTS
  43 #include "trace.h"
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/msr.h>
  47 #include <asm/desc.h>
  48 #include <asm/mtrr.h>
  49 #include <asm/mce.h>
  50
  51 #define MAX_IO_MSRS 256
  52 #define CR0_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  56 #define CR4_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  61
  62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  63
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  66
  67 /* EFER defaults:
  68  * - enable syscall per default because its emulated by KVM
  69  * - enable LME and LMA per default on 64 bit KVM
  70  */
  71 #ifdef CONFIG_X86_64
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  73 #else
  74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  75 #endif
  76
  77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  79
  80 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  82                                     struct kvm_cpuid_entry2 __user *entries);
  83
  84 struct kvm_x86_ops *kvm_x86_ops;
  85 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  86
  87 int ignore_msrs = 0;
  88 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  89
  90 struct kvm_stats_debugfs_item debugfs_entries[] = {
  91         { "pf_fixed", VCPU_STAT(pf_fixed) },
  92         { "pf_guest", VCPU_STAT(pf_guest) },
  93         { "tlb_flush", VCPU_STAT(tlb_flush) },
  94         { "invlpg", VCPU_STAT(invlpg) },
  95         { "exits", VCPU_STAT(exits) },
  96         { "io_exits", VCPU_STAT(io_exits) },
  97         { "mmio_exits", VCPU_STAT(mmio_exits) },
  98         { "signal_exits", VCPU_STAT(signal_exits) },
  99         { "irq_window", VCPU_STAT(irq_window_exits) },
 100         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 101         { "halt_exits", VCPU_STAT(halt_exits) },
 102         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 103         { "hypercalls", VCPU_STAT(hypercalls) },
 104         { "request_irq", VCPU_STAT(request_irq_exits) },
 105         { "irq_exits", VCPU_STAT(irq_exits) },
 106         { "host_state_reload", VCPU_STAT(host_state_reload) },
 107         { "efer_reload", VCPU_STAT(efer_reload) },
 108         { "fpu_reload", VCPU_STAT(fpu_reload) },
 109         { "insn_emulation", VCPU_STAT(insn_emulation) },
 110         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 111         { "irq_injections", VCPU_STAT(irq_injections) },
 112         { "nmi_injections", VCPU_STAT(nmi_injections) },
 113         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 114         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 115         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 116         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 117         { "mmu_flooded", VM_STAT(mmu_flooded) },
 118         { "mmu_recycled", VM_STAT(mmu_recycled) },
 119         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 120         { "mmu_unsync", VM_STAT(mmu_unsync) },
 121         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 122         { "largepages", VM_STAT(lpages) },
 123         { NULL }
 124 };
 125
 126 unsigned long segment_base(u16 selector)
 127 {
 128         struct descriptor_table gdt;
 129         struct desc_struct *d;
 130         unsigned long table_base;
 131         unsigned long v;
 132
 133         if (selector == 0)
 134                 return 0;
 135
 136         kvm_get_gdt(&gdt);
 137         table_base = gdt.base;
 138
 139         if (selector & 4) {           /* from ldt */
 140                 u16 ldt_selector = kvm_read_ldt();
 141
 142                 table_base = segment_base(ldt_selector);
 143         }
 144         d = (struct desc_struct *)(table_base + (selector & ~7));
 145         v = get_desc_base(d);
 146 #ifdef CONFIG_X86_64
 147         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 148                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 149 #endif
 150         return v;
 151 }
 152 EXPORT_SYMBOL_GPL(segment_base);
 153
 154 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 155 {
 156         if (irqchip_in_kernel(vcpu->kvm))
 157                 return vcpu->arch.apic_base;
 158         else
 159                 return vcpu->arch.apic_base;
 160 }
 161 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 162
 163 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 164 {
 165         /* TODO: reserve bits check */
 166         if (irqchip_in_kernel(vcpu->kvm))
 167                 kvm_lapic_set_base(vcpu, data);
 168         else
 169                 vcpu->arch.apic_base = data;
 170 }
 171 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 172
 173 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 174 {
 175         WARN_ON(vcpu->arch.exception.pending);
 176         vcpu->arch.exception.pending = true;
 177         vcpu->arch.exception.has_error_code = false;
 178         vcpu->arch.exception.nr = nr;
 179 }
 180 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 181
 182 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 183                            u32 error_code)
 184 {
 185         ++vcpu->stat.pf_guest;
 186
 187         if (vcpu->arch.exception.pending) {
 188                 switch(vcpu->arch.exception.nr) {
 189                 case DF_VECTOR:
 190                         /* triple fault -> shutdown */
 191                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 192                         return;
 193                 case PF_VECTOR:
 194                         vcpu->arch.exception.nr = DF_VECTOR;
 195                         vcpu->arch.exception.error_code = 0;
 196                         return;
 197                 default:
 198                         /* replace previous exception with a new one in a hope
 199                            that instruction re-execution will regenerate lost
 200                            exception */
 201                         vcpu->arch.exception.pending = false;
 202                         break;
 203                 }
 204         }
 205         vcpu->arch.cr2 = addr;
 206         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 207 }
 208
 209 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 210 {
 211         vcpu->arch.nmi_pending = 1;
 212 }
 213 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 214
 215 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 216 {
 217         WARN_ON(vcpu->arch.exception.pending);
 218         vcpu->arch.exception.pending = true;
 219         vcpu->arch.exception.has_error_code = true;
 220         vcpu->arch.exception.nr = nr;
 221         vcpu->arch.exception.error_code = error_code;
 222 }
 223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 224
 225 /*
 226  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 227  * a #GP and return false.
 228  */
 229 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 230 {
 231         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 232                 return true;
 233         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 234         return false;
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 237
 238 /*
 239  * Load the pae pdptrs.  Return true is they are all valid.
 240  */
 241 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 242 {
 243         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 244         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 245         int i;
 246         int ret;
 247         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 248
 249         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 250                                   offset * sizeof(u64), sizeof(pdpte));
 251         if (ret < 0) {
 252                 ret = 0;
 253                 goto out;
 254         }
 255         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 256                 if (is_present_gpte(pdpte[i]) &&
 257                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 258                         ret = 0;
 259                         goto out;
 260                 }
 261         }
 262         ret = 1;
 263
 264         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 265         __set_bit(VCPU_EXREG_PDPTR,
 266                   (unsigned long *)&vcpu->arch.regs_avail);
 267         __set_bit(VCPU_EXREG_PDPTR,
 268                   (unsigned long *)&vcpu->arch.regs_dirty);
 269 out:
 270
 271         return ret;
 272 }
 273 EXPORT_SYMBOL_GPL(load_pdptrs);
 274
 275 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 276 {
 277         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 278         bool changed = true;
 279         int r;
 280
 281         if (is_long_mode(vcpu) || !is_pae(vcpu))
 282                 return false;
 283
 284         if (!test_bit(VCPU_EXREG_PDPTR,
 285                       (unsigned long *)&vcpu->arch.regs_avail))
 286                 return true;
 287
 288         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 289         if (r < 0)
 290                 goto out;
 291         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 292 out:
 293
 294         return changed;
 295 }
 296
 297 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 298 {
 299         if (cr0 & CR0_RESERVED_BITS) {
 300                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 301                        cr0, vcpu->arch.cr0);
 302                 kvm_inject_gp(vcpu, 0);
 303                 return;
 304         }
 305
 306         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 307                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 308                 kvm_inject_gp(vcpu, 0);
 309                 return;
 310         }
 311
 312         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 313                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 314                        "and a clear PE flag\n");
 315                 kvm_inject_gp(vcpu, 0);
 316                 return;
 317         }
 318
 319         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 320 #ifdef CONFIG_X86_64
 321                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 322                         int cs_db, cs_l;
 323
 324                         if (!is_pae(vcpu)) {
 325                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 326                                        "in long mode while PAE is disabled\n");
 327                                 kvm_inject_gp(vcpu, 0);
 328                                 return;
 329                         }
 330                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 331                         if (cs_l) {
 332                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 333                                        "in long mode while CS.L == 1\n");
 334                                 kvm_inject_gp(vcpu, 0);
 335                                 return;
 336
 337                         }
 338                 } else
 339 #endif
 340                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 341                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 342                                "reserved bits\n");
 343                         kvm_inject_gp(vcpu, 0);
 344                         return;
 345                 }
 346
 347         }
 348
 349         kvm_x86_ops->set_cr0(vcpu, cr0);
 350         vcpu->arch.cr0 = cr0;
 351
 352         kvm_mmu_reset_context(vcpu);
 353         return;
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 356
 357 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 358 {
 359         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_lmsw);
 362
 363 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 364 {
 365         unsigned long old_cr4 = vcpu->arch.cr4;
 366         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 367
 368         if (cr4 & CR4_RESERVED_BITS) {
 369                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 370                 kvm_inject_gp(vcpu, 0);
 371                 return;
 372         }
 373
 374         if (is_long_mode(vcpu)) {
 375                 if (!(cr4 & X86_CR4_PAE)) {
 376                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 377                                "in long mode\n");
 378                         kvm_inject_gp(vcpu, 0);
 379                         return;
 380                 }
 381         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 382                    && ((cr4 ^ old_cr4) & pdptr_bits)
 383                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 384                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 385                 kvm_inject_gp(vcpu, 0);
 386                 return;
 387         }
 388
 389         if (cr4 & X86_CR4_VMXE) {
 390                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 391                 kvm_inject_gp(vcpu, 0);
 392                 return;
 393         }
 394         kvm_x86_ops->set_cr4(vcpu, cr4);
 395         vcpu->arch.cr4 = cr4;
 396         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 397         kvm_mmu_reset_context(vcpu);
 398 }
 399 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 400
 401 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 402 {
 403         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 404                 kvm_mmu_sync_roots(vcpu);
 405                 kvm_mmu_flush_tlb(vcpu);
 406                 return;
 407         }
 408
 409         if (is_long_mode(vcpu)) {
 410                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 411                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 412                         kvm_inject_gp(vcpu, 0);
 413                         return;
 414                 }
 415         } else {
 416                 if (is_pae(vcpu)) {
 417                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 418                                 printk(KERN_DEBUG
 419                                        "set_cr3: #GP, reserved bits\n");
 420                                 kvm_inject_gp(vcpu, 0);
 421                                 return;
 422                         }
 423                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 424                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 425                                        "reserved bits\n");
 426                                 kvm_inject_gp(vcpu, 0);
 427                                 return;
 428                         }
 429                 }
 430                 /*
 431                  * We don't check reserved bits in nonpae mode, because
 432                  * this isn't enforced, and VMware depends on this.
 433                  */
 434         }
 435
 436         /*
 437          * Does the new cr3 value map to physical memory? (Note, we
 438          * catch an invalid cr3 even in real-mode, because it would
 439          * cause trouble later on when we turn on paging anyway.)
 440          *
 441          * A real CPU would silently accept an invalid cr3 and would
 442          * attempt to use it - with largely undefined (and often hard
 443          * to debug) behavior on the guest side.
 444          */
 445         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 446                 kvm_inject_gp(vcpu, 0);
 447         else {
 448                 vcpu->arch.cr3 = cr3;
 449                 vcpu->arch.mmu.new_cr3(vcpu);
 450         }
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 453
 454 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 455 {
 456         if (cr8 & CR8_RESERVED_BITS) {
 457                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 458                 kvm_inject_gp(vcpu, 0);
 459                 return;
 460         }
 461         if (irqchip_in_kernel(vcpu->kvm))
 462                 kvm_lapic_set_tpr(vcpu, cr8);
 463         else
 464                 vcpu->arch.cr8 = cr8;
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 467
 468 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 469 {
 470         if (irqchip_in_kernel(vcpu->kvm))
 471                 return kvm_lapic_get_cr8(vcpu);
 472         else
 473                 return vcpu->arch.cr8;
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 476
 477 static inline u32 bit(int bitno)
 478 {
 479         return 1 << (bitno & 31);
 480 }
 481
 482 /*
 483  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 484  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 485  *
 486  * This list is modified at module load time to reflect the
 487  * capabilities of the host cpu. This capabilities test skips MSRs that are
 488  * kvm-specific. Those are put in the beginning of the list.
 489  */
 490
 491 #define KVM_SAVE_MSRS_BEGIN     2
 492 static u32 msrs_to_save[] = {
 493         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 494         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 495         MSR_K6_STAR,
 496 #ifdef CONFIG_X86_64
 497         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 498 #endif
 499         MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 500 };
 501
 502 static unsigned num_msrs_to_save;
 503
 504 static u32 emulated_msrs[] = {
 505         MSR_IA32_MISC_ENABLE,
 506 };
 507
 508 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 509 {
 510         if (efer & efer_reserved_bits) {
 511                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 512                        efer);
 513                 kvm_inject_gp(vcpu, 0);
 514                 return;
 515         }
 516
 517         if (is_paging(vcpu)
 518             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 519                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 520                 kvm_inject_gp(vcpu, 0);
 521                 return;
 522         }
 523
 524         if (efer & EFER_FFXSR) {
 525                 struct kvm_cpuid_entry2 *feat;
 526
 527                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 528                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 529                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 530                         kvm_inject_gp(vcpu, 0);
 531                         return;
 532                 }
 533         }
 534
 535         if (efer & EFER_SVME) {
 536                 struct kvm_cpuid_entry2 *feat;
 537
 538                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 539                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 540                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 541                         kvm_inject_gp(vcpu, 0);
 542                         return;
 543                 }
 544         }
 545
 546         kvm_x86_ops->set_efer(vcpu, efer);
 547
 548         efer &= ~EFER_LMA;
 549         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 550
 551         vcpu->arch.shadow_efer = efer;
 552
 553         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 554         kvm_mmu_reset_context(vcpu);
 555 }
 556
 557 void kvm_enable_efer_bits(u64 mask)
 558 {
 559        efer_reserved_bits &= ~mask;
 560 }
 561 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 562
 563
 564 /*
 565  * Writes msr value into into the appropriate "register".
 566  * Returns 0 on success, non-0 otherwise.
 567  * Assumes vcpu_load() was already called.
 568  */
 569 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 570 {
 571         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 572 }
 573
 574 /*
 575  * Adapt set_msr() to msr_io()'s calling convention
 576  */
 577 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 578 {
 579         return kvm_set_msr(vcpu, index, *data);
 580 }
 581
 582 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 583 {
 584         static int version;
 585         struct pvclock_wall_clock wc;
 586         struct timespec boot;
 587
 588         if (!wall_clock)
 589                 return;
 590
 591         version++;
 592
 593         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 594
 595         /*
 596          * The guest calculates current wall clock time by adding
 597          * system time (updated by kvm_write_guest_time below) to the
 598          * wall clock specified here.  guest system time equals host
 599          * system time for us, thus we must fill in host boot time here.
 600          */
 601         getboottime(&boot);
 602
 603         wc.sec = boot.tv_sec;
 604         wc.nsec = boot.tv_nsec;
 605         wc.version = version;
 606
 607         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 608
 609         version++;
 610         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 611 }
 612
 613 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 614 {
 615         uint32_t quotient, remainder;
 616
 617         /* Don't try to replace with do_div(), this one calculates
 618          * "(dividend << 32) / divisor" */
 619         __asm__ ( "divl %4"
 620                   : "=a" (quotient), "=d" (remainder)
 621                   : "0" (0), "1" (dividend), "r" (divisor) );
 622         return quotient;
 623 }
 624
 625 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 626 {
 627         uint64_t nsecs = 1000000000LL;
 628         int32_t  shift = 0;
 629         uint64_t tps64;
 630         uint32_t tps32;
 631
 632         tps64 = tsc_khz * 1000LL;
 633         while (tps64 > nsecs*2) {
 634                 tps64 >>= 1;
 635                 shift--;
 636         }
 637
 638         tps32 = (uint32_t)tps64;
 639         while (tps32 <= (uint32_t)nsecs) {
 640                 tps32 <<= 1;
 641                 shift++;
 642         }
 643
 644         hv_clock->tsc_shift = shift;
 645         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 646
 647         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 648                  __func__, tsc_khz, hv_clock->tsc_shift,
 649                  hv_clock->tsc_to_system_mul);
 650 }
 651
 652 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 653
 654 static void kvm_write_guest_time(struct kvm_vcpu *v)
 655 {
 656         struct timespec ts;
 657         unsigned long flags;
 658         struct kvm_vcpu_arch *vcpu = &v->arch;
 659         void *shared_kaddr;
 660         unsigned long this_tsc_khz;
 661
 662         if ((!vcpu->time_page))
 663                 return;
 664
 665         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 666         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 667                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 668                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 669         }
 670         put_cpu_var(cpu_tsc_khz);
 671
 672         /* Keep irq disabled to prevent changes to the clock */
 673         local_irq_save(flags);
 674         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 675         ktime_get_ts(&ts);
 676         monotonic_to_bootbased(&ts);
 677         local_irq_restore(flags);
 678
 679         /* With all the info we got, fill in the values */
 680
 681         vcpu->hv_clock.system_time = ts.tv_nsec +
 682                                      (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
 683
 684         /*
 685          * The interface expects us to write an even number signaling that the
 686          * update is finished. Since the guest won't see the intermediate
 687          * state, we just increase by 2 at the end.
 688          */
 689         vcpu->hv_clock.version += 2;
 690
 691         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 692
 693         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 694                sizeof(vcpu->hv_clock));
 695
 696         kunmap_atomic(shared_kaddr, KM_USER0);
 697
 698         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 699 }
 700
 701 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 702 {
 703         struct kvm_vcpu_arch *vcpu = &v->arch;
 704
 705         if (!vcpu->time_page)
 706                 return 0;
 707         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 708         return 1;
 709 }
 710
 711 static bool msr_mtrr_valid(unsigned msr)
 712 {
 713         switch (msr) {
 714         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 715         case MSR_MTRRfix64K_00000:
 716         case MSR_MTRRfix16K_80000:
 717         case MSR_MTRRfix16K_A0000:
 718         case MSR_MTRRfix4K_C0000:
 719         case MSR_MTRRfix4K_C8000:
 720         case MSR_MTRRfix4K_D0000:
 721         case MSR_MTRRfix4K_D8000:
 722         case MSR_MTRRfix4K_E0000:
 723         case MSR_MTRRfix4K_E8000:
 724         case MSR_MTRRfix4K_F0000:
 725         case MSR_MTRRfix4K_F8000:
 726         case MSR_MTRRdefType:
 727         case MSR_IA32_CR_PAT:
 728                 return true;
 729         case 0x2f8:
 730                 return true;
 731         }
 732         return false;
 733 }
 734
 735 static bool valid_pat_type(unsigned t)
 736 {
 737         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 738 }
 739
 740 static bool valid_mtrr_type(unsigned t)
 741 {
 742         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 743 }
 744
 745 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 746 {
 747         int i;
 748
 749         if (!msr_mtrr_valid(msr))
 750                 return false;
 751
 752         if (msr == MSR_IA32_CR_PAT) {
 753                 for (i = 0; i < 8; i++)
 754                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 755                                 return false;
 756                 return true;
 757         } else if (msr == MSR_MTRRdefType) {
 758                 if (data & ~0xcff)
 759                         return false;
 760                 return valid_mtrr_type(data & 0xff);
 761         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 762                 for (i = 0; i < 8 ; i++)
 763                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 764                                 return false;
 765                 return true;
 766         }
 767
 768         /* variable MTRRs */
 769         return valid_mtrr_type(data & 0xff);
 770 }
 771
 772 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 773 {
 774         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 775
 776         if (!mtrr_valid(vcpu, msr, data))
 777                 return 1;
 778
 779         if (msr == MSR_MTRRdefType) {
 780                 vcpu->arch.mtrr_state.def_type = data;
 781                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 782         } else if (msr == MSR_MTRRfix64K_00000)
 783                 p[0] = data;
 784         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 785                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 786         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 787                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 788         else if (msr == MSR_IA32_CR_PAT)
 789                 vcpu->arch.pat = data;
 790         else {  /* Variable MTRRs */
 791                 int idx, is_mtrr_mask;
 792                 u64 *pt;
 793
 794                 idx = (msr - 0x200) / 2;
 795                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 796                 if (!is_mtrr_mask)
 797                         pt =
 798                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 799                 else
 800                         pt =
 801                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 802                 *pt = data;
 803         }
 804
 805         kvm_mmu_reset_context(vcpu);
 806         return 0;
 807 }
 808
 809 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 810 {
 811         u64 mcg_cap = vcpu->arch.mcg_cap;
 812         unsigned bank_num = mcg_cap & 0xff;
 813
 814         switch (msr) {
 815         case MSR_IA32_MCG_STATUS:
 816                 vcpu->arch.mcg_status = data;
 817                 break;
 818         case MSR_IA32_MCG_CTL:
 819                 if (!(mcg_cap & MCG_CTL_P))
 820                         return 1;
 821                 if (data != 0 && data != ~(u64)0)
 822                         return -1;
 823                 vcpu->arch.mcg_ctl = data;
 824                 break;
 825         default:
 826                 if (msr >= MSR_IA32_MC0_CTL &&
 827                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 828                         u32 offset = msr - MSR_IA32_MC0_CTL;
 829                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 830                         if ((offset & 0x3) == 0 &&
 831                             data != 0 && data != ~(u64)0)
 832                                 return -1;
 833                         vcpu->arch.mce_banks[offset] = data;
 834                         break;
 835                 }
 836                 return 1;
 837         }
 838         return 0;
 839 }
 840
 841 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 842 {
 843         switch (msr) {
 844         case MSR_EFER:
 845                 set_efer(vcpu, data);
 846                 break;
 847         case MSR_K7_HWCR:
 848                 data &= ~(u64)0x40;     /* ignore flush filter disable */
 849                 if (data != 0) {
 850                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
 851                                 data);
 852                         return 1;
 853                 }
 854                 break;
 855         case MSR_FAM10H_MMIO_CONF_BASE:
 856                 if (data != 0) {
 857                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
 858                                 "0x%llx\n", data);
 859                         return 1;
 860                 }
 861                 break;
 862         case MSR_AMD64_NB_CFG:
 863                 break;
 864         case MSR_IA32_DEBUGCTLMSR:
 865                 if (!data) {
 866                         /* We support the non-activated case already */
 867                         break;
 868                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 869                         /* Values other than LBR and BTF are vendor-specific,
 870                            thus reserved and should throw a #GP */
 871                         return 1;
 872                 }
 873                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 874                         __func__, data);
 875                 break;
 876         case MSR_IA32_UCODE_REV:
 877         case MSR_IA32_UCODE_WRITE:
 878         case MSR_VM_HSAVE_PA:
 879         case MSR_AMD64_PATCH_LOADER:
 880                 break;
 881         case 0x200 ... 0x2ff:
 882                 return set_msr_mtrr(vcpu, msr, data);
 883         case MSR_IA32_APICBASE:
 884                 kvm_set_apic_base(vcpu, data);
 885                 break;
 886         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
 887                 return kvm_x2apic_msr_write(vcpu, msr, data);
 888         case MSR_IA32_MISC_ENABLE:
 889                 vcpu->arch.ia32_misc_enable_msr = data;
 890                 break;
 891         case MSR_KVM_WALL_CLOCK:
 892                 vcpu->kvm->arch.wall_clock = data;
 893                 kvm_write_wall_clock(vcpu->kvm, data);
 894                 break;
 895         case MSR_KVM_SYSTEM_TIME: {
 896                 if (vcpu->arch.time_page) {
 897                         kvm_release_page_dirty(vcpu->arch.time_page);
 898                         vcpu->arch.time_page = NULL;
 899                 }
 900
 901                 vcpu->arch.time = data;
 902
 903                 /* we verify if the enable bit is set... */
 904                 if (!(data & 1))
 905                         break;
 906
 907                 /* ...but clean it before doing the actual write */
 908                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 909
 910                 vcpu->arch.time_page =
 911                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 912
 913                 if (is_error_page(vcpu->arch.time_page)) {
 914                         kvm_release_page_clean(vcpu->arch.time_page);
 915                         vcpu->arch.time_page = NULL;
 916                 }
 917
 918                 kvm_request_guest_time_update(vcpu);
 919                 break;
 920         }
 921         case MSR_IA32_MCG_CTL:
 922         case MSR_IA32_MCG_STATUS:
 923         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 924                 return set_msr_mce(vcpu, msr, data);
 925
 926         /* Performance counters are not protected by a CPUID bit,
 927          * so we should check all of them in the generic path for the sake of
 928          * cross vendor migration.
 929          * Writing a zero into the event select MSRs disables them,
 930          * which we perfectly emulate ;-). Any other value should be at least
 931          * reported, some guests depend on them.
 932          */
 933         case MSR_P6_EVNTSEL0:
 934         case MSR_P6_EVNTSEL1:
 935         case MSR_K7_EVNTSEL0:
 936         case MSR_K7_EVNTSEL1:
 937         case MSR_K7_EVNTSEL2:
 938         case MSR_K7_EVNTSEL3:
 939                 if (data != 0)
 940                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 941                                 "0x%x data 0x%llx\n", msr, data);
 942                 break;
 943         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 944          * so we ignore writes to make it happy.
 945          */
 946         case MSR_P6_PERFCTR0:
 947         case MSR_P6_PERFCTR1:
 948         case MSR_K7_PERFCTR0:
 949         case MSR_K7_PERFCTR1:
 950         case MSR_K7_PERFCTR2:
 951         case MSR_K7_PERFCTR3:
 952                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 953                         "0x%x data 0x%llx\n", msr, data);
 954                 break;
 955         default:
 956                 if (!ignore_msrs) {
 957                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
 958                                 msr, data);
 959                         return 1;
 960                 } else {
 961                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
 962                                 msr, data);
 963                         break;
 964                 }
 965         }
 966         return 0;
 967 }
 968 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 969
 970
 971 /*
 972  * Reads an msr value (of 'msr_index') into 'pdata'.
 973  * Returns 0 on success, non-0 otherwise.
 974  * Assumes vcpu_load() was already called.
 975  */
 976 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 977 {
 978         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 979 }
 980
 981 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 982 {
 983         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 984
 985         if (!msr_mtrr_valid(msr))
 986                 return 1;
 987
 988         if (msr == MSR_MTRRdefType)
 989                 *pdata = vcpu->arch.mtrr_state.def_type +
 990                          (vcpu->arch.mtrr_state.enabled << 10);
 991         else if (msr == MSR_MTRRfix64K_00000)
 992                 *pdata = p[0];
 993         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 994                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 995         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 996                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 997         else if (msr == MSR_IA32_CR_PAT)
 998                 *pdata = vcpu->arch.pat;
 999         else {  /* Variable MTRRs */
1000                 int idx, is_mtrr_mask;
1001                 u64 *pt;
1002
1003                 idx = (msr - 0x200) / 2;
1004                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1005                 if (!is_mtrr_mask)
1006                         pt =
1007                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1008                 else
1009                         pt =
1010                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1011                 *pdata = *pt;
1012         }
1013
1014         return 0;
1015 }
1016
1017 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1018 {
1019         u64 data;
1020         u64 mcg_cap = vcpu->arch.mcg_cap;
1021         unsigned bank_num = mcg_cap & 0xff;
1022
1023         switch (msr) {
1024         case MSR_IA32_P5_MC_ADDR:
1025         case MSR_IA32_P5_MC_TYPE:
1026                 data = 0;
1027                 break;
1028         case MSR_IA32_MCG_CAP:
1029                 data = vcpu->arch.mcg_cap;
1030                 break;
1031         case MSR_IA32_MCG_CTL:
1032                 if (!(mcg_cap & MCG_CTL_P))
1033                         return 1;
1034                 data = vcpu->arch.mcg_ctl;
1035                 break;
1036         case MSR_IA32_MCG_STATUS:
1037                 data = vcpu->arch.mcg_status;
1038                 break;
1039         default:
1040                 if (msr >= MSR_IA32_MC0_CTL &&
1041                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1042                         u32 offset = msr - MSR_IA32_MC0_CTL;
1043                         data = vcpu->arch.mce_banks[offset];
1044                         break;
1045                 }
1046                 return 1;
1047         }
1048         *pdata = data;
1049         return 0;
1050 }
1051
1052 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1053 {
1054         u64 data;
1055
1056         switch (msr) {
1057         case MSR_IA32_PLATFORM_ID:
1058         case MSR_IA32_UCODE_REV:
1059         case MSR_IA32_EBL_CR_POWERON:
1060         case MSR_IA32_DEBUGCTLMSR:
1061         case MSR_IA32_LASTBRANCHFROMIP:
1062         case MSR_IA32_LASTBRANCHTOIP:
1063         case MSR_IA32_LASTINTFROMIP:
1064         case MSR_IA32_LASTINTTOIP:
1065         case MSR_K8_SYSCFG:
1066         case MSR_K7_HWCR:
1067         case MSR_VM_HSAVE_PA:
1068         case MSR_P6_PERFCTR0:
1069         case MSR_P6_PERFCTR1:
1070         case MSR_P6_EVNTSEL0:
1071         case MSR_P6_EVNTSEL1:
1072         case MSR_K7_EVNTSEL0:
1073         case MSR_K7_PERFCTR0:
1074         case MSR_K8_INT_PENDING_MSG:
1075         case MSR_AMD64_NB_CFG:
1076         case MSR_FAM10H_MMIO_CONF_BASE:
1077                 data = 0;
1078                 break;
1079         case MSR_MTRRcap:
1080                 data = 0x500 | KVM_NR_VAR_MTRR;
1081                 break;
1082         case 0x200 ... 0x2ff:
1083                 return get_msr_mtrr(vcpu, msr, pdata);
1084         case 0xcd: /* fsb frequency */
1085                 data = 3;
1086                 break;
1087         case MSR_IA32_APICBASE:
1088                 data = kvm_get_apic_base(vcpu);
1089                 break;
1090         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1091                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1092                 break;
1093         case MSR_IA32_MISC_ENABLE:
1094                 data = vcpu->arch.ia32_misc_enable_msr;
1095                 break;
1096         case MSR_IA32_PERF_STATUS:
1097                 /* TSC increment by tick */
1098                 data = 1000ULL;
1099                 /* CPU multiplier */
1100                 data |= (((uint64_t)4ULL) << 40);
1101                 break;
1102         case MSR_EFER:
1103                 data = vcpu->arch.shadow_efer;
1104                 break;
1105         case MSR_KVM_WALL_CLOCK:
1106                 data = vcpu->kvm->arch.wall_clock;
1107                 break;
1108         case MSR_KVM_SYSTEM_TIME:
1109                 data = vcpu->arch.time;
1110                 break;
1111         case MSR_IA32_P5_MC_ADDR:
1112         case MSR_IA32_P5_MC_TYPE:
1113         case MSR_IA32_MCG_CAP:
1114         case MSR_IA32_MCG_CTL:
1115         case MSR_IA32_MCG_STATUS:
1116         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1117                 return get_msr_mce(vcpu, msr, pdata);
1118         default:
1119                 if (!ignore_msrs) {
1120                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1121                         return 1;
1122                 } else {
1123                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1124                         data = 0;
1125                 }
1126                 break;
1127         }
1128         *pdata = data;
1129         return 0;
1130 }
1131 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1132
1133 /*
1134  * Read or write a bunch of msrs. All parameters are kernel addresses.
1135  *
1136  * @return number of msrs set successfully.
1137  */
1138 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1139                     struct kvm_msr_entry *entries,
1140                     int (*do_msr)(struct kvm_vcpu *vcpu,
1141                                   unsigned index, u64 *data))
1142 {
1143         int i;
1144
1145         vcpu_load(vcpu);
1146
1147         down_read(&vcpu->kvm->slots_lock);
1148         for (i = 0; i < msrs->nmsrs; ++i)
1149                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1150                         break;
1151         up_read(&vcpu->kvm->slots_lock);
1152
1153         vcpu_put(vcpu);
1154
1155         return i;
1156 }
1157
1158 /*
1159  * Read or write a bunch of msrs. Parameters are user addresses.
1160  *
1161  * @return number of msrs set successfully.
1162  */
1163 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1164                   int (*do_msr)(struct kvm_vcpu *vcpu,
1165                                 unsigned index, u64 *data),
1166                   int writeback)
1167 {
1168         struct kvm_msrs msrs;
1169         struct kvm_msr_entry *entries;
1170         int r, n;
1171         unsigned size;
1172
1173         r = -EFAULT;
1174         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1175                 goto out;
1176
1177         r = -E2BIG;
1178         if (msrs.nmsrs >= MAX_IO_MSRS)
1179                 goto out;
1180
1181         r = -ENOMEM;
1182         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1183         entries = vmalloc(size);
1184         if (!entries)
1185                 goto out;
1186
1187         r = -EFAULT;
1188         if (copy_from_user(entries, user_msrs->entries, size))
1189                 goto out_free;
1190
1191         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1192         if (r < 0)
1193                 goto out_free;
1194
1195         r = -EFAULT;
1196         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1197                 goto out_free;
1198
1199         r = n;
1200
1201 out_free:
1202         vfree(entries);
1203 out:
1204         return r;
1205 }
1206
1207 int kvm_dev_ioctl_check_extension(long ext)
1208 {
1209         int r;
1210
1211         switch (ext) {
1212         case KVM_CAP_IRQCHIP:
1213         case KVM_CAP_HLT:
1214         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1215         case KVM_CAP_SET_TSS_ADDR:
1216         case KVM_CAP_EXT_CPUID:
1217         case KVM_CAP_CLOCKSOURCE:
1218         case KVM_CAP_PIT:
1219         case KVM_CAP_NOP_IO_DELAY:
1220         case KVM_CAP_MP_STATE:
1221         case KVM_CAP_SYNC_MMU:
1222         case KVM_CAP_REINJECT_CONTROL:
1223         case KVM_CAP_IRQ_INJECT_STATUS:
1224         case KVM_CAP_ASSIGN_DEV_IRQ:
1225         case KVM_CAP_IRQFD:
1226         case KVM_CAP_IOEVENTFD:
1227         case KVM_CAP_PIT2:
1228         case KVM_CAP_PIT_STATE2:
1229         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1230         case KVM_CAP_ADJUST_CLOCK:
1231                 r = 1;
1232                 break;
1233         case KVM_CAP_COALESCED_MMIO:
1234                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1235                 break;
1236         case KVM_CAP_VAPIC:
1237                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1238                 break;
1239         case KVM_CAP_NR_VCPUS:
1240                 r = KVM_MAX_VCPUS;
1241                 break;
1242         case KVM_CAP_NR_MEMSLOTS:
1243                 r = KVM_MEMORY_SLOTS;
1244                 break;
1245         case KVM_CAP_PV_MMU:
1246                 r = !tdp_enabled;
1247                 break;
1248         case KVM_CAP_IOMMU:
1249                 r = iommu_found();
1250                 break;
1251         case KVM_CAP_MCE:
1252                 r = KVM_MAX_MCE_BANKS;
1253                 break;
1254         default:
1255                 r = 0;
1256                 break;
1257         }
1258         return r;
1259
1260 }
1261
1262 long kvm_arch_dev_ioctl(struct file *filp,
1263                         unsigned int ioctl, unsigned long arg)
1264 {
1265         void __user *argp = (void __user *)arg;
1266         long r;
1267
1268         switch (ioctl) {
1269         case KVM_GET_MSR_INDEX_LIST: {
1270                 struct kvm_msr_list __user *user_msr_list = argp;
1271                 struct kvm_msr_list msr_list;
1272                 unsigned n;
1273
1274                 r = -EFAULT;
1275                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1276                         goto out;
1277                 n = msr_list.nmsrs;
1278                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1279                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1280                         goto out;
1281                 r = -E2BIG;
1282                 if (n < msr_list.nmsrs)
1283                         goto out;
1284                 r = -EFAULT;
1285                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1286                                  num_msrs_to_save * sizeof(u32)))
1287                         goto out;
1288                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1289                                  &emulated_msrs,
1290                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1291                         goto out;
1292                 r = 0;
1293                 break;
1294         }
1295         case KVM_GET_SUPPORTED_CPUID: {
1296                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1297                 struct kvm_cpuid2 cpuid;
1298
1299                 r = -EFAULT;
1300                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1301                         goto out;
1302                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1303                                                       cpuid_arg->entries);
1304                 if (r)
1305                         goto out;
1306
1307                 r = -EFAULT;
1308                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1309                         goto out;
1310                 r = 0;
1311                 break;
1312         }
1313         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1314                 u64 mce_cap;
1315
1316                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1317                 r = -EFAULT;
1318                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1319                         goto out;
1320                 r = 0;
1321                 break;
1322         }
1323         default:
1324                 r = -EINVAL;
1325         }
1326 out:
1327         return r;
1328 }
1329
1330 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1331 {
1332         kvm_x86_ops->vcpu_load(vcpu, cpu);
1333         kvm_request_guest_time_update(vcpu);
1334 }
1335
1336 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1337 {
1338         kvm_x86_ops->vcpu_put(vcpu);
1339         kvm_put_guest_fpu(vcpu);
1340 }
1341
1342 static int is_efer_nx(void)
1343 {
1344         unsigned long long efer = 0;
1345
1346         rdmsrl_safe(MSR_EFER, &efer);
1347         return efer & EFER_NX;
1348 }
1349
1350 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1351 {
1352         int i;
1353         struct kvm_cpuid_entry2 *e, *entry;
1354
1355         entry = NULL;
1356         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1357                 e = &vcpu->arch.cpuid_entries[i];
1358                 if (e->function == 0x80000001) {
1359                         entry = e;
1360                         break;
1361                 }
1362         }
1363         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1364                 entry->edx &= ~(1 << 20);
1365                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1366         }
1367 }
1368
1369 /* when an old userspace process fills a new kernel module */
1370 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1371                                     struct kvm_cpuid *cpuid,
1372                                     struct kvm_cpuid_entry __user *entries)
1373 {
1374         int r, i;
1375         struct kvm_cpuid_entry *cpuid_entries;
1376
1377         r = -E2BIG;
1378         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1379                 goto out;
1380         r = -ENOMEM;
1381         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1382         if (!cpuid_entries)
1383                 goto out;
1384         r = -EFAULT;
1385         if (copy_from_user(cpuid_entries, entries,
1386                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1387                 goto out_free;
1388         for (i = 0; i < cpuid->nent; i++) {
1389                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1390                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1391                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1392                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1393                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1394                 vcpu->arch.cpuid_entries[i].index = 0;
1395                 vcpu->arch.cpuid_entries[i].flags = 0;
1396                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1397                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1398                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1399         }
1400         vcpu->arch.cpuid_nent = cpuid->nent;
1401         cpuid_fix_nx_cap(vcpu);
1402         r = 0;
1403         kvm_apic_set_version(vcpu);
1404
1405 out_free:
1406         vfree(cpuid_entries);
1407 out:
1408         return r;
1409 }
1410
1411 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1412                                      struct kvm_cpuid2 *cpuid,
1413                                      struct kvm_cpuid_entry2 __user *entries)
1414 {
1415         int r;
1416
1417         r = -E2BIG;
1418         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1419                 goto out;
1420         r = -EFAULT;
1421         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1422                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1423                 goto out;
1424         vcpu->arch.cpuid_nent = cpuid->nent;
1425         kvm_apic_set_version(vcpu);
1426         return 0;
1427
1428 out:
1429         return r;
1430 }
1431
1432 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1433                                      struct kvm_cpuid2 *cpuid,
1434                                      struct kvm_cpuid_entry2 __user *entries)
1435 {
1436         int r;
1437
1438         r = -E2BIG;
1439         if (cpuid->nent < vcpu->arch.cpuid_nent)
1440                 goto out;
1441         r = -EFAULT;
1442         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1443                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1444                 goto out;
1445         return 0;
1446
1447 out:
1448         cpuid->nent = vcpu->arch.cpuid_nent;
1449         return r;
1450 }
1451
1452 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1453                            u32 index)
1454 {
1455         entry->function = function;
1456         entry->index = index;
1457         cpuid_count(entry->function, entry->index,
1458                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1459         entry->flags = 0;
1460 }
1461
1462 #define F(x) bit(X86_FEATURE_##x)
1463
1464 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1465                          u32 index, int *nent, int maxnent)
1466 {
1467         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1468         unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1469 #ifdef CONFIG_X86_64
1470         unsigned f_lm = F(LM);
1471 #else
1472         unsigned f_lm = 0;
1473 #endif
1474
1475         /* cpuid 1.edx */
1476         const u32 kvm_supported_word0_x86_features =
1477                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1478                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1479                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1480                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1481                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1482                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1483                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1484                 0 /* HTT, TM, Reserved, PBE */;
1485         /* cpuid 0x80000001.edx */
1486         const u32 kvm_supported_word1_x86_features =
1487                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1488                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1489                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1490                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1491                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1492                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1493                 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1494                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1495         /* cpuid 1.ecx */
1496         const u32 kvm_supported_word4_x86_features =
1497                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1498                 0 /* DS-CPL, VMX, SMX, EST */ |
1499                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1500                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1501                 0 /* Reserved, DCA */ | F(XMM4_1) |
1502                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1503                 0 /* Reserved, XSAVE, OSXSAVE */;
1504         /* cpuid 0x80000001.ecx */
1505         const u32 kvm_supported_word6_x86_features =
1506                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1507                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1508                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1509                 0 /* SKINIT */ | 0 /* WDT */;
1510
1511         /* all calls to cpuid_count() should be made on the same cpu */
1512         get_cpu();
1513         do_cpuid_1_ent(entry, function, index);
1514         ++*nent;
1515
1516         switch (function) {
1517         case 0:
1518                 entry->eax = min(entry->eax, (u32)0xb);
1519                 break;
1520         case 1:
1521                 entry->edx &= kvm_supported_word0_x86_features;
1522                 entry->ecx &= kvm_supported_word4_x86_features;
1523                 /* we support x2apic emulation even if host does not support
1524                  * it since we emulate x2apic in software */
1525                 entry->ecx |= F(X2APIC);
1526                 break;
1527         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1528          * may return different values. This forces us to get_cpu() before
1529          * issuing the first command, and also to emulate this annoying behavior
1530          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1531         case 2: {
1532                 int t, times = entry->eax & 0xff;
1533
1534                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1535                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1536                 for (t = 1; t < times && *nent < maxnent; ++t) {
1537                         do_cpuid_1_ent(&entry[t], function, 0);
1538                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1539                         ++*nent;
1540                 }
1541                 break;
1542         }
1543         /* function 4 and 0xb have additional index. */
1544         case 4: {
1545                 int i, cache_type;
1546
1547                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1548                 /* read more entries until cache_type is zero */
1549                 for (i = 1; *nent < maxnent; ++i) {
1550                         cache_type = entry[i - 1].eax & 0x1f;
1551                         if (!cache_type)
1552                                 break;
1553                         do_cpuid_1_ent(&entry[i], function, i);
1554                         entry[i].flags |=
1555                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1556                         ++*nent;
1557                 }
1558                 break;
1559         }
1560         case 0xb: {
1561                 int i, level_type;
1562
1563                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1564                 /* read more entries until level_type is zero */
1565                 for (i = 1; *nent < maxnent; ++i) {
1566                         level_type = entry[i - 1].ecx & 0xff00;
1567                         if (!level_type)
1568                                 break;
1569                         do_cpuid_1_ent(&entry[i], function, i);
1570                         entry[i].flags |=
1571                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1572                         ++*nent;
1573                 }
1574                 break;
1575         }
1576         case 0x80000000:
1577                 entry->eax = min(entry->eax, 0x8000001a);
1578                 break;
1579         case 0x80000001:
1580                 entry->edx &= kvm_supported_word1_x86_features;
1581                 entry->ecx &= kvm_supported_word6_x86_features;
1582                 break;
1583         }
1584         put_cpu();
1585 }
1586
1587 #undef F
1588
1589 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1590                                      struct kvm_cpuid_entry2 __user *entries)
1591 {
1592         struct kvm_cpuid_entry2 *cpuid_entries;
1593         int limit, nent = 0, r = -E2BIG;
1594         u32 func;
1595
1596         if (cpuid->nent < 1)
1597                 goto out;
1598         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1599                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1600         r = -ENOMEM;
1601         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1602         if (!cpuid_entries)
1603                 goto out;
1604
1605         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1606         limit = cpuid_entries[0].eax;
1607         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1608                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1609                              &nent, cpuid->nent);
1610         r = -E2BIG;
1611         if (nent >= cpuid->nent)
1612                 goto out_free;
1613
1614         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1615         limit = cpuid_entries[nent - 1].eax;
1616         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1617                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1618                              &nent, cpuid->nent);
1619         r = -E2BIG;
1620         if (nent >= cpuid->nent)
1621                 goto out_free;
1622
1623         r = -EFAULT;
1624         if (copy_to_user(entries, cpuid_entries,
1625                          nent * sizeof(struct kvm_cpuid_entry2)))
1626                 goto out_free;
1627         cpuid->nent = nent;
1628         r = 0;
1629
1630 out_free:
1631         vfree(cpuid_entries);
1632 out:
1633         return r;
1634 }
1635
1636 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1637                                     struct kvm_lapic_state *s)
1638 {
1639         vcpu_load(vcpu);
1640         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1641         vcpu_put(vcpu);
1642
1643         return 0;
1644 }
1645
1646 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1647                                     struct kvm_lapic_state *s)
1648 {
1649         vcpu_load(vcpu);
1650         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1651         kvm_apic_post_state_restore(vcpu);
1652         update_cr8_intercept(vcpu);
1653         vcpu_put(vcpu);
1654
1655         return 0;
1656 }
1657
1658 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1659                                     struct kvm_interrupt *irq)
1660 {
1661         if (irq->irq < 0 || irq->irq >= 256)
1662                 return -EINVAL;
1663         if (irqchip_in_kernel(vcpu->kvm))
1664                 return -ENXIO;
1665         vcpu_load(vcpu);
1666
1667         kvm_queue_interrupt(vcpu, irq->irq, false);
1668
1669         vcpu_put(vcpu);
1670
1671         return 0;
1672 }
1673
1674 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1675 {
1676         vcpu_load(vcpu);
1677         kvm_inject_nmi(vcpu);
1678         vcpu_put(vcpu);
1679
1680         return 0;
1681 }
1682
1683 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1684                                            struct kvm_tpr_access_ctl *tac)
1685 {
1686         if (tac->flags)
1687                 return -EINVAL;
1688         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1689         return 0;
1690 }
1691
1692 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1693                                         u64 mcg_cap)
1694 {
1695         int r;
1696         unsigned bank_num = mcg_cap & 0xff, bank;
1697
1698         r = -EINVAL;
1699         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
1700                 goto out;
1701         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1702                 goto out;
1703         r = 0;
1704         vcpu->arch.mcg_cap = mcg_cap;
1705         /* Init IA32_MCG_CTL to all 1s */
1706         if (mcg_cap & MCG_CTL_P)
1707                 vcpu->arch.mcg_ctl = ~(u64)0;
1708         /* Init IA32_MCi_CTL to all 1s */
1709         for (bank = 0; bank < bank_num; bank++)
1710                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1711 out:
1712         return r;
1713 }
1714
1715 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1716                                       struct kvm_x86_mce *mce)
1717 {
1718         u64 mcg_cap = vcpu->arch.mcg_cap;
1719         unsigned bank_num = mcg_cap & 0xff;
1720         u64 *banks = vcpu->arch.mce_banks;
1721
1722         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1723                 return -EINVAL;
1724         /*
1725          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1726          * reporting is disabled
1727          */
1728         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1729             vcpu->arch.mcg_ctl != ~(u64)0)
1730                 return 0;
1731         banks += 4 * mce->bank;
1732         /*
1733          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1734          * reporting is disabled for the bank
1735          */
1736         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1737                 return 0;
1738         if (mce->status & MCI_STATUS_UC) {
1739                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1740                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1741                         printk(KERN_DEBUG "kvm: set_mce: "
1742                                "injects mce exception while "
1743                                "previous one is in progress!\n");
1744                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1745                         return 0;
1746                 }
1747                 if (banks[1] & MCI_STATUS_VAL)
1748                         mce->status |= MCI_STATUS_OVER;
1749                 banks[2] = mce->addr;
1750                 banks[3] = mce->misc;
1751                 vcpu->arch.mcg_status = mce->mcg_status;
1752                 banks[1] = mce->status;
1753                 kvm_queue_exception(vcpu, MC_VECTOR);
1754         } else if (!(banks[1] & MCI_STATUS_VAL)
1755                    || !(banks[1] & MCI_STATUS_UC)) {
1756                 if (banks[1] & MCI_STATUS_VAL)
1757                         mce->status |= MCI_STATUS_OVER;
1758                 banks[2] = mce->addr;
1759                 banks[3] = mce->misc;
1760                 banks[1] = mce->status;
1761         } else
1762                 banks[1] |= MCI_STATUS_OVER;
1763         return 0;
1764 }
1765
1766 long kvm_arch_vcpu_ioctl(struct file *filp,
1767                          unsigned int ioctl, unsigned long arg)
1768 {
1769         struct kvm_vcpu *vcpu = filp->private_data;
1770         void __user *argp = (void __user *)arg;
1771         int r;
1772         struct kvm_lapic_state *lapic = NULL;
1773
1774         switch (ioctl) {
1775         case KVM_GET_LAPIC: {
1776                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1777
1778                 r = -ENOMEM;
1779                 if (!lapic)
1780                         goto out;
1781                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1782                 if (r)
1783                         goto out;
1784                 r = -EFAULT;
1785                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1786                         goto out;
1787                 r = 0;
1788                 break;
1789         }
1790         case KVM_SET_LAPIC: {
1791                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1792                 r = -ENOMEM;
1793                 if (!lapic)
1794                         goto out;
1795                 r = -EFAULT;
1796                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1797                         goto out;
1798                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1799                 if (r)
1800                         goto out;
1801                 r = 0;
1802                 break;
1803         }
1804         case KVM_INTERRUPT: {
1805                 struct kvm_interrupt irq;
1806
1807                 r = -EFAULT;
1808                 if (copy_from_user(&irq, argp, sizeof irq))
1809                         goto out;
1810                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1811                 if (r)
1812                         goto out;
1813                 r = 0;
1814                 break;
1815         }
1816         case KVM_NMI: {
1817                 r = kvm_vcpu_ioctl_nmi(vcpu);
1818                 if (r)
1819                         goto out;
1820                 r = 0;
1821                 break;
1822         }
1823         case KVM_SET_CPUID: {
1824                 struct kvm_cpuid __user *cpuid_arg = argp;
1825                 struct kvm_cpuid cpuid;
1826
1827                 r = -EFAULT;
1828                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1829                         goto out;
1830                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1831                 if (r)
1832                         goto out;
1833                 break;
1834         }
1835         case KVM_SET_CPUID2: {
1836                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1837                 struct kvm_cpuid2 cpuid;
1838
1839                 r = -EFAULT;
1840                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1841                         goto out;
1842                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1843                                               cpuid_arg->entries);
1844                 if (r)
1845                         goto out;
1846                 break;
1847         }
1848         case KVM_GET_CPUID2: {
1849                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1850                 struct kvm_cpuid2 cpuid;
1851
1852                 r = -EFAULT;
1853                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1854                         goto out;
1855                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1856                                               cpuid_arg->entries);
1857                 if (r)
1858                         goto out;
1859                 r = -EFAULT;
1860                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1861                         goto out;
1862                 r = 0;
1863                 break;
1864         }
1865         case KVM_GET_MSRS:
1866                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1867                 break;
1868         case KVM_SET_MSRS:
1869                 r = msr_io(vcpu, argp, do_set_msr, 0);
1870                 break;
1871         case KVM_TPR_ACCESS_REPORTING: {
1872                 struct kvm_tpr_access_ctl tac;
1873
1874                 r = -EFAULT;
1875                 if (copy_from_user(&tac, argp, sizeof tac))
1876                         goto out;
1877                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1878                 if (r)
1879                         goto out;
1880                 r = -EFAULT;
1881                 if (copy_to_user(argp, &tac, sizeof tac))
1882                         goto out;
1883                 r = 0;
1884                 break;
1885         };
1886         case KVM_SET_VAPIC_ADDR: {
1887                 struct kvm_vapic_addr va;
1888
1889                 r = -EINVAL;
1890                 if (!irqchip_in_kernel(vcpu->kvm))
1891                         goto out;
1892                 r = -EFAULT;
1893                 if (copy_from_user(&va, argp, sizeof va))
1894                         goto out;
1895                 r = 0;
1896                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1897                 break;
1898         }
1899         case KVM_X86_SETUP_MCE: {
1900                 u64 mcg_cap;
1901
1902                 r = -EFAULT;
1903                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1904                         goto out;
1905                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1906                 break;
1907         }
1908         case KVM_X86_SET_MCE: {
1909                 struct kvm_x86_mce mce;
1910
1911                 r = -EFAULT;
1912                 if (copy_from_user(&mce, argp, sizeof mce))
1913                         goto out;
1914                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1915                 break;
1916         }
1917         default:
1918                 r = -EINVAL;
1919         }
1920 out:
1921         kfree(lapic);
1922         return r;
1923 }
1924
1925 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1926 {
1927         int ret;
1928
1929         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1930                 return -1;
1931         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1932         return ret;
1933 }
1934
1935 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
1936                                               u64 ident_addr)
1937 {
1938         kvm->arch.ept_identity_map_addr = ident_addr;
1939         return 0;
1940 }
1941
1942 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1943                                           u32 kvm_nr_mmu_pages)
1944 {
1945         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1946                 return -EINVAL;
1947
1948         down_write(&kvm->slots_lock);
1949         spin_lock(&kvm->mmu_lock);
1950
1951         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1952         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1953
1954         spin_unlock(&kvm->mmu_lock);
1955         up_write(&kvm->slots_lock);
1956         return 0;
1957 }
1958
1959 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1960 {
1961         return kvm->arch.n_alloc_mmu_pages;
1962 }
1963
1964 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1965 {
1966         int i;
1967         struct kvm_mem_alias *alias;
1968
1969         for (i = 0; i < kvm->arch.naliases; ++i) {
1970                 alias = &kvm->arch.aliases[i];
1971                 if (gfn >= alias->base_gfn
1972                     && gfn < alias->base_gfn + alias->npages)
1973                         return alias->target_gfn + gfn - alias->base_gfn;
1974         }
1975         return gfn;
1976 }
1977
1978 /*
1979  * Set a new alias region.  Aliases map a portion of physical memory into
1980  * another portion.  This is useful for memory windows, for example the PC
1981  * VGA region.
1982  */
1983 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1984                                          struct kvm_memory_alias *alias)
1985 {
1986         int r, n;
1987         struct kvm_mem_alias *p;
1988
1989         r = -EINVAL;
1990         /* General sanity checks */
1991         if (alias->memory_size & (PAGE_SIZE - 1))
1992                 goto out;
1993         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1994                 goto out;
1995         if (alias->slot >= KVM_ALIAS_SLOTS)
1996                 goto out;
1997         if (alias->guest_phys_addr + alias->memory_size
1998             < alias->guest_phys_addr)
1999                 goto out;
2000         if (alias->target_phys_addr + alias->memory_size
2001             < alias->target_phys_addr)
2002                 goto out;
2003
2004         down_write(&kvm->slots_lock);
2005         spin_lock(&kvm->mmu_lock);
2006
2007         p = &kvm->arch.aliases[alias->slot];
2008         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2009         p->npages = alias->memory_size >> PAGE_SHIFT;
2010         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2011
2012         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2013                 if (kvm->arch.aliases[n - 1].npages)
2014                         break;
2015         kvm->arch.naliases = n;
2016
2017         spin_unlock(&kvm->mmu_lock);
2018         kvm_mmu_zap_all(kvm);
2019
2020         up_write(&kvm->slots_lock);
2021
2022         return 0;
2023
2024 out:
2025         return r;
2026 }
2027
2028 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2029 {
2030         int r;
2031
2032         r = 0;
2033         switch (chip->chip_id) {
2034         case KVM_IRQCHIP_PIC_MASTER:
2035                 memcpy(&chip->chip.pic,
2036                         &pic_irqchip(kvm)->pics[0],
2037                         sizeof(struct kvm_pic_state));
2038                 break;
2039         case KVM_IRQCHIP_PIC_SLAVE:
2040                 memcpy(&chip->chip.pic,
2041                         &pic_irqchip(kvm)->pics[1],
2042                         sizeof(struct kvm_pic_state));
2043                 break;
2044         case KVM_IRQCHIP_IOAPIC:
2045                 memcpy(&chip->chip.ioapic,
2046                         ioapic_irqchip(kvm),
2047                         sizeof(struct kvm_ioapic_state));
2048                 break;
2049         default:
2050                 r = -EINVAL;
2051                 break;
2052         }
2053         return r;
2054 }
2055
2056 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2057 {
2058         int r;
2059
2060         r = 0;
2061         switch (chip->chip_id) {
2062         case KVM_IRQCHIP_PIC_MASTER:
2063                 spin_lock(&pic_irqchip(kvm)->lock);
2064                 memcpy(&pic_irqchip(kvm)->pics[0],
2065                         &chip->chip.pic,
2066                         sizeof(struct kvm_pic_state));
2067                 spin_unlock(&pic_irqchip(kvm)->lock);
2068                 break;
2069         case KVM_IRQCHIP_PIC_SLAVE:
2070                 spin_lock(&pic_irqchip(kvm)->lock);
2071                 memcpy(&pic_irqchip(kvm)->pics[1],
2072                         &chip->chip.pic,
2073                         sizeof(struct kvm_pic_state));
2074                 spin_unlock(&pic_irqchip(kvm)->lock);
2075                 break;
2076         case KVM_IRQCHIP_IOAPIC:
2077                 mutex_lock(&kvm->irq_lock);
2078                 memcpy(ioapic_irqchip(kvm),
2079                         &chip->chip.ioapic,
2080                         sizeof(struct kvm_ioapic_state));
2081                 mutex_unlock(&kvm->irq_lock);
2082                 break;
2083         default:
2084                 r = -EINVAL;
2085                 break;
2086         }
2087         kvm_pic_update_irq(pic_irqchip(kvm));
2088         return r;
2089 }
2090
2091 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2092 {
2093         int r = 0;
2094
2095         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2096         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2097         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2098         return r;
2099 }
2100
2101 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2102 {
2103         int r = 0;
2104
2105         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2106         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2107         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2108         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2109         return r;
2110 }
2111
2112 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2113 {
2114         int r = 0;
2115
2116         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2117         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2118                 sizeof(ps->channels));
2119         ps->flags = kvm->arch.vpit->pit_state.flags;
2120         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2121         return r;
2122 }
2123
2124 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2125 {
2126         int r = 0, start = 0;
2127         u32 prev_legacy, cur_legacy;
2128         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2129         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2130         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2131         if (!prev_legacy && cur_legacy)
2132                 start = 1;
2133         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2134                sizeof(kvm->arch.vpit->pit_state.channels));
2135         kvm->arch.vpit->pit_state.flags = ps->flags;
2136         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2137         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2138         return r;
2139 }
2140
2141 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2142                                  struct kvm_reinject_control *control)
2143 {
2144         if (!kvm->arch.vpit)
2145                 return -ENXIO;
2146         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2147         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2148         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2149         return 0;
2150 }
2151
2152 /*
2153  * Get (and clear) the dirty memory log for a memory slot.
2154  */
2155 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2156                                       struct kvm_dirty_log *log)
2157 {
2158         int r;
2159         int n;
2160         struct kvm_memory_slot *memslot;
2161         int is_dirty = 0;
2162
2163         down_write(&kvm->slots_lock);
2164
2165         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2166         if (r)
2167                 goto out;
2168
2169         /* If nothing is dirty, don't bother messing with page tables. */
2170         if (is_dirty) {
2171                 spin_lock(&kvm->mmu_lock);
2172                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2173                 spin_unlock(&kvm->mmu_lock);
2174                 memslot = &kvm->memslots[log->slot];
2175                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2176                 memset(memslot->dirty_bitmap, 0, n);
2177         }
2178         r = 0;
2179 out:
2180         up_write(&kvm->slots_lock);
2181         return r;
2182 }
2183
2184 long kvm_arch_vm_ioctl(struct file *filp,
2185                        unsigned int ioctl, unsigned long arg)
2186 {
2187         struct kvm *kvm = filp->private_data;
2188         void __user *argp = (void __user *)arg;
2189         int r = -EINVAL;
2190         /*
2191          * This union makes it completely explicit to gcc-3.x
2192          * that these two variables' stack usage should be
2193          * combined, not added together.
2194          */
2195         union {
2196                 struct kvm_pit_state ps;
2197                 struct kvm_pit_state2 ps2;
2198                 struct kvm_memory_alias alias;
2199                 struct kvm_pit_config pit_config;
2200         } u;
2201
2202         switch (ioctl) {
2203         case KVM_SET_TSS_ADDR:
2204                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2205                 if (r < 0)
2206                         goto out;
2207                 break;
2208         case KVM_SET_IDENTITY_MAP_ADDR: {
2209                 u64 ident_addr;
2210
2211                 r = -EFAULT;
2212                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2213                         goto out;
2214                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2215                 if (r < 0)
2216                         goto out;
2217                 break;
2218         }
2219         case KVM_SET_MEMORY_REGION: {
2220                 struct kvm_memory_region kvm_mem;
2221                 struct kvm_userspace_memory_region kvm_userspace_mem;
2222
2223                 r = -EFAULT;
2224                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2225                         goto out;
2226                 kvm_userspace_mem.slot = kvm_mem.slot;
2227                 kvm_userspace_mem.flags = kvm_mem.flags;
2228                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2229                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2230                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2231                 if (r)
2232                         goto out;
2233                 break;
2234         }
2235         case KVM_SET_NR_MMU_PAGES:
2236                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2237                 if (r)
2238                         goto out;
2239                 break;
2240         case KVM_GET_NR_MMU_PAGES:
2241                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2242                 break;
2243         case KVM_SET_MEMORY_ALIAS:
2244                 r = -EFAULT;
2245                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2246                         goto out;
2247                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2248                 if (r)
2249                         goto out;
2250                 break;
2251         case KVM_CREATE_IRQCHIP:
2252                 r = -ENOMEM;
2253                 kvm->arch.vpic = kvm_create_pic(kvm);
2254                 if (kvm->arch.vpic) {
2255                         r = kvm_ioapic_init(kvm);
2256                         if (r) {
2257                                 kfree(kvm->arch.vpic);
2258                                 kvm->arch.vpic = NULL;
2259                                 goto out;
2260                         }
2261                 } else
2262                         goto out;
2263                 r = kvm_setup_default_irq_routing(kvm);
2264                 if (r) {
2265                         kfree(kvm->arch.vpic);
2266                         kfree(kvm->arch.vioapic);
2267                         goto out;
2268                 }
2269                 break;
2270         case KVM_CREATE_PIT:
2271                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2272                 goto create_pit;
2273         case KVM_CREATE_PIT2:
2274                 r = -EFAULT;
2275                 if (copy_from_user(&u.pit_config, argp,
2276                                    sizeof(struct kvm_pit_config)))
2277                         goto out;
2278         create_pit:
2279                 down_write(&kvm->slots_lock);
2280                 r = -EEXIST;
2281                 if (kvm->arch.vpit)
2282                         goto create_pit_unlock;
2283                 r = -ENOMEM;
2284                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2285                 if (kvm->arch.vpit)
2286                         r = 0;
2287         create_pit_unlock:
2288                 up_write(&kvm->slots_lock);
2289                 break;
2290         case KVM_IRQ_LINE_STATUS:
2291         case KVM_IRQ_LINE: {
2292                 struct kvm_irq_level irq_event;
2293
2294                 r = -EFAULT;
2295                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2296                         goto out;
2297                 if (irqchip_in_kernel(kvm)) {
2298                         __s32 status;
2299                         mutex_lock(&kvm->irq_lock);
2300                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2301                                         irq_event.irq, irq_event.level);
2302                         mutex_unlock(&kvm->irq_lock);
2303                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2304                                 irq_event.status = status;
2305                                 if (copy_to_user(argp, &irq_event,
2306                                                         sizeof irq_event))
2307                                         goto out;
2308                         }
2309                         r = 0;
2310                 }
2311                 break;
2312         }
2313         case KVM_GET_IRQCHIP: {
2314                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2315                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2316
2317                 r = -ENOMEM;
2318                 if (!chip)
2319                         goto out;
2320                 r = -EFAULT;
2321                 if (copy_from_user(chip, argp, sizeof *chip))
2322                         goto get_irqchip_out;
2323                 r = -ENXIO;
2324                 if (!irqchip_in_kernel(kvm))
2325                         goto get_irqchip_out;
2326                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2327                 if (r)
2328                         goto get_irqchip_out;
2329                 r = -EFAULT;
2330                 if (copy_to_user(argp, chip, sizeof *chip))
2331                         goto get_irqchip_out;
2332                 r = 0;
2333         get_irqchip_out:
2334                 kfree(chip);
2335                 if (r)
2336                         goto out;
2337                 break;
2338         }
2339         case KVM_SET_IRQCHIP: {
2340                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2341                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2342
2343                 r = -ENOMEM;
2344                 if (!chip)
2345                         goto out;
2346                 r = -EFAULT;
2347                 if (copy_from_user(chip, argp, sizeof *chip))
2348                         goto set_irqchip_out;
2349                 r = -ENXIO;
2350                 if (!irqchip_in_kernel(kvm))
2351                         goto set_irqchip_out;
2352                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2353                 if (r)
2354                         goto set_irqchip_out;
2355                 r = 0;
2356         set_irqchip_out:
2357                 kfree(chip);
2358                 if (r)
2359                         goto out;
2360                 break;
2361         }
2362         case KVM_GET_PIT: {
2363                 r = -EFAULT;
2364                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2365                         goto out;
2366                 r = -ENXIO;
2367                 if (!kvm->arch.vpit)
2368                         goto out;
2369                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2370                 if (r)
2371                         goto out;
2372                 r = -EFAULT;
2373                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2374                         goto out;
2375                 r = 0;
2376                 break;
2377         }
2378         case KVM_SET_PIT: {
2379                 r = -EFAULT;
2380                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2381                         goto out;
2382                 r = -ENXIO;
2383                 if (!kvm->arch.vpit)
2384                         goto out;
2385                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2386                 if (r)
2387                         goto out;
2388                 r = 0;
2389                 break;
2390         }
2391         case KVM_GET_PIT2: {
2392                 r = -ENXIO;
2393                 if (!kvm->arch.vpit)
2394                         goto out;
2395                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2396                 if (r)
2397                         goto out;
2398                 r = -EFAULT;
2399                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2400                         goto out;
2401                 r = 0;
2402                 break;
2403         }
2404         case KVM_SET_PIT2: {
2405                 r = -EFAULT;
2406                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2407                         goto out;
2408                 r = -ENXIO;
2409                 if (!kvm->arch.vpit)
2410                         goto out;
2411                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2412                 if (r)
2413                         goto out;
2414                 r = 0;
2415                 break;
2416         }
2417         case KVM_REINJECT_CONTROL: {
2418                 struct kvm_reinject_control control;
2419                 r =  -EFAULT;
2420                 if (copy_from_user(&control, argp, sizeof(control)))
2421                         goto out;
2422                 r = kvm_vm_ioctl_reinject(kvm, &control);
2423                 if (r)
2424                         goto out;
2425                 r = 0;
2426                 break;
2427         }
2428         case KVM_SET_CLOCK: {
2429                 struct timespec now;
2430                 struct kvm_clock_data user_ns;
2431                 u64 now_ns;
2432                 s64 delta;
2433
2434                 r = -EFAULT;
2435                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
2436                         goto out;
2437
2438                 r = -EINVAL;
2439                 if (user_ns.flags)
2440                         goto out;
2441
2442                 r = 0;
2443                 ktime_get_ts(&now);
2444                 now_ns = timespec_to_ns(&now);
2445                 delta = user_ns.clock - now_ns;
2446                 kvm->arch.kvmclock_offset = delta;
2447                 break;
2448         }
2449         case KVM_GET_CLOCK: {
2450                 struct timespec now;
2451                 struct kvm_clock_data user_ns;
2452                 u64 now_ns;
2453
2454                 ktime_get_ts(&now);
2455                 now_ns = timespec_to_ns(&now);
2456                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
2457                 user_ns.flags = 0;
2458
2459                 r = -EFAULT;
2460                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
2461                         goto out;
2462                 r = 0;
2463                 break;
2464         }
2465
2466         default:
2467                 ;
2468         }
2469 out:
2470         return r;
2471 }
2472
2473 static void kvm_init_msr_list(void)
2474 {
2475         u32 dummy[2];
2476         unsigned i, j;
2477
2478         /* skip the first msrs in the list. KVM-specific */
2479         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
2480                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2481                         continue;
2482                 if (j < i)
2483                         msrs_to_save[j] = msrs_to_save[i];
2484                 j++;
2485         }
2486         num_msrs_to_save = j;
2487 }
2488
2489 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2490                            const void *v)
2491 {
2492         if (vcpu->arch.apic &&
2493             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2494                 return 0;
2495
2496         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2497 }
2498
2499 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2500 {
2501         if (vcpu->arch.apic &&
2502             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2503                 return 0;
2504
2505         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2506 }
2507
2508 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2509                                struct kvm_vcpu *vcpu)
2510 {
2511         void *data = val;
2512         int r = X86EMUL_CONTINUE;
2513
2514         while (bytes) {
2515                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2516                 unsigned offset = addr & (PAGE_SIZE-1);
2517                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2518                 int ret;
2519
2520                 if (gpa == UNMAPPED_GVA) {
2521                         r = X86EMUL_PROPAGATE_FAULT;
2522                         goto out;
2523                 }
2524                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2525                 if (ret < 0) {
2526                         r = X86EMUL_UNHANDLEABLE;
2527                         goto out;
2528                 }
2529
2530                 bytes -= toread;
2531                 data += toread;
2532                 addr += toread;
2533         }
2534 out:
2535         return r;
2536 }
2537
2538 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2539                                 struct kvm_vcpu *vcpu)
2540 {
2541         void *data = val;
2542         int r = X86EMUL_CONTINUE;
2543
2544         while (bytes) {
2545                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2546                 unsigned offset = addr & (PAGE_SIZE-1);
2547                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2548                 int ret;
2549
2550                 if (gpa == UNMAPPED_GVA) {
2551                         r = X86EMUL_PROPAGATE_FAULT;
2552                         goto out;
2553                 }
2554                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2555                 if (ret < 0) {
2556                         r = X86EMUL_UNHANDLEABLE;
2557                         goto out;
2558                 }
2559
2560                 bytes -= towrite;
2561                 data += towrite;
2562                 addr += towrite;
2563         }
2564 out:
2565         return r;
2566 }
2567
2568
2569 static int emulator_read_emulated(unsigned long addr,
2570                                   void *val,
2571                                   unsigned int bytes,
2572                                   struct kvm_vcpu *vcpu)
2573 {
2574         gpa_t                 gpa;
2575
2576         if (vcpu->mmio_read_completed) {
2577                 memcpy(val, vcpu->mmio_data, bytes);
2578                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2579                                vcpu->mmio_phys_addr, *(u64 *)val);
2580                 vcpu->mmio_read_completed = 0;
2581                 return X86EMUL_CONTINUE;
2582         }
2583
2584         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2585
2586         /* For APIC access vmexit */
2587         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2588                 goto mmio;
2589
2590         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2591                                 == X86EMUL_CONTINUE)
2592                 return X86EMUL_CONTINUE;
2593         if (gpa == UNMAPPED_GVA)
2594                 return X86EMUL_PROPAGATE_FAULT;
2595
2596 mmio:
2597         /*
2598          * Is this MMIO handled locally?
2599          */
2600         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2601                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2602                 return X86EMUL_CONTINUE;
2603         }
2604
2605         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2606
2607         vcpu->mmio_needed = 1;
2608         vcpu->mmio_phys_addr = gpa;
2609         vcpu->mmio_size = bytes;
2610         vcpu->mmio_is_write = 0;
2611
2612         return X86EMUL_UNHANDLEABLE;
2613 }
2614
2615 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2616                           const void *val, int bytes)
2617 {
2618         int ret;
2619
2620         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2621         if (ret < 0)
2622                 return 0;
2623         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2624         return 1;
2625 }
2626
2627 static int emulator_write_emulated_onepage(unsigned long addr,
2628                                            const void *val,
2629                                            unsigned int bytes,
2630                                            struct kvm_vcpu *vcpu)
2631 {
2632         gpa_t                 gpa;
2633
2634         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2635
2636         if (gpa == UNMAPPED_GVA) {
2637                 kvm_inject_page_fault(vcpu, addr, 2);
2638                 return X86EMUL_PROPAGATE_FAULT;
2639         }
2640
2641         /* For APIC access vmexit */
2642         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2643                 goto mmio;
2644
2645         if (emulator_write_phys(vcpu, gpa, val, bytes))
2646                 return X86EMUL_CONTINUE;
2647
2648 mmio:
2649         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2650         /*
2651          * Is this MMIO handled locally?
2652          */
2653         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2654                 return X86EMUL_CONTINUE;
2655
2656         vcpu->mmio_needed = 1;
2657         vcpu->mmio_phys_addr = gpa;
2658         vcpu->mmio_size = bytes;
2659         vcpu->mmio_is_write = 1;
2660         memcpy(vcpu->mmio_data, val, bytes);
2661
2662         return X86EMUL_CONTINUE;
2663 }
2664
2665 int emulator_write_emulated(unsigned long addr,
2666                                    const void *val,
2667                                    unsigned int bytes,
2668                                    struct kvm_vcpu *vcpu)
2669 {
2670         /* Crossing a page boundary? */
2671         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2672                 int rc, now;
2673
2674                 now = -addr & ~PAGE_MASK;
2675                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2676                 if (rc != X86EMUL_CONTINUE)
2677                         return rc;
2678                 addr += now;
2679                 val += now;
2680                 bytes -= now;
2681         }
2682         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2683 }
2684 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2685
2686 static int emulator_cmpxchg_emulated(unsigned long addr,
2687                                      const void *old,
2688                                      const void *new,
2689                                      unsigned int bytes,
2690                                      struct kvm_vcpu *vcpu)
2691 {
2692         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
2693 #ifndef CONFIG_X86_64
2694         /* guests cmpxchg8b have to be emulated atomically */
2695         if (bytes == 8) {
2696                 gpa_t gpa;
2697                 struct page *page;
2698                 char *kaddr;
2699                 u64 val;
2700
2701                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2702
2703                 if (gpa == UNMAPPED_GVA ||
2704                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2705                         goto emul_write;
2706
2707                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2708                         goto emul_write;
2709
2710                 val = *(u64 *)new;
2711
2712                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2713
2714                 kaddr = kmap_atomic(page, KM_USER0);
2715                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2716                 kunmap_atomic(kaddr, KM_USER0);
2717                 kvm_release_page_dirty(page);
2718         }
2719 emul_write:
2720 #endif
2721
2722         return emulator_write_emulated(addr, new, bytes, vcpu);
2723 }
2724
2725 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2726 {
2727         return kvm_x86_ops->get_segment_base(vcpu, seg);
2728 }
2729
2730 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2731 {
2732         kvm_mmu_invlpg(vcpu, address);
2733         return X86EMUL_CONTINUE;
2734 }
2735
2736 int emulate_clts(struct kvm_vcpu *vcpu)
2737 {
2738         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2739         return X86EMUL_CONTINUE;
2740 }
2741
2742 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2743 {
2744         struct kvm_vcpu *vcpu = ctxt->vcpu;
2745
2746         switch (dr) {
2747         case 0 ... 3:
2748                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2749                 return X86EMUL_CONTINUE;
2750         default:
2751                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2752                 return X86EMUL_UNHANDLEABLE;
2753         }
2754 }
2755
2756 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2757 {
2758         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2759         int exception;
2760
2761         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2762         if (exception) {
2763                 /* FIXME: better handling */
2764                 return X86EMUL_UNHANDLEABLE;
2765         }
2766         return X86EMUL_CONTINUE;
2767 }
2768
2769 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2770 {
2771         u8 opcodes[4];
2772         unsigned long rip = kvm_rip_read(vcpu);
2773         unsigned long rip_linear;
2774
2775         if (!printk_ratelimit())
2776                 return;
2777
2778         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2779
2780         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2781
2782         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2783                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2784 }
2785 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2786
2787 static struct x86_emulate_ops emulate_ops = {
2788         .read_std            = kvm_read_guest_virt,
2789         .read_emulated       = emulator_read_emulated,
2790         .write_emulated      = emulator_write_emulated,
2791         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2792 };
2793
2794 static void cache_all_regs(struct kvm_vcpu *vcpu)
2795 {
2796         kvm_register_read(vcpu, VCPU_REGS_RAX);
2797         kvm_register_read(vcpu, VCPU_REGS_RSP);
2798         kvm_register_read(vcpu, VCPU_REGS_RIP);
2799         vcpu->arch.regs_dirty = ~0;
2800 }
2801
2802 int emulate_instruction(struct kvm_vcpu *vcpu,
2803                         struct kvm_run *run,
2804                         unsigned long cr2,
2805                         u16 error_code,
2806                         int emulation_type)
2807 {
2808         int r, shadow_mask;
2809         struct decode_cache *c;
2810
2811         kvm_clear_exception_queue(vcpu);
2812         vcpu->arch.mmio_fault_cr2 = cr2;
2813         /*
2814          * TODO: fix emulate.c to use guest_read/write_register
2815          * instead of direct ->regs accesses, can save hundred cycles
2816          * on Intel for instructions that don't read/change RSP, for
2817          * for example.
2818          */
2819         cache_all_regs(vcpu);
2820
2821         vcpu->mmio_is_write = 0;
2822         vcpu->arch.pio.string = 0;
2823
2824         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2825                 int cs_db, cs_l;
2826                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2827
2828                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2829                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2830                 vcpu->arch.emulate_ctxt.mode =
2831                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2832                         ? X86EMUL_MODE_REAL : cs_l
2833                         ? X86EMUL_MODE_PROT64 : cs_db
2834                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2835
2836                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2837
2838                 /* Only allow emulation of specific instructions on #UD
2839                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2840                 c = &vcpu->arch.emulate_ctxt.decode;
2841                 if (emulation_type & EMULTYPE_TRAP_UD) {
2842                         if (!c->twobyte)
2843                                 return EMULATE_FAIL;
2844                         switch (c->b) {
2845                         case 0x01: /* VMMCALL */
2846                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2847                                         return EMULATE_FAIL;
2848                                 break;
2849                         case 0x34: /* sysenter */
2850                         case 0x35: /* sysexit */
2851                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2852                                         return EMULATE_FAIL;
2853                                 break;
2854                         case 0x05: /* syscall */
2855                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2856                                         return EMULATE_FAIL;
2857                                 break;
2858                         default:
2859                                 return EMULATE_FAIL;
2860                         }
2861
2862                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2863                                 return EMULATE_FAIL;
2864                 }
2865
2866                 ++vcpu->stat.insn_emulation;
2867                 if (r)  {
2868                         ++vcpu->stat.insn_emulation_fail;
2869                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2870                                 return EMULATE_DONE;
2871                         return EMULATE_FAIL;
2872                 }
2873         }
2874
2875         if (emulation_type & EMULTYPE_SKIP) {
2876                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2877                 return EMULATE_DONE;
2878         }
2879
2880         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2881         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2882
2883         if (r == 0)
2884                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2885
2886         if (vcpu->arch.pio.string)
2887                 return EMULATE_DO_MMIO;
2888
2889         if ((r || vcpu->mmio_is_write) && run) {
2890                 run->exit_reason = KVM_EXIT_MMIO;
2891                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2892                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2893                 run->mmio.len = vcpu->mmio_size;
2894                 run->mmio.is_write = vcpu->mmio_is_write;
2895         }
2896
2897         if (r) {
2898                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2899                         return EMULATE_DONE;
2900                 if (!vcpu->mmio_needed) {
2901                         kvm_report_emulation_failure(vcpu, "mmio");
2902                         return EMULATE_FAIL;
2903                 }
2904                 return EMULATE_DO_MMIO;
2905         }
2906
2907         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2908
2909         if (vcpu->mmio_is_write) {
2910                 vcpu->mmio_needed = 0;
2911                 return EMULATE_DO_MMIO;
2912         }
2913
2914         return EMULATE_DONE;
2915 }
2916 EXPORT_SYMBOL_GPL(emulate_instruction);
2917
2918 static int pio_copy_data(struct kvm_vcpu *vcpu)
2919 {
2920         void *p = vcpu->arch.pio_data;
2921         gva_t q = vcpu->arch.pio.guest_gva;
2922         unsigned bytes;
2923         int ret;
2924
2925         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2926         if (vcpu->arch.pio.in)
2927                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2928         else
2929                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2930         return ret;
2931 }
2932
2933 int complete_pio(struct kvm_vcpu *vcpu)
2934 {
2935         struct kvm_pio_request *io = &vcpu->arch.pio;
2936         long delta;
2937         int r;
2938         unsigned long val;
2939
2940         if (!io->string) {
2941                 if (io->in) {
2942                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2943                         memcpy(&val, vcpu->arch.pio_data, io->size);
2944                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2945                 }
2946         } else {
2947                 if (io->in) {
2948                         r = pio_copy_data(vcpu);
2949                         if (r)
2950                                 return r;
2951                 }
2952
2953                 delta = 1;
2954                 if (io->rep) {
2955                         delta *= io->cur_count;
2956                         /*
2957                          * The size of the register should really depend on
2958                          * current address size.
2959                          */
2960                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2961                         val -= delta;
2962                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2963                 }
2964                 if (io->down)
2965                         delta = -delta;
2966                 delta *= io->size;
2967                 if (io->in) {
2968                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2969                         val += delta;
2970                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2971                 } else {
2972                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2973                         val += delta;
2974                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2975                 }
2976         }
2977
2978         io->count -= io->cur_count;
2979         io->cur_count = 0;
2980
2981         return 0;
2982 }
2983
2984 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2985 {
2986         /* TODO: String I/O for in kernel device */
2987         int r;
2988
2989         if (vcpu->arch.pio.in)
2990                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2991                                     vcpu->arch.pio.size, pd);
2992         else
2993                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2994                                      vcpu->arch.pio.size, pd);
2995         return r;
2996 }
2997
2998 static int pio_string_write(struct kvm_vcpu *vcpu)
2999 {
3000         struct kvm_pio_request *io = &vcpu->arch.pio;
3001         void *pd = vcpu->arch.pio_data;
3002         int i, r = 0;
3003
3004         for (i = 0; i < io->cur_count; i++) {
3005                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
3006                                      io->port, io->size, pd)) {
3007                         r = -EOPNOTSUPP;
3008                         break;
3009                 }
3010                 pd += io->size;
3011         }
3012         return r;
3013 }
3014
3015 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
3016                   int size, unsigned port)
3017 {
3018         unsigned long val;
3019
3020         vcpu->run->exit_reason = KVM_EXIT_IO;
3021         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3022         vcpu->run->io.size = vcpu->arch.pio.size = size;
3023         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3024         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3025         vcpu->run->io.port = vcpu->arch.pio.port = port;
3026         vcpu->arch.pio.in = in;
3027         vcpu->arch.pio.string = 0;
3028         vcpu->arch.pio.down = 0;
3029         vcpu->arch.pio.rep = 0;
3030
3031         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3032                       size, 1);
3033
3034         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3035         memcpy(vcpu->arch.pio_data, &val, 4);
3036
3037         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3038                 complete_pio(vcpu);
3039                 return 1;
3040         }
3041         return 0;
3042 }
3043 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3044
3045 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
3046                   int size, unsigned long count, int down,
3047                   gva_t address, int rep, unsigned port)
3048 {
3049         unsigned now, in_page;
3050         int ret = 0;
3051
3052         vcpu->run->exit_reason = KVM_EXIT_IO;
3053         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3054         vcpu->run->io.size = vcpu->arch.pio.size = size;
3055         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3056         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3057         vcpu->run->io.port = vcpu->arch.pio.port = port;
3058         vcpu->arch.pio.in = in;
3059         vcpu->arch.pio.string = 1;
3060         vcpu->arch.pio.down = down;
3061         vcpu->arch.pio.rep = rep;
3062
3063         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3064                       size, count);
3065
3066         if (!count) {
3067                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3068                 return 1;
3069         }
3070
3071         if (!down)
3072                 in_page = PAGE_SIZE - offset_in_page(address);
3073         else
3074                 in_page = offset_in_page(address) + size;
3075         now = min(count, (unsigned long)in_page / size);
3076         if (!now)
3077                 now = 1;
3078         if (down) {
3079                 /*
3080                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3081                  */
3082                 pr_unimpl(vcpu, "guest string pio down\n");
3083                 kvm_inject_gp(vcpu, 0);
3084                 return 1;
3085         }
3086         vcpu->run->io.count = now;
3087         vcpu->arch.pio.cur_count = now;
3088
3089         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3090                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3091
3092         vcpu->arch.pio.guest_gva = address;
3093
3094         if (!vcpu->arch.pio.in) {
3095                 /* string PIO write */
3096                 ret = pio_copy_data(vcpu);
3097                 if (ret == X86EMUL_PROPAGATE_FAULT) {
3098                         kvm_inject_gp(vcpu, 0);
3099                         return 1;
3100                 }
3101                 if (ret == 0 && !pio_string_write(vcpu)) {
3102                         complete_pio(vcpu);
3103                         if (vcpu->arch.pio.count == 0)
3104                                 ret = 1;
3105                 }
3106         }
3107         /* no string PIO read support yet */
3108
3109         return ret;
3110 }
3111 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3112
3113 static void bounce_off(void *info)
3114 {
3115         /* nothing */
3116 }
3117
3118 static unsigned int  ref_freq;
3119 static unsigned long tsc_khz_ref;
3120
3121 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3122                                      void *data)
3123 {
3124         struct cpufreq_freqs *freq = data;
3125         struct kvm *kvm;
3126         struct kvm_vcpu *vcpu;
3127         int i, send_ipi = 0;
3128
3129         if (!ref_freq)
3130                 ref_freq = freq->old;
3131
3132         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3133                 return 0;
3134         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3135                 return 0;
3136         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3137
3138         spin_lock(&kvm_lock);
3139         list_for_each_entry(kvm, &vm_list, vm_list) {
3140                 kvm_for_each_vcpu(i, vcpu, kvm) {
3141                         if (vcpu->cpu != freq->cpu)
3142                                 continue;
3143                         if (!kvm_request_guest_time_update(vcpu))
3144                                 continue;
3145                         if (vcpu->cpu != smp_processor_id())
3146                                 send_ipi++;
3147                 }
3148         }
3149         spin_unlock(&kvm_lock);
3150
3151         if (freq->old < freq->new && send_ipi) {
3152                 /*
3153                  * We upscale the frequency.  Must make the guest
3154                  * doesn't see old kvmclock values while running with
3155                  * the new frequency, otherwise we risk the guest sees
3156                  * time go backwards.
3157                  *
3158                  * In case we update the frequency for another cpu
3159                  * (which might be in guest context) send an interrupt
3160                  * to kick the cpu out of guest context.  Next time
3161                  * guest context is entered kvmclock will be updated,
3162                  * so the guest will not see stale values.
3163                  */
3164                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3165         }
3166         return 0;
3167 }
3168
3169 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3170         .notifier_call  = kvmclock_cpufreq_notifier
3171 };
3172
3173 int kvm_arch_init(void *opaque)
3174 {
3175         int r, cpu;
3176         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3177
3178         if (kvm_x86_ops) {
3179                 printk(KERN_ERR "kvm: already loaded the other module\n");
3180                 r = -EEXIST;
3181                 goto out;
3182         }
3183
3184         if (!ops->cpu_has_kvm_support()) {
3185                 printk(KERN_ERR "kvm: no hardware support\n");
3186                 r = -EOPNOTSUPP;
3187                 goto out;
3188         }
3189         if (ops->disabled_by_bios()) {
3190                 printk(KERN_ERR "kvm: disabled by bios\n");
3191                 r = -EOPNOTSUPP;
3192                 goto out;
3193         }
3194
3195         r = kvm_mmu_module_init();
3196         if (r)
3197                 goto out;
3198
3199         kvm_init_msr_list();
3200
3201         kvm_x86_ops = ops;
3202         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3203         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3204         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3205                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3206
3207         for_each_possible_cpu(cpu)
3208                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3209         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3210                 tsc_khz_ref = tsc_khz;
3211                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3212                                           CPUFREQ_TRANSITION_NOTIFIER);
3213         }
3214
3215         return 0;
3216
3217 out:
3218         return r;
3219 }
3220
3221 void kvm_arch_exit(void)
3222 {
3223         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3224                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3225                                             CPUFREQ_TRANSITION_NOTIFIER);
3226         kvm_x86_ops = NULL;
3227         kvm_mmu_module_exit();
3228 }
3229
3230 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3231 {
3232         ++vcpu->stat.halt_exits;
3233         if (irqchip_in_kernel(vcpu->kvm)) {
3234                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3235                 return 1;
3236         } else {
3237                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3238                 return 0;
3239         }
3240 }
3241 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3242
3243 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3244                            unsigned long a1)
3245 {
3246         if (is_long_mode(vcpu))
3247                 return a0;
3248         else
3249                 return a0 | ((gpa_t)a1 << 32);
3250 }
3251
3252 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3253 {
3254         unsigned long nr, a0, a1, a2, a3, ret;
3255         int r = 1;
3256
3257         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3258         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3259         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3260         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3261         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3262
3263         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3264
3265         if (!is_long_mode(vcpu)) {
3266                 nr &= 0xFFFFFFFF;
3267                 a0 &= 0xFFFFFFFF;
3268                 a1 &= 0xFFFFFFFF;
3269                 a2 &= 0xFFFFFFFF;
3270                 a3 &= 0xFFFFFFFF;
3271         }
3272
3273         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3274                 ret = -KVM_EPERM;
3275                 goto out;
3276         }
3277
3278         switch (nr) {
3279         case KVM_HC_VAPIC_POLL_IRQ:
3280                 ret = 0;
3281                 break;
3282         case KVM_HC_MMU_OP:
3283                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3284                 break;
3285         default:
3286                 ret = -KVM_ENOSYS;
3287                 break;
3288         }
3289 out:
3290         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3291         ++vcpu->stat.hypercalls;
3292         return r;
3293 }
3294 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3295
3296 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3297 {
3298         char instruction[3];
3299         int ret = 0;
3300         unsigned long rip = kvm_rip_read(vcpu);
3301
3302
3303         /*
3304          * Blow out the MMU to ensure that no other VCPU has an active mapping
3305          * to ensure that the updated hypercall appears atomically across all
3306          * VCPUs.
3307          */
3308         kvm_mmu_zap_all(vcpu->kvm);
3309
3310         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3311         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3312             != X86EMUL_CONTINUE)
3313                 ret = -EFAULT;
3314
3315         return ret;
3316 }
3317
3318 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3319 {
3320         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3321 }
3322
3323 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3324 {
3325         struct descriptor_table dt = { limit, base };
3326
3327         kvm_x86_ops->set_gdt(vcpu, &dt);
3328 }
3329
3330 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3331 {
3332         struct descriptor_table dt = { limit, base };
3333
3334         kvm_x86_ops->set_idt(vcpu, &dt);
3335 }
3336
3337 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3338                    unsigned long *rflags)
3339 {
3340         kvm_lmsw(vcpu, msw);
3341         *rflags = kvm_x86_ops->get_rflags(vcpu);
3342 }
3343
3344 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3345 {
3346         unsigned long value;
3347
3348         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3349         switch (cr) {
3350         case 0:
3351                 value = vcpu->arch.cr0;
3352                 break;
3353         case 2:
3354                 value = vcpu->arch.cr2;
3355                 break;
3356         case 3:
3357                 value = vcpu->arch.cr3;
3358                 break;
3359         case 4:
3360                 value = vcpu->arch.cr4;
3361                 break;
3362         case 8:
3363                 value = kvm_get_cr8(vcpu);
3364                 break;
3365         default:
3366                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3367                 return 0;
3368         }
3369
3370         return value;
3371 }
3372
3373 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3374                      unsigned long *rflags)
3375 {
3376         switch (cr) {
3377         case 0:
3378                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3379                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3380                 break;
3381         case 2:
3382                 vcpu->arch.cr2 = val;
3383                 break;
3384         case 3:
3385                 kvm_set_cr3(vcpu, val);
3386                 break;
3387         case 4:
3388                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3389                 break;
3390         case 8:
3391                 kvm_set_cr8(vcpu, val & 0xfUL);
3392                 break;
3393         default:
3394                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3395         }
3396 }
3397
3398 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3399 {
3400         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3401         int j, nent = vcpu->arch.cpuid_nent;
3402
3403         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3404         /* when no next entry is found, the current entry[i] is reselected */
3405         for (j = i + 1; ; j = (j + 1) % nent) {
3406                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3407                 if (ej->function == e->function) {
3408                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3409                         return j;
3410                 }
3411         }
3412         return 0; /* silence gcc, even though control never reaches here */
3413 }
3414
3415 /* find an entry with matching function, matching index (if needed), and that
3416  * should be read next (if it's stateful) */
3417 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3418         u32 function, u32 index)
3419 {
3420         if (e->function != function)
3421                 return 0;
3422         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3423                 return 0;
3424         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3425             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3426                 return 0;
3427         return 1;
3428 }
3429
3430 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3431                                               u32 function, u32 index)
3432 {
3433         int i;
3434         struct kvm_cpuid_entry2 *best = NULL;
3435
3436         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3437                 struct kvm_cpuid_entry2 *e;
3438
3439                 e = &vcpu->arch.cpuid_entries[i];
3440                 if (is_matching_cpuid_entry(e, function, index)) {
3441                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3442                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3443                         best = e;
3444                         break;
3445                 }
3446                 /*
3447                  * Both basic or both extended?
3448                  */
3449                 if (((e->function ^ function) & 0x80000000) == 0)
3450                         if (!best || e->function > best->function)
3451                                 best = e;
3452         }
3453         return best;
3454 }
3455
3456 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3457 {
3458         struct kvm_cpuid_entry2 *best;
3459
3460         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3461         if (best)
3462                 return best->eax & 0xff;
3463         return 36;
3464 }
3465
3466 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3467 {
3468         u32 function, index;
3469         struct kvm_cpuid_entry2 *best;
3470
3471         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3472         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3473         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3474         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3475         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3476         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3477         best = kvm_find_cpuid_entry(vcpu, function, index);
3478         if (best) {
3479                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3480                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3481                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3482                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3483         }
3484         kvm_x86_ops->skip_emulated_instruction(vcpu);
3485         trace_kvm_cpuid(function,
3486                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3487                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3488                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3489                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3490 }
3491 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3492
3493 /*
3494  * Check if userspace requested an interrupt window, and that the
3495  * interrupt window is open.
3496  *
3497  * No need to exit to userspace if we already have an interrupt queued.
3498  */
3499 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3500                                           struct kvm_run *kvm_run)
3501 {
3502         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3503                 kvm_run->request_interrupt_window &&
3504                 kvm_arch_interrupt_allowed(vcpu));
3505 }
3506
3507 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3508                               struct kvm_run *kvm_run)
3509 {
3510         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3511         kvm_run->cr8 = kvm_get_cr8(vcpu);
3512         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3513         if (irqchip_in_kernel(vcpu->kvm))
3514                 kvm_run->ready_for_interrupt_injection = 1;
3515         else
3516                 kvm_run->ready_for_interrupt_injection =
3517                         kvm_arch_interrupt_allowed(vcpu) &&
3518                         !kvm_cpu_has_interrupt(vcpu) &&
3519                         !kvm_event_needs_reinjection(vcpu);
3520 }
3521
3522 static void vapic_enter(struct kvm_vcpu *vcpu)
3523 {
3524         struct kvm_lapic *apic = vcpu->arch.apic;
3525         struct page *page;
3526
3527         if (!apic || !apic->vapic_addr)
3528                 return;
3529
3530         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3531
3532         vcpu->arch.apic->vapic_page = page;
3533 }
3534
3535 static void vapic_exit(struct kvm_vcpu *vcpu)
3536 {
3537         struct kvm_lapic *apic = vcpu->arch.apic;
3538
3539         if (!apic || !apic->vapic_addr)
3540                 return;
3541
3542         down_read(&vcpu->kvm->slots_lock);
3543         kvm_release_page_dirty(apic->vapic_page);
3544         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3545         up_read(&vcpu->kvm->slots_lock);
3546 }
3547
3548 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3549 {
3550         int max_irr, tpr;
3551
3552         if (!kvm_x86_ops->update_cr8_intercept)
3553                 return;
3554
3555         if (!vcpu->arch.apic)
3556                 return;
3557
3558         if (!vcpu->arch.apic->vapic_addr)
3559                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3560         else
3561                 max_irr = -1;
3562
3563         if (max_irr != -1)
3564                 max_irr >>= 4;
3565
3566         tpr = kvm_lapic_get_cr8(vcpu);
3567
3568         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3569 }
3570
3571 static void inject_pending_event(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3572 {
3573         /* try to reinject previous events if any */
3574         if (vcpu->arch.exception.pending) {
3575                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3576                                           vcpu->arch.exception.has_error_code,
3577                                           vcpu->arch.exception.error_code);
3578                 return;
3579         }
3580
3581         if (vcpu->arch.nmi_injected) {
3582                 kvm_x86_ops->set_nmi(vcpu);
3583                 return;
3584         }
3585
3586         if (vcpu->arch.interrupt.pending) {
3587                 kvm_x86_ops->set_irq(vcpu);
3588                 return;
3589         }
3590
3591         /* try to inject new event if pending */
3592         if (vcpu->arch.nmi_pending) {
3593                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3594                         vcpu->arch.nmi_pending = false;
3595                         vcpu->arch.nmi_injected = true;
3596                         kvm_x86_ops->set_nmi(vcpu);
3597                 }
3598         } else if (kvm_cpu_has_interrupt(vcpu)) {
3599                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3600                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3601                                             false);
3602                         kvm_x86_ops->set_irq(vcpu);
3603                 }
3604         }
3605 }
3606
3607 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3608 {
3609         int r;
3610         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3611                 kvm_run->request_interrupt_window;
3612
3613         if (vcpu->requests)
3614                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3615                         kvm_mmu_unload(vcpu);
3616
3617         r = kvm_mmu_reload(vcpu);
3618         if (unlikely(r))
3619                 goto out;
3620
3621         if (vcpu->requests) {
3622                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3623                         __kvm_migrate_timers(vcpu);
3624                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3625                         kvm_write_guest_time(vcpu);
3626                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3627                         kvm_mmu_sync_roots(vcpu);
3628                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3629                         kvm_x86_ops->tlb_flush(vcpu);
3630                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3631                                        &vcpu->requests)) {
3632                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3633                         r = 0;
3634                         goto out;
3635                 }
3636                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3637                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3638                         r = 0;
3639                         goto out;
3640                 }
3641         }
3642
3643         preempt_disable();
3644
3645         kvm_x86_ops->prepare_guest_switch(vcpu);
3646         kvm_load_guest_fpu(vcpu);
3647
3648         local_irq_disable();
3649
3650         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3651         smp_mb__after_clear_bit();
3652
3653         if (vcpu->requests || need_resched() || signal_pending(current)) {
3654                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3655                 local_irq_enable();
3656                 preempt_enable();
3657                 r = 1;
3658                 goto out;
3659         }
3660
3661         inject_pending_event(vcpu, kvm_run);
3662
3663         /* enable NMI/IRQ window open exits if needed */
3664         if (vcpu->arch.nmi_pending)
3665                 kvm_x86_ops->enable_nmi_window(vcpu);
3666         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3667                 kvm_x86_ops->enable_irq_window(vcpu);
3668
3669         if (kvm_lapic_enabled(vcpu)) {
3670                 update_cr8_intercept(vcpu);
3671                 kvm_lapic_sync_to_vapic(vcpu);
3672         }
3673
3674         up_read(&vcpu->kvm->slots_lock);
3675
3676         kvm_guest_enter();
3677
3678         if (unlikely(vcpu->arch.switch_db_regs)) {
3679                 set_debugreg(0, 7);
3680                 set_debugreg(vcpu->arch.eff_db[0], 0);
3681                 set_debugreg(vcpu->arch.eff_db[1], 1);
3682                 set_debugreg(vcpu->arch.eff_db[2], 2);
3683                 set_debugreg(vcpu->arch.eff_db[3], 3);
3684         }
3685
3686         trace_kvm_entry(vcpu->vcpu_id);
3687         kvm_x86_ops->run(vcpu, kvm_run);
3688
3689         if (unlikely(vcpu->arch.switch_db_regs || test_thread_flag(TIF_DEBUG))) {
3690                 set_debugreg(current->thread.debugreg0, 0);
3691                 set_debugreg(current->thread.debugreg1, 1);
3692                 set_debugreg(current->thread.debugreg2, 2);
3693                 set_debugreg(current->thread.debugreg3, 3);
3694                 set_debugreg(current->thread.debugreg6, 6);
3695                 set_debugreg(current->thread.debugreg7, 7);
3696         }
3697
3698         set_bit(KVM_REQ_KICK, &vcpu->requests);
3699         local_irq_enable();
3700
3701         ++vcpu->stat.exits;
3702
3703         /*
3704          * We must have an instruction between local_irq_enable() and
3705          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3706          * the interrupt shadow.  The stat.exits increment will do nicely.
3707          * But we need to prevent reordering, hence this barrier():
3708          */
3709         barrier();
3710
3711         kvm_guest_exit();
3712
3713         preempt_enable();
3714
3715         down_read(&vcpu->kvm->slots_lock);
3716
3717         /*
3718          * Profile KVM exit RIPs:
3719          */
3720         if (unlikely(prof_on == KVM_PROFILING)) {
3721                 unsigned long rip = kvm_rip_read(vcpu);
3722                 profile_hit(KVM_PROFILING, (void *)rip);
3723         }
3724
3725
3726         kvm_lapic_sync_from_vapic(vcpu);
3727
3728         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3729 out:
3730         return r;
3731 }
3732
3733
3734 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3735 {
3736         int r;
3737
3738         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3739                 pr_debug("vcpu %d received sipi with vector # %x\n",
3740                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3741                 kvm_lapic_reset(vcpu);
3742                 r = kvm_arch_vcpu_reset(vcpu);
3743                 if (r)
3744                         return r;
3745                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3746         }
3747
3748         down_read(&vcpu->kvm->slots_lock);
3749         vapic_enter(vcpu);
3750
3751         r = 1;
3752         while (r > 0) {
3753                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3754                         r = vcpu_enter_guest(vcpu, kvm_run);
3755                 else {
3756                         up_read(&vcpu->kvm->slots_lock);
3757                         kvm_vcpu_block(vcpu);
3758                         down_read(&vcpu->kvm->slots_lock);
3759                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3760                         {
3761                                 switch(vcpu->arch.mp_state) {
3762                                 case KVM_MP_STATE_HALTED:
3763                                         vcpu->arch.mp_state =
3764                                                 KVM_MP_STATE_RUNNABLE;
3765                                 case KVM_MP_STATE_RUNNABLE:
3766                                         break;
3767                                 case KVM_MP_STATE_SIPI_RECEIVED:
3768                                 default:
3769                                         r = -EINTR;
3770                                         break;
3771                                 }
3772                         }
3773                 }
3774
3775                 if (r <= 0)
3776                         break;
3777
3778                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3779                 if (kvm_cpu_has_pending_timer(vcpu))
3780                         kvm_inject_pending_timer_irqs(vcpu);
3781
3782                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3783                         r = -EINTR;
3784                         kvm_run->exit_reason = KVM_EXIT_INTR;
3785                         ++vcpu->stat.request_irq_exits;
3786                 }
3787                 if (signal_pending(current)) {
3788                         r = -EINTR;
3789                         kvm_run->exit_reason = KVM_EXIT_INTR;
3790                         ++vcpu->stat.signal_exits;
3791                 }
3792                 if (need_resched()) {
3793                         up_read(&vcpu->kvm->slots_lock);
3794                         kvm_resched(vcpu);
3795                         down_read(&vcpu->kvm->slots_lock);
3796                 }
3797         }
3798
3799         up_read(&vcpu->kvm->slots_lock);
3800         post_kvm_run_save(vcpu, kvm_run);
3801
3802         vapic_exit(vcpu);
3803
3804         return r;
3805 }
3806
3807 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3808 {
3809         int r;
3810         sigset_t sigsaved;
3811
3812         vcpu_load(vcpu);
3813
3814         if (vcpu->sigset_active)
3815                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3816
3817         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3818                 kvm_vcpu_block(vcpu);
3819                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3820                 r = -EAGAIN;
3821                 goto out;
3822         }
3823
3824         /* re-sync apic's tpr */
3825         if (!irqchip_in_kernel(vcpu->kvm))
3826                 kvm_set_cr8(vcpu, kvm_run->cr8);
3827
3828         if (vcpu->arch.pio.cur_count) {
3829                 r = complete_pio(vcpu);
3830                 if (r)
3831                         goto out;
3832         }
3833 #if CONFIG_HAS_IOMEM
3834         if (vcpu->mmio_needed) {
3835                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3836                 vcpu->mmio_read_completed = 1;
3837                 vcpu->mmio_needed = 0;
3838
3839                 down_read(&vcpu->kvm->slots_lock);
3840                 r = emulate_instruction(vcpu, kvm_run,
3841                                         vcpu->arch.mmio_fault_cr2, 0,
3842                                         EMULTYPE_NO_DECODE);
3843                 up_read(&vcpu->kvm->slots_lock);
3844                 if (r == EMULATE_DO_MMIO) {
3845                         /*
3846                          * Read-modify-write.  Back to userspace.
3847                          */
3848                         r = 0;
3849                         goto out;
3850                 }
3851         }
3852 #endif
3853         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3854                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3855                                      kvm_run->hypercall.ret);
3856
3857         r = __vcpu_run(vcpu, kvm_run);
3858
3859 out:
3860         if (vcpu->sigset_active)
3861                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3862
3863         vcpu_put(vcpu);
3864         return r;
3865 }
3866
3867 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3868 {
3869         vcpu_load(vcpu);
3870
3871         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3872         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3873         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3874         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3875         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3876         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3877         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3878         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3879 #ifdef CONFIG_X86_64
3880         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3881         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3882         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3883         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3884         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3885         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3886         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3887         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3888 #endif
3889
3890         regs->rip = kvm_rip_read(vcpu);
3891         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3892
3893         /*
3894          * Don't leak debug flags in case they were set for guest debugging
3895          */
3896         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3897                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3898
3899         vcpu_put(vcpu);
3900
3901         return 0;
3902 }
3903
3904 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3905 {
3906         vcpu_load(vcpu);
3907
3908         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3909         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3910         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3911         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3912         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3913         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3914         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3915         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3916 #ifdef CONFIG_X86_64
3917         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3918         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3919         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3920         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3921         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3922         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3923         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3924         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3925
3926 #endif
3927
3928         kvm_rip_write(vcpu, regs->rip);
3929         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3930
3931
3932         vcpu->arch.exception.pending = false;
3933
3934         vcpu_put(vcpu);
3935
3936         return 0;
3937 }
3938
3939 void kvm_get_segment(struct kvm_vcpu *vcpu,
3940                      struct kvm_segment *var, int seg)
3941 {
3942         kvm_x86_ops->get_segment(vcpu, var, seg);
3943 }
3944
3945 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3946 {
3947         struct kvm_segment cs;
3948
3949         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3950         *db = cs.db;
3951         *l = cs.l;
3952 }
3953 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3954
3955 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3956                                   struct kvm_sregs *sregs)
3957 {
3958         struct descriptor_table dt;
3959
3960         vcpu_load(vcpu);
3961
3962         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3963         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3964         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3965         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3966         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3967         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3968
3969         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3970         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3971
3972         kvm_x86_ops->get_idt(vcpu, &dt);
3973         sregs->idt.limit = dt.limit;
3974         sregs->idt.base = dt.base;
3975         kvm_x86_ops->get_gdt(vcpu, &dt);
3976         sregs->gdt.limit = dt.limit;
3977         sregs->gdt.base = dt.base;
3978
3979         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3980         sregs->cr0 = vcpu->arch.cr0;
3981         sregs->cr2 = vcpu->arch.cr2;
3982         sregs->cr3 = vcpu->arch.cr3;
3983         sregs->cr4 = vcpu->arch.cr4;
3984         sregs->cr8 = kvm_get_cr8(vcpu);
3985         sregs->efer = vcpu->arch.shadow_efer;
3986         sregs->apic_base = kvm_get_apic_base(vcpu);
3987
3988         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3989
3990         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3991                 set_bit(vcpu->arch.interrupt.nr,
3992                         (unsigned long *)sregs->interrupt_bitmap);
3993
3994         vcpu_put(vcpu);
3995
3996         return 0;
3997 }
3998
3999 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4000                                     struct kvm_mp_state *mp_state)
4001 {
4002         vcpu_load(vcpu);
4003         mp_state->mp_state = vcpu->arch.mp_state;
4004         vcpu_put(vcpu);
4005         return 0;
4006 }
4007
4008 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4009                                     struct kvm_mp_state *mp_state)
4010 {
4011         vcpu_load(vcpu);
4012         vcpu->arch.mp_state = mp_state->mp_state;
4013         vcpu_put(vcpu);
4014         return 0;
4015 }
4016
4017 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4018                         struct kvm_segment *var, int seg)
4019 {
4020         kvm_x86_ops->set_segment(vcpu, var, seg);
4021 }
4022
4023 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
4024                                    struct kvm_segment *kvm_desct)
4025 {
4026         kvm_desct->base = get_desc_base(seg_desc);
4027         kvm_desct->limit = get_desc_limit(seg_desc);
4028         if (seg_desc->g) {
4029                 kvm_desct->limit <<= 12;
4030                 kvm_desct->limit |= 0xfff;
4031         }
4032         kvm_desct->selector = selector;
4033         kvm_desct->type = seg_desc->type;
4034         kvm_desct->present = seg_desc->p;
4035         kvm_desct->dpl = seg_desc->dpl;
4036         kvm_desct->db = seg_desc->d;
4037         kvm_desct->s = seg_desc->s;
4038         kvm_desct->l = seg_desc->l;
4039         kvm_desct->g = seg_desc->g;
4040         kvm_desct->avl = seg_desc->avl;
4041         if (!selector)
4042                 kvm_desct->unusable = 1;
4043         else
4044                 kvm_desct->unusable = 0;
4045         kvm_desct->padding = 0;
4046 }
4047
4048 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4049                                           u16 selector,
4050                                           struct descriptor_table *dtable)
4051 {
4052         if (selector & 1 << 2) {
4053                 struct kvm_segment kvm_seg;
4054
4055                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4056
4057                 if (kvm_seg.unusable)
4058                         dtable->limit = 0;
4059                 else
4060                         dtable->limit = kvm_seg.limit;
4061                 dtable->base = kvm_seg.base;
4062         }
4063         else
4064                 kvm_x86_ops->get_gdt(vcpu, dtable);
4065 }
4066
4067 /* allowed just for 8 bytes segments */
4068 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4069                                          struct desc_struct *seg_desc)
4070 {
4071         struct descriptor_table dtable;
4072         u16 index = selector >> 3;
4073
4074         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4075
4076         if (dtable.limit < index * 8 + 7) {
4077                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4078                 return 1;
4079         }
4080         return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4081 }
4082
4083 /* allowed just for 8 bytes segments */
4084 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4085                                          struct desc_struct *seg_desc)
4086 {
4087         struct descriptor_table dtable;
4088         u16 index = selector >> 3;
4089
4090         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4091
4092         if (dtable.limit < index * 8 + 7)
4093                 return 1;
4094         return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4095 }
4096
4097 static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4098                              struct desc_struct *seg_desc)
4099 {
4100         u32 base_addr = get_desc_base(seg_desc);
4101
4102         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4103 }
4104
4105 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4106 {
4107         struct kvm_segment kvm_seg;
4108
4109         kvm_get_segment(vcpu, &kvm_seg, seg);
4110         return kvm_seg.selector;
4111 }
4112
4113 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4114                                                 u16 selector,
4115                                                 struct kvm_segment *kvm_seg)
4116 {
4117         struct desc_struct seg_desc;
4118
4119         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4120                 return 1;
4121         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4122         return 0;
4123 }
4124
4125 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4126 {
4127         struct kvm_segment segvar = {
4128                 .base = selector << 4,
4129                 .limit = 0xffff,
4130                 .selector = selector,
4131                 .type = 3,
4132                 .present = 1,
4133                 .dpl = 3,
4134                 .db = 0,
4135                 .s = 1,
4136                 .l = 0,
4137                 .g = 0,
4138                 .avl = 0,
4139                 .unusable = 0,
4140         };
4141         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4142         return 0;
4143 }
4144
4145 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4146 {
4147         return (seg != VCPU_SREG_LDTR) &&
4148                 (seg != VCPU_SREG_TR) &&
4149                 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_VM);
4150 }
4151
4152 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4153                                 int type_bits, int seg)
4154 {
4155         struct kvm_segment kvm_seg;
4156
4157         if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4158                 return kvm_load_realmode_segment(vcpu, selector, seg);
4159         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4160                 return 1;
4161         kvm_seg.type |= type_bits;
4162
4163         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4164             seg != VCPU_SREG_LDTR)
4165                 if (!kvm_seg.s)
4166                         kvm_seg.unusable = 1;
4167
4168         kvm_set_segment(vcpu, &kvm_seg, seg);
4169         return 0;
4170 }
4171
4172 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4173                                 struct tss_segment_32 *tss)
4174 {
4175         tss->cr3 = vcpu->arch.cr3;
4176         tss->eip = kvm_rip_read(vcpu);
4177         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4178         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4179         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4180         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4181         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4182         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4183         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4184         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4185         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4186         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4187         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4188         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4189         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4190         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4191         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4192         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4193 }
4194
4195 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4196                                   struct tss_segment_32 *tss)
4197 {
4198         kvm_set_cr3(vcpu, tss->cr3);
4199
4200         kvm_rip_write(vcpu, tss->eip);
4201         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4202
4203         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4204         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4205         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4206         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4207         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4208         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4209         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4210         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4211
4212         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4213                 return 1;
4214
4215         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4216                 return 1;
4217
4218         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4219                 return 1;
4220
4221         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4222                 return 1;
4223
4224         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4225                 return 1;
4226
4227         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4228                 return 1;
4229
4230         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4231                 return 1;
4232         return 0;
4233 }
4234
4235 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4236                                 struct tss_segment_16 *tss)
4237 {
4238         tss->ip = kvm_rip_read(vcpu);
4239         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4240         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4241         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4242         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4243         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4244         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4245         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4246         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4247         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4248
4249         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4250         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4251         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4252         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4253         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4254         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4255 }
4256
4257 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4258                                  struct tss_segment_16 *tss)
4259 {
4260         kvm_rip_write(vcpu, tss->ip);
4261         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4262         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4263         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4264         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4265         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4266         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4267         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4268         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4269         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4270
4271         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4272                 return 1;
4273
4274         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4275                 return 1;
4276
4277         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4278                 return 1;
4279
4280         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4281                 return 1;
4282
4283         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4284                 return 1;
4285         return 0;
4286 }
4287
4288 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4289                               u16 old_tss_sel, u32 old_tss_base,
4290                               struct desc_struct *nseg_desc)
4291 {
4292         struct tss_segment_16 tss_segment_16;
4293         int ret = 0;
4294
4295         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4296                            sizeof tss_segment_16))
4297                 goto out;
4298
4299         save_state_to_tss16(vcpu, &tss_segment_16);
4300
4301         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4302                             sizeof tss_segment_16))
4303                 goto out;
4304
4305         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4306                            &tss_segment_16, sizeof tss_segment_16))
4307                 goto out;
4308
4309         if (old_tss_sel != 0xffff) {
4310                 tss_segment_16.prev_task_link = old_tss_sel;
4311
4312                 if (kvm_write_guest(vcpu->kvm,
4313                                     get_tss_base_addr(vcpu, nseg_desc),
4314                                     &tss_segment_16.prev_task_link,
4315                                     sizeof tss_segment_16.prev_task_link))
4316                         goto out;
4317         }
4318
4319         if (load_state_from_tss16(vcpu, &tss_segment_16))
4320                 goto out;
4321
4322         ret = 1;
4323 out:
4324         return ret;
4325 }
4326
4327 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4328                        u16 old_tss_sel, u32 old_tss_base,
4329                        struct desc_struct *nseg_desc)
4330 {
4331         struct tss_segment_32 tss_segment_32;
4332         int ret = 0;
4333
4334         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4335                            sizeof tss_segment_32))
4336                 goto out;
4337
4338         save_state_to_tss32(vcpu, &tss_segment_32);
4339
4340         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4341                             sizeof tss_segment_32))
4342                 goto out;
4343
4344         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4345                            &tss_segment_32, sizeof tss_segment_32))
4346                 goto out;
4347
4348         if (old_tss_sel != 0xffff) {
4349                 tss_segment_32.prev_task_link = old_tss_sel;
4350
4351                 if (kvm_write_guest(vcpu->kvm,
4352                                     get_tss_base_addr(vcpu, nseg_desc),
4353                                     &tss_segment_32.prev_task_link,
4354                                     sizeof tss_segment_32.prev_task_link))
4355                         goto out;
4356         }
4357
4358         if (load_state_from_tss32(vcpu, &tss_segment_32))
4359                 goto out;
4360
4361         ret = 1;
4362 out:
4363         return ret;
4364 }
4365
4366 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4367 {
4368         struct kvm_segment tr_seg;
4369         struct desc_struct cseg_desc;
4370         struct desc_struct nseg_desc;
4371         int ret = 0;
4372         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4373         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4374
4375         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4376
4377         /* FIXME: Handle errors. Failure to read either TSS or their
4378          * descriptors should generate a pagefault.
4379          */
4380         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4381                 goto out;
4382
4383         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4384                 goto out;
4385
4386         if (reason != TASK_SWITCH_IRET) {
4387                 int cpl;
4388
4389                 cpl = kvm_x86_ops->get_cpl(vcpu);
4390                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4391                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4392                         return 1;
4393                 }
4394         }
4395
4396         if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4397                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4398                 return 1;
4399         }
4400
4401         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4402                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4403                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4404         }
4405
4406         if (reason == TASK_SWITCH_IRET) {
4407                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4408                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4409         }
4410
4411         /* set back link to prev task only if NT bit is set in eflags
4412            note that old_tss_sel is not used afetr this point */
4413         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4414                 old_tss_sel = 0xffff;
4415
4416         /* set back link to prev task only if NT bit is set in eflags
4417            note that old_tss_sel is not used afetr this point */
4418         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4419                 old_tss_sel = 0xffff;
4420
4421         if (nseg_desc.type & 8)
4422                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4423                                          old_tss_base, &nseg_desc);
4424         else
4425                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4426                                          old_tss_base, &nseg_desc);
4427
4428         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4429                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4430                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4431         }
4432
4433         if (reason != TASK_SWITCH_IRET) {
4434                 nseg_desc.type |= (1 << 1);
4435                 save_guest_segment_descriptor(vcpu, tss_selector,
4436                                               &nseg_desc);
4437         }
4438
4439         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4440         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4441         tr_seg.type = 11;
4442         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4443 out:
4444         return ret;
4445 }
4446 EXPORT_SYMBOL_GPL(kvm_task_switch);
4447
4448 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4449                                   struct kvm_sregs *sregs)
4450 {
4451         int mmu_reset_needed = 0;
4452         int pending_vec, max_bits;
4453         struct descriptor_table dt;
4454
4455         vcpu_load(vcpu);
4456
4457         dt.limit = sregs->idt.limit;
4458         dt.base = sregs->idt.base;
4459         kvm_x86_ops->set_idt(vcpu, &dt);
4460         dt.limit = sregs->gdt.limit;
4461         dt.base = sregs->gdt.base;
4462         kvm_x86_ops->set_gdt(vcpu, &dt);
4463
4464         vcpu->arch.cr2 = sregs->cr2;
4465         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4466         vcpu->arch.cr3 = sregs->cr3;
4467
4468         kvm_set_cr8(vcpu, sregs->cr8);
4469
4470         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4471         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4472         kvm_set_apic_base(vcpu, sregs->apic_base);
4473
4474         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4475
4476         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4477         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4478         vcpu->arch.cr0 = sregs->cr0;
4479
4480         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4481         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4482         if (!is_long_mode(vcpu) && is_pae(vcpu))
4483                 load_pdptrs(vcpu, vcpu->arch.cr3);
4484
4485         if (mmu_reset_needed)
4486                 kvm_mmu_reset_context(vcpu);
4487
4488         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4489         pending_vec = find_first_bit(
4490                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4491         if (pending_vec < max_bits) {
4492                 kvm_queue_interrupt(vcpu, pending_vec, false);
4493                 pr_debug("Set back pending irq %d\n", pending_vec);
4494                 if (irqchip_in_kernel(vcpu->kvm))
4495                         kvm_pic_clear_isr_ack(vcpu->kvm);
4496         }
4497
4498         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4499         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4500         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4501         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4502         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4503         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4504
4505         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4506         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4507
4508         update_cr8_intercept(vcpu);
4509
4510         /* Older userspace won't unhalt the vcpu on reset. */
4511         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4512             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4513             !(vcpu->arch.cr0 & X86_CR0_PE))
4514                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4515
4516         vcpu_put(vcpu);
4517
4518         return 0;
4519 }
4520
4521 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4522                                         struct kvm_guest_debug *dbg)
4523 {
4524         int i, r;
4525
4526         vcpu_load(vcpu);
4527
4528         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4529             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4530                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4531                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4532                 vcpu->arch.switch_db_regs =
4533                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4534         } else {
4535                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4536                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4537                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4538         }
4539
4540         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4541
4542         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4543                 kvm_queue_exception(vcpu, DB_VECTOR);
4544         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4545                 kvm_queue_exception(vcpu, BP_VECTOR);
4546
4547         vcpu_put(vcpu);
4548
4549         return r;
4550 }
4551
4552 /*
4553  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4554  * we have asm/x86/processor.h
4555  */
4556 struct fxsave {
4557         u16     cwd;
4558         u16     swd;
4559         u16     twd;
4560         u16     fop;
4561         u64     rip;
4562         u64     rdp;
4563         u32     mxcsr;
4564         u32     mxcsr_mask;
4565         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4566 #ifdef CONFIG_X86_64
4567         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4568 #else
4569         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4570 #endif
4571 };
4572
4573 /*
4574  * Translate a guest virtual address to a guest physical address.
4575  */
4576 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4577                                     struct kvm_translation *tr)
4578 {
4579         unsigned long vaddr = tr->linear_address;
4580         gpa_t gpa;
4581
4582         vcpu_load(vcpu);
4583         down_read(&vcpu->kvm->slots_lock);
4584         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4585         up_read(&vcpu->kvm->slots_lock);
4586         tr->physical_address = gpa;
4587         tr->valid = gpa != UNMAPPED_GVA;
4588         tr->writeable = 1;
4589         tr->usermode = 0;
4590         vcpu_put(vcpu);
4591
4592         return 0;
4593 }
4594
4595 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4596 {
4597         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4598
4599         vcpu_load(vcpu);
4600
4601         memcpy(fpu->fpr, fxsave->st_space, 128);
4602         fpu->fcw = fxsave->cwd;
4603         fpu->fsw = fxsave->swd;
4604         fpu->ftwx = fxsave->twd;
4605         fpu->last_opcode = fxsave->fop;
4606         fpu->last_ip = fxsave->rip;
4607         fpu->last_dp = fxsave->rdp;
4608         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4609
4610         vcpu_put(vcpu);
4611
4612         return 0;
4613 }
4614
4615 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4616 {
4617         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4618
4619         vcpu_load(vcpu);
4620
4621         memcpy(fxsave->st_space, fpu->fpr, 128);
4622         fxsave->cwd = fpu->fcw;
4623         fxsave->swd = fpu->fsw;
4624         fxsave->twd = fpu->ftwx;
4625         fxsave->fop = fpu->last_opcode;
4626         fxsave->rip = fpu->last_ip;
4627         fxsave->rdp = fpu->last_dp;
4628         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4629
4630         vcpu_put(vcpu);
4631
4632         return 0;
4633 }
4634
4635 void fx_init(struct kvm_vcpu *vcpu)
4636 {
4637         unsigned after_mxcsr_mask;
4638
4639         /*
4640          * Touch the fpu the first time in non atomic context as if
4641          * this is the first fpu instruction the exception handler
4642          * will fire before the instruction returns and it'll have to
4643          * allocate ram with GFP_KERNEL.
4644          */
4645         if (!used_math())
4646                 kvm_fx_save(&vcpu->arch.host_fx_image);
4647
4648         /* Initialize guest FPU by resetting ours and saving into guest's */
4649         preempt_disable();
4650         kvm_fx_save(&vcpu->arch.host_fx_image);
4651         kvm_fx_finit();
4652         kvm_fx_save(&vcpu->arch.guest_fx_image);
4653         kvm_fx_restore(&vcpu->arch.host_fx_image);
4654         preempt_enable();
4655
4656         vcpu->arch.cr0 |= X86_CR0_ET;
4657         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4658         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4659         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4660                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4661 }
4662 EXPORT_SYMBOL_GPL(fx_init);
4663
4664 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4665 {
4666         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4667                 return;
4668
4669         vcpu->guest_fpu_loaded = 1;
4670         kvm_fx_save(&vcpu->arch.host_fx_image);
4671         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4672 }
4673 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4674
4675 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4676 {
4677         if (!vcpu->guest_fpu_loaded)
4678                 return;
4679
4680         vcpu->guest_fpu_loaded = 0;
4681         kvm_fx_save(&vcpu->arch.guest_fx_image);
4682         kvm_fx_restore(&vcpu->arch.host_fx_image);
4683         ++vcpu->stat.fpu_reload;
4684 }
4685 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4686
4687 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4688 {
4689         if (vcpu->arch.time_page) {
4690                 kvm_release_page_dirty(vcpu->arch.time_page);
4691                 vcpu->arch.time_page = NULL;
4692         }
4693
4694         kvm_x86_ops->vcpu_free(vcpu);
4695 }
4696
4697 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4698                                                 unsigned int id)
4699 {
4700         return kvm_x86_ops->vcpu_create(kvm, id);
4701 }
4702
4703 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4704 {
4705         int r;
4706
4707         /* We do fxsave: this must be aligned. */
4708         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4709
4710         vcpu->arch.mtrr_state.have_fixed = 1;
4711         vcpu_load(vcpu);
4712         r = kvm_arch_vcpu_reset(vcpu);
4713         if (r == 0)
4714                 r = kvm_mmu_setup(vcpu);
4715         vcpu_put(vcpu);
4716         if (r < 0)
4717                 goto free_vcpu;
4718
4719         return 0;
4720 free_vcpu:
4721         kvm_x86_ops->vcpu_free(vcpu);
4722         return r;
4723 }
4724
4725 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4726 {
4727         vcpu_load(vcpu);
4728         kvm_mmu_unload(vcpu);
4729         vcpu_put(vcpu);
4730
4731         kvm_x86_ops->vcpu_free(vcpu);
4732 }
4733
4734 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4735 {
4736         vcpu->arch.nmi_pending = false;
4737         vcpu->arch.nmi_injected = false;
4738
4739         vcpu->arch.switch_db_regs = 0;
4740         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4741         vcpu->arch.dr6 = DR6_FIXED_1;
4742         vcpu->arch.dr7 = DR7_FIXED_1;
4743
4744         return kvm_x86_ops->vcpu_reset(vcpu);
4745 }
4746
4747 void kvm_arch_hardware_enable(void *garbage)
4748 {
4749         kvm_x86_ops->hardware_enable(garbage);
4750 }
4751
4752 void kvm_arch_hardware_disable(void *garbage)
4753 {
4754         kvm_x86_ops->hardware_disable(garbage);
4755 }
4756
4757 int kvm_arch_hardware_setup(void)
4758 {
4759         return kvm_x86_ops->hardware_setup();
4760 }
4761
4762 void kvm_arch_hardware_unsetup(void)
4763 {
4764         kvm_x86_ops->hardware_unsetup();
4765 }
4766
4767 void kvm_arch_check_processor_compat(void *rtn)
4768 {
4769         kvm_x86_ops->check_processor_compatibility(rtn);
4770 }
4771
4772 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4773 {
4774         struct page *page;
4775         struct kvm *kvm;
4776         int r;
4777
4778         BUG_ON(vcpu->kvm == NULL);
4779         kvm = vcpu->kvm;
4780
4781         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4782         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4783                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4784         else
4785                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4786
4787         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4788         if (!page) {
4789                 r = -ENOMEM;
4790                 goto fail;
4791         }
4792         vcpu->arch.pio_data = page_address(page);
4793
4794         r = kvm_mmu_create(vcpu);
4795         if (r < 0)
4796                 goto fail_free_pio_data;
4797
4798         if (irqchip_in_kernel(kvm)) {
4799                 r = kvm_create_lapic(vcpu);
4800                 if (r < 0)
4801                         goto fail_mmu_destroy;
4802         }
4803
4804         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4805                                        GFP_KERNEL);
4806         if (!vcpu->arch.mce_banks) {
4807                 r = -ENOMEM;
4808                 goto fail_free_lapic;
4809         }
4810         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4811
4812         return 0;
4813 fail_free_lapic:
4814         kvm_free_lapic(vcpu);
4815 fail_mmu_destroy:
4816         kvm_mmu_destroy(vcpu);
4817 fail_free_pio_data:
4818         free_page((unsigned long)vcpu->arch.pio_data);
4819 fail:
4820         return r;
4821 }
4822
4823 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4824 {
4825         kfree(vcpu->arch.mce_banks);
4826         kvm_free_lapic(vcpu);
4827         down_read(&vcpu->kvm->slots_lock);
4828         kvm_mmu_destroy(vcpu);
4829         up_read(&vcpu->kvm->slots_lock);
4830         free_page((unsigned long)vcpu->arch.pio_data);
4831 }
4832
4833 struct  kvm *kvm_arch_create_vm(void)
4834 {
4835         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4836
4837         if (!kvm)
4838                 return ERR_PTR(-ENOMEM);
4839
4840         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4841         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4842
4843         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4844         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4845
4846         rdtscll(kvm->arch.vm_init_tsc);
4847
4848         return kvm;
4849 }
4850
4851 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4852 {
4853         vcpu_load(vcpu);
4854         kvm_mmu_unload(vcpu);
4855         vcpu_put(vcpu);
4856 }
4857
4858 static void kvm_free_vcpus(struct kvm *kvm)
4859 {
4860         unsigned int i;
4861         struct kvm_vcpu *vcpu;
4862
4863         /*
4864          * Unpin any mmu pages first.
4865          */
4866         kvm_for_each_vcpu(i, vcpu, kvm)
4867                 kvm_unload_vcpu_mmu(vcpu);
4868         kvm_for_each_vcpu(i, vcpu, kvm)
4869                 kvm_arch_vcpu_free(vcpu);
4870
4871         mutex_lock(&kvm->lock);
4872         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4873                 kvm->vcpus[i] = NULL;
4874
4875         atomic_set(&kvm->online_vcpus, 0);
4876         mutex_unlock(&kvm->lock);
4877 }
4878
4879 void kvm_arch_sync_events(struct kvm *kvm)
4880 {
4881         kvm_free_all_assigned_devices(kvm);
4882 }
4883
4884 void kvm_arch_destroy_vm(struct kvm *kvm)
4885 {
4886         kvm_iommu_unmap_guest(kvm);
4887         kvm_free_pit(kvm);
4888         kfree(kvm->arch.vpic);
4889         kfree(kvm->arch.vioapic);
4890         kvm_free_vcpus(kvm);
4891         kvm_free_physmem(kvm);
4892         if (kvm->arch.apic_access_page)
4893                 put_page(kvm->arch.apic_access_page);
4894         if (kvm->arch.ept_identity_pagetable)
4895                 put_page(kvm->arch.ept_identity_pagetable);
4896         kfree(kvm);
4897 }
4898
4899 int kvm_arch_set_memory_region(struct kvm *kvm,
4900                                 struct kvm_userspace_memory_region *mem,
4901                                 struct kvm_memory_slot old,
4902                                 int user_alloc)
4903 {
4904         int npages = mem->memory_size >> PAGE_SHIFT;
4905         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4906
4907         /*To keep backward compatibility with older userspace,
4908          *x86 needs to hanlde !user_alloc case.
4909          */
4910         if (!user_alloc) {
4911                 if (npages && !old.rmap) {
4912                         unsigned long userspace_addr;
4913
4914                         down_write(&current->mm->mmap_sem);
4915                         userspace_addr = do_mmap(NULL, 0,
4916                                                  npages * PAGE_SIZE,
4917                                                  PROT_READ | PROT_WRITE,
4918                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4919                                                  0);
4920                         up_write(&current->mm->mmap_sem);
4921
4922                         if (IS_ERR((void *)userspace_addr))
4923                                 return PTR_ERR((void *)userspace_addr);
4924
4925                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4926                         spin_lock(&kvm->mmu_lock);
4927                         memslot->userspace_addr = userspace_addr;
4928                         spin_unlock(&kvm->mmu_lock);
4929                 } else {
4930                         if (!old.user_alloc && old.rmap) {
4931                                 int ret;
4932
4933                                 down_write(&current->mm->mmap_sem);
4934                                 ret = do_munmap(current->mm, old.userspace_addr,
4935                                                 old.npages * PAGE_SIZE);
4936                                 up_write(&current->mm->mmap_sem);
4937                                 if (ret < 0)
4938                                         printk(KERN_WARNING
4939                                        "kvm_vm_ioctl_set_memory_region: "
4940                                        "failed to munmap memory\n");
4941                         }
4942                 }
4943         }
4944
4945         spin_lock(&kvm->mmu_lock);
4946         if (!kvm->arch.n_requested_mmu_pages) {
4947                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4948                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4949         }
4950
4951         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4952         spin_unlock(&kvm->mmu_lock);
4953
4954         return 0;
4955 }
4956
4957 void kvm_arch_flush_shadow(struct kvm *kvm)
4958 {
4959         kvm_mmu_zap_all(kvm);
4960         kvm_reload_remote_mmus(kvm);
4961 }
4962
4963 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4964 {
4965         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4966                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4967                 || vcpu->arch.nmi_pending ||
4968                 (kvm_arch_interrupt_allowed(vcpu) &&
4969                  kvm_cpu_has_interrupt(vcpu));
4970 }
4971
4972 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4973 {
4974         int me;
4975         int cpu = vcpu->cpu;
4976
4977         if (waitqueue_active(&vcpu->wq)) {
4978                 wake_up_interruptible(&vcpu->wq);
4979                 ++vcpu->stat.halt_wakeup;
4980         }
4981
4982         me = get_cpu();
4983         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4984                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4985                         smp_send_reschedule(cpu);
4986         put_cpu();
4987 }
4988
4989 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4990 {
4991         return kvm_x86_ops->interrupt_allowed(vcpu);
4992 }
4993
4994 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4995 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4996 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4997 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4998 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);