2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <linux/perf_event.h>
44 #include <trace/events/kvm.h>
46 #define CREATE_TRACE_POINTS
49 #include <asm/debugreg.h>
50 #include <asm/uaccess.h>
56 #define MAX_IO_MSRS 256
57 #define CR0_RESERVED_BITS \
58 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
59 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
60 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
61 #define CR4_RESERVED_BITS \
62 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
63 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
64 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
65 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
67 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
73 * - enable syscall per default because its emulated by KVM
74 * - enable LME and LMA per default on 64 bit KVM
77 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
79 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
86 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
87 struct kvm_cpuid_entry2 __user *entries);
89 struct kvm_x86_ops *kvm_x86_ops;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
95 #define KVM_NR_SHARED_MSRS 16
97 struct kvm_shared_msrs_global {
99 u32 msrs[KVM_NR_SHARED_MSRS];
102 struct kvm_shared_msrs {
103 struct user_return_notifier urn;
105 struct kvm_shared_msr_values {
108 } values[KVM_NR_SHARED_MSRS];
111 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
112 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
114 struct kvm_stats_debugfs_item debugfs_entries[] = {
115 { "pf_fixed", VCPU_STAT(pf_fixed) },
116 { "pf_guest", VCPU_STAT(pf_guest) },
117 { "tlb_flush", VCPU_STAT(tlb_flush) },
118 { "invlpg", VCPU_STAT(invlpg) },
119 { "exits", VCPU_STAT(exits) },
120 { "io_exits", VCPU_STAT(io_exits) },
121 { "mmio_exits", VCPU_STAT(mmio_exits) },
122 { "signal_exits", VCPU_STAT(signal_exits) },
123 { "irq_window", VCPU_STAT(irq_window_exits) },
124 { "nmi_window", VCPU_STAT(nmi_window_exits) },
125 { "halt_exits", VCPU_STAT(halt_exits) },
126 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
127 { "hypercalls", VCPU_STAT(hypercalls) },
128 { "request_irq", VCPU_STAT(request_irq_exits) },
129 { "irq_exits", VCPU_STAT(irq_exits) },
130 { "host_state_reload", VCPU_STAT(host_state_reload) },
131 { "efer_reload", VCPU_STAT(efer_reload) },
132 { "fpu_reload", VCPU_STAT(fpu_reload) },
133 { "insn_emulation", VCPU_STAT(insn_emulation) },
134 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
135 { "irq_injections", VCPU_STAT(irq_injections) },
136 { "nmi_injections", VCPU_STAT(nmi_injections) },
137 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
138 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
139 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
140 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
141 { "mmu_flooded", VM_STAT(mmu_flooded) },
142 { "mmu_recycled", VM_STAT(mmu_recycled) },
143 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
144 { "mmu_unsync", VM_STAT(mmu_unsync) },
145 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
146 { "largepages", VM_STAT(lpages) },
150 static void kvm_on_user_return(struct user_return_notifier *urn)
153 struct kvm_shared_msrs *locals
154 = container_of(urn, struct kvm_shared_msrs, urn);
155 struct kvm_shared_msr_values *values;
157 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
158 values = &locals->values[slot];
159 if (values->host != values->curr) {
160 wrmsrl(shared_msrs_global.msrs[slot], values->host);
161 values->curr = values->host;
164 locals->registered = false;
165 user_return_notifier_unregister(urn);
168 static void shared_msr_update(unsigned slot, u32 msr)
170 struct kvm_shared_msrs *smsr;
173 smsr = &__get_cpu_var(shared_msrs);
174 /* only read, and nobody should modify it at this time,
175 * so don't need lock */
176 if (slot >= shared_msrs_global.nr) {
177 printk(KERN_ERR "kvm: invalid MSR slot!");
180 rdmsrl_safe(msr, &value);
181 smsr->values[slot].host = value;
182 smsr->values[slot].curr = value;
185 void kvm_define_shared_msr(unsigned slot, u32 msr)
187 if (slot >= shared_msrs_global.nr)
188 shared_msrs_global.nr = slot + 1;
189 shared_msrs_global.msrs[slot] = msr;
190 /* we need ensured the shared_msr_global have been updated */
193 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
195 static void kvm_shared_msr_cpu_online(void)
199 for (i = 0; i < shared_msrs_global.nr; ++i)
200 shared_msr_update(i, shared_msrs_global.msrs[i]);
203 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
205 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
207 if (((value ^ smsr->values[slot].curr) & mask) == 0)
209 smsr->values[slot].curr = value;
210 wrmsrl(shared_msrs_global.msrs[slot], value);
211 if (!smsr->registered) {
212 smsr->urn.on_user_return = kvm_on_user_return;
213 user_return_notifier_register(&smsr->urn);
214 smsr->registered = true;
217 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
219 static void drop_user_return_notifiers(void *ignore)
221 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
223 if (smsr->registered)
224 kvm_on_user_return(&smsr->urn);
227 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
229 if (irqchip_in_kernel(vcpu->kvm))
230 return vcpu->arch.apic_base;
232 return vcpu->arch.apic_base;
234 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
236 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
238 /* TODO: reserve bits check */
239 if (irqchip_in_kernel(vcpu->kvm))
240 kvm_lapic_set_base(vcpu, data);
242 vcpu->arch.apic_base = data;
244 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
246 #define EXCPT_BENIGN 0
247 #define EXCPT_CONTRIBUTORY 1
250 static int exception_class(int vector)
260 return EXCPT_CONTRIBUTORY;
267 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
268 unsigned nr, bool has_error, u32 error_code,
274 if (!vcpu->arch.exception.pending) {
276 vcpu->arch.exception.pending = true;
277 vcpu->arch.exception.has_error_code = has_error;
278 vcpu->arch.exception.nr = nr;
279 vcpu->arch.exception.error_code = error_code;
280 vcpu->arch.exception.reinject = reinject;
284 /* to check exception */
285 prev_nr = vcpu->arch.exception.nr;
286 if (prev_nr == DF_VECTOR) {
287 /* triple fault -> shutdown */
288 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
291 class1 = exception_class(prev_nr);
292 class2 = exception_class(nr);
293 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
294 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
295 /* generate double fault per SDM Table 5-5 */
296 vcpu->arch.exception.pending = true;
297 vcpu->arch.exception.has_error_code = true;
298 vcpu->arch.exception.nr = DF_VECTOR;
299 vcpu->arch.exception.error_code = 0;
301 /* replace previous exception with a new one in a hope
302 that instruction re-execution will regenerate lost
307 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
309 kvm_multiple_exception(vcpu, nr, false, 0, false);
311 EXPORT_SYMBOL_GPL(kvm_queue_exception);
313 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
315 kvm_multiple_exception(vcpu, nr, false, 0, true);
317 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
319 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
322 ++vcpu->stat.pf_guest;
323 vcpu->arch.cr2 = addr;
324 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
327 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
329 vcpu->arch.nmi_pending = 1;
331 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
333 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
335 kvm_multiple_exception(vcpu, nr, true, error_code, false);
337 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
339 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
341 kvm_multiple_exception(vcpu, nr, true, error_code, true);
343 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
346 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
347 * a #GP and return false.
349 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
351 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
353 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
356 EXPORT_SYMBOL_GPL(kvm_require_cpl);
359 * Load the pae pdptrs. Return true is they are all valid.
361 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
363 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
364 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
367 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
369 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
370 offset * sizeof(u64), sizeof(pdpte));
375 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
376 if (is_present_gpte(pdpte[i]) &&
377 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
384 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
385 __set_bit(VCPU_EXREG_PDPTR,
386 (unsigned long *)&vcpu->arch.regs_avail);
387 __set_bit(VCPU_EXREG_PDPTR,
388 (unsigned long *)&vcpu->arch.regs_dirty);
393 EXPORT_SYMBOL_GPL(load_pdptrs);
395 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
397 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
401 if (is_long_mode(vcpu) || !is_pae(vcpu))
404 if (!test_bit(VCPU_EXREG_PDPTR,
405 (unsigned long *)&vcpu->arch.regs_avail))
408 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
411 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
417 static int __kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
422 if (cr0 & 0xffffffff00000000UL)
426 cr0 &= ~CR0_RESERVED_BITS;
428 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
431 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
434 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
436 if ((vcpu->arch.efer & EFER_LME)) {
441 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
446 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
450 kvm_x86_ops->set_cr0(vcpu, cr0);
452 kvm_mmu_reset_context(vcpu);
456 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
458 if (__kvm_set_cr0(vcpu, cr0))
459 kvm_inject_gp(vcpu, 0);
461 EXPORT_SYMBOL_GPL(kvm_set_cr0);
463 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
465 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
467 EXPORT_SYMBOL_GPL(kvm_lmsw);
469 int __kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
471 unsigned long old_cr4 = kvm_read_cr4(vcpu);
472 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
474 if (cr4 & CR4_RESERVED_BITS)
477 if (is_long_mode(vcpu)) {
478 if (!(cr4 & X86_CR4_PAE))
480 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
481 && ((cr4 ^ old_cr4) & pdptr_bits)
482 && !load_pdptrs(vcpu, vcpu->arch.cr3))
485 if (cr4 & X86_CR4_VMXE)
488 kvm_x86_ops->set_cr4(vcpu, cr4);
489 vcpu->arch.cr4 = cr4;
490 kvm_mmu_reset_context(vcpu);
495 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
497 if (__kvm_set_cr4(vcpu, cr4))
498 kvm_inject_gp(vcpu, 0);
500 EXPORT_SYMBOL_GPL(kvm_set_cr4);
502 static int __kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
504 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
505 kvm_mmu_sync_roots(vcpu);
506 kvm_mmu_flush_tlb(vcpu);
510 if (is_long_mode(vcpu)) {
511 if (cr3 & CR3_L_MODE_RESERVED_BITS)
515 if (cr3 & CR3_PAE_RESERVED_BITS)
517 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
521 * We don't check reserved bits in nonpae mode, because
522 * this isn't enforced, and VMware depends on this.
527 * Does the new cr3 value map to physical memory? (Note, we
528 * catch an invalid cr3 even in real-mode, because it would
529 * cause trouble later on when we turn on paging anyway.)
531 * A real CPU would silently accept an invalid cr3 and would
532 * attempt to use it - with largely undefined (and often hard
533 * to debug) behavior on the guest side.
535 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
537 vcpu->arch.cr3 = cr3;
538 vcpu->arch.mmu.new_cr3(vcpu);
542 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
544 if (__kvm_set_cr3(vcpu, cr3))
545 kvm_inject_gp(vcpu, 0);
547 EXPORT_SYMBOL_GPL(kvm_set_cr3);
549 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
551 if (cr8 & CR8_RESERVED_BITS)
553 if (irqchip_in_kernel(vcpu->kvm))
554 kvm_lapic_set_tpr(vcpu, cr8);
556 vcpu->arch.cr8 = cr8;
560 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
562 if (__kvm_set_cr8(vcpu, cr8))
563 kvm_inject_gp(vcpu, 0);
565 EXPORT_SYMBOL_GPL(kvm_set_cr8);
567 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
569 if (irqchip_in_kernel(vcpu->kvm))
570 return kvm_lapic_get_cr8(vcpu);
572 return vcpu->arch.cr8;
574 EXPORT_SYMBOL_GPL(kvm_get_cr8);
576 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
580 vcpu->arch.db[dr] = val;
581 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
582 vcpu->arch.eff_db[dr] = val;
585 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
589 if (val & 0xffffffff00000000ULL)
591 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
594 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
598 if (val & 0xffffffff00000000ULL)
600 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
601 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
602 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
603 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
611 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
615 res = __kvm_set_dr(vcpu, dr, val);
617 kvm_queue_exception(vcpu, UD_VECTOR);
619 kvm_inject_gp(vcpu, 0);
623 EXPORT_SYMBOL_GPL(kvm_set_dr);
625 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
629 *val = vcpu->arch.db[dr];
632 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
636 *val = vcpu->arch.dr6;
639 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
643 *val = vcpu->arch.dr7;
650 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
652 if (_kvm_get_dr(vcpu, dr, val)) {
653 kvm_queue_exception(vcpu, UD_VECTOR);
658 EXPORT_SYMBOL_GPL(kvm_get_dr);
660 static inline u32 bit(int bitno)
662 return 1 << (bitno & 31);
666 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
667 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
669 * This list is modified at module load time to reflect the
670 * capabilities of the host cpu. This capabilities test skips MSRs that are
671 * kvm-specific. Those are put in the beginning of the list.
674 #define KVM_SAVE_MSRS_BEGIN 7
675 static u32 msrs_to_save[] = {
676 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
677 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
678 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
679 HV_X64_MSR_APIC_ASSIST_PAGE,
680 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
683 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
685 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
688 static unsigned num_msrs_to_save;
690 static u32 emulated_msrs[] = {
691 MSR_IA32_MISC_ENABLE,
694 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
696 if (efer & efer_reserved_bits)
700 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
703 if (efer & EFER_FFXSR) {
704 struct kvm_cpuid_entry2 *feat;
706 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
707 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
711 if (efer & EFER_SVME) {
712 struct kvm_cpuid_entry2 *feat;
714 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
715 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
720 efer |= vcpu->arch.efer & EFER_LMA;
722 kvm_x86_ops->set_efer(vcpu, efer);
724 vcpu->arch.efer = efer;
726 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
727 kvm_mmu_reset_context(vcpu);
732 void kvm_enable_efer_bits(u64 mask)
734 efer_reserved_bits &= ~mask;
736 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
740 * Writes msr value into into the appropriate "register".
741 * Returns 0 on success, non-0 otherwise.
742 * Assumes vcpu_load() was already called.
744 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
746 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
750 * Adapt set_msr() to msr_io()'s calling convention
752 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
754 return kvm_set_msr(vcpu, index, *data);
757 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
761 struct pvclock_wall_clock wc;
762 struct timespec boot;
767 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
772 ++version; /* first time write, random junk */
776 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
779 * The guest calculates current wall clock time by adding
780 * system time (updated by kvm_write_guest_time below) to the
781 * wall clock specified here. guest system time equals host
782 * system time for us, thus we must fill in host boot time here.
786 wc.sec = boot.tv_sec;
787 wc.nsec = boot.tv_nsec;
788 wc.version = version;
790 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
793 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
796 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
798 uint32_t quotient, remainder;
800 /* Don't try to replace with do_div(), this one calculates
801 * "(dividend << 32) / divisor" */
803 : "=a" (quotient), "=d" (remainder)
804 : "0" (0), "1" (dividend), "r" (divisor) );
808 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
810 uint64_t nsecs = 1000000000LL;
815 tps64 = tsc_khz * 1000LL;
816 while (tps64 > nsecs*2) {
821 tps32 = (uint32_t)tps64;
822 while (tps32 <= (uint32_t)nsecs) {
827 hv_clock->tsc_shift = shift;
828 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
830 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
831 __func__, tsc_khz, hv_clock->tsc_shift,
832 hv_clock->tsc_to_system_mul);
835 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
837 static void kvm_write_guest_time(struct kvm_vcpu *v)
841 struct kvm_vcpu_arch *vcpu = &v->arch;
843 unsigned long this_tsc_khz;
845 if ((!vcpu->time_page))
848 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
849 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
850 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
851 vcpu->hv_clock_tsc_khz = this_tsc_khz;
853 put_cpu_var(cpu_tsc_khz);
855 /* Keep irq disabled to prevent changes to the clock */
856 local_irq_save(flags);
857 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
859 monotonic_to_bootbased(&ts);
860 local_irq_restore(flags);
862 /* With all the info we got, fill in the values */
864 vcpu->hv_clock.system_time = ts.tv_nsec +
865 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
867 vcpu->hv_clock.flags = 0;
870 * The interface expects us to write an even number signaling that the
871 * update is finished. Since the guest won't see the intermediate
872 * state, we just increase by 2 at the end.
874 vcpu->hv_clock.version += 2;
876 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
878 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
879 sizeof(vcpu->hv_clock));
881 kunmap_atomic(shared_kaddr, KM_USER0);
883 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
886 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
888 struct kvm_vcpu_arch *vcpu = &v->arch;
890 if (!vcpu->time_page)
892 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
896 static bool msr_mtrr_valid(unsigned msr)
899 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
900 case MSR_MTRRfix64K_00000:
901 case MSR_MTRRfix16K_80000:
902 case MSR_MTRRfix16K_A0000:
903 case MSR_MTRRfix4K_C0000:
904 case MSR_MTRRfix4K_C8000:
905 case MSR_MTRRfix4K_D0000:
906 case MSR_MTRRfix4K_D8000:
907 case MSR_MTRRfix4K_E0000:
908 case MSR_MTRRfix4K_E8000:
909 case MSR_MTRRfix4K_F0000:
910 case MSR_MTRRfix4K_F8000:
911 case MSR_MTRRdefType:
912 case MSR_IA32_CR_PAT:
920 static bool valid_pat_type(unsigned t)
922 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
925 static bool valid_mtrr_type(unsigned t)
927 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
930 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
934 if (!msr_mtrr_valid(msr))
937 if (msr == MSR_IA32_CR_PAT) {
938 for (i = 0; i < 8; i++)
939 if (!valid_pat_type((data >> (i * 8)) & 0xff))
942 } else if (msr == MSR_MTRRdefType) {
945 return valid_mtrr_type(data & 0xff);
946 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
947 for (i = 0; i < 8 ; i++)
948 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
954 return valid_mtrr_type(data & 0xff);
957 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
959 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
961 if (!mtrr_valid(vcpu, msr, data))
964 if (msr == MSR_MTRRdefType) {
965 vcpu->arch.mtrr_state.def_type = data;
966 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
967 } else if (msr == MSR_MTRRfix64K_00000)
969 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
970 p[1 + msr - MSR_MTRRfix16K_80000] = data;
971 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
972 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
973 else if (msr == MSR_IA32_CR_PAT)
974 vcpu->arch.pat = data;
975 else { /* Variable MTRRs */
976 int idx, is_mtrr_mask;
979 idx = (msr - 0x200) / 2;
980 is_mtrr_mask = msr - 0x200 - 2 * idx;
983 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
986 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
990 kvm_mmu_reset_context(vcpu);
994 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
996 u64 mcg_cap = vcpu->arch.mcg_cap;
997 unsigned bank_num = mcg_cap & 0xff;
1000 case MSR_IA32_MCG_STATUS:
1001 vcpu->arch.mcg_status = data;
1003 case MSR_IA32_MCG_CTL:
1004 if (!(mcg_cap & MCG_CTL_P))
1006 if (data != 0 && data != ~(u64)0)
1008 vcpu->arch.mcg_ctl = data;
1011 if (msr >= MSR_IA32_MC0_CTL &&
1012 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1013 u32 offset = msr - MSR_IA32_MC0_CTL;
1014 /* only 0 or all 1s can be written to IA32_MCi_CTL
1015 * some Linux kernels though clear bit 10 in bank 4 to
1016 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1017 * this to avoid an uncatched #GP in the guest
1019 if ((offset & 0x3) == 0 &&
1020 data != 0 && (data | (1 << 10)) != ~(u64)0)
1022 vcpu->arch.mce_banks[offset] = data;
1030 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1032 struct kvm *kvm = vcpu->kvm;
1033 int lm = is_long_mode(vcpu);
1034 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1035 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1036 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1037 : kvm->arch.xen_hvm_config.blob_size_32;
1038 u32 page_num = data & ~PAGE_MASK;
1039 u64 page_addr = data & PAGE_MASK;
1044 if (page_num >= blob_size)
1047 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1051 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1053 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1062 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1064 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1067 static bool kvm_hv_msr_partition_wide(u32 msr)
1071 case HV_X64_MSR_GUEST_OS_ID:
1072 case HV_X64_MSR_HYPERCALL:
1080 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1082 struct kvm *kvm = vcpu->kvm;
1085 case HV_X64_MSR_GUEST_OS_ID:
1086 kvm->arch.hv_guest_os_id = data;
1087 /* setting guest os id to zero disables hypercall page */
1088 if (!kvm->arch.hv_guest_os_id)
1089 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1091 case HV_X64_MSR_HYPERCALL: {
1096 /* if guest os id is not set hypercall should remain disabled */
1097 if (!kvm->arch.hv_guest_os_id)
1099 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1100 kvm->arch.hv_hypercall = data;
1103 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1104 addr = gfn_to_hva(kvm, gfn);
1105 if (kvm_is_error_hva(addr))
1107 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1108 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1109 if (copy_to_user((void __user *)addr, instructions, 4))
1111 kvm->arch.hv_hypercall = data;
1115 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1116 "data 0x%llx\n", msr, data);
1122 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1125 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1128 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1129 vcpu->arch.hv_vapic = data;
1132 addr = gfn_to_hva(vcpu->kvm, data >>
1133 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1134 if (kvm_is_error_hva(addr))
1136 if (clear_user((void __user *)addr, PAGE_SIZE))
1138 vcpu->arch.hv_vapic = data;
1141 case HV_X64_MSR_EOI:
1142 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1143 case HV_X64_MSR_ICR:
1144 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1145 case HV_X64_MSR_TPR:
1146 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1148 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1149 "data 0x%llx\n", msr, data);
1156 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1160 return set_efer(vcpu, data);
1162 data &= ~(u64)0x40; /* ignore flush filter disable */
1163 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1165 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1170 case MSR_FAM10H_MMIO_CONF_BASE:
1172 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1177 case MSR_AMD64_NB_CFG:
1179 case MSR_IA32_DEBUGCTLMSR:
1181 /* We support the non-activated case already */
1183 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1184 /* Values other than LBR and BTF are vendor-specific,
1185 thus reserved and should throw a #GP */
1188 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1191 case MSR_IA32_UCODE_REV:
1192 case MSR_IA32_UCODE_WRITE:
1193 case MSR_VM_HSAVE_PA:
1194 case MSR_AMD64_PATCH_LOADER:
1196 case 0x200 ... 0x2ff:
1197 return set_msr_mtrr(vcpu, msr, data);
1198 case MSR_IA32_APICBASE:
1199 kvm_set_apic_base(vcpu, data);
1201 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1202 return kvm_x2apic_msr_write(vcpu, msr, data);
1203 case MSR_IA32_MISC_ENABLE:
1204 vcpu->arch.ia32_misc_enable_msr = data;
1206 case MSR_KVM_WALL_CLOCK_NEW:
1207 case MSR_KVM_WALL_CLOCK:
1208 vcpu->kvm->arch.wall_clock = data;
1209 kvm_write_wall_clock(vcpu->kvm, data);
1211 case MSR_KVM_SYSTEM_TIME_NEW:
1212 case MSR_KVM_SYSTEM_TIME: {
1213 if (vcpu->arch.time_page) {
1214 kvm_release_page_dirty(vcpu->arch.time_page);
1215 vcpu->arch.time_page = NULL;
1218 vcpu->arch.time = data;
1220 /* we verify if the enable bit is set... */
1224 /* ...but clean it before doing the actual write */
1225 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1227 vcpu->arch.time_page =
1228 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1230 if (is_error_page(vcpu->arch.time_page)) {
1231 kvm_release_page_clean(vcpu->arch.time_page);
1232 vcpu->arch.time_page = NULL;
1235 kvm_request_guest_time_update(vcpu);
1238 case MSR_IA32_MCG_CTL:
1239 case MSR_IA32_MCG_STATUS:
1240 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1241 return set_msr_mce(vcpu, msr, data);
1243 /* Performance counters are not protected by a CPUID bit,
1244 * so we should check all of them in the generic path for the sake of
1245 * cross vendor migration.
1246 * Writing a zero into the event select MSRs disables them,
1247 * which we perfectly emulate ;-). Any other value should be at least
1248 * reported, some guests depend on them.
1250 case MSR_P6_EVNTSEL0:
1251 case MSR_P6_EVNTSEL1:
1252 case MSR_K7_EVNTSEL0:
1253 case MSR_K7_EVNTSEL1:
1254 case MSR_K7_EVNTSEL2:
1255 case MSR_K7_EVNTSEL3:
1257 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1258 "0x%x data 0x%llx\n", msr, data);
1260 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1261 * so we ignore writes to make it happy.
1263 case MSR_P6_PERFCTR0:
1264 case MSR_P6_PERFCTR1:
1265 case MSR_K7_PERFCTR0:
1266 case MSR_K7_PERFCTR1:
1267 case MSR_K7_PERFCTR2:
1268 case MSR_K7_PERFCTR3:
1269 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1270 "0x%x data 0x%llx\n", msr, data);
1272 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1273 if (kvm_hv_msr_partition_wide(msr)) {
1275 mutex_lock(&vcpu->kvm->lock);
1276 r = set_msr_hyperv_pw(vcpu, msr, data);
1277 mutex_unlock(&vcpu->kvm->lock);
1280 return set_msr_hyperv(vcpu, msr, data);
1283 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1284 return xen_hvm_config(vcpu, data);
1286 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1290 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1297 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1301 * Reads an msr value (of 'msr_index') into 'pdata'.
1302 * Returns 0 on success, non-0 otherwise.
1303 * Assumes vcpu_load() was already called.
1305 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1307 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1310 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1312 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1314 if (!msr_mtrr_valid(msr))
1317 if (msr == MSR_MTRRdefType)
1318 *pdata = vcpu->arch.mtrr_state.def_type +
1319 (vcpu->arch.mtrr_state.enabled << 10);
1320 else if (msr == MSR_MTRRfix64K_00000)
1322 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1323 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1324 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1325 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1326 else if (msr == MSR_IA32_CR_PAT)
1327 *pdata = vcpu->arch.pat;
1328 else { /* Variable MTRRs */
1329 int idx, is_mtrr_mask;
1332 idx = (msr - 0x200) / 2;
1333 is_mtrr_mask = msr - 0x200 - 2 * idx;
1336 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1339 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1346 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1349 u64 mcg_cap = vcpu->arch.mcg_cap;
1350 unsigned bank_num = mcg_cap & 0xff;
1353 case MSR_IA32_P5_MC_ADDR:
1354 case MSR_IA32_P5_MC_TYPE:
1357 case MSR_IA32_MCG_CAP:
1358 data = vcpu->arch.mcg_cap;
1360 case MSR_IA32_MCG_CTL:
1361 if (!(mcg_cap & MCG_CTL_P))
1363 data = vcpu->arch.mcg_ctl;
1365 case MSR_IA32_MCG_STATUS:
1366 data = vcpu->arch.mcg_status;
1369 if (msr >= MSR_IA32_MC0_CTL &&
1370 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1371 u32 offset = msr - MSR_IA32_MC0_CTL;
1372 data = vcpu->arch.mce_banks[offset];
1381 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1384 struct kvm *kvm = vcpu->kvm;
1387 case HV_X64_MSR_GUEST_OS_ID:
1388 data = kvm->arch.hv_guest_os_id;
1390 case HV_X64_MSR_HYPERCALL:
1391 data = kvm->arch.hv_hypercall;
1394 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1402 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1407 case HV_X64_MSR_VP_INDEX: {
1410 kvm_for_each_vcpu(r, v, vcpu->kvm)
1415 case HV_X64_MSR_EOI:
1416 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1417 case HV_X64_MSR_ICR:
1418 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1419 case HV_X64_MSR_TPR:
1420 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1422 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1429 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1434 case MSR_IA32_PLATFORM_ID:
1435 case MSR_IA32_UCODE_REV:
1436 case MSR_IA32_EBL_CR_POWERON:
1437 case MSR_IA32_DEBUGCTLMSR:
1438 case MSR_IA32_LASTBRANCHFROMIP:
1439 case MSR_IA32_LASTBRANCHTOIP:
1440 case MSR_IA32_LASTINTFROMIP:
1441 case MSR_IA32_LASTINTTOIP:
1444 case MSR_VM_HSAVE_PA:
1445 case MSR_P6_PERFCTR0:
1446 case MSR_P6_PERFCTR1:
1447 case MSR_P6_EVNTSEL0:
1448 case MSR_P6_EVNTSEL1:
1449 case MSR_K7_EVNTSEL0:
1450 case MSR_K7_PERFCTR0:
1451 case MSR_K8_INT_PENDING_MSG:
1452 case MSR_AMD64_NB_CFG:
1453 case MSR_FAM10H_MMIO_CONF_BASE:
1457 data = 0x500 | KVM_NR_VAR_MTRR;
1459 case 0x200 ... 0x2ff:
1460 return get_msr_mtrr(vcpu, msr, pdata);
1461 case 0xcd: /* fsb frequency */
1464 case MSR_IA32_APICBASE:
1465 data = kvm_get_apic_base(vcpu);
1467 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1468 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1470 case MSR_IA32_MISC_ENABLE:
1471 data = vcpu->arch.ia32_misc_enable_msr;
1473 case MSR_IA32_PERF_STATUS:
1474 /* TSC increment by tick */
1476 /* CPU multiplier */
1477 data |= (((uint64_t)4ULL) << 40);
1480 data = vcpu->arch.efer;
1482 case MSR_KVM_WALL_CLOCK:
1483 case MSR_KVM_WALL_CLOCK_NEW:
1484 data = vcpu->kvm->arch.wall_clock;
1486 case MSR_KVM_SYSTEM_TIME:
1487 case MSR_KVM_SYSTEM_TIME_NEW:
1488 data = vcpu->arch.time;
1490 case MSR_IA32_P5_MC_ADDR:
1491 case MSR_IA32_P5_MC_TYPE:
1492 case MSR_IA32_MCG_CAP:
1493 case MSR_IA32_MCG_CTL:
1494 case MSR_IA32_MCG_STATUS:
1495 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1496 return get_msr_mce(vcpu, msr, pdata);
1497 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1498 if (kvm_hv_msr_partition_wide(msr)) {
1500 mutex_lock(&vcpu->kvm->lock);
1501 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1502 mutex_unlock(&vcpu->kvm->lock);
1505 return get_msr_hyperv(vcpu, msr, pdata);
1509 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1512 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1520 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1523 * Read or write a bunch of msrs. All parameters are kernel addresses.
1525 * @return number of msrs set successfully.
1527 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1528 struct kvm_msr_entry *entries,
1529 int (*do_msr)(struct kvm_vcpu *vcpu,
1530 unsigned index, u64 *data))
1536 idx = srcu_read_lock(&vcpu->kvm->srcu);
1537 for (i = 0; i < msrs->nmsrs; ++i)
1538 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1540 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1548 * Read or write a bunch of msrs. Parameters are user addresses.
1550 * @return number of msrs set successfully.
1552 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1553 int (*do_msr)(struct kvm_vcpu *vcpu,
1554 unsigned index, u64 *data),
1557 struct kvm_msrs msrs;
1558 struct kvm_msr_entry *entries;
1563 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1567 if (msrs.nmsrs >= MAX_IO_MSRS)
1571 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1572 entries = kmalloc(size, GFP_KERNEL);
1577 if (copy_from_user(entries, user_msrs->entries, size))
1580 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1585 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1596 int kvm_dev_ioctl_check_extension(long ext)
1601 case KVM_CAP_IRQCHIP:
1603 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1604 case KVM_CAP_SET_TSS_ADDR:
1605 case KVM_CAP_EXT_CPUID:
1606 case KVM_CAP_CLOCKSOURCE:
1608 case KVM_CAP_NOP_IO_DELAY:
1609 case KVM_CAP_MP_STATE:
1610 case KVM_CAP_SYNC_MMU:
1611 case KVM_CAP_REINJECT_CONTROL:
1612 case KVM_CAP_IRQ_INJECT_STATUS:
1613 case KVM_CAP_ASSIGN_DEV_IRQ:
1615 case KVM_CAP_IOEVENTFD:
1617 case KVM_CAP_PIT_STATE2:
1618 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1619 case KVM_CAP_XEN_HVM:
1620 case KVM_CAP_ADJUST_CLOCK:
1621 case KVM_CAP_VCPU_EVENTS:
1622 case KVM_CAP_HYPERV:
1623 case KVM_CAP_HYPERV_VAPIC:
1624 case KVM_CAP_HYPERV_SPIN:
1625 case KVM_CAP_PCI_SEGMENT:
1626 case KVM_CAP_DEBUGREGS:
1627 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1630 case KVM_CAP_COALESCED_MMIO:
1631 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1634 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1636 case KVM_CAP_NR_VCPUS:
1639 case KVM_CAP_NR_MEMSLOTS:
1640 r = KVM_MEMORY_SLOTS;
1642 case KVM_CAP_PV_MMU: /* obsolete */
1649 r = KVM_MAX_MCE_BANKS;
1659 long kvm_arch_dev_ioctl(struct file *filp,
1660 unsigned int ioctl, unsigned long arg)
1662 void __user *argp = (void __user *)arg;
1666 case KVM_GET_MSR_INDEX_LIST: {
1667 struct kvm_msr_list __user *user_msr_list = argp;
1668 struct kvm_msr_list msr_list;
1672 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1675 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1676 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1679 if (n < msr_list.nmsrs)
1682 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1683 num_msrs_to_save * sizeof(u32)))
1685 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1687 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1692 case KVM_GET_SUPPORTED_CPUID: {
1693 struct kvm_cpuid2 __user *cpuid_arg = argp;
1694 struct kvm_cpuid2 cpuid;
1697 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1699 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1700 cpuid_arg->entries);
1705 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1710 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1713 mce_cap = KVM_MCE_CAP_SUPPORTED;
1715 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1727 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1729 kvm_x86_ops->vcpu_load(vcpu, cpu);
1730 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1731 unsigned long khz = cpufreq_quick_get(cpu);
1734 per_cpu(cpu_tsc_khz, cpu) = khz;
1736 kvm_request_guest_time_update(vcpu);
1739 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1741 kvm_x86_ops->vcpu_put(vcpu);
1742 kvm_put_guest_fpu(vcpu);
1745 static int is_efer_nx(void)
1747 unsigned long long efer = 0;
1749 rdmsrl_safe(MSR_EFER, &efer);
1750 return efer & EFER_NX;
1753 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1756 struct kvm_cpuid_entry2 *e, *entry;
1759 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1760 e = &vcpu->arch.cpuid_entries[i];
1761 if (e->function == 0x80000001) {
1766 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1767 entry->edx &= ~(1 << 20);
1768 printk(KERN_INFO "kvm: guest NX capability removed\n");
1772 /* when an old userspace process fills a new kernel module */
1773 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1774 struct kvm_cpuid *cpuid,
1775 struct kvm_cpuid_entry __user *entries)
1778 struct kvm_cpuid_entry *cpuid_entries;
1781 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1784 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1788 if (copy_from_user(cpuid_entries, entries,
1789 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1792 for (i = 0; i < cpuid->nent; i++) {
1793 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1794 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1795 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1796 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1797 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1798 vcpu->arch.cpuid_entries[i].index = 0;
1799 vcpu->arch.cpuid_entries[i].flags = 0;
1800 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1801 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1802 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1804 vcpu->arch.cpuid_nent = cpuid->nent;
1805 cpuid_fix_nx_cap(vcpu);
1807 kvm_apic_set_version(vcpu);
1808 kvm_x86_ops->cpuid_update(vcpu);
1812 vfree(cpuid_entries);
1817 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1818 struct kvm_cpuid2 *cpuid,
1819 struct kvm_cpuid_entry2 __user *entries)
1824 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1827 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1828 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1831 vcpu->arch.cpuid_nent = cpuid->nent;
1832 kvm_apic_set_version(vcpu);
1833 kvm_x86_ops->cpuid_update(vcpu);
1841 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1842 struct kvm_cpuid2 *cpuid,
1843 struct kvm_cpuid_entry2 __user *entries)
1849 if (cpuid->nent < vcpu->arch.cpuid_nent)
1852 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1853 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1858 cpuid->nent = vcpu->arch.cpuid_nent;
1863 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1866 entry->function = function;
1867 entry->index = index;
1868 cpuid_count(entry->function, entry->index,
1869 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1873 #define F(x) bit(X86_FEATURE_##x)
1875 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1876 u32 index, int *nent, int maxnent)
1878 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1879 #ifdef CONFIG_X86_64
1880 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1882 unsigned f_lm = F(LM);
1884 unsigned f_gbpages = 0;
1887 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1890 const u32 kvm_supported_word0_x86_features =
1891 F(FPU) | F(VME) | F(DE) | F(PSE) |
1892 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1893 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1894 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1895 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1896 0 /* Reserved, DS, ACPI */ | F(MMX) |
1897 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1898 0 /* HTT, TM, Reserved, PBE */;
1899 /* cpuid 0x80000001.edx */
1900 const u32 kvm_supported_word1_x86_features =
1901 F(FPU) | F(VME) | F(DE) | F(PSE) |
1902 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1903 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1904 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1905 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1906 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1907 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1908 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1910 const u32 kvm_supported_word4_x86_features =
1911 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1912 0 /* DS-CPL, VMX, SMX, EST */ |
1913 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1914 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1915 0 /* Reserved, DCA */ | F(XMM4_1) |
1916 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1917 0 /* Reserved, XSAVE, OSXSAVE */;
1918 /* cpuid 0x80000001.ecx */
1919 const u32 kvm_supported_word6_x86_features =
1920 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1921 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1922 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1923 0 /* SKINIT */ | 0 /* WDT */;
1925 /* all calls to cpuid_count() should be made on the same cpu */
1927 do_cpuid_1_ent(entry, function, index);
1932 entry->eax = min(entry->eax, (u32)0xb);
1935 entry->edx &= kvm_supported_word0_x86_features;
1936 entry->ecx &= kvm_supported_word4_x86_features;
1937 /* we support x2apic emulation even if host does not support
1938 * it since we emulate x2apic in software */
1939 entry->ecx |= F(X2APIC);
1941 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1942 * may return different values. This forces us to get_cpu() before
1943 * issuing the first command, and also to emulate this annoying behavior
1944 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1946 int t, times = entry->eax & 0xff;
1948 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1949 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1950 for (t = 1; t < times && *nent < maxnent; ++t) {
1951 do_cpuid_1_ent(&entry[t], function, 0);
1952 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1957 /* function 4 and 0xb have additional index. */
1961 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1962 /* read more entries until cache_type is zero */
1963 for (i = 1; *nent < maxnent; ++i) {
1964 cache_type = entry[i - 1].eax & 0x1f;
1967 do_cpuid_1_ent(&entry[i], function, i);
1969 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1977 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1978 /* read more entries until level_type is zero */
1979 for (i = 1; *nent < maxnent; ++i) {
1980 level_type = entry[i - 1].ecx & 0xff00;
1983 do_cpuid_1_ent(&entry[i], function, i);
1985 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1990 case KVM_CPUID_SIGNATURE: {
1991 char signature[12] = "KVMKVMKVM\0\0";
1992 u32 *sigptr = (u32 *)signature;
1994 entry->ebx = sigptr[0];
1995 entry->ecx = sigptr[1];
1996 entry->edx = sigptr[2];
1999 case KVM_CPUID_FEATURES:
2000 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2001 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2002 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2003 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2009 entry->eax = min(entry->eax, 0x8000001a);
2012 entry->edx &= kvm_supported_word1_x86_features;
2013 entry->ecx &= kvm_supported_word6_x86_features;
2017 kvm_x86_ops->set_supported_cpuid(function, entry);
2024 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2025 struct kvm_cpuid_entry2 __user *entries)
2027 struct kvm_cpuid_entry2 *cpuid_entries;
2028 int limit, nent = 0, r = -E2BIG;
2031 if (cpuid->nent < 1)
2033 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2034 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2036 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2040 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2041 limit = cpuid_entries[0].eax;
2042 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2043 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2044 &nent, cpuid->nent);
2046 if (nent >= cpuid->nent)
2049 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2050 limit = cpuid_entries[nent - 1].eax;
2051 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2052 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2053 &nent, cpuid->nent);
2058 if (nent >= cpuid->nent)
2061 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2065 if (nent >= cpuid->nent)
2068 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2072 if (nent >= cpuid->nent)
2076 if (copy_to_user(entries, cpuid_entries,
2077 nent * sizeof(struct kvm_cpuid_entry2)))
2083 vfree(cpuid_entries);
2088 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2089 struct kvm_lapic_state *s)
2092 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2098 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2099 struct kvm_lapic_state *s)
2102 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2103 kvm_apic_post_state_restore(vcpu);
2104 update_cr8_intercept(vcpu);
2110 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2111 struct kvm_interrupt *irq)
2113 if (irq->irq < 0 || irq->irq >= 256)
2115 if (irqchip_in_kernel(vcpu->kvm))
2119 kvm_queue_interrupt(vcpu, irq->irq, false);
2126 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2129 kvm_inject_nmi(vcpu);
2135 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2136 struct kvm_tpr_access_ctl *tac)
2140 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2144 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2148 unsigned bank_num = mcg_cap & 0xff, bank;
2152 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2154 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2157 vcpu->arch.mcg_cap = mcg_cap;
2158 /* Init IA32_MCG_CTL to all 1s */
2159 if (mcg_cap & MCG_CTL_P)
2160 vcpu->arch.mcg_ctl = ~(u64)0;
2161 /* Init IA32_MCi_CTL to all 1s */
2162 for (bank = 0; bank < bank_num; bank++)
2163 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2169 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2170 struct kvm_x86_mce *mce)
2172 u64 mcg_cap = vcpu->arch.mcg_cap;
2173 unsigned bank_num = mcg_cap & 0xff;
2174 u64 *banks = vcpu->arch.mce_banks;
2176 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2179 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2180 * reporting is disabled
2182 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2183 vcpu->arch.mcg_ctl != ~(u64)0)
2185 banks += 4 * mce->bank;
2187 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2188 * reporting is disabled for the bank
2190 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2192 if (mce->status & MCI_STATUS_UC) {
2193 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2194 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2195 printk(KERN_DEBUG "kvm: set_mce: "
2196 "injects mce exception while "
2197 "previous one is in progress!\n");
2198 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2201 if (banks[1] & MCI_STATUS_VAL)
2202 mce->status |= MCI_STATUS_OVER;
2203 banks[2] = mce->addr;
2204 banks[3] = mce->misc;
2205 vcpu->arch.mcg_status = mce->mcg_status;
2206 banks[1] = mce->status;
2207 kvm_queue_exception(vcpu, MC_VECTOR);
2208 } else if (!(banks[1] & MCI_STATUS_VAL)
2209 || !(banks[1] & MCI_STATUS_UC)) {
2210 if (banks[1] & MCI_STATUS_VAL)
2211 mce->status |= MCI_STATUS_OVER;
2212 banks[2] = mce->addr;
2213 banks[3] = mce->misc;
2214 banks[1] = mce->status;
2216 banks[1] |= MCI_STATUS_OVER;
2220 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2221 struct kvm_vcpu_events *events)
2225 events->exception.injected =
2226 vcpu->arch.exception.pending &&
2227 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2228 events->exception.nr = vcpu->arch.exception.nr;
2229 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2230 events->exception.error_code = vcpu->arch.exception.error_code;
2232 events->interrupt.injected =
2233 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2234 events->interrupt.nr = vcpu->arch.interrupt.nr;
2235 events->interrupt.soft = 0;
2236 events->interrupt.shadow =
2237 kvm_x86_ops->get_interrupt_shadow(vcpu,
2238 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2240 events->nmi.injected = vcpu->arch.nmi_injected;
2241 events->nmi.pending = vcpu->arch.nmi_pending;
2242 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2244 events->sipi_vector = vcpu->arch.sipi_vector;
2246 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2247 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2248 | KVM_VCPUEVENT_VALID_SHADOW);
2253 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2254 struct kvm_vcpu_events *events)
2256 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2257 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2258 | KVM_VCPUEVENT_VALID_SHADOW))
2263 vcpu->arch.exception.pending = events->exception.injected;
2264 vcpu->arch.exception.nr = events->exception.nr;
2265 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2266 vcpu->arch.exception.error_code = events->exception.error_code;
2268 vcpu->arch.interrupt.pending = events->interrupt.injected;
2269 vcpu->arch.interrupt.nr = events->interrupt.nr;
2270 vcpu->arch.interrupt.soft = events->interrupt.soft;
2271 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2272 kvm_pic_clear_isr_ack(vcpu->kvm);
2273 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2274 kvm_x86_ops->set_interrupt_shadow(vcpu,
2275 events->interrupt.shadow);
2277 vcpu->arch.nmi_injected = events->nmi.injected;
2278 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2279 vcpu->arch.nmi_pending = events->nmi.pending;
2280 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2282 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2283 vcpu->arch.sipi_vector = events->sipi_vector;
2290 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2291 struct kvm_debugregs *dbgregs)
2295 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2296 dbgregs->dr6 = vcpu->arch.dr6;
2297 dbgregs->dr7 = vcpu->arch.dr7;
2303 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2304 struct kvm_debugregs *dbgregs)
2311 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2312 vcpu->arch.dr6 = dbgregs->dr6;
2313 vcpu->arch.dr7 = dbgregs->dr7;
2320 long kvm_arch_vcpu_ioctl(struct file *filp,
2321 unsigned int ioctl, unsigned long arg)
2323 struct kvm_vcpu *vcpu = filp->private_data;
2324 void __user *argp = (void __user *)arg;
2326 struct kvm_lapic_state *lapic = NULL;
2329 case KVM_GET_LAPIC: {
2331 if (!vcpu->arch.apic)
2333 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2338 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2342 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2347 case KVM_SET_LAPIC: {
2349 if (!vcpu->arch.apic)
2351 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2356 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2358 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2364 case KVM_INTERRUPT: {
2365 struct kvm_interrupt irq;
2368 if (copy_from_user(&irq, argp, sizeof irq))
2370 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2377 r = kvm_vcpu_ioctl_nmi(vcpu);
2383 case KVM_SET_CPUID: {
2384 struct kvm_cpuid __user *cpuid_arg = argp;
2385 struct kvm_cpuid cpuid;
2388 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2390 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2395 case KVM_SET_CPUID2: {
2396 struct kvm_cpuid2 __user *cpuid_arg = argp;
2397 struct kvm_cpuid2 cpuid;
2400 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2402 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2403 cpuid_arg->entries);
2408 case KVM_GET_CPUID2: {
2409 struct kvm_cpuid2 __user *cpuid_arg = argp;
2410 struct kvm_cpuid2 cpuid;
2413 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2415 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2416 cpuid_arg->entries);
2420 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2426 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2429 r = msr_io(vcpu, argp, do_set_msr, 0);
2431 case KVM_TPR_ACCESS_REPORTING: {
2432 struct kvm_tpr_access_ctl tac;
2435 if (copy_from_user(&tac, argp, sizeof tac))
2437 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2441 if (copy_to_user(argp, &tac, sizeof tac))
2446 case KVM_SET_VAPIC_ADDR: {
2447 struct kvm_vapic_addr va;
2450 if (!irqchip_in_kernel(vcpu->kvm))
2453 if (copy_from_user(&va, argp, sizeof va))
2456 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2459 case KVM_X86_SETUP_MCE: {
2463 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2465 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2468 case KVM_X86_SET_MCE: {
2469 struct kvm_x86_mce mce;
2472 if (copy_from_user(&mce, argp, sizeof mce))
2475 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2479 case KVM_GET_VCPU_EVENTS: {
2480 struct kvm_vcpu_events events;
2482 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2485 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2490 case KVM_SET_VCPU_EVENTS: {
2491 struct kvm_vcpu_events events;
2494 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2497 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2500 case KVM_GET_DEBUGREGS: {
2501 struct kvm_debugregs dbgregs;
2503 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2506 if (copy_to_user(argp, &dbgregs,
2507 sizeof(struct kvm_debugregs)))
2512 case KVM_SET_DEBUGREGS: {
2513 struct kvm_debugregs dbgregs;
2516 if (copy_from_user(&dbgregs, argp,
2517 sizeof(struct kvm_debugregs)))
2520 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2531 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2535 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2537 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2541 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2544 kvm->arch.ept_identity_map_addr = ident_addr;
2548 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2549 u32 kvm_nr_mmu_pages)
2551 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2554 mutex_lock(&kvm->slots_lock);
2555 spin_lock(&kvm->mmu_lock);
2557 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2558 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2560 spin_unlock(&kvm->mmu_lock);
2561 mutex_unlock(&kvm->slots_lock);
2565 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2567 return kvm->arch.n_alloc_mmu_pages;
2570 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2573 struct kvm_mem_alias *alias;
2574 struct kvm_mem_aliases *aliases;
2576 aliases = kvm_aliases(kvm);
2578 for (i = 0; i < aliases->naliases; ++i) {
2579 alias = &aliases->aliases[i];
2580 if (alias->flags & KVM_ALIAS_INVALID)
2582 if (gfn >= alias->base_gfn
2583 && gfn < alias->base_gfn + alias->npages)
2584 return alias->target_gfn + gfn - alias->base_gfn;
2589 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2592 struct kvm_mem_alias *alias;
2593 struct kvm_mem_aliases *aliases;
2595 aliases = kvm_aliases(kvm);
2597 for (i = 0; i < aliases->naliases; ++i) {
2598 alias = &aliases->aliases[i];
2599 if (gfn >= alias->base_gfn
2600 && gfn < alias->base_gfn + alias->npages)
2601 return alias->target_gfn + gfn - alias->base_gfn;
2607 * Set a new alias region. Aliases map a portion of physical memory into
2608 * another portion. This is useful for memory windows, for example the PC
2611 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2612 struct kvm_memory_alias *alias)
2615 struct kvm_mem_alias *p;
2616 struct kvm_mem_aliases *aliases, *old_aliases;
2619 /* General sanity checks */
2620 if (alias->memory_size & (PAGE_SIZE - 1))
2622 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2624 if (alias->slot >= KVM_ALIAS_SLOTS)
2626 if (alias->guest_phys_addr + alias->memory_size
2627 < alias->guest_phys_addr)
2629 if (alias->target_phys_addr + alias->memory_size
2630 < alias->target_phys_addr)
2634 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2638 mutex_lock(&kvm->slots_lock);
2640 /* invalidate any gfn reference in case of deletion/shrinking */
2641 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2642 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2643 old_aliases = kvm->arch.aliases;
2644 rcu_assign_pointer(kvm->arch.aliases, aliases);
2645 synchronize_srcu_expedited(&kvm->srcu);
2646 kvm_mmu_zap_all(kvm);
2650 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2654 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2656 p = &aliases->aliases[alias->slot];
2657 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2658 p->npages = alias->memory_size >> PAGE_SHIFT;
2659 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2660 p->flags &= ~(KVM_ALIAS_INVALID);
2662 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2663 if (aliases->aliases[n - 1].npages)
2665 aliases->naliases = n;
2667 old_aliases = kvm->arch.aliases;
2668 rcu_assign_pointer(kvm->arch.aliases, aliases);
2669 synchronize_srcu_expedited(&kvm->srcu);
2674 mutex_unlock(&kvm->slots_lock);
2679 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2684 switch (chip->chip_id) {
2685 case KVM_IRQCHIP_PIC_MASTER:
2686 memcpy(&chip->chip.pic,
2687 &pic_irqchip(kvm)->pics[0],
2688 sizeof(struct kvm_pic_state));
2690 case KVM_IRQCHIP_PIC_SLAVE:
2691 memcpy(&chip->chip.pic,
2692 &pic_irqchip(kvm)->pics[1],
2693 sizeof(struct kvm_pic_state));
2695 case KVM_IRQCHIP_IOAPIC:
2696 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2705 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2710 switch (chip->chip_id) {
2711 case KVM_IRQCHIP_PIC_MASTER:
2712 raw_spin_lock(&pic_irqchip(kvm)->lock);
2713 memcpy(&pic_irqchip(kvm)->pics[0],
2715 sizeof(struct kvm_pic_state));
2716 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2718 case KVM_IRQCHIP_PIC_SLAVE:
2719 raw_spin_lock(&pic_irqchip(kvm)->lock);
2720 memcpy(&pic_irqchip(kvm)->pics[1],
2722 sizeof(struct kvm_pic_state));
2723 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2725 case KVM_IRQCHIP_IOAPIC:
2726 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2732 kvm_pic_update_irq(pic_irqchip(kvm));
2736 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2740 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2741 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2742 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2746 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2750 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2751 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2752 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2753 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2757 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2761 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2762 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2763 sizeof(ps->channels));
2764 ps->flags = kvm->arch.vpit->pit_state.flags;
2765 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2769 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2771 int r = 0, start = 0;
2772 u32 prev_legacy, cur_legacy;
2773 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2774 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2775 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2776 if (!prev_legacy && cur_legacy)
2778 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2779 sizeof(kvm->arch.vpit->pit_state.channels));
2780 kvm->arch.vpit->pit_state.flags = ps->flags;
2781 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2782 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2786 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2787 struct kvm_reinject_control *control)
2789 if (!kvm->arch.vpit)
2791 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2792 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2793 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2798 * Get (and clear) the dirty memory log for a memory slot.
2800 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2801 struct kvm_dirty_log *log)
2804 struct kvm_memory_slot *memslot;
2806 unsigned long is_dirty = 0;
2808 mutex_lock(&kvm->slots_lock);
2811 if (log->slot >= KVM_MEMORY_SLOTS)
2814 memslot = &kvm->memslots->memslots[log->slot];
2816 if (!memslot->dirty_bitmap)
2819 n = kvm_dirty_bitmap_bytes(memslot);
2821 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2822 is_dirty = memslot->dirty_bitmap[i];
2824 /* If nothing is dirty, don't bother messing with page tables. */
2826 struct kvm_memslots *slots, *old_slots;
2827 unsigned long *dirty_bitmap;
2829 spin_lock(&kvm->mmu_lock);
2830 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2831 spin_unlock(&kvm->mmu_lock);
2834 dirty_bitmap = vmalloc(n);
2837 memset(dirty_bitmap, 0, n);
2840 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2842 vfree(dirty_bitmap);
2845 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2846 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2848 old_slots = kvm->memslots;
2849 rcu_assign_pointer(kvm->memslots, slots);
2850 synchronize_srcu_expedited(&kvm->srcu);
2851 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2855 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2856 vfree(dirty_bitmap);
2859 vfree(dirty_bitmap);
2862 if (clear_user(log->dirty_bitmap, n))
2868 mutex_unlock(&kvm->slots_lock);
2872 long kvm_arch_vm_ioctl(struct file *filp,
2873 unsigned int ioctl, unsigned long arg)
2875 struct kvm *kvm = filp->private_data;
2876 void __user *argp = (void __user *)arg;
2879 * This union makes it completely explicit to gcc-3.x
2880 * that these two variables' stack usage should be
2881 * combined, not added together.
2884 struct kvm_pit_state ps;
2885 struct kvm_pit_state2 ps2;
2886 struct kvm_memory_alias alias;
2887 struct kvm_pit_config pit_config;
2891 case KVM_SET_TSS_ADDR:
2892 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2896 case KVM_SET_IDENTITY_MAP_ADDR: {
2900 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2902 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2907 case KVM_SET_MEMORY_REGION: {
2908 struct kvm_memory_region kvm_mem;
2909 struct kvm_userspace_memory_region kvm_userspace_mem;
2912 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2914 kvm_userspace_mem.slot = kvm_mem.slot;
2915 kvm_userspace_mem.flags = kvm_mem.flags;
2916 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2917 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2918 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2923 case KVM_SET_NR_MMU_PAGES:
2924 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2928 case KVM_GET_NR_MMU_PAGES:
2929 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2931 case KVM_SET_MEMORY_ALIAS:
2933 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2935 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2939 case KVM_CREATE_IRQCHIP: {
2940 struct kvm_pic *vpic;
2942 mutex_lock(&kvm->lock);
2945 goto create_irqchip_unlock;
2947 vpic = kvm_create_pic(kvm);
2949 r = kvm_ioapic_init(kvm);
2951 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2954 goto create_irqchip_unlock;
2957 goto create_irqchip_unlock;
2959 kvm->arch.vpic = vpic;
2961 r = kvm_setup_default_irq_routing(kvm);
2963 mutex_lock(&kvm->irq_lock);
2964 kvm_ioapic_destroy(kvm);
2965 kvm_destroy_pic(kvm);
2966 mutex_unlock(&kvm->irq_lock);
2968 create_irqchip_unlock:
2969 mutex_unlock(&kvm->lock);
2972 case KVM_CREATE_PIT:
2973 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2975 case KVM_CREATE_PIT2:
2977 if (copy_from_user(&u.pit_config, argp,
2978 sizeof(struct kvm_pit_config)))
2981 mutex_lock(&kvm->slots_lock);
2984 goto create_pit_unlock;
2986 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2990 mutex_unlock(&kvm->slots_lock);
2992 case KVM_IRQ_LINE_STATUS:
2993 case KVM_IRQ_LINE: {
2994 struct kvm_irq_level irq_event;
2997 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3000 if (irqchip_in_kernel(kvm)) {
3002 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3003 irq_event.irq, irq_event.level);
3004 if (ioctl == KVM_IRQ_LINE_STATUS) {
3006 irq_event.status = status;
3007 if (copy_to_user(argp, &irq_event,
3015 case KVM_GET_IRQCHIP: {
3016 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3017 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3023 if (copy_from_user(chip, argp, sizeof *chip))
3024 goto get_irqchip_out;
3026 if (!irqchip_in_kernel(kvm))
3027 goto get_irqchip_out;
3028 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3030 goto get_irqchip_out;
3032 if (copy_to_user(argp, chip, sizeof *chip))
3033 goto get_irqchip_out;
3041 case KVM_SET_IRQCHIP: {
3042 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3043 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3049 if (copy_from_user(chip, argp, sizeof *chip))
3050 goto set_irqchip_out;
3052 if (!irqchip_in_kernel(kvm))
3053 goto set_irqchip_out;
3054 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3056 goto set_irqchip_out;
3066 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3069 if (!kvm->arch.vpit)
3071 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3075 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3082 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3085 if (!kvm->arch.vpit)
3087 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3093 case KVM_GET_PIT2: {
3095 if (!kvm->arch.vpit)
3097 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3101 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3106 case KVM_SET_PIT2: {
3108 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3111 if (!kvm->arch.vpit)
3113 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3119 case KVM_REINJECT_CONTROL: {
3120 struct kvm_reinject_control control;
3122 if (copy_from_user(&control, argp, sizeof(control)))
3124 r = kvm_vm_ioctl_reinject(kvm, &control);
3130 case KVM_XEN_HVM_CONFIG: {
3132 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3133 sizeof(struct kvm_xen_hvm_config)))
3136 if (kvm->arch.xen_hvm_config.flags)
3141 case KVM_SET_CLOCK: {
3142 struct timespec now;
3143 struct kvm_clock_data user_ns;
3148 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3157 now_ns = timespec_to_ns(&now);
3158 delta = user_ns.clock - now_ns;
3159 kvm->arch.kvmclock_offset = delta;
3162 case KVM_GET_CLOCK: {
3163 struct timespec now;
3164 struct kvm_clock_data user_ns;
3168 now_ns = timespec_to_ns(&now);
3169 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3173 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3186 static void kvm_init_msr_list(void)
3191 /* skip the first msrs in the list. KVM-specific */
3192 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3193 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3196 msrs_to_save[j] = msrs_to_save[i];
3199 num_msrs_to_save = j;
3202 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3205 if (vcpu->arch.apic &&
3206 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3209 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3212 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3214 if (vcpu->arch.apic &&
3215 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3218 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3221 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3222 struct kvm_segment *var, int seg)
3224 kvm_x86_ops->set_segment(vcpu, var, seg);
3227 void kvm_get_segment(struct kvm_vcpu *vcpu,
3228 struct kvm_segment *var, int seg)
3230 kvm_x86_ops->get_segment(vcpu, var, seg);
3233 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3235 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3236 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3239 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3241 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3242 access |= PFERR_FETCH_MASK;
3243 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3246 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3248 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3249 access |= PFERR_WRITE_MASK;
3250 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3253 /* uses this to access any guest's mapped memory without checking CPL */
3254 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3256 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3259 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3260 struct kvm_vcpu *vcpu, u32 access,
3264 int r = X86EMUL_CONTINUE;
3267 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3268 unsigned offset = addr & (PAGE_SIZE-1);
3269 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3272 if (gpa == UNMAPPED_GVA) {
3273 r = X86EMUL_PROPAGATE_FAULT;
3276 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3278 r = X86EMUL_IO_NEEDED;
3290 /* used for instruction fetching */
3291 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3292 struct kvm_vcpu *vcpu, u32 *error)
3294 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3295 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3296 access | PFERR_FETCH_MASK, error);
3299 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3300 struct kvm_vcpu *vcpu, u32 *error)
3302 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3303 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3307 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3308 struct kvm_vcpu *vcpu, u32 *error)
3310 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3313 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3315 struct kvm_vcpu *vcpu,
3319 int r = X86EMUL_CONTINUE;
3322 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3323 PFERR_WRITE_MASK, error);
3324 unsigned offset = addr & (PAGE_SIZE-1);
3325 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3328 if (gpa == UNMAPPED_GVA) {
3329 r = X86EMUL_PROPAGATE_FAULT;
3332 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3334 r = X86EMUL_IO_NEEDED;
3346 static int emulator_read_emulated(unsigned long addr,
3349 unsigned int *error_code,
3350 struct kvm_vcpu *vcpu)
3354 if (vcpu->mmio_read_completed) {
3355 memcpy(val, vcpu->mmio_data, bytes);
3356 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3357 vcpu->mmio_phys_addr, *(u64 *)val);
3358 vcpu->mmio_read_completed = 0;
3359 return X86EMUL_CONTINUE;
3362 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3364 if (gpa == UNMAPPED_GVA)
3365 return X86EMUL_PROPAGATE_FAULT;
3367 /* For APIC access vmexit */
3368 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3371 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3372 == X86EMUL_CONTINUE)
3373 return X86EMUL_CONTINUE;
3377 * Is this MMIO handled locally?
3379 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3380 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3381 return X86EMUL_CONTINUE;
3384 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3386 vcpu->mmio_needed = 1;
3387 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3388 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3389 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3390 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3392 return X86EMUL_IO_NEEDED;
3395 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3396 const void *val, int bytes)
3400 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3403 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3407 static int emulator_write_emulated_onepage(unsigned long addr,
3410 unsigned int *error_code,
3411 struct kvm_vcpu *vcpu)
3415 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3417 if (gpa == UNMAPPED_GVA)
3418 return X86EMUL_PROPAGATE_FAULT;
3420 /* For APIC access vmexit */
3421 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3424 if (emulator_write_phys(vcpu, gpa, val, bytes))
3425 return X86EMUL_CONTINUE;
3428 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3430 * Is this MMIO handled locally?
3432 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3433 return X86EMUL_CONTINUE;
3435 vcpu->mmio_needed = 1;
3436 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3437 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3438 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3439 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3440 memcpy(vcpu->run->mmio.data, val, bytes);
3442 return X86EMUL_CONTINUE;
3445 int emulator_write_emulated(unsigned long addr,
3448 unsigned int *error_code,
3449 struct kvm_vcpu *vcpu)
3451 /* Crossing a page boundary? */
3452 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3455 now = -addr & ~PAGE_MASK;
3456 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3458 if (rc != X86EMUL_CONTINUE)
3464 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3468 #define CMPXCHG_TYPE(t, ptr, old, new) \
3469 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3471 #ifdef CONFIG_X86_64
3472 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3474 # define CMPXCHG64(ptr, old, new) \
3475 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3478 static int emulator_cmpxchg_emulated(unsigned long addr,
3482 unsigned int *error_code,
3483 struct kvm_vcpu *vcpu)
3490 /* guests cmpxchg8b have to be emulated atomically */
3491 if (bytes > 8 || (bytes & (bytes - 1)))
3494 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3496 if (gpa == UNMAPPED_GVA ||
3497 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3500 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3503 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3505 kaddr = kmap_atomic(page, KM_USER0);
3506 kaddr += offset_in_page(gpa);
3509 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3512 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3515 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3518 exchanged = CMPXCHG64(kaddr, old, new);
3523 kunmap_atomic(kaddr, KM_USER0);
3524 kvm_release_page_dirty(page);
3527 return X86EMUL_CMPXCHG_FAILED;
3529 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3531 return X86EMUL_CONTINUE;
3534 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3536 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3539 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3541 /* TODO: String I/O for in kernel device */
3544 if (vcpu->arch.pio.in)
3545 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3546 vcpu->arch.pio.size, pd);
3548 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3549 vcpu->arch.pio.port, vcpu->arch.pio.size,
3555 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3556 unsigned int count, struct kvm_vcpu *vcpu)
3558 if (vcpu->arch.pio.count)
3561 trace_kvm_pio(1, port, size, 1);
3563 vcpu->arch.pio.port = port;
3564 vcpu->arch.pio.in = 1;
3565 vcpu->arch.pio.count = count;
3566 vcpu->arch.pio.size = size;
3568 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3570 memcpy(val, vcpu->arch.pio_data, size * count);
3571 vcpu->arch.pio.count = 0;
3575 vcpu->run->exit_reason = KVM_EXIT_IO;
3576 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3577 vcpu->run->io.size = size;
3578 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3579 vcpu->run->io.count = count;
3580 vcpu->run->io.port = port;
3585 static int emulator_pio_out_emulated(int size, unsigned short port,
3586 const void *val, unsigned int count,
3587 struct kvm_vcpu *vcpu)
3589 trace_kvm_pio(0, port, size, 1);
3591 vcpu->arch.pio.port = port;
3592 vcpu->arch.pio.in = 0;
3593 vcpu->arch.pio.count = count;
3594 vcpu->arch.pio.size = size;
3596 memcpy(vcpu->arch.pio_data, val, size * count);
3598 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3599 vcpu->arch.pio.count = 0;
3603 vcpu->run->exit_reason = KVM_EXIT_IO;
3604 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3605 vcpu->run->io.size = size;
3606 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3607 vcpu->run->io.count = count;
3608 vcpu->run->io.port = port;
3613 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3615 return kvm_x86_ops->get_segment_base(vcpu, seg);
3618 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3620 kvm_mmu_invlpg(vcpu, address);
3621 return X86EMUL_CONTINUE;
3624 int emulate_clts(struct kvm_vcpu *vcpu)
3626 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3627 kvm_x86_ops->fpu_activate(vcpu);
3628 return X86EMUL_CONTINUE;
3631 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3633 return _kvm_get_dr(vcpu, dr, dest);
3636 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3639 return __kvm_set_dr(vcpu, dr, value);
3642 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3645 unsigned long rip = kvm_rip_read(vcpu);
3646 unsigned long rip_linear;
3648 if (!printk_ratelimit())
3651 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3653 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
3655 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3656 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3658 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3660 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3662 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3665 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3667 unsigned long value;
3671 value = kvm_read_cr0(vcpu);
3674 value = vcpu->arch.cr2;
3677 value = vcpu->arch.cr3;
3680 value = kvm_read_cr4(vcpu);
3683 value = kvm_get_cr8(vcpu);
3686 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3693 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3699 res = __kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3702 vcpu->arch.cr2 = val;
3705 res = __kvm_set_cr3(vcpu, val);
3708 res = __kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3711 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3714 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3721 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3723 return kvm_x86_ops->get_cpl(vcpu);
3726 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3728 kvm_x86_ops->get_gdt(vcpu, dt);
3731 static unsigned long emulator_get_cached_segment_base(int seg,
3732 struct kvm_vcpu *vcpu)
3734 return get_segment_base(vcpu, seg);
3737 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3738 struct kvm_vcpu *vcpu)
3740 struct kvm_segment var;
3742 kvm_get_segment(vcpu, &var, seg);
3749 set_desc_limit(desc, var.limit);
3750 set_desc_base(desc, (unsigned long)var.base);
3751 desc->type = var.type;
3753 desc->dpl = var.dpl;
3754 desc->p = var.present;
3755 desc->avl = var.avl;
3763 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3764 struct kvm_vcpu *vcpu)
3766 struct kvm_segment var;
3768 /* needed to preserve selector */
3769 kvm_get_segment(vcpu, &var, seg);
3771 var.base = get_desc_base(desc);
3772 var.limit = get_desc_limit(desc);
3774 var.limit = (var.limit << 12) | 0xfff;
3775 var.type = desc->type;
3776 var.present = desc->p;
3777 var.dpl = desc->dpl;
3782 var.avl = desc->avl;
3783 var.present = desc->p;
3784 var.unusable = !var.present;
3787 kvm_set_segment(vcpu, &var, seg);
3791 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3793 struct kvm_segment kvm_seg;
3795 kvm_get_segment(vcpu, &kvm_seg, seg);
3796 return kvm_seg.selector;
3799 static void emulator_set_segment_selector(u16 sel, int seg,
3800 struct kvm_vcpu *vcpu)
3802 struct kvm_segment kvm_seg;
3804 kvm_get_segment(vcpu, &kvm_seg, seg);
3805 kvm_seg.selector = sel;
3806 kvm_set_segment(vcpu, &kvm_seg, seg);
3809 static void emulator_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
3811 kvm_x86_ops->set_rflags(vcpu, rflags);
3814 static struct x86_emulate_ops emulate_ops = {
3815 .read_std = kvm_read_guest_virt_system,
3816 .write_std = kvm_write_guest_virt_system,
3817 .fetch = kvm_fetch_guest_virt,
3818 .read_emulated = emulator_read_emulated,
3819 .write_emulated = emulator_write_emulated,
3820 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3821 .pio_in_emulated = emulator_pio_in_emulated,
3822 .pio_out_emulated = emulator_pio_out_emulated,
3823 .get_cached_descriptor = emulator_get_cached_descriptor,
3824 .set_cached_descriptor = emulator_set_cached_descriptor,
3825 .get_segment_selector = emulator_get_segment_selector,
3826 .set_segment_selector = emulator_set_segment_selector,
3827 .get_cached_segment_base = emulator_get_cached_segment_base,
3828 .get_gdt = emulator_get_gdt,
3829 .get_cr = emulator_get_cr,
3830 .set_cr = emulator_set_cr,
3831 .cpl = emulator_get_cpl,
3832 .set_rflags = emulator_set_rflags,
3833 .get_dr = emulator_get_dr,
3834 .set_dr = emulator_set_dr,
3835 .set_msr = kvm_set_msr,
3836 .get_msr = kvm_get_msr,
3839 static void cache_all_regs(struct kvm_vcpu *vcpu)
3841 kvm_register_read(vcpu, VCPU_REGS_RAX);
3842 kvm_register_read(vcpu, VCPU_REGS_RSP);
3843 kvm_register_read(vcpu, VCPU_REGS_RIP);
3844 vcpu->arch.regs_dirty = ~0;
3847 int emulate_instruction(struct kvm_vcpu *vcpu,
3853 struct decode_cache *c;
3855 kvm_clear_exception_queue(vcpu);
3856 vcpu->arch.mmio_fault_cr2 = cr2;
3858 * TODO: fix emulate.c to use guest_read/write_register
3859 * instead of direct ->regs accesses, can save hundred cycles
3860 * on Intel for instructions that don't read/change RSP, for
3863 cache_all_regs(vcpu);
3865 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3867 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3869 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3870 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3871 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3872 vcpu->arch.emulate_ctxt.mode =
3873 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3874 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3875 ? X86EMUL_MODE_VM86 : cs_l
3876 ? X86EMUL_MODE_PROT64 : cs_db
3877 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3879 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3880 trace_kvm_emulate_insn_start(vcpu);
3882 /* Only allow emulation of specific instructions on #UD
3883 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3884 c = &vcpu->arch.emulate_ctxt.decode;
3885 if (emulation_type & EMULTYPE_TRAP_UD) {
3887 return EMULATE_FAIL;
3889 case 0x01: /* VMMCALL */
3890 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3891 return EMULATE_FAIL;
3893 case 0x34: /* sysenter */
3894 case 0x35: /* sysexit */
3895 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3896 return EMULATE_FAIL;
3898 case 0x05: /* syscall */
3899 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3900 return EMULATE_FAIL;
3903 return EMULATE_FAIL;
3906 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3907 return EMULATE_FAIL;
3910 ++vcpu->stat.insn_emulation;
3912 ++vcpu->stat.insn_emulation_fail;
3913 trace_kvm_emulate_insn_failed(vcpu);
3914 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3915 return EMULATE_DONE;
3916 return EMULATE_FAIL;
3920 if (emulation_type & EMULTYPE_SKIP) {
3921 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3922 return EMULATE_DONE;
3926 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3928 if (r) { /* emulation failed */
3930 * if emulation was due to access to shadowed page table
3931 * and it failed try to unshadow page and re-entetr the
3932 * guest to let CPU execute the instruction.
3934 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3935 return EMULATE_DONE;
3937 trace_kvm_emulate_insn_failed(vcpu);
3938 kvm_report_emulation_failure(vcpu, "mmio");
3939 return EMULATE_FAIL;
3942 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3943 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3945 if (vcpu->arch.pio.count) {
3946 if (!vcpu->arch.pio.in)
3947 vcpu->arch.pio.count = 0;
3948 return EMULATE_DO_MMIO;
3951 if (vcpu->mmio_needed) {
3952 if (vcpu->mmio_is_write)
3953 vcpu->mmio_needed = 0;
3954 return EMULATE_DO_MMIO;
3957 if (vcpu->arch.exception.pending)
3958 vcpu->arch.emulate_ctxt.restart = false;
3960 if (vcpu->arch.emulate_ctxt.restart)
3963 return EMULATE_DONE;
3965 EXPORT_SYMBOL_GPL(emulate_instruction);
3967 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
3969 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3970 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
3971 /* do not return to emulator after return from userspace */
3972 vcpu->arch.pio.count = 0;
3975 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
3977 static void bounce_off(void *info)
3982 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3985 struct cpufreq_freqs *freq = data;
3987 struct kvm_vcpu *vcpu;
3988 int i, send_ipi = 0;
3990 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3992 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3994 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3996 spin_lock(&kvm_lock);
3997 list_for_each_entry(kvm, &vm_list, vm_list) {
3998 kvm_for_each_vcpu(i, vcpu, kvm) {
3999 if (vcpu->cpu != freq->cpu)
4001 if (!kvm_request_guest_time_update(vcpu))
4003 if (vcpu->cpu != smp_processor_id())
4007 spin_unlock(&kvm_lock);
4009 if (freq->old < freq->new && send_ipi) {
4011 * We upscale the frequency. Must make the guest
4012 * doesn't see old kvmclock values while running with
4013 * the new frequency, otherwise we risk the guest sees
4014 * time go backwards.
4016 * In case we update the frequency for another cpu
4017 * (which might be in guest context) send an interrupt
4018 * to kick the cpu out of guest context. Next time
4019 * guest context is entered kvmclock will be updated,
4020 * so the guest will not see stale values.
4022 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4027 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4028 .notifier_call = kvmclock_cpufreq_notifier
4031 static void kvm_timer_init(void)
4035 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4036 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4037 CPUFREQ_TRANSITION_NOTIFIER);
4038 for_each_online_cpu(cpu) {
4039 unsigned long khz = cpufreq_get(cpu);
4042 per_cpu(cpu_tsc_khz, cpu) = khz;
4045 for_each_possible_cpu(cpu)
4046 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4050 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4052 static int kvm_is_in_guest(void)
4054 return percpu_read(current_vcpu) != NULL;
4057 static int kvm_is_user_mode(void)
4061 if (percpu_read(current_vcpu))
4062 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4064 return user_mode != 0;
4067 static unsigned long kvm_get_guest_ip(void)
4069 unsigned long ip = 0;
4071 if (percpu_read(current_vcpu))
4072 ip = kvm_rip_read(percpu_read(current_vcpu));
4077 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4078 .is_in_guest = kvm_is_in_guest,
4079 .is_user_mode = kvm_is_user_mode,
4080 .get_guest_ip = kvm_get_guest_ip,
4083 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4085 percpu_write(current_vcpu, vcpu);
4087 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4089 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4091 percpu_write(current_vcpu, NULL);
4093 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4095 int kvm_arch_init(void *opaque)
4098 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4101 printk(KERN_ERR "kvm: already loaded the other module\n");
4106 if (!ops->cpu_has_kvm_support()) {
4107 printk(KERN_ERR "kvm: no hardware support\n");
4111 if (ops->disabled_by_bios()) {
4112 printk(KERN_ERR "kvm: disabled by bios\n");
4117 r = kvm_mmu_module_init();
4121 kvm_init_msr_list();
4124 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4125 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4126 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4127 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4131 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4139 void kvm_arch_exit(void)
4141 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4143 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4144 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4145 CPUFREQ_TRANSITION_NOTIFIER);
4147 kvm_mmu_module_exit();
4150 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4152 ++vcpu->stat.halt_exits;
4153 if (irqchip_in_kernel(vcpu->kvm)) {
4154 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4157 vcpu->run->exit_reason = KVM_EXIT_HLT;
4161 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4163 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4166 if (is_long_mode(vcpu))
4169 return a0 | ((gpa_t)a1 << 32);
4172 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4174 u64 param, ingpa, outgpa, ret;
4175 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4176 bool fast, longmode;
4180 * hypercall generates UD from non zero cpl and real mode
4183 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4184 kvm_queue_exception(vcpu, UD_VECTOR);
4188 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4189 longmode = is_long_mode(vcpu) && cs_l == 1;
4192 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4193 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4194 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4195 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4196 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4197 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4199 #ifdef CONFIG_X86_64
4201 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4202 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4203 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4207 code = param & 0xffff;
4208 fast = (param >> 16) & 0x1;
4209 rep_cnt = (param >> 32) & 0xfff;
4210 rep_idx = (param >> 48) & 0xfff;
4212 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4215 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4216 kvm_vcpu_on_spin(vcpu);
4219 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4223 ret = res | (((u64)rep_done & 0xfff) << 32);
4225 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4227 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4228 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4234 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4236 unsigned long nr, a0, a1, a2, a3, ret;
4239 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4240 return kvm_hv_hypercall(vcpu);
4242 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4243 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4244 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4245 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4246 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4248 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4250 if (!is_long_mode(vcpu)) {
4258 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4264 case KVM_HC_VAPIC_POLL_IRQ:
4268 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4275 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4276 ++vcpu->stat.hypercalls;
4279 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4281 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4283 char instruction[3];
4284 unsigned long rip = kvm_rip_read(vcpu);
4287 * Blow out the MMU to ensure that no other VCPU has an active mapping
4288 * to ensure that the updated hypercall appears atomically across all
4291 kvm_mmu_zap_all(vcpu->kvm);
4293 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4295 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4298 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4300 struct desc_ptr dt = { limit, base };
4302 kvm_x86_ops->set_gdt(vcpu, &dt);
4305 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4307 struct desc_ptr dt = { limit, base };
4309 kvm_x86_ops->set_idt(vcpu, &dt);
4312 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4314 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4315 int j, nent = vcpu->arch.cpuid_nent;
4317 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4318 /* when no next entry is found, the current entry[i] is reselected */
4319 for (j = i + 1; ; j = (j + 1) % nent) {
4320 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4321 if (ej->function == e->function) {
4322 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4326 return 0; /* silence gcc, even though control never reaches here */
4329 /* find an entry with matching function, matching index (if needed), and that
4330 * should be read next (if it's stateful) */
4331 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4332 u32 function, u32 index)
4334 if (e->function != function)
4336 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4338 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4339 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4344 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4345 u32 function, u32 index)
4348 struct kvm_cpuid_entry2 *best = NULL;
4350 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4351 struct kvm_cpuid_entry2 *e;
4353 e = &vcpu->arch.cpuid_entries[i];
4354 if (is_matching_cpuid_entry(e, function, index)) {
4355 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4356 move_to_next_stateful_cpuid_entry(vcpu, i);
4361 * Both basic or both extended?
4363 if (((e->function ^ function) & 0x80000000) == 0)
4364 if (!best || e->function > best->function)
4369 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4371 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4373 struct kvm_cpuid_entry2 *best;
4375 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4376 if (!best || best->eax < 0x80000008)
4378 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4380 return best->eax & 0xff;
4385 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4387 u32 function, index;
4388 struct kvm_cpuid_entry2 *best;
4390 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4391 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4392 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4393 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4394 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4395 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4396 best = kvm_find_cpuid_entry(vcpu, function, index);
4398 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4399 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4400 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4401 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4403 kvm_x86_ops->skip_emulated_instruction(vcpu);
4404 trace_kvm_cpuid(function,
4405 kvm_register_read(vcpu, VCPU_REGS_RAX),
4406 kvm_register_read(vcpu, VCPU_REGS_RBX),
4407 kvm_register_read(vcpu, VCPU_REGS_RCX),
4408 kvm_register_read(vcpu, VCPU_REGS_RDX));
4410 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4413 * Check if userspace requested an interrupt window, and that the
4414 * interrupt window is open.
4416 * No need to exit to userspace if we already have an interrupt queued.
4418 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4420 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4421 vcpu->run->request_interrupt_window &&
4422 kvm_arch_interrupt_allowed(vcpu));
4425 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4427 struct kvm_run *kvm_run = vcpu->run;
4429 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4430 kvm_run->cr8 = kvm_get_cr8(vcpu);
4431 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4432 if (irqchip_in_kernel(vcpu->kvm))
4433 kvm_run->ready_for_interrupt_injection = 1;
4435 kvm_run->ready_for_interrupt_injection =
4436 kvm_arch_interrupt_allowed(vcpu) &&
4437 !kvm_cpu_has_interrupt(vcpu) &&
4438 !kvm_event_needs_reinjection(vcpu);
4441 static void vapic_enter(struct kvm_vcpu *vcpu)
4443 struct kvm_lapic *apic = vcpu->arch.apic;
4446 if (!apic || !apic->vapic_addr)
4449 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4451 vcpu->arch.apic->vapic_page = page;
4454 static void vapic_exit(struct kvm_vcpu *vcpu)
4456 struct kvm_lapic *apic = vcpu->arch.apic;
4459 if (!apic || !apic->vapic_addr)
4462 idx = srcu_read_lock(&vcpu->kvm->srcu);
4463 kvm_release_page_dirty(apic->vapic_page);
4464 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4465 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4468 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4472 if (!kvm_x86_ops->update_cr8_intercept)
4475 if (!vcpu->arch.apic)
4478 if (!vcpu->arch.apic->vapic_addr)
4479 max_irr = kvm_lapic_find_highest_irr(vcpu);
4486 tpr = kvm_lapic_get_cr8(vcpu);
4488 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4491 static void inject_pending_event(struct kvm_vcpu *vcpu)
4493 /* try to reinject previous events if any */
4494 if (vcpu->arch.exception.pending) {
4495 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4496 vcpu->arch.exception.has_error_code,
4497 vcpu->arch.exception.error_code);
4498 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4499 vcpu->arch.exception.has_error_code,
4500 vcpu->arch.exception.error_code,
4501 vcpu->arch.exception.reinject);
4505 if (vcpu->arch.nmi_injected) {
4506 kvm_x86_ops->set_nmi(vcpu);
4510 if (vcpu->arch.interrupt.pending) {
4511 kvm_x86_ops->set_irq(vcpu);
4515 /* try to inject new event if pending */
4516 if (vcpu->arch.nmi_pending) {
4517 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4518 vcpu->arch.nmi_pending = false;
4519 vcpu->arch.nmi_injected = true;
4520 kvm_x86_ops->set_nmi(vcpu);
4522 } else if (kvm_cpu_has_interrupt(vcpu)) {
4523 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4524 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4526 kvm_x86_ops->set_irq(vcpu);
4531 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4534 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4535 vcpu->run->request_interrupt_window;
4538 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4539 kvm_mmu_unload(vcpu);
4541 r = kvm_mmu_reload(vcpu);
4545 if (vcpu->requests) {
4546 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4547 __kvm_migrate_timers(vcpu);
4548 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4549 kvm_write_guest_time(vcpu);
4550 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4551 kvm_mmu_sync_roots(vcpu);
4552 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4553 kvm_x86_ops->tlb_flush(vcpu);
4554 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4556 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4560 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4561 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4565 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4566 vcpu->fpu_active = 0;
4567 kvm_x86_ops->fpu_deactivate(vcpu);
4573 kvm_x86_ops->prepare_guest_switch(vcpu);
4574 if (vcpu->fpu_active)
4575 kvm_load_guest_fpu(vcpu);
4577 local_irq_disable();
4579 clear_bit(KVM_REQ_KICK, &vcpu->requests);
4580 smp_mb__after_clear_bit();
4582 if (vcpu->requests || need_resched() || signal_pending(current)) {
4583 set_bit(KVM_REQ_KICK, &vcpu->requests);
4590 inject_pending_event(vcpu);
4592 /* enable NMI/IRQ window open exits if needed */
4593 if (vcpu->arch.nmi_pending)
4594 kvm_x86_ops->enable_nmi_window(vcpu);
4595 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4596 kvm_x86_ops->enable_irq_window(vcpu);
4598 if (kvm_lapic_enabled(vcpu)) {
4599 update_cr8_intercept(vcpu);
4600 kvm_lapic_sync_to_vapic(vcpu);
4603 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4607 if (unlikely(vcpu->arch.switch_db_regs)) {
4609 set_debugreg(vcpu->arch.eff_db[0], 0);
4610 set_debugreg(vcpu->arch.eff_db[1], 1);
4611 set_debugreg(vcpu->arch.eff_db[2], 2);
4612 set_debugreg(vcpu->arch.eff_db[3], 3);
4615 trace_kvm_entry(vcpu->vcpu_id);
4616 kvm_x86_ops->run(vcpu);
4619 * If the guest has used debug registers, at least dr7
4620 * will be disabled while returning to the host.
4621 * If we don't have active breakpoints in the host, we don't
4622 * care about the messed up debug address registers. But if
4623 * we have some of them active, restore the old state.
4625 if (hw_breakpoint_active())
4626 hw_breakpoint_restore();
4628 set_bit(KVM_REQ_KICK, &vcpu->requests);
4634 * We must have an instruction between local_irq_enable() and
4635 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4636 * the interrupt shadow. The stat.exits increment will do nicely.
4637 * But we need to prevent reordering, hence this barrier():
4645 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4648 * Profile KVM exit RIPs:
4650 if (unlikely(prof_on == KVM_PROFILING)) {
4651 unsigned long rip = kvm_rip_read(vcpu);
4652 profile_hit(KVM_PROFILING, (void *)rip);
4656 kvm_lapic_sync_from_vapic(vcpu);
4658 r = kvm_x86_ops->handle_exit(vcpu);
4664 static int __vcpu_run(struct kvm_vcpu *vcpu)
4667 struct kvm *kvm = vcpu->kvm;
4669 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4670 pr_debug("vcpu %d received sipi with vector # %x\n",
4671 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4672 kvm_lapic_reset(vcpu);
4673 r = kvm_arch_vcpu_reset(vcpu);
4676 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4679 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4684 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4685 r = vcpu_enter_guest(vcpu);
4687 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4688 kvm_vcpu_block(vcpu);
4689 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4690 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4692 switch(vcpu->arch.mp_state) {
4693 case KVM_MP_STATE_HALTED:
4694 vcpu->arch.mp_state =
4695 KVM_MP_STATE_RUNNABLE;
4696 case KVM_MP_STATE_RUNNABLE:
4698 case KVM_MP_STATE_SIPI_RECEIVED:
4709 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4710 if (kvm_cpu_has_pending_timer(vcpu))
4711 kvm_inject_pending_timer_irqs(vcpu);
4713 if (dm_request_for_irq_injection(vcpu)) {
4715 vcpu->run->exit_reason = KVM_EXIT_INTR;
4716 ++vcpu->stat.request_irq_exits;
4718 if (signal_pending(current)) {
4720 vcpu->run->exit_reason = KVM_EXIT_INTR;
4721 ++vcpu->stat.signal_exits;
4723 if (need_resched()) {
4724 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4726 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4730 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4737 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4744 if (vcpu->sigset_active)
4745 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4747 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4748 kvm_vcpu_block(vcpu);
4749 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4754 /* re-sync apic's tpr */
4755 if (!irqchip_in_kernel(vcpu->kvm))
4756 kvm_set_cr8(vcpu, kvm_run->cr8);
4758 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4759 vcpu->arch.emulate_ctxt.restart) {
4760 if (vcpu->mmio_needed) {
4761 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4762 vcpu->mmio_read_completed = 1;
4763 vcpu->mmio_needed = 0;
4765 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4766 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4767 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4768 if (r == EMULATE_DO_MMIO) {
4773 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4774 kvm_register_write(vcpu, VCPU_REGS_RAX,
4775 kvm_run->hypercall.ret);
4777 r = __vcpu_run(vcpu);
4780 post_kvm_run_save(vcpu);
4781 if (vcpu->sigset_active)
4782 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4788 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4792 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4793 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4794 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4795 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4796 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4797 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4798 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4799 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4800 #ifdef CONFIG_X86_64
4801 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4802 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4803 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4804 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4805 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4806 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4807 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4808 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4811 regs->rip = kvm_rip_read(vcpu);
4812 regs->rflags = kvm_get_rflags(vcpu);
4819 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4823 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4824 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4825 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4826 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4827 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4828 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4829 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4830 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4831 #ifdef CONFIG_X86_64
4832 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4833 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4834 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4835 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4836 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4837 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4838 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4839 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4842 kvm_rip_write(vcpu, regs->rip);
4843 kvm_set_rflags(vcpu, regs->rflags);
4845 vcpu->arch.exception.pending = false;
4852 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4854 struct kvm_segment cs;
4856 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4860 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4862 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4863 struct kvm_sregs *sregs)
4869 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4870 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4871 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4872 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4873 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4874 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4876 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4877 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4879 kvm_x86_ops->get_idt(vcpu, &dt);
4880 sregs->idt.limit = dt.size;
4881 sregs->idt.base = dt.address;
4882 kvm_x86_ops->get_gdt(vcpu, &dt);
4883 sregs->gdt.limit = dt.size;
4884 sregs->gdt.base = dt.address;
4886 sregs->cr0 = kvm_read_cr0(vcpu);
4887 sregs->cr2 = vcpu->arch.cr2;
4888 sregs->cr3 = vcpu->arch.cr3;
4889 sregs->cr4 = kvm_read_cr4(vcpu);
4890 sregs->cr8 = kvm_get_cr8(vcpu);
4891 sregs->efer = vcpu->arch.efer;
4892 sregs->apic_base = kvm_get_apic_base(vcpu);
4894 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4896 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4897 set_bit(vcpu->arch.interrupt.nr,
4898 (unsigned long *)sregs->interrupt_bitmap);
4905 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4906 struct kvm_mp_state *mp_state)
4909 mp_state->mp_state = vcpu->arch.mp_state;
4914 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4915 struct kvm_mp_state *mp_state)
4918 vcpu->arch.mp_state = mp_state->mp_state;
4923 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
4924 bool has_error_code, u32 error_code)
4926 int cs_db, cs_l, ret;
4927 cache_all_regs(vcpu);
4929 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4931 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4932 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4933 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4934 vcpu->arch.emulate_ctxt.mode =
4935 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4936 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4937 ? X86EMUL_MODE_VM86 : cs_l
4938 ? X86EMUL_MODE_PROT64 : cs_db
4939 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4941 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
4942 tss_selector, reason, has_error_code,
4946 return EMULATE_FAIL;
4948 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4949 return EMULATE_DONE;
4951 EXPORT_SYMBOL_GPL(kvm_task_switch);
4953 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4954 struct kvm_sregs *sregs)
4956 int mmu_reset_needed = 0;
4957 int pending_vec, max_bits;
4962 dt.size = sregs->idt.limit;
4963 dt.address = sregs->idt.base;
4964 kvm_x86_ops->set_idt(vcpu, &dt);
4965 dt.size = sregs->gdt.limit;
4966 dt.address = sregs->gdt.base;
4967 kvm_x86_ops->set_gdt(vcpu, &dt);
4969 vcpu->arch.cr2 = sregs->cr2;
4970 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4971 vcpu->arch.cr3 = sregs->cr3;
4973 kvm_set_cr8(vcpu, sregs->cr8);
4975 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
4976 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4977 kvm_set_apic_base(vcpu, sregs->apic_base);
4979 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
4980 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4981 vcpu->arch.cr0 = sregs->cr0;
4983 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
4984 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4985 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
4986 load_pdptrs(vcpu, vcpu->arch.cr3);
4987 mmu_reset_needed = 1;
4990 if (mmu_reset_needed)
4991 kvm_mmu_reset_context(vcpu);
4993 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4994 pending_vec = find_first_bit(
4995 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4996 if (pending_vec < max_bits) {
4997 kvm_queue_interrupt(vcpu, pending_vec, false);
4998 pr_debug("Set back pending irq %d\n", pending_vec);
4999 if (irqchip_in_kernel(vcpu->kvm))
5000 kvm_pic_clear_isr_ack(vcpu->kvm);
5003 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5004 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5005 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5006 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5007 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5008 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5010 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5011 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5013 update_cr8_intercept(vcpu);
5015 /* Older userspace won't unhalt the vcpu on reset. */
5016 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5017 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5019 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5026 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5027 struct kvm_guest_debug *dbg)
5029 unsigned long rflags;
5034 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5036 if (vcpu->arch.exception.pending)
5038 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5039 kvm_queue_exception(vcpu, DB_VECTOR);
5041 kvm_queue_exception(vcpu, BP_VECTOR);
5045 * Read rflags as long as potentially injected trace flags are still
5048 rflags = kvm_get_rflags(vcpu);
5050 vcpu->guest_debug = dbg->control;
5051 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5052 vcpu->guest_debug = 0;
5054 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5055 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5056 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5057 vcpu->arch.switch_db_regs =
5058 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5060 for (i = 0; i < KVM_NR_DB_REGS; i++)
5061 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5062 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5065 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5066 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5067 get_segment_base(vcpu, VCPU_SREG_CS);
5070 * Trigger an rflags update that will inject or remove the trace
5073 kvm_set_rflags(vcpu, rflags);
5075 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5086 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5087 * we have asm/x86/processor.h
5098 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5099 #ifdef CONFIG_X86_64
5100 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5102 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5107 * Translate a guest virtual address to a guest physical address.
5109 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5110 struct kvm_translation *tr)
5112 unsigned long vaddr = tr->linear_address;
5117 idx = srcu_read_lock(&vcpu->kvm->srcu);
5118 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5119 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5120 tr->physical_address = gpa;
5121 tr->valid = gpa != UNMAPPED_GVA;
5129 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5131 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5135 memcpy(fpu->fpr, fxsave->st_space, 128);
5136 fpu->fcw = fxsave->cwd;
5137 fpu->fsw = fxsave->swd;
5138 fpu->ftwx = fxsave->twd;
5139 fpu->last_opcode = fxsave->fop;
5140 fpu->last_ip = fxsave->rip;
5141 fpu->last_dp = fxsave->rdp;
5142 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5149 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5151 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5155 memcpy(fxsave->st_space, fpu->fpr, 128);
5156 fxsave->cwd = fpu->fcw;
5157 fxsave->swd = fpu->fsw;
5158 fxsave->twd = fpu->ftwx;
5159 fxsave->fop = fpu->last_opcode;
5160 fxsave->rip = fpu->last_ip;
5161 fxsave->rdp = fpu->last_dp;
5162 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5169 void fx_init(struct kvm_vcpu *vcpu)
5171 unsigned after_mxcsr_mask;
5174 * Touch the fpu the first time in non atomic context as if
5175 * this is the first fpu instruction the exception handler
5176 * will fire before the instruction returns and it'll have to
5177 * allocate ram with GFP_KERNEL.
5180 kvm_fx_save(&vcpu->arch.host_fx_image);
5182 /* Initialize guest FPU by resetting ours and saving into guest's */
5184 kvm_fx_save(&vcpu->arch.host_fx_image);
5186 kvm_fx_save(&vcpu->arch.guest_fx_image);
5187 kvm_fx_restore(&vcpu->arch.host_fx_image);
5190 vcpu->arch.cr0 |= X86_CR0_ET;
5191 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5192 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5193 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5194 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5196 EXPORT_SYMBOL_GPL(fx_init);
5198 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5200 if (vcpu->guest_fpu_loaded)
5203 vcpu->guest_fpu_loaded = 1;
5204 kvm_fx_save(&vcpu->arch.host_fx_image);
5205 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5209 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5211 if (!vcpu->guest_fpu_loaded)
5214 vcpu->guest_fpu_loaded = 0;
5215 kvm_fx_save(&vcpu->arch.guest_fx_image);
5216 kvm_fx_restore(&vcpu->arch.host_fx_image);
5217 ++vcpu->stat.fpu_reload;
5218 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5222 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5224 if (vcpu->arch.time_page) {
5225 kvm_release_page_dirty(vcpu->arch.time_page);
5226 vcpu->arch.time_page = NULL;
5229 kvm_x86_ops->vcpu_free(vcpu);
5232 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5235 return kvm_x86_ops->vcpu_create(kvm, id);
5238 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5242 /* We do fxsave: this must be aligned. */
5243 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5245 vcpu->arch.mtrr_state.have_fixed = 1;
5247 r = kvm_arch_vcpu_reset(vcpu);
5249 r = kvm_mmu_setup(vcpu);
5256 kvm_x86_ops->vcpu_free(vcpu);
5260 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5263 kvm_mmu_unload(vcpu);
5266 kvm_x86_ops->vcpu_free(vcpu);
5269 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5271 vcpu->arch.nmi_pending = false;
5272 vcpu->arch.nmi_injected = false;
5274 vcpu->arch.switch_db_regs = 0;
5275 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5276 vcpu->arch.dr6 = DR6_FIXED_1;
5277 vcpu->arch.dr7 = DR7_FIXED_1;
5279 return kvm_x86_ops->vcpu_reset(vcpu);
5282 int kvm_arch_hardware_enable(void *garbage)
5285 * Since this may be called from a hotplug notifcation,
5286 * we can't get the CPU frequency directly.
5288 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5289 int cpu = raw_smp_processor_id();
5290 per_cpu(cpu_tsc_khz, cpu) = 0;
5293 kvm_shared_msr_cpu_online();
5295 return kvm_x86_ops->hardware_enable(garbage);
5298 void kvm_arch_hardware_disable(void *garbage)
5300 kvm_x86_ops->hardware_disable(garbage);
5301 drop_user_return_notifiers(garbage);
5304 int kvm_arch_hardware_setup(void)
5306 return kvm_x86_ops->hardware_setup();
5309 void kvm_arch_hardware_unsetup(void)
5311 kvm_x86_ops->hardware_unsetup();
5314 void kvm_arch_check_processor_compat(void *rtn)
5316 kvm_x86_ops->check_processor_compatibility(rtn);
5319 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5325 BUG_ON(vcpu->kvm == NULL);
5328 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5329 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5330 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5332 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5334 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5339 vcpu->arch.pio_data = page_address(page);
5341 r = kvm_mmu_create(vcpu);
5343 goto fail_free_pio_data;
5345 if (irqchip_in_kernel(kvm)) {
5346 r = kvm_create_lapic(vcpu);
5348 goto fail_mmu_destroy;
5351 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5353 if (!vcpu->arch.mce_banks) {
5355 goto fail_free_lapic;
5357 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5361 kvm_free_lapic(vcpu);
5363 kvm_mmu_destroy(vcpu);
5365 free_page((unsigned long)vcpu->arch.pio_data);
5370 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5374 kfree(vcpu->arch.mce_banks);
5375 kvm_free_lapic(vcpu);
5376 idx = srcu_read_lock(&vcpu->kvm->srcu);
5377 kvm_mmu_destroy(vcpu);
5378 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5379 free_page((unsigned long)vcpu->arch.pio_data);
5382 struct kvm *kvm_arch_create_vm(void)
5384 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5387 return ERR_PTR(-ENOMEM);
5389 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5390 if (!kvm->arch.aliases) {
5392 return ERR_PTR(-ENOMEM);
5395 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5396 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5398 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5399 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5401 rdtscll(kvm->arch.vm_init_tsc);
5406 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5409 kvm_mmu_unload(vcpu);
5413 static void kvm_free_vcpus(struct kvm *kvm)
5416 struct kvm_vcpu *vcpu;
5419 * Unpin any mmu pages first.
5421 kvm_for_each_vcpu(i, vcpu, kvm)
5422 kvm_unload_vcpu_mmu(vcpu);
5423 kvm_for_each_vcpu(i, vcpu, kvm)
5424 kvm_arch_vcpu_free(vcpu);
5426 mutex_lock(&kvm->lock);
5427 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5428 kvm->vcpus[i] = NULL;
5430 atomic_set(&kvm->online_vcpus, 0);
5431 mutex_unlock(&kvm->lock);
5434 void kvm_arch_sync_events(struct kvm *kvm)
5436 kvm_free_all_assigned_devices(kvm);
5439 void kvm_arch_destroy_vm(struct kvm *kvm)
5441 kvm_iommu_unmap_guest(kvm);
5443 kfree(kvm->arch.vpic);
5444 kfree(kvm->arch.vioapic);
5445 kvm_free_vcpus(kvm);
5446 kvm_free_physmem(kvm);
5447 if (kvm->arch.apic_access_page)
5448 put_page(kvm->arch.apic_access_page);
5449 if (kvm->arch.ept_identity_pagetable)
5450 put_page(kvm->arch.ept_identity_pagetable);
5451 cleanup_srcu_struct(&kvm->srcu);
5452 kfree(kvm->arch.aliases);
5456 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5457 struct kvm_memory_slot *memslot,
5458 struct kvm_memory_slot old,
5459 struct kvm_userspace_memory_region *mem,
5462 int npages = memslot->npages;
5464 /*To keep backward compatibility with older userspace,
5465 *x86 needs to hanlde !user_alloc case.
5468 if (npages && !old.rmap) {
5469 unsigned long userspace_addr;
5471 down_write(¤t->mm->mmap_sem);
5472 userspace_addr = do_mmap(NULL, 0,
5474 PROT_READ | PROT_WRITE,
5475 MAP_PRIVATE | MAP_ANONYMOUS,
5477 up_write(¤t->mm->mmap_sem);
5479 if (IS_ERR((void *)userspace_addr))
5480 return PTR_ERR((void *)userspace_addr);
5482 memslot->userspace_addr = userspace_addr;
5490 void kvm_arch_commit_memory_region(struct kvm *kvm,
5491 struct kvm_userspace_memory_region *mem,
5492 struct kvm_memory_slot old,
5496 int npages = mem->memory_size >> PAGE_SHIFT;
5498 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5501 down_write(¤t->mm->mmap_sem);
5502 ret = do_munmap(current->mm, old.userspace_addr,
5503 old.npages * PAGE_SIZE);
5504 up_write(¤t->mm->mmap_sem);
5507 "kvm_vm_ioctl_set_memory_region: "
5508 "failed to munmap memory\n");
5511 spin_lock(&kvm->mmu_lock);
5512 if (!kvm->arch.n_requested_mmu_pages) {
5513 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5514 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5517 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5518 spin_unlock(&kvm->mmu_lock);
5521 void kvm_arch_flush_shadow(struct kvm *kvm)
5523 kvm_mmu_zap_all(kvm);
5524 kvm_reload_remote_mmus(kvm);
5527 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5529 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5530 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5531 || vcpu->arch.nmi_pending ||
5532 (kvm_arch_interrupt_allowed(vcpu) &&
5533 kvm_cpu_has_interrupt(vcpu));
5536 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5539 int cpu = vcpu->cpu;
5541 if (waitqueue_active(&vcpu->wq)) {
5542 wake_up_interruptible(&vcpu->wq);
5543 ++vcpu->stat.halt_wakeup;
5547 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5548 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5549 smp_send_reschedule(cpu);
5553 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5555 return kvm_x86_ops->interrupt_allowed(vcpu);
5558 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5560 unsigned long current_rip = kvm_rip_read(vcpu) +
5561 get_segment_base(vcpu, VCPU_SREG_CS);
5563 return current_rip == linear_rip;
5565 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5567 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5569 unsigned long rflags;
5571 rflags = kvm_x86_ops->get_rflags(vcpu);
5572 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5573 rflags &= ~X86_EFLAGS_TF;
5576 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5578 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5580 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5581 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5582 rflags |= X86_EFLAGS_TF;
5583 kvm_x86_ops->set_rflags(vcpu, rflags);
5585 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5587 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5588 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5589 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5590 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5595 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);