2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
48 #define CREATE_TRACE_POINTS
51 #include <asm/debugreg.h>
58 #include <asm/pvclock.h>
59 #include <asm/div64.h>
61 #define MAX_IO_MSRS 256
62 #define CR0_RESERVED_BITS \
63 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
64 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
65 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
66 #define CR4_RESERVED_BITS \
67 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
68 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
69 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
71 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
75 #define KVM_MAX_MCE_BANKS 32
76 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
93 struct kvm_cpuid_entry2 __user *entries);
95 struct kvm_x86_ops *kvm_x86_ops;
96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
101 #define KVM_NR_SHARED_MSRS 16
103 struct kvm_shared_msrs_global {
105 u32 msrs[KVM_NR_SHARED_MSRS];
108 struct kvm_shared_msrs {
109 struct user_return_notifier urn;
111 struct kvm_shared_msr_values {
114 } values[KVM_NR_SHARED_MSRS];
117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
120 struct kvm_stats_debugfs_item debugfs_entries[] = {
121 { "pf_fixed", VCPU_STAT(pf_fixed) },
122 { "pf_guest", VCPU_STAT(pf_guest) },
123 { "tlb_flush", VCPU_STAT(tlb_flush) },
124 { "invlpg", VCPU_STAT(invlpg) },
125 { "exits", VCPU_STAT(exits) },
126 { "io_exits", VCPU_STAT(io_exits) },
127 { "mmio_exits", VCPU_STAT(mmio_exits) },
128 { "signal_exits", VCPU_STAT(signal_exits) },
129 { "irq_window", VCPU_STAT(irq_window_exits) },
130 { "nmi_window", VCPU_STAT(nmi_window_exits) },
131 { "halt_exits", VCPU_STAT(halt_exits) },
132 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
133 { "hypercalls", VCPU_STAT(hypercalls) },
134 { "request_irq", VCPU_STAT(request_irq_exits) },
135 { "irq_exits", VCPU_STAT(irq_exits) },
136 { "host_state_reload", VCPU_STAT(host_state_reload) },
137 { "efer_reload", VCPU_STAT(efer_reload) },
138 { "fpu_reload", VCPU_STAT(fpu_reload) },
139 { "insn_emulation", VCPU_STAT(insn_emulation) },
140 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
141 { "irq_injections", VCPU_STAT(irq_injections) },
142 { "nmi_injections", VCPU_STAT(nmi_injections) },
143 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
144 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
145 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
146 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
147 { "mmu_flooded", VM_STAT(mmu_flooded) },
148 { "mmu_recycled", VM_STAT(mmu_recycled) },
149 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
150 { "mmu_unsync", VM_STAT(mmu_unsync) },
151 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
152 { "largepages", VM_STAT(lpages) },
156 u64 __read_mostly host_xcr0;
158 static inline u32 bit(int bitno)
160 return 1 << (bitno & 31);
163 static void kvm_on_user_return(struct user_return_notifier *urn)
166 struct kvm_shared_msrs *locals
167 = container_of(urn, struct kvm_shared_msrs, urn);
168 struct kvm_shared_msr_values *values;
170 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
171 values = &locals->values[slot];
172 if (values->host != values->curr) {
173 wrmsrl(shared_msrs_global.msrs[slot], values->host);
174 values->curr = values->host;
177 locals->registered = false;
178 user_return_notifier_unregister(urn);
181 static void shared_msr_update(unsigned slot, u32 msr)
183 struct kvm_shared_msrs *smsr;
186 smsr = &__get_cpu_var(shared_msrs);
187 /* only read, and nobody should modify it at this time,
188 * so don't need lock */
189 if (slot >= shared_msrs_global.nr) {
190 printk(KERN_ERR "kvm: invalid MSR slot!");
193 rdmsrl_safe(msr, &value);
194 smsr->values[slot].host = value;
195 smsr->values[slot].curr = value;
198 void kvm_define_shared_msr(unsigned slot, u32 msr)
200 if (slot >= shared_msrs_global.nr)
201 shared_msrs_global.nr = slot + 1;
202 shared_msrs_global.msrs[slot] = msr;
203 /* we need ensured the shared_msr_global have been updated */
206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
208 static void kvm_shared_msr_cpu_online(void)
212 for (i = 0; i < shared_msrs_global.nr; ++i)
213 shared_msr_update(i, shared_msrs_global.msrs[i]);
216 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
218 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220 if (((value ^ smsr->values[slot].curr) & mask) == 0)
222 smsr->values[slot].curr = value;
223 wrmsrl(shared_msrs_global.msrs[slot], value);
224 if (!smsr->registered) {
225 smsr->urn.on_user_return = kvm_on_user_return;
226 user_return_notifier_register(&smsr->urn);
227 smsr->registered = true;
230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
232 static void drop_user_return_notifiers(void *ignore)
234 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
236 if (smsr->registered)
237 kvm_on_user_return(&smsr->urn);
240 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
242 if (irqchip_in_kernel(vcpu->kvm))
243 return vcpu->arch.apic_base;
245 return vcpu->arch.apic_base;
247 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
249 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
251 /* TODO: reserve bits check */
252 if (irqchip_in_kernel(vcpu->kvm))
253 kvm_lapic_set_base(vcpu, data);
255 vcpu->arch.apic_base = data;
257 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259 #define EXCPT_BENIGN 0
260 #define EXCPT_CONTRIBUTORY 1
263 static int exception_class(int vector)
273 return EXCPT_CONTRIBUTORY;
280 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
281 unsigned nr, bool has_error, u32 error_code,
287 kvm_make_request(KVM_REQ_EVENT, vcpu);
289 if (!vcpu->arch.exception.pending) {
291 vcpu->arch.exception.pending = true;
292 vcpu->arch.exception.has_error_code = has_error;
293 vcpu->arch.exception.nr = nr;
294 vcpu->arch.exception.error_code = error_code;
295 vcpu->arch.exception.reinject = reinject;
299 /* to check exception */
300 prev_nr = vcpu->arch.exception.nr;
301 if (prev_nr == DF_VECTOR) {
302 /* triple fault -> shutdown */
303 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
306 class1 = exception_class(prev_nr);
307 class2 = exception_class(nr);
308 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
309 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
310 /* generate double fault per SDM Table 5-5 */
311 vcpu->arch.exception.pending = true;
312 vcpu->arch.exception.has_error_code = true;
313 vcpu->arch.exception.nr = DF_VECTOR;
314 vcpu->arch.exception.error_code = 0;
316 /* replace previous exception with a new one in a hope
317 that instruction re-execution will regenerate lost
322 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
324 kvm_multiple_exception(vcpu, nr, false, 0, false);
326 EXPORT_SYMBOL_GPL(kvm_queue_exception);
328 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
330 kvm_multiple_exception(vcpu, nr, false, 0, true);
332 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
334 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
336 unsigned error_code = vcpu->arch.fault.error_code;
338 ++vcpu->stat.pf_guest;
339 vcpu->arch.cr2 = vcpu->arch.fault.address;
340 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
343 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
345 if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
346 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
348 vcpu->arch.mmu.inject_page_fault(vcpu);
350 vcpu->arch.fault.nested = false;
353 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
355 kvm_make_request(KVM_REQ_EVENT, vcpu);
356 vcpu->arch.nmi_pending = 1;
358 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
360 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
362 kvm_multiple_exception(vcpu, nr, true, error_code, false);
364 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
366 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
368 kvm_multiple_exception(vcpu, nr, true, error_code, true);
370 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
373 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
374 * a #GP and return false.
376 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
378 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
380 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
383 EXPORT_SYMBOL_GPL(kvm_require_cpl);
386 * This function will be used to read from the physical memory of the currently
387 * running guest. The difference to kvm_read_guest_page is that this function
388 * can read from guest physical or from the guest's guest physical memory.
390 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
391 gfn_t ngfn, void *data, int offset, int len,
397 ngpa = gfn_to_gpa(ngfn);
398 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
399 if (real_gfn == UNMAPPED_GVA)
402 real_gfn = gpa_to_gfn(real_gfn);
404 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
406 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
408 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
409 void *data, int offset, int len, u32 access)
411 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
412 data, offset, len, access);
416 * Load the pae pdptrs. Return true is they are all valid.
418 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
420 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
421 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
424 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
426 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
427 offset * sizeof(u64), sizeof(pdpte),
428 PFERR_USER_MASK|PFERR_WRITE_MASK);
433 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
434 if (is_present_gpte(pdpte[i]) &&
435 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
442 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
443 __set_bit(VCPU_EXREG_PDPTR,
444 (unsigned long *)&vcpu->arch.regs_avail);
445 __set_bit(VCPU_EXREG_PDPTR,
446 (unsigned long *)&vcpu->arch.regs_dirty);
451 EXPORT_SYMBOL_GPL(load_pdptrs);
453 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
455 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
461 if (is_long_mode(vcpu) || !is_pae(vcpu))
464 if (!test_bit(VCPU_EXREG_PDPTR,
465 (unsigned long *)&vcpu->arch.regs_avail))
468 gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
469 offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
470 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
471 PFERR_USER_MASK | PFERR_WRITE_MASK);
474 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
480 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
482 unsigned long old_cr0 = kvm_read_cr0(vcpu);
483 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
484 X86_CR0_CD | X86_CR0_NW;
489 if (cr0 & 0xffffffff00000000UL)
493 cr0 &= ~CR0_RESERVED_BITS;
495 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
498 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
501 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
503 if ((vcpu->arch.efer & EFER_LME)) {
508 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
513 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
518 kvm_x86_ops->set_cr0(vcpu, cr0);
520 if ((cr0 ^ old_cr0) & update_bits)
521 kvm_mmu_reset_context(vcpu);
524 EXPORT_SYMBOL_GPL(kvm_set_cr0);
526 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
528 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
530 EXPORT_SYMBOL_GPL(kvm_lmsw);
532 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
536 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
537 if (index != XCR_XFEATURE_ENABLED_MASK)
540 if (kvm_x86_ops->get_cpl(vcpu) != 0)
542 if (!(xcr0 & XSTATE_FP))
544 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
546 if (xcr0 & ~host_xcr0)
548 vcpu->arch.xcr0 = xcr0;
549 vcpu->guest_xcr0_loaded = 0;
553 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
555 if (__kvm_set_xcr(vcpu, index, xcr)) {
556 kvm_inject_gp(vcpu, 0);
561 EXPORT_SYMBOL_GPL(kvm_set_xcr);
563 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
565 struct kvm_cpuid_entry2 *best;
567 best = kvm_find_cpuid_entry(vcpu, 1, 0);
568 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
571 static void update_cpuid(struct kvm_vcpu *vcpu)
573 struct kvm_cpuid_entry2 *best;
575 best = kvm_find_cpuid_entry(vcpu, 1, 0);
579 /* Update OSXSAVE bit */
580 if (cpu_has_xsave && best->function == 0x1) {
581 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
582 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
583 best->ecx |= bit(X86_FEATURE_OSXSAVE);
587 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
589 unsigned long old_cr4 = kvm_read_cr4(vcpu);
590 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
592 if (cr4 & CR4_RESERVED_BITS)
595 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
598 if (is_long_mode(vcpu)) {
599 if (!(cr4 & X86_CR4_PAE))
601 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
602 && ((cr4 ^ old_cr4) & pdptr_bits)
603 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
606 if (cr4 & X86_CR4_VMXE)
609 kvm_x86_ops->set_cr4(vcpu, cr4);
611 if ((cr4 ^ old_cr4) & pdptr_bits)
612 kvm_mmu_reset_context(vcpu);
614 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
619 EXPORT_SYMBOL_GPL(kvm_set_cr4);
621 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
623 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
624 kvm_mmu_sync_roots(vcpu);
625 kvm_mmu_flush_tlb(vcpu);
629 if (is_long_mode(vcpu)) {
630 if (cr3 & CR3_L_MODE_RESERVED_BITS)
634 if (cr3 & CR3_PAE_RESERVED_BITS)
636 if (is_paging(vcpu) &&
637 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
641 * We don't check reserved bits in nonpae mode, because
642 * this isn't enforced, and VMware depends on this.
647 * Does the new cr3 value map to physical memory? (Note, we
648 * catch an invalid cr3 even in real-mode, because it would
649 * cause trouble later on when we turn on paging anyway.)
651 * A real CPU would silently accept an invalid cr3 and would
652 * attempt to use it - with largely undefined (and often hard
653 * to debug) behavior on the guest side.
655 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
657 vcpu->arch.cr3 = cr3;
658 vcpu->arch.mmu.new_cr3(vcpu);
661 EXPORT_SYMBOL_GPL(kvm_set_cr3);
663 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
665 if (cr8 & CR8_RESERVED_BITS)
667 if (irqchip_in_kernel(vcpu->kvm))
668 kvm_lapic_set_tpr(vcpu, cr8);
670 vcpu->arch.cr8 = cr8;
674 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
676 if (__kvm_set_cr8(vcpu, cr8))
677 kvm_inject_gp(vcpu, 0);
679 EXPORT_SYMBOL_GPL(kvm_set_cr8);
681 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
683 if (irqchip_in_kernel(vcpu->kvm))
684 return kvm_lapic_get_cr8(vcpu);
686 return vcpu->arch.cr8;
688 EXPORT_SYMBOL_GPL(kvm_get_cr8);
690 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
694 vcpu->arch.db[dr] = val;
695 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
696 vcpu->arch.eff_db[dr] = val;
699 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
703 if (val & 0xffffffff00000000ULL)
705 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
708 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
712 if (val & 0xffffffff00000000ULL)
714 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
715 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
716 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
717 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
725 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
729 res = __kvm_set_dr(vcpu, dr, val);
731 kvm_queue_exception(vcpu, UD_VECTOR);
733 kvm_inject_gp(vcpu, 0);
737 EXPORT_SYMBOL_GPL(kvm_set_dr);
739 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
743 *val = vcpu->arch.db[dr];
746 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
750 *val = vcpu->arch.dr6;
753 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
757 *val = vcpu->arch.dr7;
764 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
766 if (_kvm_get_dr(vcpu, dr, val)) {
767 kvm_queue_exception(vcpu, UD_VECTOR);
772 EXPORT_SYMBOL_GPL(kvm_get_dr);
775 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
776 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
778 * This list is modified at module load time to reflect the
779 * capabilities of the host cpu. This capabilities test skips MSRs that are
780 * kvm-specific. Those are put in the beginning of the list.
783 #define KVM_SAVE_MSRS_BEGIN 7
784 static u32 msrs_to_save[] = {
785 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
786 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
787 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
788 HV_X64_MSR_APIC_ASSIST_PAGE,
789 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
792 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
794 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
797 static unsigned num_msrs_to_save;
799 static u32 emulated_msrs[] = {
800 MSR_IA32_MISC_ENABLE,
805 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
807 u64 old_efer = vcpu->arch.efer;
809 if (efer & efer_reserved_bits)
813 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
816 if (efer & EFER_FFXSR) {
817 struct kvm_cpuid_entry2 *feat;
819 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
820 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
824 if (efer & EFER_SVME) {
825 struct kvm_cpuid_entry2 *feat;
827 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
828 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
833 efer |= vcpu->arch.efer & EFER_LMA;
835 kvm_x86_ops->set_efer(vcpu, efer);
837 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
838 kvm_mmu_reset_context(vcpu);
840 /* Update reserved bits */
841 if ((efer ^ old_efer) & EFER_NX)
842 kvm_mmu_reset_context(vcpu);
847 void kvm_enable_efer_bits(u64 mask)
849 efer_reserved_bits &= ~mask;
851 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
855 * Writes msr value into into the appropriate "register".
856 * Returns 0 on success, non-0 otherwise.
857 * Assumes vcpu_load() was already called.
859 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
861 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
865 * Adapt set_msr() to msr_io()'s calling convention
867 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
869 return kvm_set_msr(vcpu, index, *data);
872 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
876 struct pvclock_wall_clock wc;
877 struct timespec boot;
882 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
887 ++version; /* first time write, random junk */
891 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
894 * The guest calculates current wall clock time by adding
895 * system time (updated by kvm_guest_time_update below) to the
896 * wall clock specified here. guest system time equals host
897 * system time for us, thus we must fill in host boot time here.
901 wc.sec = boot.tv_sec;
902 wc.nsec = boot.tv_nsec;
903 wc.version = version;
905 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
908 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
911 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
913 uint32_t quotient, remainder;
915 /* Don't try to replace with do_div(), this one calculates
916 * "(dividend << 32) / divisor" */
918 : "=a" (quotient), "=d" (remainder)
919 : "0" (0), "1" (dividend), "r" (divisor) );
923 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
924 s8 *pshift, u32 *pmultiplier)
931 tps64 = base_khz * 1000LL;
932 scaled64 = scaled_khz * 1000LL;
933 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000UL) {
938 tps32 = (uint32_t)tps64;
939 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000UL) {
940 if (scaled64 & 0xffffffff00000000UL || tps32 & 0x80000000)
948 *pmultiplier = div_frac(scaled64, tps32);
950 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
951 __func__, base_khz, scaled_khz, shift, *pmultiplier);
954 static inline u64 get_kernel_ns(void)
958 WARN_ON(preemptible());
960 monotonic_to_bootbased(&ts);
961 return timespec_to_ns(&ts);
964 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
966 static inline int kvm_tsc_changes_freq(void)
969 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
970 cpufreq_quick_get(cpu) != 0;
975 static inline u64 nsec_to_cycles(u64 nsec)
979 WARN_ON(preemptible());
980 if (kvm_tsc_changes_freq())
981 printk_once(KERN_WARNING
982 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
983 ret = nsec * __get_cpu_var(cpu_tsc_khz);
984 do_div(ret, USEC_PER_SEC);
988 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
990 struct kvm *kvm = vcpu->kvm;
991 u64 offset, ns, elapsed;
995 spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
996 offset = data - native_read_tsc();
997 ns = get_kernel_ns();
998 elapsed = ns - kvm->arch.last_tsc_nsec;
999 sdiff = data - kvm->arch.last_tsc_write;
1004 * Special case: close write to TSC within 5 seconds of
1005 * another CPU is interpreted as an attempt to synchronize
1006 * The 5 seconds is to accomodate host load / swapping as
1007 * well as any reset of TSC during the boot process.
1009 * In that case, for a reliable TSC, we can match TSC offsets,
1010 * or make a best guest using elapsed value.
1012 if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1013 elapsed < 5ULL * NSEC_PER_SEC) {
1014 if (!check_tsc_unstable()) {
1015 offset = kvm->arch.last_tsc_offset;
1016 pr_debug("kvm: matched tsc offset for %llu\n", data);
1018 u64 delta = nsec_to_cycles(elapsed);
1020 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1022 ns = kvm->arch.last_tsc_nsec;
1024 kvm->arch.last_tsc_nsec = ns;
1025 kvm->arch.last_tsc_write = data;
1026 kvm->arch.last_tsc_offset = offset;
1027 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1028 spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1030 /* Reset of TSC must disable overshoot protection below */
1031 vcpu->arch.hv_clock.tsc_timestamp = 0;
1033 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1035 static int kvm_guest_time_update(struct kvm_vcpu *v)
1037 unsigned long flags;
1038 struct kvm_vcpu_arch *vcpu = &v->arch;
1040 unsigned long this_tsc_khz;
1041 s64 kernel_ns, max_kernel_ns;
1044 if ((!vcpu->time_page))
1047 /* Keep irq disabled to prevent changes to the clock */
1048 local_irq_save(flags);
1049 kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1050 kernel_ns = get_kernel_ns();
1051 this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1052 local_irq_restore(flags);
1054 if (unlikely(this_tsc_khz == 0)) {
1055 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1060 * Time as measured by the TSC may go backwards when resetting the base
1061 * tsc_timestamp. The reason for this is that the TSC resolution is
1062 * higher than the resolution of the other clock scales. Thus, many
1063 * possible measurments of the TSC correspond to one measurement of any
1064 * other clock, and so a spread of values is possible. This is not a
1065 * problem for the computation of the nanosecond clock; with TSC rates
1066 * around 1GHZ, there can only be a few cycles which correspond to one
1067 * nanosecond value, and any path through this code will inevitably
1068 * take longer than that. However, with the kernel_ns value itself,
1069 * the precision may be much lower, down to HZ granularity. If the
1070 * first sampling of TSC against kernel_ns ends in the low part of the
1071 * range, and the second in the high end of the range, we can get:
1073 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1075 * As the sampling errors potentially range in the thousands of cycles,
1076 * it is possible such a time value has already been observed by the
1077 * guest. To protect against this, we must compute the system time as
1078 * observed by the guest and ensure the new system time is greater.
1081 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1082 max_kernel_ns = vcpu->last_guest_tsc -
1083 vcpu->hv_clock.tsc_timestamp;
1084 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1085 vcpu->hv_clock.tsc_to_system_mul,
1086 vcpu->hv_clock.tsc_shift);
1087 max_kernel_ns += vcpu->last_kernel_ns;
1090 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1091 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1092 &vcpu->hv_clock.tsc_shift,
1093 &vcpu->hv_clock.tsc_to_system_mul);
1094 vcpu->hw_tsc_khz = this_tsc_khz;
1097 if (max_kernel_ns > kernel_ns)
1098 kernel_ns = max_kernel_ns;
1100 /* With all the info we got, fill in the values */
1101 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1102 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1103 vcpu->last_kernel_ns = kernel_ns;
1104 vcpu->last_guest_tsc = tsc_timestamp;
1105 vcpu->hv_clock.flags = 0;
1108 * The interface expects us to write an even number signaling that the
1109 * update is finished. Since the guest won't see the intermediate
1110 * state, we just increase by 2 at the end.
1112 vcpu->hv_clock.version += 2;
1114 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1116 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1117 sizeof(vcpu->hv_clock));
1119 kunmap_atomic(shared_kaddr, KM_USER0);
1121 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1125 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
1127 struct kvm_vcpu_arch *vcpu = &v->arch;
1129 if (!vcpu->time_page)
1131 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1135 static bool msr_mtrr_valid(unsigned msr)
1138 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1139 case MSR_MTRRfix64K_00000:
1140 case MSR_MTRRfix16K_80000:
1141 case MSR_MTRRfix16K_A0000:
1142 case MSR_MTRRfix4K_C0000:
1143 case MSR_MTRRfix4K_C8000:
1144 case MSR_MTRRfix4K_D0000:
1145 case MSR_MTRRfix4K_D8000:
1146 case MSR_MTRRfix4K_E0000:
1147 case MSR_MTRRfix4K_E8000:
1148 case MSR_MTRRfix4K_F0000:
1149 case MSR_MTRRfix4K_F8000:
1150 case MSR_MTRRdefType:
1151 case MSR_IA32_CR_PAT:
1159 static bool valid_pat_type(unsigned t)
1161 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1164 static bool valid_mtrr_type(unsigned t)
1166 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1169 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1173 if (!msr_mtrr_valid(msr))
1176 if (msr == MSR_IA32_CR_PAT) {
1177 for (i = 0; i < 8; i++)
1178 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1181 } else if (msr == MSR_MTRRdefType) {
1184 return valid_mtrr_type(data & 0xff);
1185 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1186 for (i = 0; i < 8 ; i++)
1187 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1192 /* variable MTRRs */
1193 return valid_mtrr_type(data & 0xff);
1196 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1198 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1200 if (!mtrr_valid(vcpu, msr, data))
1203 if (msr == MSR_MTRRdefType) {
1204 vcpu->arch.mtrr_state.def_type = data;
1205 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1206 } else if (msr == MSR_MTRRfix64K_00000)
1208 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1209 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1210 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1211 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1212 else if (msr == MSR_IA32_CR_PAT)
1213 vcpu->arch.pat = data;
1214 else { /* Variable MTRRs */
1215 int idx, is_mtrr_mask;
1218 idx = (msr - 0x200) / 2;
1219 is_mtrr_mask = msr - 0x200 - 2 * idx;
1222 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1225 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1229 kvm_mmu_reset_context(vcpu);
1233 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1235 u64 mcg_cap = vcpu->arch.mcg_cap;
1236 unsigned bank_num = mcg_cap & 0xff;
1239 case MSR_IA32_MCG_STATUS:
1240 vcpu->arch.mcg_status = data;
1242 case MSR_IA32_MCG_CTL:
1243 if (!(mcg_cap & MCG_CTL_P))
1245 if (data != 0 && data != ~(u64)0)
1247 vcpu->arch.mcg_ctl = data;
1250 if (msr >= MSR_IA32_MC0_CTL &&
1251 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1252 u32 offset = msr - MSR_IA32_MC0_CTL;
1253 /* only 0 or all 1s can be written to IA32_MCi_CTL
1254 * some Linux kernels though clear bit 10 in bank 4 to
1255 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1256 * this to avoid an uncatched #GP in the guest
1258 if ((offset & 0x3) == 0 &&
1259 data != 0 && (data | (1 << 10)) != ~(u64)0)
1261 vcpu->arch.mce_banks[offset] = data;
1269 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1271 struct kvm *kvm = vcpu->kvm;
1272 int lm = is_long_mode(vcpu);
1273 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1274 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1275 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1276 : kvm->arch.xen_hvm_config.blob_size_32;
1277 u32 page_num = data & ~PAGE_MASK;
1278 u64 page_addr = data & PAGE_MASK;
1283 if (page_num >= blob_size)
1286 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1290 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1292 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1301 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1303 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1306 static bool kvm_hv_msr_partition_wide(u32 msr)
1310 case HV_X64_MSR_GUEST_OS_ID:
1311 case HV_X64_MSR_HYPERCALL:
1319 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1321 struct kvm *kvm = vcpu->kvm;
1324 case HV_X64_MSR_GUEST_OS_ID:
1325 kvm->arch.hv_guest_os_id = data;
1326 /* setting guest os id to zero disables hypercall page */
1327 if (!kvm->arch.hv_guest_os_id)
1328 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1330 case HV_X64_MSR_HYPERCALL: {
1335 /* if guest os id is not set hypercall should remain disabled */
1336 if (!kvm->arch.hv_guest_os_id)
1338 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1339 kvm->arch.hv_hypercall = data;
1342 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1343 addr = gfn_to_hva(kvm, gfn);
1344 if (kvm_is_error_hva(addr))
1346 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1347 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1348 if (copy_to_user((void __user *)addr, instructions, 4))
1350 kvm->arch.hv_hypercall = data;
1354 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1355 "data 0x%llx\n", msr, data);
1361 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1364 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1367 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1368 vcpu->arch.hv_vapic = data;
1371 addr = gfn_to_hva(vcpu->kvm, data >>
1372 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1373 if (kvm_is_error_hva(addr))
1375 if (clear_user((void __user *)addr, PAGE_SIZE))
1377 vcpu->arch.hv_vapic = data;
1380 case HV_X64_MSR_EOI:
1381 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1382 case HV_X64_MSR_ICR:
1383 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1384 case HV_X64_MSR_TPR:
1385 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1387 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1388 "data 0x%llx\n", msr, data);
1395 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1399 return set_efer(vcpu, data);
1401 data &= ~(u64)0x40; /* ignore flush filter disable */
1402 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1404 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1409 case MSR_FAM10H_MMIO_CONF_BASE:
1411 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1416 case MSR_AMD64_NB_CFG:
1418 case MSR_IA32_DEBUGCTLMSR:
1420 /* We support the non-activated case already */
1422 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1423 /* Values other than LBR and BTF are vendor-specific,
1424 thus reserved and should throw a #GP */
1427 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1430 case MSR_IA32_UCODE_REV:
1431 case MSR_IA32_UCODE_WRITE:
1432 case MSR_VM_HSAVE_PA:
1433 case MSR_AMD64_PATCH_LOADER:
1435 case 0x200 ... 0x2ff:
1436 return set_msr_mtrr(vcpu, msr, data);
1437 case MSR_IA32_APICBASE:
1438 kvm_set_apic_base(vcpu, data);
1440 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1441 return kvm_x2apic_msr_write(vcpu, msr, data);
1442 case MSR_IA32_MISC_ENABLE:
1443 vcpu->arch.ia32_misc_enable_msr = data;
1445 case MSR_KVM_WALL_CLOCK_NEW:
1446 case MSR_KVM_WALL_CLOCK:
1447 vcpu->kvm->arch.wall_clock = data;
1448 kvm_write_wall_clock(vcpu->kvm, data);
1450 case MSR_KVM_SYSTEM_TIME_NEW:
1451 case MSR_KVM_SYSTEM_TIME: {
1452 if (vcpu->arch.time_page) {
1453 kvm_release_page_dirty(vcpu->arch.time_page);
1454 vcpu->arch.time_page = NULL;
1457 vcpu->arch.time = data;
1459 /* we verify if the enable bit is set... */
1463 /* ...but clean it before doing the actual write */
1464 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1466 vcpu->arch.time_page =
1467 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1469 if (is_error_page(vcpu->arch.time_page)) {
1470 kvm_release_page_clean(vcpu->arch.time_page);
1471 vcpu->arch.time_page = NULL;
1474 kvm_request_guest_time_update(vcpu);
1477 case MSR_IA32_MCG_CTL:
1478 case MSR_IA32_MCG_STATUS:
1479 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1480 return set_msr_mce(vcpu, msr, data);
1482 /* Performance counters are not protected by a CPUID bit,
1483 * so we should check all of them in the generic path for the sake of
1484 * cross vendor migration.
1485 * Writing a zero into the event select MSRs disables them,
1486 * which we perfectly emulate ;-). Any other value should be at least
1487 * reported, some guests depend on them.
1489 case MSR_P6_EVNTSEL0:
1490 case MSR_P6_EVNTSEL1:
1491 case MSR_K7_EVNTSEL0:
1492 case MSR_K7_EVNTSEL1:
1493 case MSR_K7_EVNTSEL2:
1494 case MSR_K7_EVNTSEL3:
1496 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1497 "0x%x data 0x%llx\n", msr, data);
1499 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1500 * so we ignore writes to make it happy.
1502 case MSR_P6_PERFCTR0:
1503 case MSR_P6_PERFCTR1:
1504 case MSR_K7_PERFCTR0:
1505 case MSR_K7_PERFCTR1:
1506 case MSR_K7_PERFCTR2:
1507 case MSR_K7_PERFCTR3:
1508 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1509 "0x%x data 0x%llx\n", msr, data);
1511 case MSR_K7_CLK_CTL:
1513 * Ignore all writes to this no longer documented MSR.
1514 * Writes are only relevant for old K7 processors,
1515 * all pre-dating SVM, but a recommended workaround from
1516 * AMD for these chips. It is possible to speicify the
1517 * affected processor models on the command line, hence
1518 * the need to ignore the workaround.
1521 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1522 if (kvm_hv_msr_partition_wide(msr)) {
1524 mutex_lock(&vcpu->kvm->lock);
1525 r = set_msr_hyperv_pw(vcpu, msr, data);
1526 mutex_unlock(&vcpu->kvm->lock);
1529 return set_msr_hyperv(vcpu, msr, data);
1532 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1533 return xen_hvm_config(vcpu, data);
1535 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1539 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1546 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1550 * Reads an msr value (of 'msr_index') into 'pdata'.
1551 * Returns 0 on success, non-0 otherwise.
1552 * Assumes vcpu_load() was already called.
1554 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1556 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1559 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1561 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1563 if (!msr_mtrr_valid(msr))
1566 if (msr == MSR_MTRRdefType)
1567 *pdata = vcpu->arch.mtrr_state.def_type +
1568 (vcpu->arch.mtrr_state.enabled << 10);
1569 else if (msr == MSR_MTRRfix64K_00000)
1571 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1572 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1573 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1574 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1575 else if (msr == MSR_IA32_CR_PAT)
1576 *pdata = vcpu->arch.pat;
1577 else { /* Variable MTRRs */
1578 int idx, is_mtrr_mask;
1581 idx = (msr - 0x200) / 2;
1582 is_mtrr_mask = msr - 0x200 - 2 * idx;
1585 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1588 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1595 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1598 u64 mcg_cap = vcpu->arch.mcg_cap;
1599 unsigned bank_num = mcg_cap & 0xff;
1602 case MSR_IA32_P5_MC_ADDR:
1603 case MSR_IA32_P5_MC_TYPE:
1606 case MSR_IA32_MCG_CAP:
1607 data = vcpu->arch.mcg_cap;
1609 case MSR_IA32_MCG_CTL:
1610 if (!(mcg_cap & MCG_CTL_P))
1612 data = vcpu->arch.mcg_ctl;
1614 case MSR_IA32_MCG_STATUS:
1615 data = vcpu->arch.mcg_status;
1618 if (msr >= MSR_IA32_MC0_CTL &&
1619 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1620 u32 offset = msr - MSR_IA32_MC0_CTL;
1621 data = vcpu->arch.mce_banks[offset];
1630 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1633 struct kvm *kvm = vcpu->kvm;
1636 case HV_X64_MSR_GUEST_OS_ID:
1637 data = kvm->arch.hv_guest_os_id;
1639 case HV_X64_MSR_HYPERCALL:
1640 data = kvm->arch.hv_hypercall;
1643 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1651 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1656 case HV_X64_MSR_VP_INDEX: {
1659 kvm_for_each_vcpu(r, v, vcpu->kvm)
1664 case HV_X64_MSR_EOI:
1665 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1666 case HV_X64_MSR_ICR:
1667 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1668 case HV_X64_MSR_TPR:
1669 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1671 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1678 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1683 case MSR_IA32_PLATFORM_ID:
1684 case MSR_IA32_UCODE_REV:
1685 case MSR_IA32_EBL_CR_POWERON:
1686 case MSR_IA32_DEBUGCTLMSR:
1687 case MSR_IA32_LASTBRANCHFROMIP:
1688 case MSR_IA32_LASTBRANCHTOIP:
1689 case MSR_IA32_LASTINTFROMIP:
1690 case MSR_IA32_LASTINTTOIP:
1693 case MSR_VM_HSAVE_PA:
1694 case MSR_P6_PERFCTR0:
1695 case MSR_P6_PERFCTR1:
1696 case MSR_P6_EVNTSEL0:
1697 case MSR_P6_EVNTSEL1:
1698 case MSR_K7_EVNTSEL0:
1699 case MSR_K7_PERFCTR0:
1700 case MSR_K8_INT_PENDING_MSG:
1701 case MSR_AMD64_NB_CFG:
1702 case MSR_FAM10H_MMIO_CONF_BASE:
1706 data = 0x500 | KVM_NR_VAR_MTRR;
1708 case 0x200 ... 0x2ff:
1709 return get_msr_mtrr(vcpu, msr, pdata);
1710 case 0xcd: /* fsb frequency */
1714 * MSR_EBC_FREQUENCY_ID
1715 * Conservative value valid for even the basic CPU models.
1716 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1717 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1718 * and 266MHz for model 3, or 4. Set Core Clock
1719 * Frequency to System Bus Frequency Ratio to 1 (bits
1720 * 31:24) even though these are only valid for CPU
1721 * models > 2, however guests may end up dividing or
1722 * multiplying by zero otherwise.
1724 case MSR_EBC_FREQUENCY_ID:
1727 case MSR_IA32_APICBASE:
1728 data = kvm_get_apic_base(vcpu);
1730 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1731 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1733 case MSR_IA32_MISC_ENABLE:
1734 data = vcpu->arch.ia32_misc_enable_msr;
1736 case MSR_IA32_PERF_STATUS:
1737 /* TSC increment by tick */
1739 /* CPU multiplier */
1740 data |= (((uint64_t)4ULL) << 40);
1743 data = vcpu->arch.efer;
1745 case MSR_KVM_WALL_CLOCK:
1746 case MSR_KVM_WALL_CLOCK_NEW:
1747 data = vcpu->kvm->arch.wall_clock;
1749 case MSR_KVM_SYSTEM_TIME:
1750 case MSR_KVM_SYSTEM_TIME_NEW:
1751 data = vcpu->arch.time;
1753 case MSR_IA32_P5_MC_ADDR:
1754 case MSR_IA32_P5_MC_TYPE:
1755 case MSR_IA32_MCG_CAP:
1756 case MSR_IA32_MCG_CTL:
1757 case MSR_IA32_MCG_STATUS:
1758 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1759 return get_msr_mce(vcpu, msr, pdata);
1760 case MSR_K7_CLK_CTL:
1762 * Provide expected ramp-up count for K7. All other
1763 * are set to zero, indicating minimum divisors for
1766 * This prevents guest kernels on AMD host with CPU
1767 * type 6, model 8 and higher from exploding due to
1768 * the rdmsr failing.
1772 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1773 if (kvm_hv_msr_partition_wide(msr)) {
1775 mutex_lock(&vcpu->kvm->lock);
1776 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1777 mutex_unlock(&vcpu->kvm->lock);
1780 return get_msr_hyperv(vcpu, msr, pdata);
1784 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1787 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1795 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1798 * Read or write a bunch of msrs. All parameters are kernel addresses.
1800 * @return number of msrs set successfully.
1802 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1803 struct kvm_msr_entry *entries,
1804 int (*do_msr)(struct kvm_vcpu *vcpu,
1805 unsigned index, u64 *data))
1809 idx = srcu_read_lock(&vcpu->kvm->srcu);
1810 for (i = 0; i < msrs->nmsrs; ++i)
1811 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1813 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1819 * Read or write a bunch of msrs. Parameters are user addresses.
1821 * @return number of msrs set successfully.
1823 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1824 int (*do_msr)(struct kvm_vcpu *vcpu,
1825 unsigned index, u64 *data),
1828 struct kvm_msrs msrs;
1829 struct kvm_msr_entry *entries;
1834 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1838 if (msrs.nmsrs >= MAX_IO_MSRS)
1842 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1843 entries = kmalloc(size, GFP_KERNEL);
1848 if (copy_from_user(entries, user_msrs->entries, size))
1851 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1856 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1867 int kvm_dev_ioctl_check_extension(long ext)
1872 case KVM_CAP_IRQCHIP:
1874 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1875 case KVM_CAP_SET_TSS_ADDR:
1876 case KVM_CAP_EXT_CPUID:
1877 case KVM_CAP_CLOCKSOURCE:
1879 case KVM_CAP_NOP_IO_DELAY:
1880 case KVM_CAP_MP_STATE:
1881 case KVM_CAP_SYNC_MMU:
1882 case KVM_CAP_REINJECT_CONTROL:
1883 case KVM_CAP_IRQ_INJECT_STATUS:
1884 case KVM_CAP_ASSIGN_DEV_IRQ:
1886 case KVM_CAP_IOEVENTFD:
1888 case KVM_CAP_PIT_STATE2:
1889 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1890 case KVM_CAP_XEN_HVM:
1891 case KVM_CAP_ADJUST_CLOCK:
1892 case KVM_CAP_VCPU_EVENTS:
1893 case KVM_CAP_HYPERV:
1894 case KVM_CAP_HYPERV_VAPIC:
1895 case KVM_CAP_HYPERV_SPIN:
1896 case KVM_CAP_PCI_SEGMENT:
1897 case KVM_CAP_DEBUGREGS:
1898 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1902 case KVM_CAP_COALESCED_MMIO:
1903 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1906 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1908 case KVM_CAP_NR_VCPUS:
1911 case KVM_CAP_NR_MEMSLOTS:
1912 r = KVM_MEMORY_SLOTS;
1914 case KVM_CAP_PV_MMU: /* obsolete */
1921 r = KVM_MAX_MCE_BANKS;
1934 long kvm_arch_dev_ioctl(struct file *filp,
1935 unsigned int ioctl, unsigned long arg)
1937 void __user *argp = (void __user *)arg;
1941 case KVM_GET_MSR_INDEX_LIST: {
1942 struct kvm_msr_list __user *user_msr_list = argp;
1943 struct kvm_msr_list msr_list;
1947 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1950 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1951 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1954 if (n < msr_list.nmsrs)
1957 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1958 num_msrs_to_save * sizeof(u32)))
1960 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1962 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1967 case KVM_GET_SUPPORTED_CPUID: {
1968 struct kvm_cpuid2 __user *cpuid_arg = argp;
1969 struct kvm_cpuid2 cpuid;
1972 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1974 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1975 cpuid_arg->entries);
1980 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1985 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1988 mce_cap = KVM_MCE_CAP_SUPPORTED;
1990 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2002 static void wbinvd_ipi(void *garbage)
2007 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2009 return vcpu->kvm->arch.iommu_domain &&
2010 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2013 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2015 /* Address WBINVD may be executed by guest */
2016 if (need_emulate_wbinvd(vcpu)) {
2017 if (kvm_x86_ops->has_wbinvd_exit())
2018 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2019 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2020 smp_call_function_single(vcpu->cpu,
2021 wbinvd_ipi, NULL, 1);
2024 kvm_x86_ops->vcpu_load(vcpu, cpu);
2025 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2026 /* Make sure TSC doesn't go backwards */
2027 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2028 native_read_tsc() - vcpu->arch.last_host_tsc;
2030 mark_tsc_unstable("KVM discovered backwards TSC");
2031 if (check_tsc_unstable())
2032 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2033 kvm_migrate_timers(vcpu);
2038 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2040 kvm_x86_ops->vcpu_put(vcpu);
2041 kvm_put_guest_fpu(vcpu);
2042 vcpu->arch.last_host_tsc = native_read_tsc();
2045 static int is_efer_nx(void)
2047 unsigned long long efer = 0;
2049 rdmsrl_safe(MSR_EFER, &efer);
2050 return efer & EFER_NX;
2053 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2056 struct kvm_cpuid_entry2 *e, *entry;
2059 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2060 e = &vcpu->arch.cpuid_entries[i];
2061 if (e->function == 0x80000001) {
2066 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2067 entry->edx &= ~(1 << 20);
2068 printk(KERN_INFO "kvm: guest NX capability removed\n");
2072 /* when an old userspace process fills a new kernel module */
2073 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2074 struct kvm_cpuid *cpuid,
2075 struct kvm_cpuid_entry __user *entries)
2078 struct kvm_cpuid_entry *cpuid_entries;
2081 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2084 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2088 if (copy_from_user(cpuid_entries, entries,
2089 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2091 for (i = 0; i < cpuid->nent; i++) {
2092 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2093 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2094 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2095 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2096 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2097 vcpu->arch.cpuid_entries[i].index = 0;
2098 vcpu->arch.cpuid_entries[i].flags = 0;
2099 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2100 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2101 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2103 vcpu->arch.cpuid_nent = cpuid->nent;
2104 cpuid_fix_nx_cap(vcpu);
2106 kvm_apic_set_version(vcpu);
2107 kvm_x86_ops->cpuid_update(vcpu);
2111 vfree(cpuid_entries);
2116 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2117 struct kvm_cpuid2 *cpuid,
2118 struct kvm_cpuid_entry2 __user *entries)
2123 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2126 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2127 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2129 vcpu->arch.cpuid_nent = cpuid->nent;
2130 kvm_apic_set_version(vcpu);
2131 kvm_x86_ops->cpuid_update(vcpu);
2139 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2140 struct kvm_cpuid2 *cpuid,
2141 struct kvm_cpuid_entry2 __user *entries)
2146 if (cpuid->nent < vcpu->arch.cpuid_nent)
2149 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2150 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2155 cpuid->nent = vcpu->arch.cpuid_nent;
2159 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2162 entry->function = function;
2163 entry->index = index;
2164 cpuid_count(entry->function, entry->index,
2165 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2169 #define F(x) bit(X86_FEATURE_##x)
2171 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2172 u32 index, int *nent, int maxnent)
2174 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2175 #ifdef CONFIG_X86_64
2176 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2178 unsigned f_lm = F(LM);
2180 unsigned f_gbpages = 0;
2183 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2186 const u32 kvm_supported_word0_x86_features =
2187 F(FPU) | F(VME) | F(DE) | F(PSE) |
2188 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2189 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2190 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2191 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2192 0 /* Reserved, DS, ACPI */ | F(MMX) |
2193 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2194 0 /* HTT, TM, Reserved, PBE */;
2195 /* cpuid 0x80000001.edx */
2196 const u32 kvm_supported_word1_x86_features =
2197 F(FPU) | F(VME) | F(DE) | F(PSE) |
2198 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2199 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2200 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2201 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2202 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2203 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2204 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2206 const u32 kvm_supported_word4_x86_features =
2207 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2208 0 /* DS-CPL, VMX, SMX, EST */ |
2209 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2210 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2211 0 /* Reserved, DCA */ | F(XMM4_1) |
2212 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2213 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2214 /* cpuid 0x80000001.ecx */
2215 const u32 kvm_supported_word6_x86_features =
2216 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2217 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2218 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2219 0 /* SKINIT */ | 0 /* WDT */;
2221 /* all calls to cpuid_count() should be made on the same cpu */
2223 do_cpuid_1_ent(entry, function, index);
2228 entry->eax = min(entry->eax, (u32)0xd);
2231 entry->edx &= kvm_supported_word0_x86_features;
2232 entry->ecx &= kvm_supported_word4_x86_features;
2233 /* we support x2apic emulation even if host does not support
2234 * it since we emulate x2apic in software */
2235 entry->ecx |= F(X2APIC);
2237 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2238 * may return different values. This forces us to get_cpu() before
2239 * issuing the first command, and also to emulate this annoying behavior
2240 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2242 int t, times = entry->eax & 0xff;
2244 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2245 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2246 for (t = 1; t < times && *nent < maxnent; ++t) {
2247 do_cpuid_1_ent(&entry[t], function, 0);
2248 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2253 /* function 4 and 0xb have additional index. */
2257 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2258 /* read more entries until cache_type is zero */
2259 for (i = 1; *nent < maxnent; ++i) {
2260 cache_type = entry[i - 1].eax & 0x1f;
2263 do_cpuid_1_ent(&entry[i], function, i);
2265 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2273 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2274 /* read more entries until level_type is zero */
2275 for (i = 1; *nent < maxnent; ++i) {
2276 level_type = entry[i - 1].ecx & 0xff00;
2279 do_cpuid_1_ent(&entry[i], function, i);
2281 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2289 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2290 for (i = 1; *nent < maxnent; ++i) {
2291 if (entry[i - 1].eax == 0 && i != 2)
2293 do_cpuid_1_ent(&entry[i], function, i);
2295 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2300 case KVM_CPUID_SIGNATURE: {
2301 char signature[12] = "KVMKVMKVM\0\0";
2302 u32 *sigptr = (u32 *)signature;
2304 entry->ebx = sigptr[0];
2305 entry->ecx = sigptr[1];
2306 entry->edx = sigptr[2];
2309 case KVM_CPUID_FEATURES:
2310 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2311 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2312 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2313 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2319 entry->eax = min(entry->eax, 0x8000001a);
2322 entry->edx &= kvm_supported_word1_x86_features;
2323 entry->ecx &= kvm_supported_word6_x86_features;
2327 kvm_x86_ops->set_supported_cpuid(function, entry);
2334 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2335 struct kvm_cpuid_entry2 __user *entries)
2337 struct kvm_cpuid_entry2 *cpuid_entries;
2338 int limit, nent = 0, r = -E2BIG;
2341 if (cpuid->nent < 1)
2343 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2344 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2346 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2350 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2351 limit = cpuid_entries[0].eax;
2352 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2353 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2354 &nent, cpuid->nent);
2356 if (nent >= cpuid->nent)
2359 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2360 limit = cpuid_entries[nent - 1].eax;
2361 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2362 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2363 &nent, cpuid->nent);
2368 if (nent >= cpuid->nent)
2371 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2375 if (nent >= cpuid->nent)
2378 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2382 if (nent >= cpuid->nent)
2386 if (copy_to_user(entries, cpuid_entries,
2387 nent * sizeof(struct kvm_cpuid_entry2)))
2393 vfree(cpuid_entries);
2398 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2399 struct kvm_lapic_state *s)
2401 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2406 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2407 struct kvm_lapic_state *s)
2409 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2410 kvm_apic_post_state_restore(vcpu);
2411 update_cr8_intercept(vcpu);
2416 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2417 struct kvm_interrupt *irq)
2419 if (irq->irq < 0 || irq->irq >= 256)
2421 if (irqchip_in_kernel(vcpu->kvm))
2424 kvm_queue_interrupt(vcpu, irq->irq, false);
2425 kvm_make_request(KVM_REQ_EVENT, vcpu);
2430 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2432 kvm_inject_nmi(vcpu);
2437 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2438 struct kvm_tpr_access_ctl *tac)
2442 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2446 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2450 unsigned bank_num = mcg_cap & 0xff, bank;
2453 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2455 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2458 vcpu->arch.mcg_cap = mcg_cap;
2459 /* Init IA32_MCG_CTL to all 1s */
2460 if (mcg_cap & MCG_CTL_P)
2461 vcpu->arch.mcg_ctl = ~(u64)0;
2462 /* Init IA32_MCi_CTL to all 1s */
2463 for (bank = 0; bank < bank_num; bank++)
2464 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2469 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2470 struct kvm_x86_mce *mce)
2472 u64 mcg_cap = vcpu->arch.mcg_cap;
2473 unsigned bank_num = mcg_cap & 0xff;
2474 u64 *banks = vcpu->arch.mce_banks;
2476 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2479 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2480 * reporting is disabled
2482 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2483 vcpu->arch.mcg_ctl != ~(u64)0)
2485 banks += 4 * mce->bank;
2487 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2488 * reporting is disabled for the bank
2490 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2492 if (mce->status & MCI_STATUS_UC) {
2493 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2494 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2495 printk(KERN_DEBUG "kvm: set_mce: "
2496 "injects mce exception while "
2497 "previous one is in progress!\n");
2498 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2501 if (banks[1] & MCI_STATUS_VAL)
2502 mce->status |= MCI_STATUS_OVER;
2503 banks[2] = mce->addr;
2504 banks[3] = mce->misc;
2505 vcpu->arch.mcg_status = mce->mcg_status;
2506 banks[1] = mce->status;
2507 kvm_queue_exception(vcpu, MC_VECTOR);
2508 } else if (!(banks[1] & MCI_STATUS_VAL)
2509 || !(banks[1] & MCI_STATUS_UC)) {
2510 if (banks[1] & MCI_STATUS_VAL)
2511 mce->status |= MCI_STATUS_OVER;
2512 banks[2] = mce->addr;
2513 banks[3] = mce->misc;
2514 banks[1] = mce->status;
2516 banks[1] |= MCI_STATUS_OVER;
2520 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2521 struct kvm_vcpu_events *events)
2523 events->exception.injected =
2524 vcpu->arch.exception.pending &&
2525 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2526 events->exception.nr = vcpu->arch.exception.nr;
2527 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2528 events->exception.error_code = vcpu->arch.exception.error_code;
2530 events->interrupt.injected =
2531 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2532 events->interrupt.nr = vcpu->arch.interrupt.nr;
2533 events->interrupt.soft = 0;
2534 events->interrupt.shadow =
2535 kvm_x86_ops->get_interrupt_shadow(vcpu,
2536 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2538 events->nmi.injected = vcpu->arch.nmi_injected;
2539 events->nmi.pending = vcpu->arch.nmi_pending;
2540 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2542 events->sipi_vector = vcpu->arch.sipi_vector;
2544 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2545 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2546 | KVM_VCPUEVENT_VALID_SHADOW);
2549 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2550 struct kvm_vcpu_events *events)
2552 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2553 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2554 | KVM_VCPUEVENT_VALID_SHADOW))
2557 vcpu->arch.exception.pending = events->exception.injected;
2558 vcpu->arch.exception.nr = events->exception.nr;
2559 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2560 vcpu->arch.exception.error_code = events->exception.error_code;
2562 vcpu->arch.interrupt.pending = events->interrupt.injected;
2563 vcpu->arch.interrupt.nr = events->interrupt.nr;
2564 vcpu->arch.interrupt.soft = events->interrupt.soft;
2565 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2566 kvm_pic_clear_isr_ack(vcpu->kvm);
2567 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2568 kvm_x86_ops->set_interrupt_shadow(vcpu,
2569 events->interrupt.shadow);
2571 vcpu->arch.nmi_injected = events->nmi.injected;
2572 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2573 vcpu->arch.nmi_pending = events->nmi.pending;
2574 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2576 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2577 vcpu->arch.sipi_vector = events->sipi_vector;
2579 kvm_make_request(KVM_REQ_EVENT, vcpu);
2584 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2585 struct kvm_debugregs *dbgregs)
2587 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2588 dbgregs->dr6 = vcpu->arch.dr6;
2589 dbgregs->dr7 = vcpu->arch.dr7;
2593 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2594 struct kvm_debugregs *dbgregs)
2599 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2600 vcpu->arch.dr6 = dbgregs->dr6;
2601 vcpu->arch.dr7 = dbgregs->dr7;
2606 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2607 struct kvm_xsave *guest_xsave)
2610 memcpy(guest_xsave->region,
2611 &vcpu->arch.guest_fpu.state->xsave,
2614 memcpy(guest_xsave->region,
2615 &vcpu->arch.guest_fpu.state->fxsave,
2616 sizeof(struct i387_fxsave_struct));
2617 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2622 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2623 struct kvm_xsave *guest_xsave)
2626 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2629 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2630 guest_xsave->region, xstate_size);
2632 if (xstate_bv & ~XSTATE_FPSSE)
2634 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2635 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2640 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2641 struct kvm_xcrs *guest_xcrs)
2643 if (!cpu_has_xsave) {
2644 guest_xcrs->nr_xcrs = 0;
2648 guest_xcrs->nr_xcrs = 1;
2649 guest_xcrs->flags = 0;
2650 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2651 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2654 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2655 struct kvm_xcrs *guest_xcrs)
2662 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2665 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2666 /* Only support XCR0 currently */
2667 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2668 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2669 guest_xcrs->xcrs[0].value);
2677 long kvm_arch_vcpu_ioctl(struct file *filp,
2678 unsigned int ioctl, unsigned long arg)
2680 struct kvm_vcpu *vcpu = filp->private_data;
2681 void __user *argp = (void __user *)arg;
2684 struct kvm_lapic_state *lapic;
2685 struct kvm_xsave *xsave;
2686 struct kvm_xcrs *xcrs;
2692 case KVM_GET_LAPIC: {
2694 if (!vcpu->arch.apic)
2696 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2701 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2705 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2710 case KVM_SET_LAPIC: {
2712 if (!vcpu->arch.apic)
2714 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2719 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2721 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2727 case KVM_INTERRUPT: {
2728 struct kvm_interrupt irq;
2731 if (copy_from_user(&irq, argp, sizeof irq))
2733 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2740 r = kvm_vcpu_ioctl_nmi(vcpu);
2746 case KVM_SET_CPUID: {
2747 struct kvm_cpuid __user *cpuid_arg = argp;
2748 struct kvm_cpuid cpuid;
2751 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2753 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2758 case KVM_SET_CPUID2: {
2759 struct kvm_cpuid2 __user *cpuid_arg = argp;
2760 struct kvm_cpuid2 cpuid;
2763 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2765 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2766 cpuid_arg->entries);
2771 case KVM_GET_CPUID2: {
2772 struct kvm_cpuid2 __user *cpuid_arg = argp;
2773 struct kvm_cpuid2 cpuid;
2776 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2778 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2779 cpuid_arg->entries);
2783 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2789 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2792 r = msr_io(vcpu, argp, do_set_msr, 0);
2794 case KVM_TPR_ACCESS_REPORTING: {
2795 struct kvm_tpr_access_ctl tac;
2798 if (copy_from_user(&tac, argp, sizeof tac))
2800 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2804 if (copy_to_user(argp, &tac, sizeof tac))
2809 case KVM_SET_VAPIC_ADDR: {
2810 struct kvm_vapic_addr va;
2813 if (!irqchip_in_kernel(vcpu->kvm))
2816 if (copy_from_user(&va, argp, sizeof va))
2819 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2822 case KVM_X86_SETUP_MCE: {
2826 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2828 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2831 case KVM_X86_SET_MCE: {
2832 struct kvm_x86_mce mce;
2835 if (copy_from_user(&mce, argp, sizeof mce))
2837 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2840 case KVM_GET_VCPU_EVENTS: {
2841 struct kvm_vcpu_events events;
2843 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2846 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2851 case KVM_SET_VCPU_EVENTS: {
2852 struct kvm_vcpu_events events;
2855 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2858 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2861 case KVM_GET_DEBUGREGS: {
2862 struct kvm_debugregs dbgregs;
2864 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2867 if (copy_to_user(argp, &dbgregs,
2868 sizeof(struct kvm_debugregs)))
2873 case KVM_SET_DEBUGREGS: {
2874 struct kvm_debugregs dbgregs;
2877 if (copy_from_user(&dbgregs, argp,
2878 sizeof(struct kvm_debugregs)))
2881 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2884 case KVM_GET_XSAVE: {
2885 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2890 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2893 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2898 case KVM_SET_XSAVE: {
2899 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2905 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2908 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2911 case KVM_GET_XCRS: {
2912 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2917 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2920 if (copy_to_user(argp, u.xcrs,
2921 sizeof(struct kvm_xcrs)))
2926 case KVM_SET_XCRS: {
2927 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2933 if (copy_from_user(u.xcrs, argp,
2934 sizeof(struct kvm_xcrs)))
2937 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2948 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2952 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2954 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2958 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2961 kvm->arch.ept_identity_map_addr = ident_addr;
2965 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2966 u32 kvm_nr_mmu_pages)
2968 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2971 mutex_lock(&kvm->slots_lock);
2972 spin_lock(&kvm->mmu_lock);
2974 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2975 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2977 spin_unlock(&kvm->mmu_lock);
2978 mutex_unlock(&kvm->slots_lock);
2982 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2984 return kvm->arch.n_max_mmu_pages;
2987 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2992 switch (chip->chip_id) {
2993 case KVM_IRQCHIP_PIC_MASTER:
2994 memcpy(&chip->chip.pic,
2995 &pic_irqchip(kvm)->pics[0],
2996 sizeof(struct kvm_pic_state));
2998 case KVM_IRQCHIP_PIC_SLAVE:
2999 memcpy(&chip->chip.pic,
3000 &pic_irqchip(kvm)->pics[1],
3001 sizeof(struct kvm_pic_state));
3003 case KVM_IRQCHIP_IOAPIC:
3004 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3013 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3018 switch (chip->chip_id) {
3019 case KVM_IRQCHIP_PIC_MASTER:
3020 spin_lock(&pic_irqchip(kvm)->lock);
3021 memcpy(&pic_irqchip(kvm)->pics[0],
3023 sizeof(struct kvm_pic_state));
3024 spin_unlock(&pic_irqchip(kvm)->lock);
3026 case KVM_IRQCHIP_PIC_SLAVE:
3027 spin_lock(&pic_irqchip(kvm)->lock);
3028 memcpy(&pic_irqchip(kvm)->pics[1],
3030 sizeof(struct kvm_pic_state));
3031 spin_unlock(&pic_irqchip(kvm)->lock);
3033 case KVM_IRQCHIP_IOAPIC:
3034 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3040 kvm_pic_update_irq(pic_irqchip(kvm));
3044 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3048 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3049 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3050 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3054 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3058 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3059 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3060 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3061 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3065 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3069 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3070 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3071 sizeof(ps->channels));
3072 ps->flags = kvm->arch.vpit->pit_state.flags;
3073 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3077 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3079 int r = 0, start = 0;
3080 u32 prev_legacy, cur_legacy;
3081 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3082 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3083 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3084 if (!prev_legacy && cur_legacy)
3086 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3087 sizeof(kvm->arch.vpit->pit_state.channels));
3088 kvm->arch.vpit->pit_state.flags = ps->flags;
3089 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3090 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3094 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3095 struct kvm_reinject_control *control)
3097 if (!kvm->arch.vpit)
3099 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3100 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3101 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3106 * Get (and clear) the dirty memory log for a memory slot.
3108 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3109 struct kvm_dirty_log *log)
3112 struct kvm_memory_slot *memslot;
3114 unsigned long is_dirty = 0;
3116 mutex_lock(&kvm->slots_lock);
3119 if (log->slot >= KVM_MEMORY_SLOTS)
3122 memslot = &kvm->memslots->memslots[log->slot];
3124 if (!memslot->dirty_bitmap)
3127 n = kvm_dirty_bitmap_bytes(memslot);
3129 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3130 is_dirty = memslot->dirty_bitmap[i];
3132 /* If nothing is dirty, don't bother messing with page tables. */
3134 struct kvm_memslots *slots, *old_slots;
3135 unsigned long *dirty_bitmap;
3137 spin_lock(&kvm->mmu_lock);
3138 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3139 spin_unlock(&kvm->mmu_lock);
3142 dirty_bitmap = vmalloc(n);
3145 memset(dirty_bitmap, 0, n);
3148 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3150 vfree(dirty_bitmap);
3153 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3154 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3156 old_slots = kvm->memslots;
3157 rcu_assign_pointer(kvm->memslots, slots);
3158 synchronize_srcu_expedited(&kvm->srcu);
3159 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3163 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3164 vfree(dirty_bitmap);
3167 vfree(dirty_bitmap);
3170 if (clear_user(log->dirty_bitmap, n))
3176 mutex_unlock(&kvm->slots_lock);
3180 long kvm_arch_vm_ioctl(struct file *filp,
3181 unsigned int ioctl, unsigned long arg)
3183 struct kvm *kvm = filp->private_data;
3184 void __user *argp = (void __user *)arg;
3187 * This union makes it completely explicit to gcc-3.x
3188 * that these two variables' stack usage should be
3189 * combined, not added together.
3192 struct kvm_pit_state ps;
3193 struct kvm_pit_state2 ps2;
3194 struct kvm_pit_config pit_config;
3198 case KVM_SET_TSS_ADDR:
3199 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3203 case KVM_SET_IDENTITY_MAP_ADDR: {
3207 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3209 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3214 case KVM_SET_NR_MMU_PAGES:
3215 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3219 case KVM_GET_NR_MMU_PAGES:
3220 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3222 case KVM_CREATE_IRQCHIP: {
3223 struct kvm_pic *vpic;
3225 mutex_lock(&kvm->lock);
3228 goto create_irqchip_unlock;
3230 vpic = kvm_create_pic(kvm);
3232 r = kvm_ioapic_init(kvm);
3234 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3237 goto create_irqchip_unlock;
3240 goto create_irqchip_unlock;
3242 kvm->arch.vpic = vpic;
3244 r = kvm_setup_default_irq_routing(kvm);
3246 mutex_lock(&kvm->irq_lock);
3247 kvm_ioapic_destroy(kvm);
3248 kvm_destroy_pic(kvm);
3249 mutex_unlock(&kvm->irq_lock);
3251 create_irqchip_unlock:
3252 mutex_unlock(&kvm->lock);
3255 case KVM_CREATE_PIT:
3256 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3258 case KVM_CREATE_PIT2:
3260 if (copy_from_user(&u.pit_config, argp,
3261 sizeof(struct kvm_pit_config)))
3264 mutex_lock(&kvm->slots_lock);
3267 goto create_pit_unlock;
3269 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3273 mutex_unlock(&kvm->slots_lock);
3275 case KVM_IRQ_LINE_STATUS:
3276 case KVM_IRQ_LINE: {
3277 struct kvm_irq_level irq_event;
3280 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3283 if (irqchip_in_kernel(kvm)) {
3285 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3286 irq_event.irq, irq_event.level);
3287 if (ioctl == KVM_IRQ_LINE_STATUS) {
3289 irq_event.status = status;
3290 if (copy_to_user(argp, &irq_event,
3298 case KVM_GET_IRQCHIP: {
3299 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3300 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3306 if (copy_from_user(chip, argp, sizeof *chip))
3307 goto get_irqchip_out;
3309 if (!irqchip_in_kernel(kvm))
3310 goto get_irqchip_out;
3311 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3313 goto get_irqchip_out;
3315 if (copy_to_user(argp, chip, sizeof *chip))
3316 goto get_irqchip_out;
3324 case KVM_SET_IRQCHIP: {
3325 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3326 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3332 if (copy_from_user(chip, argp, sizeof *chip))
3333 goto set_irqchip_out;
3335 if (!irqchip_in_kernel(kvm))
3336 goto set_irqchip_out;
3337 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3339 goto set_irqchip_out;
3349 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3352 if (!kvm->arch.vpit)
3354 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3358 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3365 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3368 if (!kvm->arch.vpit)
3370 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3376 case KVM_GET_PIT2: {
3378 if (!kvm->arch.vpit)
3380 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3384 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3389 case KVM_SET_PIT2: {
3391 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3394 if (!kvm->arch.vpit)
3396 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3402 case KVM_REINJECT_CONTROL: {
3403 struct kvm_reinject_control control;
3405 if (copy_from_user(&control, argp, sizeof(control)))
3407 r = kvm_vm_ioctl_reinject(kvm, &control);
3413 case KVM_XEN_HVM_CONFIG: {
3415 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3416 sizeof(struct kvm_xen_hvm_config)))
3419 if (kvm->arch.xen_hvm_config.flags)
3424 case KVM_SET_CLOCK: {
3425 struct kvm_clock_data user_ns;
3430 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3438 now_ns = get_kernel_ns();
3439 delta = user_ns.clock - now_ns;
3440 kvm->arch.kvmclock_offset = delta;
3443 case KVM_GET_CLOCK: {
3444 struct kvm_clock_data user_ns;
3447 now_ns = get_kernel_ns();
3448 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3452 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3465 static void kvm_init_msr_list(void)
3470 /* skip the first msrs in the list. KVM-specific */
3471 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3472 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3475 msrs_to_save[j] = msrs_to_save[i];
3478 num_msrs_to_save = j;
3481 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3484 if (vcpu->arch.apic &&
3485 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3488 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3491 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3493 if (vcpu->arch.apic &&
3494 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3497 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3500 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3501 struct kvm_segment *var, int seg)
3503 kvm_x86_ops->set_segment(vcpu, var, seg);
3506 void kvm_get_segment(struct kvm_vcpu *vcpu,
3507 struct kvm_segment *var, int seg)
3509 kvm_x86_ops->get_segment(vcpu, var, seg);
3512 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3517 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3522 BUG_ON(!mmu_is_nested(vcpu));
3524 /* NPT walks are always user-walks */
3525 access |= PFERR_USER_MASK;
3526 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3527 if (t_gpa == UNMAPPED_GVA)
3528 vcpu->arch.fault.nested = true;
3533 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3535 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3536 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3539 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3541 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3542 access |= PFERR_FETCH_MASK;
3543 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3546 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3548 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3549 access |= PFERR_WRITE_MASK;
3550 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3553 /* uses this to access any guest's mapped memory without checking CPL */
3554 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3556 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3559 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3560 struct kvm_vcpu *vcpu, u32 access,
3564 int r = X86EMUL_CONTINUE;
3567 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3569 unsigned offset = addr & (PAGE_SIZE-1);
3570 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3573 if (gpa == UNMAPPED_GVA) {
3574 r = X86EMUL_PROPAGATE_FAULT;
3577 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3579 r = X86EMUL_IO_NEEDED;
3591 /* used for instruction fetching */
3592 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3593 struct kvm_vcpu *vcpu, u32 *error)
3595 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3596 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3597 access | PFERR_FETCH_MASK, error);
3600 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3601 struct kvm_vcpu *vcpu, u32 *error)
3603 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3604 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3608 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3609 struct kvm_vcpu *vcpu, u32 *error)
3611 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3614 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3616 struct kvm_vcpu *vcpu,
3620 int r = X86EMUL_CONTINUE;
3623 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3626 unsigned offset = addr & (PAGE_SIZE-1);
3627 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3630 if (gpa == UNMAPPED_GVA) {
3631 r = X86EMUL_PROPAGATE_FAULT;
3634 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3636 r = X86EMUL_IO_NEEDED;
3648 static int emulator_read_emulated(unsigned long addr,
3651 unsigned int *error_code,
3652 struct kvm_vcpu *vcpu)
3656 if (vcpu->mmio_read_completed) {
3657 memcpy(val, vcpu->mmio_data, bytes);
3658 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3659 vcpu->mmio_phys_addr, *(u64 *)val);
3660 vcpu->mmio_read_completed = 0;
3661 return X86EMUL_CONTINUE;
3664 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3666 if (gpa == UNMAPPED_GVA)
3667 return X86EMUL_PROPAGATE_FAULT;
3669 /* For APIC access vmexit */
3670 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3673 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3674 == X86EMUL_CONTINUE)
3675 return X86EMUL_CONTINUE;
3679 * Is this MMIO handled locally?
3681 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3682 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3683 return X86EMUL_CONTINUE;
3686 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3688 vcpu->mmio_needed = 1;
3689 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3690 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3691 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3692 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3694 return X86EMUL_IO_NEEDED;
3697 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3698 const void *val, int bytes)
3702 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3705 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3709 static int emulator_write_emulated_onepage(unsigned long addr,
3712 unsigned int *error_code,
3713 struct kvm_vcpu *vcpu)
3717 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3719 if (gpa == UNMAPPED_GVA)
3720 return X86EMUL_PROPAGATE_FAULT;
3722 /* For APIC access vmexit */
3723 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3726 if (emulator_write_phys(vcpu, gpa, val, bytes))
3727 return X86EMUL_CONTINUE;
3730 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3732 * Is this MMIO handled locally?
3734 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3735 return X86EMUL_CONTINUE;
3737 vcpu->mmio_needed = 1;
3738 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3739 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3740 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3741 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3742 memcpy(vcpu->run->mmio.data, val, bytes);
3744 return X86EMUL_CONTINUE;
3747 int emulator_write_emulated(unsigned long addr,
3750 unsigned int *error_code,
3751 struct kvm_vcpu *vcpu)
3753 /* Crossing a page boundary? */
3754 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3757 now = -addr & ~PAGE_MASK;
3758 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3760 if (rc != X86EMUL_CONTINUE)
3766 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3770 #define CMPXCHG_TYPE(t, ptr, old, new) \
3771 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3773 #ifdef CONFIG_X86_64
3774 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3776 # define CMPXCHG64(ptr, old, new) \
3777 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3780 static int emulator_cmpxchg_emulated(unsigned long addr,
3784 unsigned int *error_code,
3785 struct kvm_vcpu *vcpu)
3792 /* guests cmpxchg8b have to be emulated atomically */
3793 if (bytes > 8 || (bytes & (bytes - 1)))
3796 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3798 if (gpa == UNMAPPED_GVA ||
3799 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3802 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3805 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3806 if (is_error_page(page)) {
3807 kvm_release_page_clean(page);
3811 kaddr = kmap_atomic(page, KM_USER0);
3812 kaddr += offset_in_page(gpa);
3815 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3818 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3821 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3824 exchanged = CMPXCHG64(kaddr, old, new);
3829 kunmap_atomic(kaddr, KM_USER0);
3830 kvm_release_page_dirty(page);
3833 return X86EMUL_CMPXCHG_FAILED;
3835 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3837 return X86EMUL_CONTINUE;
3840 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3842 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3845 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3847 /* TODO: String I/O for in kernel device */
3850 if (vcpu->arch.pio.in)
3851 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3852 vcpu->arch.pio.size, pd);
3854 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3855 vcpu->arch.pio.port, vcpu->arch.pio.size,
3861 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3862 unsigned int count, struct kvm_vcpu *vcpu)
3864 if (vcpu->arch.pio.count)
3867 trace_kvm_pio(0, port, size, 1);
3869 vcpu->arch.pio.port = port;
3870 vcpu->arch.pio.in = 1;
3871 vcpu->arch.pio.count = count;
3872 vcpu->arch.pio.size = size;
3874 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3876 memcpy(val, vcpu->arch.pio_data, size * count);
3877 vcpu->arch.pio.count = 0;
3881 vcpu->run->exit_reason = KVM_EXIT_IO;
3882 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3883 vcpu->run->io.size = size;
3884 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3885 vcpu->run->io.count = count;
3886 vcpu->run->io.port = port;
3891 static int emulator_pio_out_emulated(int size, unsigned short port,
3892 const void *val, unsigned int count,
3893 struct kvm_vcpu *vcpu)
3895 trace_kvm_pio(1, port, size, 1);
3897 vcpu->arch.pio.port = port;
3898 vcpu->arch.pio.in = 0;
3899 vcpu->arch.pio.count = count;
3900 vcpu->arch.pio.size = size;
3902 memcpy(vcpu->arch.pio_data, val, size * count);
3904 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3905 vcpu->arch.pio.count = 0;
3909 vcpu->run->exit_reason = KVM_EXIT_IO;
3910 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3911 vcpu->run->io.size = size;
3912 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3913 vcpu->run->io.count = count;
3914 vcpu->run->io.port = port;
3919 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3921 return kvm_x86_ops->get_segment_base(vcpu, seg);
3924 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3926 kvm_mmu_invlpg(vcpu, address);
3927 return X86EMUL_CONTINUE;
3930 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3932 if (!need_emulate_wbinvd(vcpu))
3933 return X86EMUL_CONTINUE;
3935 if (kvm_x86_ops->has_wbinvd_exit()) {
3936 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3937 wbinvd_ipi, NULL, 1);
3938 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3941 return X86EMUL_CONTINUE;
3943 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3945 int emulate_clts(struct kvm_vcpu *vcpu)
3947 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3948 kvm_x86_ops->fpu_activate(vcpu);
3949 return X86EMUL_CONTINUE;
3952 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3954 return _kvm_get_dr(vcpu, dr, dest);
3957 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3960 return __kvm_set_dr(vcpu, dr, value);
3963 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3965 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3968 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3970 unsigned long value;
3974 value = kvm_read_cr0(vcpu);
3977 value = vcpu->arch.cr2;
3980 value = vcpu->arch.cr3;
3983 value = kvm_read_cr4(vcpu);
3986 value = kvm_get_cr8(vcpu);
3989 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3996 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4002 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4005 vcpu->arch.cr2 = val;
4008 res = kvm_set_cr3(vcpu, val);
4011 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4014 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4017 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4024 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4026 return kvm_x86_ops->get_cpl(vcpu);
4029 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4031 kvm_x86_ops->get_gdt(vcpu, dt);
4034 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4036 kvm_x86_ops->get_idt(vcpu, dt);
4039 static unsigned long emulator_get_cached_segment_base(int seg,
4040 struct kvm_vcpu *vcpu)
4042 return get_segment_base(vcpu, seg);
4045 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4046 struct kvm_vcpu *vcpu)
4048 struct kvm_segment var;
4050 kvm_get_segment(vcpu, &var, seg);
4057 set_desc_limit(desc, var.limit);
4058 set_desc_base(desc, (unsigned long)var.base);
4059 desc->type = var.type;
4061 desc->dpl = var.dpl;
4062 desc->p = var.present;
4063 desc->avl = var.avl;
4071 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4072 struct kvm_vcpu *vcpu)
4074 struct kvm_segment var;
4076 /* needed to preserve selector */
4077 kvm_get_segment(vcpu, &var, seg);
4079 var.base = get_desc_base(desc);
4080 var.limit = get_desc_limit(desc);
4082 var.limit = (var.limit << 12) | 0xfff;
4083 var.type = desc->type;
4084 var.present = desc->p;
4085 var.dpl = desc->dpl;
4090 var.avl = desc->avl;
4091 var.present = desc->p;
4092 var.unusable = !var.present;
4095 kvm_set_segment(vcpu, &var, seg);
4099 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4101 struct kvm_segment kvm_seg;
4103 kvm_get_segment(vcpu, &kvm_seg, seg);
4104 return kvm_seg.selector;
4107 static void emulator_set_segment_selector(u16 sel, int seg,
4108 struct kvm_vcpu *vcpu)
4110 struct kvm_segment kvm_seg;
4112 kvm_get_segment(vcpu, &kvm_seg, seg);
4113 kvm_seg.selector = sel;
4114 kvm_set_segment(vcpu, &kvm_seg, seg);
4117 static struct x86_emulate_ops emulate_ops = {
4118 .read_std = kvm_read_guest_virt_system,
4119 .write_std = kvm_write_guest_virt_system,
4120 .fetch = kvm_fetch_guest_virt,
4121 .read_emulated = emulator_read_emulated,
4122 .write_emulated = emulator_write_emulated,
4123 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4124 .pio_in_emulated = emulator_pio_in_emulated,
4125 .pio_out_emulated = emulator_pio_out_emulated,
4126 .get_cached_descriptor = emulator_get_cached_descriptor,
4127 .set_cached_descriptor = emulator_set_cached_descriptor,
4128 .get_segment_selector = emulator_get_segment_selector,
4129 .set_segment_selector = emulator_set_segment_selector,
4130 .get_cached_segment_base = emulator_get_cached_segment_base,
4131 .get_gdt = emulator_get_gdt,
4132 .get_idt = emulator_get_idt,
4133 .get_cr = emulator_get_cr,
4134 .set_cr = emulator_set_cr,
4135 .cpl = emulator_get_cpl,
4136 .get_dr = emulator_get_dr,
4137 .set_dr = emulator_set_dr,
4138 .set_msr = kvm_set_msr,
4139 .get_msr = kvm_get_msr,
4142 static void cache_all_regs(struct kvm_vcpu *vcpu)
4144 kvm_register_read(vcpu, VCPU_REGS_RAX);
4145 kvm_register_read(vcpu, VCPU_REGS_RSP);
4146 kvm_register_read(vcpu, VCPU_REGS_RIP);
4147 vcpu->arch.regs_dirty = ~0;
4150 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4152 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4154 * an sti; sti; sequence only disable interrupts for the first
4155 * instruction. So, if the last instruction, be it emulated or
4156 * not, left the system with the INT_STI flag enabled, it
4157 * means that the last instruction is an sti. We should not
4158 * leave the flag on in this case. The same goes for mov ss
4160 if (!(int_shadow & mask))
4161 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4164 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4166 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4167 if (ctxt->exception == PF_VECTOR)
4168 kvm_propagate_fault(vcpu);
4169 else if (ctxt->error_code_valid)
4170 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4172 kvm_queue_exception(vcpu, ctxt->exception);
4175 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4177 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4180 cache_all_regs(vcpu);
4182 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4184 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4185 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4186 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4187 vcpu->arch.emulate_ctxt.mode =
4188 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4189 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4190 ? X86EMUL_MODE_VM86 : cs_l
4191 ? X86EMUL_MODE_PROT64 : cs_db
4192 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4193 memset(c, 0, sizeof(struct decode_cache));
4194 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4197 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4199 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4202 init_emulate_ctxt(vcpu);
4204 vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4205 vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4206 vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4207 ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4209 if (ret != X86EMUL_CONTINUE)
4210 return EMULATE_FAIL;
4212 vcpu->arch.emulate_ctxt.eip = c->eip;
4213 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4214 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4215 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4217 if (irq == NMI_VECTOR)
4218 vcpu->arch.nmi_pending = false;
4220 vcpu->arch.interrupt.pending = false;
4222 return EMULATE_DONE;
4224 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4226 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4228 ++vcpu->stat.insn_emulation_fail;
4229 trace_kvm_emulate_insn_failed(vcpu);
4230 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4231 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4232 vcpu->run->internal.ndata = 0;
4233 kvm_queue_exception(vcpu, UD_VECTOR);
4234 return EMULATE_FAIL;
4237 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4245 * if emulation was due to access to shadowed page table
4246 * and it failed try to unshadow page and re-entetr the
4247 * guest to let CPU execute the instruction.
4249 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4252 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4254 if (gpa == UNMAPPED_GVA)
4255 return true; /* let cpu generate fault */
4257 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4263 int emulate_instruction(struct kvm_vcpu *vcpu,
4269 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4271 kvm_clear_exception_queue(vcpu);
4272 vcpu->arch.mmio_fault_cr2 = cr2;
4274 * TODO: fix emulate.c to use guest_read/write_register
4275 * instead of direct ->regs accesses, can save hundred cycles
4276 * on Intel for instructions that don't read/change RSP, for
4279 cache_all_regs(vcpu);
4281 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4282 init_emulate_ctxt(vcpu);
4283 vcpu->arch.emulate_ctxt.interruptibility = 0;
4284 vcpu->arch.emulate_ctxt.exception = -1;
4285 vcpu->arch.emulate_ctxt.perm_ok = false;
4287 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4288 if (r == X86EMUL_PROPAGATE_FAULT)
4291 trace_kvm_emulate_insn_start(vcpu);
4293 /* Only allow emulation of specific instructions on #UD
4294 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4295 if (emulation_type & EMULTYPE_TRAP_UD) {
4297 return EMULATE_FAIL;
4299 case 0x01: /* VMMCALL */
4300 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4301 return EMULATE_FAIL;
4303 case 0x34: /* sysenter */
4304 case 0x35: /* sysexit */
4305 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4306 return EMULATE_FAIL;
4308 case 0x05: /* syscall */
4309 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4310 return EMULATE_FAIL;
4313 return EMULATE_FAIL;
4316 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4317 return EMULATE_FAIL;
4320 ++vcpu->stat.insn_emulation;
4322 if (reexecute_instruction(vcpu, cr2))
4323 return EMULATE_DONE;
4324 if (emulation_type & EMULTYPE_SKIP)
4325 return EMULATE_FAIL;
4326 return handle_emulation_failure(vcpu);
4330 if (emulation_type & EMULTYPE_SKIP) {
4331 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4332 return EMULATE_DONE;
4335 /* this is needed for vmware backdor interface to work since it
4336 changes registers values during IO operation */
4337 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4340 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4342 if (r == EMULATION_FAILED) {
4343 if (reexecute_instruction(vcpu, cr2))
4344 return EMULATE_DONE;
4346 return handle_emulation_failure(vcpu);
4350 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4351 inject_emulated_exception(vcpu);
4353 } else if (vcpu->arch.pio.count) {
4354 if (!vcpu->arch.pio.in)
4355 vcpu->arch.pio.count = 0;
4356 r = EMULATE_DO_MMIO;
4357 } else if (vcpu->mmio_needed) {
4358 if (vcpu->mmio_is_write)
4359 vcpu->mmio_needed = 0;
4360 r = EMULATE_DO_MMIO;
4361 } else if (r == EMULATION_RESTART)
4366 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4367 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4368 kvm_make_request(KVM_REQ_EVENT, vcpu);
4369 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4370 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4374 EXPORT_SYMBOL_GPL(emulate_instruction);
4376 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4378 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4379 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4380 /* do not return to emulator after return from userspace */
4381 vcpu->arch.pio.count = 0;
4384 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4386 static void tsc_bad(void *info)
4388 __get_cpu_var(cpu_tsc_khz) = 0;
4391 static void tsc_khz_changed(void *data)
4393 struct cpufreq_freqs *freq = data;
4394 unsigned long khz = 0;
4398 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4399 khz = cpufreq_quick_get(raw_smp_processor_id());
4402 __get_cpu_var(cpu_tsc_khz) = khz;
4405 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4408 struct cpufreq_freqs *freq = data;
4410 struct kvm_vcpu *vcpu;
4411 int i, send_ipi = 0;
4414 * We allow guests to temporarily run on slowing clocks,
4415 * provided we notify them after, or to run on accelerating
4416 * clocks, provided we notify them before. Thus time never
4419 * However, we have a problem. We can't atomically update
4420 * the frequency of a given CPU from this function; it is
4421 * merely a notifier, which can be called from any CPU.
4422 * Changing the TSC frequency at arbitrary points in time
4423 * requires a recomputation of local variables related to
4424 * the TSC for each VCPU. We must flag these local variables
4425 * to be updated and be sure the update takes place with the
4426 * new frequency before any guests proceed.
4428 * Unfortunately, the combination of hotplug CPU and frequency
4429 * change creates an intractable locking scenario; the order
4430 * of when these callouts happen is undefined with respect to
4431 * CPU hotplug, and they can race with each other. As such,
4432 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4433 * undefined; you can actually have a CPU frequency change take
4434 * place in between the computation of X and the setting of the
4435 * variable. To protect against this problem, all updates of
4436 * the per_cpu tsc_khz variable are done in an interrupt
4437 * protected IPI, and all callers wishing to update the value
4438 * must wait for a synchronous IPI to complete (which is trivial
4439 * if the caller is on the CPU already). This establishes the
4440 * necessary total order on variable updates.
4442 * Note that because a guest time update may take place
4443 * anytime after the setting of the VCPU's request bit, the
4444 * correct TSC value must be set before the request. However,
4445 * to ensure the update actually makes it to any guest which
4446 * starts running in hardware virtualization between the set
4447 * and the acquisition of the spinlock, we must also ping the
4448 * CPU after setting the request bit.
4452 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4454 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4457 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4459 spin_lock(&kvm_lock);
4460 list_for_each_entry(kvm, &vm_list, vm_list) {
4461 kvm_for_each_vcpu(i, vcpu, kvm) {
4462 if (vcpu->cpu != freq->cpu)
4464 if (!kvm_request_guest_time_update(vcpu))
4466 if (vcpu->cpu != smp_processor_id())
4470 spin_unlock(&kvm_lock);
4472 if (freq->old < freq->new && send_ipi) {
4474 * We upscale the frequency. Must make the guest
4475 * doesn't see old kvmclock values while running with
4476 * the new frequency, otherwise we risk the guest sees
4477 * time go backwards.
4479 * In case we update the frequency for another cpu
4480 * (which might be in guest context) send an interrupt
4481 * to kick the cpu out of guest context. Next time
4482 * guest context is entered kvmclock will be updated,
4483 * so the guest will not see stale values.
4485 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4490 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4491 .notifier_call = kvmclock_cpufreq_notifier
4494 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4495 unsigned long action, void *hcpu)
4497 unsigned int cpu = (unsigned long)hcpu;
4501 case CPU_DOWN_FAILED:
4502 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4504 case CPU_DOWN_PREPARE:
4505 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4511 static struct notifier_block kvmclock_cpu_notifier_block = {
4512 .notifier_call = kvmclock_cpu_notifier,
4513 .priority = -INT_MAX
4516 static void kvm_timer_init(void)
4520 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4521 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4522 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4523 CPUFREQ_TRANSITION_NOTIFIER);
4525 for_each_online_cpu(cpu)
4526 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4529 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4531 static int kvm_is_in_guest(void)
4533 return percpu_read(current_vcpu) != NULL;
4536 static int kvm_is_user_mode(void)
4540 if (percpu_read(current_vcpu))
4541 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4543 return user_mode != 0;
4546 static unsigned long kvm_get_guest_ip(void)
4548 unsigned long ip = 0;
4550 if (percpu_read(current_vcpu))
4551 ip = kvm_rip_read(percpu_read(current_vcpu));
4556 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4557 .is_in_guest = kvm_is_in_guest,
4558 .is_user_mode = kvm_is_user_mode,
4559 .get_guest_ip = kvm_get_guest_ip,
4562 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4564 percpu_write(current_vcpu, vcpu);
4566 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4568 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4570 percpu_write(current_vcpu, NULL);
4572 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4574 int kvm_arch_init(void *opaque)
4577 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4580 printk(KERN_ERR "kvm: already loaded the other module\n");
4585 if (!ops->cpu_has_kvm_support()) {
4586 printk(KERN_ERR "kvm: no hardware support\n");
4590 if (ops->disabled_by_bios()) {
4591 printk(KERN_ERR "kvm: disabled by bios\n");
4596 r = kvm_mmu_module_init();
4600 kvm_init_msr_list();
4603 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4604 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4605 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4606 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4610 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4613 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4621 void kvm_arch_exit(void)
4623 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4625 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4626 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4627 CPUFREQ_TRANSITION_NOTIFIER);
4628 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4630 kvm_mmu_module_exit();
4633 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4635 ++vcpu->stat.halt_exits;
4636 if (irqchip_in_kernel(vcpu->kvm)) {
4637 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4640 vcpu->run->exit_reason = KVM_EXIT_HLT;
4644 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4646 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4649 if (is_long_mode(vcpu))
4652 return a0 | ((gpa_t)a1 << 32);
4655 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4657 u64 param, ingpa, outgpa, ret;
4658 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4659 bool fast, longmode;
4663 * hypercall generates UD from non zero cpl and real mode
4666 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4667 kvm_queue_exception(vcpu, UD_VECTOR);
4671 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4672 longmode = is_long_mode(vcpu) && cs_l == 1;
4675 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4676 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4677 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4678 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4679 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4680 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4682 #ifdef CONFIG_X86_64
4684 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4685 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4686 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4690 code = param & 0xffff;
4691 fast = (param >> 16) & 0x1;
4692 rep_cnt = (param >> 32) & 0xfff;
4693 rep_idx = (param >> 48) & 0xfff;
4695 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4698 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4699 kvm_vcpu_on_spin(vcpu);
4702 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4706 ret = res | (((u64)rep_done & 0xfff) << 32);
4708 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4710 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4711 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4717 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4719 unsigned long nr, a0, a1, a2, a3, ret;
4722 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4723 return kvm_hv_hypercall(vcpu);
4725 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4726 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4727 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4728 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4729 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4731 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4733 if (!is_long_mode(vcpu)) {
4741 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4747 case KVM_HC_VAPIC_POLL_IRQ:
4751 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4758 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4759 ++vcpu->stat.hypercalls;
4762 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4764 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4766 char instruction[3];
4767 unsigned long rip = kvm_rip_read(vcpu);
4770 * Blow out the MMU to ensure that no other VCPU has an active mapping
4771 * to ensure that the updated hypercall appears atomically across all
4774 kvm_mmu_zap_all(vcpu->kvm);
4776 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4778 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4781 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4783 struct desc_ptr dt = { limit, base };
4785 kvm_x86_ops->set_gdt(vcpu, &dt);
4788 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4790 struct desc_ptr dt = { limit, base };
4792 kvm_x86_ops->set_idt(vcpu, &dt);
4795 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4797 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4798 int j, nent = vcpu->arch.cpuid_nent;
4800 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4801 /* when no next entry is found, the current entry[i] is reselected */
4802 for (j = i + 1; ; j = (j + 1) % nent) {
4803 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4804 if (ej->function == e->function) {
4805 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4809 return 0; /* silence gcc, even though control never reaches here */
4812 /* find an entry with matching function, matching index (if needed), and that
4813 * should be read next (if it's stateful) */
4814 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4815 u32 function, u32 index)
4817 if (e->function != function)
4819 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4821 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4822 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4827 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4828 u32 function, u32 index)
4831 struct kvm_cpuid_entry2 *best = NULL;
4833 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4834 struct kvm_cpuid_entry2 *e;
4836 e = &vcpu->arch.cpuid_entries[i];
4837 if (is_matching_cpuid_entry(e, function, index)) {
4838 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4839 move_to_next_stateful_cpuid_entry(vcpu, i);
4844 * Both basic or both extended?
4846 if (((e->function ^ function) & 0x80000000) == 0)
4847 if (!best || e->function > best->function)
4852 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4854 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4856 struct kvm_cpuid_entry2 *best;
4858 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4859 if (!best || best->eax < 0x80000008)
4861 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4863 return best->eax & 0xff;
4868 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4870 u32 function, index;
4871 struct kvm_cpuid_entry2 *best;
4873 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4874 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4875 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4876 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4877 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4878 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4879 best = kvm_find_cpuid_entry(vcpu, function, index);
4881 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4882 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4883 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4884 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4886 kvm_x86_ops->skip_emulated_instruction(vcpu);
4887 trace_kvm_cpuid(function,
4888 kvm_register_read(vcpu, VCPU_REGS_RAX),
4889 kvm_register_read(vcpu, VCPU_REGS_RBX),
4890 kvm_register_read(vcpu, VCPU_REGS_RCX),
4891 kvm_register_read(vcpu, VCPU_REGS_RDX));
4893 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4896 * Check if userspace requested an interrupt window, and that the
4897 * interrupt window is open.
4899 * No need to exit to userspace if we already have an interrupt queued.
4901 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4903 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4904 vcpu->run->request_interrupt_window &&
4905 kvm_arch_interrupt_allowed(vcpu));
4908 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4910 struct kvm_run *kvm_run = vcpu->run;
4912 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4913 kvm_run->cr8 = kvm_get_cr8(vcpu);
4914 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4915 if (irqchip_in_kernel(vcpu->kvm))
4916 kvm_run->ready_for_interrupt_injection = 1;
4918 kvm_run->ready_for_interrupt_injection =
4919 kvm_arch_interrupt_allowed(vcpu) &&
4920 !kvm_cpu_has_interrupt(vcpu) &&
4921 !kvm_event_needs_reinjection(vcpu);
4924 static void vapic_enter(struct kvm_vcpu *vcpu)
4926 struct kvm_lapic *apic = vcpu->arch.apic;
4929 if (!apic || !apic->vapic_addr)
4932 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4934 vcpu->arch.apic->vapic_page = page;
4937 static void vapic_exit(struct kvm_vcpu *vcpu)
4939 struct kvm_lapic *apic = vcpu->arch.apic;
4942 if (!apic || !apic->vapic_addr)
4945 idx = srcu_read_lock(&vcpu->kvm->srcu);
4946 kvm_release_page_dirty(apic->vapic_page);
4947 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4948 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4951 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4955 if (!kvm_x86_ops->update_cr8_intercept)
4958 if (!vcpu->arch.apic)
4961 if (!vcpu->arch.apic->vapic_addr)
4962 max_irr = kvm_lapic_find_highest_irr(vcpu);
4969 tpr = kvm_lapic_get_cr8(vcpu);
4971 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4974 static void inject_pending_event(struct kvm_vcpu *vcpu)
4976 /* try to reinject previous events if any */
4977 if (vcpu->arch.exception.pending) {
4978 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4979 vcpu->arch.exception.has_error_code,
4980 vcpu->arch.exception.error_code);
4981 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4982 vcpu->arch.exception.has_error_code,
4983 vcpu->arch.exception.error_code,
4984 vcpu->arch.exception.reinject);
4988 if (vcpu->arch.nmi_injected) {
4989 kvm_x86_ops->set_nmi(vcpu);
4993 if (vcpu->arch.interrupt.pending) {
4994 kvm_x86_ops->set_irq(vcpu);
4998 /* try to inject new event if pending */
4999 if (vcpu->arch.nmi_pending) {
5000 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5001 vcpu->arch.nmi_pending = false;
5002 vcpu->arch.nmi_injected = true;
5003 kvm_x86_ops->set_nmi(vcpu);
5005 } else if (kvm_cpu_has_interrupt(vcpu)) {
5006 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5007 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5009 kvm_x86_ops->set_irq(vcpu);
5014 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5016 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5017 !vcpu->guest_xcr0_loaded) {
5018 /* kvm_set_xcr() also depends on this */
5019 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5020 vcpu->guest_xcr0_loaded = 1;
5024 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5026 if (vcpu->guest_xcr0_loaded) {
5027 if (vcpu->arch.xcr0 != host_xcr0)
5028 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5029 vcpu->guest_xcr0_loaded = 0;
5033 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5036 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5037 vcpu->run->request_interrupt_window;
5039 if (vcpu->requests) {
5040 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5041 kvm_mmu_unload(vcpu);
5042 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5043 __kvm_migrate_timers(vcpu);
5044 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5045 r = kvm_guest_time_update(vcpu);
5049 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5050 kvm_mmu_sync_roots(vcpu);
5051 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5052 kvm_x86_ops->tlb_flush(vcpu);
5053 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5054 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5058 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5059 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5063 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5064 vcpu->fpu_active = 0;
5065 kvm_x86_ops->fpu_deactivate(vcpu);
5069 r = kvm_mmu_reload(vcpu);
5073 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5074 inject_pending_event(vcpu);
5076 /* enable NMI/IRQ window open exits if needed */
5077 if (vcpu->arch.nmi_pending)
5078 kvm_x86_ops->enable_nmi_window(vcpu);
5079 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5080 kvm_x86_ops->enable_irq_window(vcpu);
5082 if (kvm_lapic_enabled(vcpu)) {
5083 update_cr8_intercept(vcpu);
5084 kvm_lapic_sync_to_vapic(vcpu);
5090 kvm_x86_ops->prepare_guest_switch(vcpu);
5091 if (vcpu->fpu_active)
5092 kvm_load_guest_fpu(vcpu);
5093 kvm_load_guest_xcr0(vcpu);
5095 atomic_set(&vcpu->guest_mode, 1);
5098 local_irq_disable();
5100 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5101 || need_resched() || signal_pending(current)) {
5102 atomic_set(&vcpu->guest_mode, 0);
5106 kvm_x86_ops->cancel_injection(vcpu);
5111 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5115 if (unlikely(vcpu->arch.switch_db_regs)) {
5117 set_debugreg(vcpu->arch.eff_db[0], 0);
5118 set_debugreg(vcpu->arch.eff_db[1], 1);
5119 set_debugreg(vcpu->arch.eff_db[2], 2);
5120 set_debugreg(vcpu->arch.eff_db[3], 3);
5123 trace_kvm_entry(vcpu->vcpu_id);
5124 kvm_x86_ops->run(vcpu);
5127 * If the guest has used debug registers, at least dr7
5128 * will be disabled while returning to the host.
5129 * If we don't have active breakpoints in the host, we don't
5130 * care about the messed up debug address registers. But if
5131 * we have some of them active, restore the old state.
5133 if (hw_breakpoint_active())
5134 hw_breakpoint_restore();
5136 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5138 atomic_set(&vcpu->guest_mode, 0);
5145 * We must have an instruction between local_irq_enable() and
5146 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5147 * the interrupt shadow. The stat.exits increment will do nicely.
5148 * But we need to prevent reordering, hence this barrier():
5156 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5159 * Profile KVM exit RIPs:
5161 if (unlikely(prof_on == KVM_PROFILING)) {
5162 unsigned long rip = kvm_rip_read(vcpu);
5163 profile_hit(KVM_PROFILING, (void *)rip);
5167 kvm_lapic_sync_from_vapic(vcpu);
5169 r = kvm_x86_ops->handle_exit(vcpu);
5175 static int __vcpu_run(struct kvm_vcpu *vcpu)
5178 struct kvm *kvm = vcpu->kvm;
5180 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5181 pr_debug("vcpu %d received sipi with vector # %x\n",
5182 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5183 kvm_lapic_reset(vcpu);
5184 r = kvm_arch_vcpu_reset(vcpu);
5187 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5190 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5195 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
5196 r = vcpu_enter_guest(vcpu);
5198 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5199 kvm_vcpu_block(vcpu);
5200 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5201 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5203 switch(vcpu->arch.mp_state) {
5204 case KVM_MP_STATE_HALTED:
5205 vcpu->arch.mp_state =
5206 KVM_MP_STATE_RUNNABLE;
5207 case KVM_MP_STATE_RUNNABLE:
5209 case KVM_MP_STATE_SIPI_RECEIVED:
5220 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5221 if (kvm_cpu_has_pending_timer(vcpu))
5222 kvm_inject_pending_timer_irqs(vcpu);
5224 if (dm_request_for_irq_injection(vcpu)) {
5226 vcpu->run->exit_reason = KVM_EXIT_INTR;
5227 ++vcpu->stat.request_irq_exits;
5229 if (signal_pending(current)) {
5231 vcpu->run->exit_reason = KVM_EXIT_INTR;
5232 ++vcpu->stat.signal_exits;
5234 if (need_resched()) {
5235 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5237 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5241 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5248 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5253 if (vcpu->sigset_active)
5254 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5256 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5257 kvm_vcpu_block(vcpu);
5258 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5263 /* re-sync apic's tpr */
5264 if (!irqchip_in_kernel(vcpu->kvm))
5265 kvm_set_cr8(vcpu, kvm_run->cr8);
5267 if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5268 if (vcpu->mmio_needed) {
5269 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5270 vcpu->mmio_read_completed = 1;
5271 vcpu->mmio_needed = 0;
5273 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5274 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5275 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5276 if (r != EMULATE_DONE) {
5281 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5282 kvm_register_write(vcpu, VCPU_REGS_RAX,
5283 kvm_run->hypercall.ret);
5285 r = __vcpu_run(vcpu);
5288 post_kvm_run_save(vcpu);
5289 if (vcpu->sigset_active)
5290 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5295 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5297 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5298 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5299 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5300 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5301 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5302 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5303 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5304 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5305 #ifdef CONFIG_X86_64
5306 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5307 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5308 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5309 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5310 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5311 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5312 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5313 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5316 regs->rip = kvm_rip_read(vcpu);
5317 regs->rflags = kvm_get_rflags(vcpu);
5322 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5324 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5325 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5326 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5327 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5328 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5329 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5330 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5331 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5332 #ifdef CONFIG_X86_64
5333 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5334 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5335 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5336 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5337 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5338 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5339 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5340 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5343 kvm_rip_write(vcpu, regs->rip);
5344 kvm_set_rflags(vcpu, regs->rflags);
5346 vcpu->arch.exception.pending = false;
5348 kvm_make_request(KVM_REQ_EVENT, vcpu);
5353 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5355 struct kvm_segment cs;
5357 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5361 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5363 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5364 struct kvm_sregs *sregs)
5368 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5369 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5370 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5371 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5372 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5373 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5375 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5376 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5378 kvm_x86_ops->get_idt(vcpu, &dt);
5379 sregs->idt.limit = dt.size;
5380 sregs->idt.base = dt.address;
5381 kvm_x86_ops->get_gdt(vcpu, &dt);
5382 sregs->gdt.limit = dt.size;
5383 sregs->gdt.base = dt.address;
5385 sregs->cr0 = kvm_read_cr0(vcpu);
5386 sregs->cr2 = vcpu->arch.cr2;
5387 sregs->cr3 = vcpu->arch.cr3;
5388 sregs->cr4 = kvm_read_cr4(vcpu);
5389 sregs->cr8 = kvm_get_cr8(vcpu);
5390 sregs->efer = vcpu->arch.efer;
5391 sregs->apic_base = kvm_get_apic_base(vcpu);
5393 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5395 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5396 set_bit(vcpu->arch.interrupt.nr,
5397 (unsigned long *)sregs->interrupt_bitmap);
5402 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5403 struct kvm_mp_state *mp_state)
5405 mp_state->mp_state = vcpu->arch.mp_state;
5409 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5410 struct kvm_mp_state *mp_state)
5412 vcpu->arch.mp_state = mp_state->mp_state;
5413 kvm_make_request(KVM_REQ_EVENT, vcpu);
5417 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5418 bool has_error_code, u32 error_code)
5420 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5423 init_emulate_ctxt(vcpu);
5425 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5426 tss_selector, reason, has_error_code,
5430 return EMULATE_FAIL;
5432 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5433 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5434 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5435 kvm_make_request(KVM_REQ_EVENT, vcpu);
5436 return EMULATE_DONE;
5438 EXPORT_SYMBOL_GPL(kvm_task_switch);
5440 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5441 struct kvm_sregs *sregs)
5443 int mmu_reset_needed = 0;
5444 int pending_vec, max_bits;
5447 dt.size = sregs->idt.limit;
5448 dt.address = sregs->idt.base;
5449 kvm_x86_ops->set_idt(vcpu, &dt);
5450 dt.size = sregs->gdt.limit;
5451 dt.address = sregs->gdt.base;
5452 kvm_x86_ops->set_gdt(vcpu, &dt);
5454 vcpu->arch.cr2 = sregs->cr2;
5455 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5456 vcpu->arch.cr3 = sregs->cr3;
5458 kvm_set_cr8(vcpu, sregs->cr8);
5460 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5461 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5462 kvm_set_apic_base(vcpu, sregs->apic_base);
5464 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5465 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5466 vcpu->arch.cr0 = sregs->cr0;
5468 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5469 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5470 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5471 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5472 mmu_reset_needed = 1;
5475 if (mmu_reset_needed)
5476 kvm_mmu_reset_context(vcpu);
5478 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5479 pending_vec = find_first_bit(
5480 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5481 if (pending_vec < max_bits) {
5482 kvm_queue_interrupt(vcpu, pending_vec, false);
5483 pr_debug("Set back pending irq %d\n", pending_vec);
5484 if (irqchip_in_kernel(vcpu->kvm))
5485 kvm_pic_clear_isr_ack(vcpu->kvm);
5488 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5489 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5490 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5491 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5492 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5493 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5495 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5496 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5498 update_cr8_intercept(vcpu);
5500 /* Older userspace won't unhalt the vcpu on reset. */
5501 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5502 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5504 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5506 kvm_make_request(KVM_REQ_EVENT, vcpu);
5511 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5512 struct kvm_guest_debug *dbg)
5514 unsigned long rflags;
5517 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5519 if (vcpu->arch.exception.pending)
5521 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5522 kvm_queue_exception(vcpu, DB_VECTOR);
5524 kvm_queue_exception(vcpu, BP_VECTOR);
5528 * Read rflags as long as potentially injected trace flags are still
5531 rflags = kvm_get_rflags(vcpu);
5533 vcpu->guest_debug = dbg->control;
5534 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5535 vcpu->guest_debug = 0;
5537 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5538 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5539 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5540 vcpu->arch.switch_db_regs =
5541 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5543 for (i = 0; i < KVM_NR_DB_REGS; i++)
5544 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5545 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5548 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5549 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5550 get_segment_base(vcpu, VCPU_SREG_CS);
5553 * Trigger an rflags update that will inject or remove the trace
5556 kvm_set_rflags(vcpu, rflags);
5558 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5568 * Translate a guest virtual address to a guest physical address.
5570 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5571 struct kvm_translation *tr)
5573 unsigned long vaddr = tr->linear_address;
5577 idx = srcu_read_lock(&vcpu->kvm->srcu);
5578 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5579 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5580 tr->physical_address = gpa;
5581 tr->valid = gpa != UNMAPPED_GVA;
5588 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5590 struct i387_fxsave_struct *fxsave =
5591 &vcpu->arch.guest_fpu.state->fxsave;
5593 memcpy(fpu->fpr, fxsave->st_space, 128);
5594 fpu->fcw = fxsave->cwd;
5595 fpu->fsw = fxsave->swd;
5596 fpu->ftwx = fxsave->twd;
5597 fpu->last_opcode = fxsave->fop;
5598 fpu->last_ip = fxsave->rip;
5599 fpu->last_dp = fxsave->rdp;
5600 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5605 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5607 struct i387_fxsave_struct *fxsave =
5608 &vcpu->arch.guest_fpu.state->fxsave;
5610 memcpy(fxsave->st_space, fpu->fpr, 128);
5611 fxsave->cwd = fpu->fcw;
5612 fxsave->swd = fpu->fsw;
5613 fxsave->twd = fpu->ftwx;
5614 fxsave->fop = fpu->last_opcode;
5615 fxsave->rip = fpu->last_ip;
5616 fxsave->rdp = fpu->last_dp;
5617 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5622 int fx_init(struct kvm_vcpu *vcpu)
5626 err = fpu_alloc(&vcpu->arch.guest_fpu);
5630 fpu_finit(&vcpu->arch.guest_fpu);
5633 * Ensure guest xcr0 is valid for loading
5635 vcpu->arch.xcr0 = XSTATE_FP;
5637 vcpu->arch.cr0 |= X86_CR0_ET;
5641 EXPORT_SYMBOL_GPL(fx_init);
5643 static void fx_free(struct kvm_vcpu *vcpu)
5645 fpu_free(&vcpu->arch.guest_fpu);
5648 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5650 if (vcpu->guest_fpu_loaded)
5654 * Restore all possible states in the guest,
5655 * and assume host would use all available bits.
5656 * Guest xcr0 would be loaded later.
5658 kvm_put_guest_xcr0(vcpu);
5659 vcpu->guest_fpu_loaded = 1;
5660 unlazy_fpu(current);
5661 fpu_restore_checking(&vcpu->arch.guest_fpu);
5665 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5667 kvm_put_guest_xcr0(vcpu);
5669 if (!vcpu->guest_fpu_loaded)
5672 vcpu->guest_fpu_loaded = 0;
5673 fpu_save_init(&vcpu->arch.guest_fpu);
5674 ++vcpu->stat.fpu_reload;
5675 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5679 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5681 if (vcpu->arch.time_page) {
5682 kvm_release_page_dirty(vcpu->arch.time_page);
5683 vcpu->arch.time_page = NULL;
5686 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5688 kvm_x86_ops->vcpu_free(vcpu);
5691 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5694 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5695 printk_once(KERN_WARNING
5696 "kvm: SMP vm created on host with unstable TSC; "
5697 "guest TSC will not be reliable\n");
5698 return kvm_x86_ops->vcpu_create(kvm, id);
5701 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5705 vcpu->arch.mtrr_state.have_fixed = 1;
5707 r = kvm_arch_vcpu_reset(vcpu);
5709 r = kvm_mmu_setup(vcpu);
5716 kvm_x86_ops->vcpu_free(vcpu);
5720 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5723 kvm_mmu_unload(vcpu);
5727 kvm_x86_ops->vcpu_free(vcpu);
5730 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5732 vcpu->arch.nmi_pending = false;
5733 vcpu->arch.nmi_injected = false;
5735 vcpu->arch.switch_db_regs = 0;
5736 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5737 vcpu->arch.dr6 = DR6_FIXED_1;
5738 vcpu->arch.dr7 = DR7_FIXED_1;
5740 kvm_make_request(KVM_REQ_EVENT, vcpu);
5742 return kvm_x86_ops->vcpu_reset(vcpu);
5745 int kvm_arch_hardware_enable(void *garbage)
5748 struct kvm_vcpu *vcpu;
5751 kvm_shared_msr_cpu_online();
5752 list_for_each_entry(kvm, &vm_list, vm_list)
5753 kvm_for_each_vcpu(i, vcpu, kvm)
5754 if (vcpu->cpu == smp_processor_id())
5755 kvm_request_guest_time_update(vcpu);
5756 return kvm_x86_ops->hardware_enable(garbage);
5759 void kvm_arch_hardware_disable(void *garbage)
5761 kvm_x86_ops->hardware_disable(garbage);
5762 drop_user_return_notifiers(garbage);
5765 int kvm_arch_hardware_setup(void)
5767 return kvm_x86_ops->hardware_setup();
5770 void kvm_arch_hardware_unsetup(void)
5772 kvm_x86_ops->hardware_unsetup();
5775 void kvm_arch_check_processor_compat(void *rtn)
5777 kvm_x86_ops->check_processor_compatibility(rtn);
5780 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5786 BUG_ON(vcpu->kvm == NULL);
5789 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5790 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5791 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5792 vcpu->arch.mmu.translate_gpa = translate_gpa;
5793 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5794 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5795 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5797 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5799 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5804 vcpu->arch.pio_data = page_address(page);
5806 r = kvm_mmu_create(vcpu);
5808 goto fail_free_pio_data;
5810 if (irqchip_in_kernel(kvm)) {
5811 r = kvm_create_lapic(vcpu);
5813 goto fail_mmu_destroy;
5816 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5818 if (!vcpu->arch.mce_banks) {
5820 goto fail_free_lapic;
5822 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5824 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5825 goto fail_free_mce_banks;
5828 fail_free_mce_banks:
5829 kfree(vcpu->arch.mce_banks);
5831 kvm_free_lapic(vcpu);
5833 kvm_mmu_destroy(vcpu);
5835 free_page((unsigned long)vcpu->arch.pio_data);
5840 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5844 kfree(vcpu->arch.mce_banks);
5845 kvm_free_lapic(vcpu);
5846 idx = srcu_read_lock(&vcpu->kvm->srcu);
5847 kvm_mmu_destroy(vcpu);
5848 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5849 free_page((unsigned long)vcpu->arch.pio_data);
5852 struct kvm *kvm_arch_create_vm(void)
5854 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5857 return ERR_PTR(-ENOMEM);
5859 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5860 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5862 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5863 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5865 spin_lock_init(&kvm->arch.tsc_write_lock);
5870 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5873 kvm_mmu_unload(vcpu);
5877 static void kvm_free_vcpus(struct kvm *kvm)
5880 struct kvm_vcpu *vcpu;
5883 * Unpin any mmu pages first.
5885 kvm_for_each_vcpu(i, vcpu, kvm)
5886 kvm_unload_vcpu_mmu(vcpu);
5887 kvm_for_each_vcpu(i, vcpu, kvm)
5888 kvm_arch_vcpu_free(vcpu);
5890 mutex_lock(&kvm->lock);
5891 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5892 kvm->vcpus[i] = NULL;
5894 atomic_set(&kvm->online_vcpus, 0);
5895 mutex_unlock(&kvm->lock);
5898 void kvm_arch_sync_events(struct kvm *kvm)
5900 kvm_free_all_assigned_devices(kvm);
5904 void kvm_arch_destroy_vm(struct kvm *kvm)
5906 kvm_iommu_unmap_guest(kvm);
5907 kfree(kvm->arch.vpic);
5908 kfree(kvm->arch.vioapic);
5909 kvm_free_vcpus(kvm);
5910 kvm_free_physmem(kvm);
5911 if (kvm->arch.apic_access_page)
5912 put_page(kvm->arch.apic_access_page);
5913 if (kvm->arch.ept_identity_pagetable)
5914 put_page(kvm->arch.ept_identity_pagetable);
5915 cleanup_srcu_struct(&kvm->srcu);
5919 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5920 struct kvm_memory_slot *memslot,
5921 struct kvm_memory_slot old,
5922 struct kvm_userspace_memory_region *mem,
5925 int npages = memslot->npages;
5926 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5928 /* Prevent internal slot pages from being moved by fork()/COW. */
5929 if (memslot->id >= KVM_MEMORY_SLOTS)
5930 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5932 /*To keep backward compatibility with older userspace,
5933 *x86 needs to hanlde !user_alloc case.
5936 if (npages && !old.rmap) {
5937 unsigned long userspace_addr;
5939 down_write(¤t->mm->mmap_sem);
5940 userspace_addr = do_mmap(NULL, 0,
5942 PROT_READ | PROT_WRITE,
5945 up_write(¤t->mm->mmap_sem);
5947 if (IS_ERR((void *)userspace_addr))
5948 return PTR_ERR((void *)userspace_addr);
5950 memslot->userspace_addr = userspace_addr;
5958 void kvm_arch_commit_memory_region(struct kvm *kvm,
5959 struct kvm_userspace_memory_region *mem,
5960 struct kvm_memory_slot old,
5964 int npages = mem->memory_size >> PAGE_SHIFT;
5966 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5969 down_write(¤t->mm->mmap_sem);
5970 ret = do_munmap(current->mm, old.userspace_addr,
5971 old.npages * PAGE_SIZE);
5972 up_write(¤t->mm->mmap_sem);
5975 "kvm_vm_ioctl_set_memory_region: "
5976 "failed to munmap memory\n");
5979 spin_lock(&kvm->mmu_lock);
5980 if (!kvm->arch.n_requested_mmu_pages) {
5981 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5982 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5985 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5986 spin_unlock(&kvm->mmu_lock);
5989 void kvm_arch_flush_shadow(struct kvm *kvm)
5991 kvm_mmu_zap_all(kvm);
5992 kvm_reload_remote_mmus(kvm);
5995 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5997 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5998 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5999 || vcpu->arch.nmi_pending ||
6000 (kvm_arch_interrupt_allowed(vcpu) &&
6001 kvm_cpu_has_interrupt(vcpu));
6004 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6007 int cpu = vcpu->cpu;
6009 if (waitqueue_active(&vcpu->wq)) {
6010 wake_up_interruptible(&vcpu->wq);
6011 ++vcpu->stat.halt_wakeup;
6015 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6016 if (atomic_xchg(&vcpu->guest_mode, 0))
6017 smp_send_reschedule(cpu);
6021 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6023 return kvm_x86_ops->interrupt_allowed(vcpu);
6026 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6028 unsigned long current_rip = kvm_rip_read(vcpu) +
6029 get_segment_base(vcpu, VCPU_SREG_CS);
6031 return current_rip == linear_rip;
6033 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6035 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6037 unsigned long rflags;
6039 rflags = kvm_x86_ops->get_rflags(vcpu);
6040 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6041 rflags &= ~X86_EFLAGS_TF;
6044 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6046 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6048 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6049 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6050 rflags |= X86_EFLAGS_TF;
6051 kvm_x86_ops->set_rflags(vcpu, rflags);
6052 kvm_make_request(KVM_REQ_EVENT, vcpu);
6054 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6056 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6057 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6058 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6059 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6060 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6061 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6062 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6063 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6064 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6065 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6066 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6067 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);