2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <trace/events/kvm.h>
43 #undef TRACE_INCLUDE_FILE
44 #define CREATE_TRACE_POINTS
47 #include <asm/debugreg.h>
48 #include <asm/uaccess.h>
54 #define MAX_IO_MSRS 256
55 #define CR0_RESERVED_BITS \
56 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
57 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
58 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
59 #define CR4_RESERVED_BITS \
60 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
61 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
62 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
63 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
65 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
67 #define KVM_MAX_MCE_BANKS 32
68 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
71 * - enable syscall per default because its emulated by KVM
72 * - enable LME and LMA per default on 64 bit KVM
75 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
77 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
85 struct kvm_cpuid_entry2 __user *entries);
87 struct kvm_x86_ops *kvm_x86_ops;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
93 #define KVM_NR_SHARED_MSRS 16
95 struct kvm_shared_msrs_global {
97 u32 msrs[KVM_NR_SHARED_MSRS];
100 struct kvm_shared_msrs {
101 struct user_return_notifier urn;
103 struct kvm_shared_msr_values {
106 } values[KVM_NR_SHARED_MSRS];
109 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
110 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
112 struct kvm_stats_debugfs_item debugfs_entries[] = {
113 { "pf_fixed", VCPU_STAT(pf_fixed) },
114 { "pf_guest", VCPU_STAT(pf_guest) },
115 { "tlb_flush", VCPU_STAT(tlb_flush) },
116 { "invlpg", VCPU_STAT(invlpg) },
117 { "exits", VCPU_STAT(exits) },
118 { "io_exits", VCPU_STAT(io_exits) },
119 { "mmio_exits", VCPU_STAT(mmio_exits) },
120 { "signal_exits", VCPU_STAT(signal_exits) },
121 { "irq_window", VCPU_STAT(irq_window_exits) },
122 { "nmi_window", VCPU_STAT(nmi_window_exits) },
123 { "halt_exits", VCPU_STAT(halt_exits) },
124 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
125 { "hypercalls", VCPU_STAT(hypercalls) },
126 { "request_irq", VCPU_STAT(request_irq_exits) },
127 { "irq_exits", VCPU_STAT(irq_exits) },
128 { "host_state_reload", VCPU_STAT(host_state_reload) },
129 { "efer_reload", VCPU_STAT(efer_reload) },
130 { "fpu_reload", VCPU_STAT(fpu_reload) },
131 { "insn_emulation", VCPU_STAT(insn_emulation) },
132 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
133 { "irq_injections", VCPU_STAT(irq_injections) },
134 { "nmi_injections", VCPU_STAT(nmi_injections) },
135 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
136 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
137 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
138 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
139 { "mmu_flooded", VM_STAT(mmu_flooded) },
140 { "mmu_recycled", VM_STAT(mmu_recycled) },
141 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
142 { "mmu_unsync", VM_STAT(mmu_unsync) },
143 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
144 { "largepages", VM_STAT(lpages) },
148 static void kvm_on_user_return(struct user_return_notifier *urn)
151 struct kvm_shared_msrs *locals
152 = container_of(urn, struct kvm_shared_msrs, urn);
153 struct kvm_shared_msr_values *values;
155 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
156 values = &locals->values[slot];
157 if (values->host != values->curr) {
158 wrmsrl(shared_msrs_global.msrs[slot], values->host);
159 values->curr = values->host;
162 locals->registered = false;
163 user_return_notifier_unregister(urn);
166 static void shared_msr_update(unsigned slot, u32 msr)
168 struct kvm_shared_msrs *smsr;
171 smsr = &__get_cpu_var(shared_msrs);
172 /* only read, and nobody should modify it at this time,
173 * so don't need lock */
174 if (slot >= shared_msrs_global.nr) {
175 printk(KERN_ERR "kvm: invalid MSR slot!");
178 rdmsrl_safe(msr, &value);
179 smsr->values[slot].host = value;
180 smsr->values[slot].curr = value;
183 void kvm_define_shared_msr(unsigned slot, u32 msr)
185 if (slot >= shared_msrs_global.nr)
186 shared_msrs_global.nr = slot + 1;
187 shared_msrs_global.msrs[slot] = msr;
188 /* we need ensured the shared_msr_global have been updated */
191 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
193 static void kvm_shared_msr_cpu_online(void)
197 for (i = 0; i < shared_msrs_global.nr; ++i)
198 shared_msr_update(i, shared_msrs_global.msrs[i]);
201 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
203 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
205 if (((value ^ smsr->values[slot].curr) & mask) == 0)
207 smsr->values[slot].curr = value;
208 wrmsrl(shared_msrs_global.msrs[slot], value);
209 if (!smsr->registered) {
210 smsr->urn.on_user_return = kvm_on_user_return;
211 user_return_notifier_register(&smsr->urn);
212 smsr->registered = true;
215 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
217 static void drop_user_return_notifiers(void *ignore)
219 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
221 if (smsr->registered)
222 kvm_on_user_return(&smsr->urn);
225 unsigned long segment_base(u16 selector)
227 struct descriptor_table gdt;
228 struct desc_struct *d;
229 unsigned long table_base;
236 table_base = gdt.base;
238 if (selector & 4) { /* from ldt */
239 u16 ldt_selector = kvm_read_ldt();
241 table_base = segment_base(ldt_selector);
243 d = (struct desc_struct *)(table_base + (selector & ~7));
244 v = get_desc_base(d);
246 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
247 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
251 EXPORT_SYMBOL_GPL(segment_base);
253 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
255 if (irqchip_in_kernel(vcpu->kvm))
256 return vcpu->arch.apic_base;
258 return vcpu->arch.apic_base;
260 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
262 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
264 /* TODO: reserve bits check */
265 if (irqchip_in_kernel(vcpu->kvm))
266 kvm_lapic_set_base(vcpu, data);
268 vcpu->arch.apic_base = data;
270 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
272 #define EXCPT_BENIGN 0
273 #define EXCPT_CONTRIBUTORY 1
276 static int exception_class(int vector)
286 return EXCPT_CONTRIBUTORY;
293 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
294 unsigned nr, bool has_error, u32 error_code)
299 if (!vcpu->arch.exception.pending) {
301 vcpu->arch.exception.pending = true;
302 vcpu->arch.exception.has_error_code = has_error;
303 vcpu->arch.exception.nr = nr;
304 vcpu->arch.exception.error_code = error_code;
308 /* to check exception */
309 prev_nr = vcpu->arch.exception.nr;
310 if (prev_nr == DF_VECTOR) {
311 /* triple fault -> shutdown */
312 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
315 class1 = exception_class(prev_nr);
316 class2 = exception_class(nr);
317 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
318 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
319 /* generate double fault per SDM Table 5-5 */
320 vcpu->arch.exception.pending = true;
321 vcpu->arch.exception.has_error_code = true;
322 vcpu->arch.exception.nr = DF_VECTOR;
323 vcpu->arch.exception.error_code = 0;
325 /* replace previous exception with a new one in a hope
326 that instruction re-execution will regenerate lost
331 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
333 kvm_multiple_exception(vcpu, nr, false, 0);
335 EXPORT_SYMBOL_GPL(kvm_queue_exception);
337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
340 ++vcpu->stat.pf_guest;
341 vcpu->arch.cr2 = addr;
342 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
345 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
347 vcpu->arch.nmi_pending = 1;
349 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
351 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
353 kvm_multiple_exception(vcpu, nr, true, error_code);
355 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
358 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
359 * a #GP and return false.
361 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
363 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
365 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
368 EXPORT_SYMBOL_GPL(kvm_require_cpl);
371 * Load the pae pdptrs. Return true is they are all valid.
373 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
375 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
376 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
379 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
381 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
382 offset * sizeof(u64), sizeof(pdpte));
387 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
388 if (is_present_gpte(pdpte[i]) &&
389 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
396 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
397 __set_bit(VCPU_EXREG_PDPTR,
398 (unsigned long *)&vcpu->arch.regs_avail);
399 __set_bit(VCPU_EXREG_PDPTR,
400 (unsigned long *)&vcpu->arch.regs_dirty);
405 EXPORT_SYMBOL_GPL(load_pdptrs);
407 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
409 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
413 if (is_long_mode(vcpu) || !is_pae(vcpu))
416 if (!test_bit(VCPU_EXREG_PDPTR,
417 (unsigned long *)&vcpu->arch.regs_avail))
420 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
423 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
429 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
431 if (cr0 & CR0_RESERVED_BITS) {
432 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
433 cr0, vcpu->arch.cr0);
434 kvm_inject_gp(vcpu, 0);
438 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
439 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
440 kvm_inject_gp(vcpu, 0);
444 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
445 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
446 "and a clear PE flag\n");
447 kvm_inject_gp(vcpu, 0);
451 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
453 if ((vcpu->arch.shadow_efer & EFER_LME)) {
457 printk(KERN_DEBUG "set_cr0: #GP, start paging "
458 "in long mode while PAE is disabled\n");
459 kvm_inject_gp(vcpu, 0);
462 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
464 printk(KERN_DEBUG "set_cr0: #GP, start paging "
465 "in long mode while CS.L == 1\n");
466 kvm_inject_gp(vcpu, 0);
472 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
473 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
475 kvm_inject_gp(vcpu, 0);
481 kvm_x86_ops->set_cr0(vcpu, cr0);
482 vcpu->arch.cr0 = cr0;
484 kvm_mmu_reset_context(vcpu);
487 EXPORT_SYMBOL_GPL(kvm_set_cr0);
489 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
491 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
493 EXPORT_SYMBOL_GPL(kvm_lmsw);
495 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
497 unsigned long old_cr4 = kvm_read_cr4(vcpu);
498 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
500 if (cr4 & CR4_RESERVED_BITS) {
501 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
502 kvm_inject_gp(vcpu, 0);
506 if (is_long_mode(vcpu)) {
507 if (!(cr4 & X86_CR4_PAE)) {
508 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
510 kvm_inject_gp(vcpu, 0);
513 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
514 && ((cr4 ^ old_cr4) & pdptr_bits)
515 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
516 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
517 kvm_inject_gp(vcpu, 0);
521 if (cr4 & X86_CR4_VMXE) {
522 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
523 kvm_inject_gp(vcpu, 0);
526 kvm_x86_ops->set_cr4(vcpu, cr4);
527 vcpu->arch.cr4 = cr4;
528 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
529 kvm_mmu_reset_context(vcpu);
531 EXPORT_SYMBOL_GPL(kvm_set_cr4);
533 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
535 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
536 kvm_mmu_sync_roots(vcpu);
537 kvm_mmu_flush_tlb(vcpu);
541 if (is_long_mode(vcpu)) {
542 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
543 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
544 kvm_inject_gp(vcpu, 0);
549 if (cr3 & CR3_PAE_RESERVED_BITS) {
551 "set_cr3: #GP, reserved bits\n");
552 kvm_inject_gp(vcpu, 0);
555 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
556 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
558 kvm_inject_gp(vcpu, 0);
563 * We don't check reserved bits in nonpae mode, because
564 * this isn't enforced, and VMware depends on this.
569 * Does the new cr3 value map to physical memory? (Note, we
570 * catch an invalid cr3 even in real-mode, because it would
571 * cause trouble later on when we turn on paging anyway.)
573 * A real CPU would silently accept an invalid cr3 and would
574 * attempt to use it - with largely undefined (and often hard
575 * to debug) behavior on the guest side.
577 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
578 kvm_inject_gp(vcpu, 0);
580 vcpu->arch.cr3 = cr3;
581 vcpu->arch.mmu.new_cr3(vcpu);
584 EXPORT_SYMBOL_GPL(kvm_set_cr3);
586 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
588 if (cr8 & CR8_RESERVED_BITS) {
589 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
590 kvm_inject_gp(vcpu, 0);
593 if (irqchip_in_kernel(vcpu->kvm))
594 kvm_lapic_set_tpr(vcpu, cr8);
596 vcpu->arch.cr8 = cr8;
598 EXPORT_SYMBOL_GPL(kvm_set_cr8);
600 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
602 if (irqchip_in_kernel(vcpu->kvm))
603 return kvm_lapic_get_cr8(vcpu);
605 return vcpu->arch.cr8;
607 EXPORT_SYMBOL_GPL(kvm_get_cr8);
609 static inline u32 bit(int bitno)
611 return 1 << (bitno & 31);
615 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
616 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
618 * This list is modified at module load time to reflect the
619 * capabilities of the host cpu. This capabilities test skips MSRs that are
620 * kvm-specific. Those are put in the beginning of the list.
623 #define KVM_SAVE_MSRS_BEGIN 2
624 static u32 msrs_to_save[] = {
625 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
626 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
629 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
631 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
634 static unsigned num_msrs_to_save;
636 static u32 emulated_msrs[] = {
637 MSR_IA32_MISC_ENABLE,
640 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
642 if (efer & efer_reserved_bits) {
643 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
645 kvm_inject_gp(vcpu, 0);
650 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
651 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
652 kvm_inject_gp(vcpu, 0);
656 if (efer & EFER_FFXSR) {
657 struct kvm_cpuid_entry2 *feat;
659 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
660 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
661 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
662 kvm_inject_gp(vcpu, 0);
667 if (efer & EFER_SVME) {
668 struct kvm_cpuid_entry2 *feat;
670 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
671 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
672 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
673 kvm_inject_gp(vcpu, 0);
678 kvm_x86_ops->set_efer(vcpu, efer);
681 efer |= vcpu->arch.shadow_efer & EFER_LMA;
683 vcpu->arch.shadow_efer = efer;
685 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
686 kvm_mmu_reset_context(vcpu);
689 void kvm_enable_efer_bits(u64 mask)
691 efer_reserved_bits &= ~mask;
693 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
697 * Writes msr value into into the appropriate "register".
698 * Returns 0 on success, non-0 otherwise.
699 * Assumes vcpu_load() was already called.
701 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
703 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
707 * Adapt set_msr() to msr_io()'s calling convention
709 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
711 return kvm_set_msr(vcpu, index, *data);
714 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
717 struct pvclock_wall_clock wc;
718 struct timespec boot;
725 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
728 * The guest calculates current wall clock time by adding
729 * system time (updated by kvm_write_guest_time below) to the
730 * wall clock specified here. guest system time equals host
731 * system time for us, thus we must fill in host boot time here.
735 wc.sec = boot.tv_sec;
736 wc.nsec = boot.tv_nsec;
737 wc.version = version;
739 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
742 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
745 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
747 uint32_t quotient, remainder;
749 /* Don't try to replace with do_div(), this one calculates
750 * "(dividend << 32) / divisor" */
752 : "=a" (quotient), "=d" (remainder)
753 : "0" (0), "1" (dividend), "r" (divisor) );
757 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
759 uint64_t nsecs = 1000000000LL;
764 tps64 = tsc_khz * 1000LL;
765 while (tps64 > nsecs*2) {
770 tps32 = (uint32_t)tps64;
771 while (tps32 <= (uint32_t)nsecs) {
776 hv_clock->tsc_shift = shift;
777 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
779 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
780 __func__, tsc_khz, hv_clock->tsc_shift,
781 hv_clock->tsc_to_system_mul);
784 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
786 static void kvm_write_guest_time(struct kvm_vcpu *v)
790 struct kvm_vcpu_arch *vcpu = &v->arch;
792 unsigned long this_tsc_khz;
794 if ((!vcpu->time_page))
797 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
798 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
799 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
800 vcpu->hv_clock_tsc_khz = this_tsc_khz;
802 put_cpu_var(cpu_tsc_khz);
804 /* Keep irq disabled to prevent changes to the clock */
805 local_irq_save(flags);
806 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
808 monotonic_to_bootbased(&ts);
809 local_irq_restore(flags);
811 /* With all the info we got, fill in the values */
813 vcpu->hv_clock.system_time = ts.tv_nsec +
814 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
817 * The interface expects us to write an even number signaling that the
818 * update is finished. Since the guest won't see the intermediate
819 * state, we just increase by 2 at the end.
821 vcpu->hv_clock.version += 2;
823 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
825 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
826 sizeof(vcpu->hv_clock));
828 kunmap_atomic(shared_kaddr, KM_USER0);
830 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
833 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
835 struct kvm_vcpu_arch *vcpu = &v->arch;
837 if (!vcpu->time_page)
839 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
843 static bool msr_mtrr_valid(unsigned msr)
846 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
847 case MSR_MTRRfix64K_00000:
848 case MSR_MTRRfix16K_80000:
849 case MSR_MTRRfix16K_A0000:
850 case MSR_MTRRfix4K_C0000:
851 case MSR_MTRRfix4K_C8000:
852 case MSR_MTRRfix4K_D0000:
853 case MSR_MTRRfix4K_D8000:
854 case MSR_MTRRfix4K_E0000:
855 case MSR_MTRRfix4K_E8000:
856 case MSR_MTRRfix4K_F0000:
857 case MSR_MTRRfix4K_F8000:
858 case MSR_MTRRdefType:
859 case MSR_IA32_CR_PAT:
867 static bool valid_pat_type(unsigned t)
869 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
872 static bool valid_mtrr_type(unsigned t)
874 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
877 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
881 if (!msr_mtrr_valid(msr))
884 if (msr == MSR_IA32_CR_PAT) {
885 for (i = 0; i < 8; i++)
886 if (!valid_pat_type((data >> (i * 8)) & 0xff))
889 } else if (msr == MSR_MTRRdefType) {
892 return valid_mtrr_type(data & 0xff);
893 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
894 for (i = 0; i < 8 ; i++)
895 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
901 return valid_mtrr_type(data & 0xff);
904 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
906 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
908 if (!mtrr_valid(vcpu, msr, data))
911 if (msr == MSR_MTRRdefType) {
912 vcpu->arch.mtrr_state.def_type = data;
913 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
914 } else if (msr == MSR_MTRRfix64K_00000)
916 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
917 p[1 + msr - MSR_MTRRfix16K_80000] = data;
918 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
919 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
920 else if (msr == MSR_IA32_CR_PAT)
921 vcpu->arch.pat = data;
922 else { /* Variable MTRRs */
923 int idx, is_mtrr_mask;
926 idx = (msr - 0x200) / 2;
927 is_mtrr_mask = msr - 0x200 - 2 * idx;
930 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
933 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
937 kvm_mmu_reset_context(vcpu);
941 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
943 u64 mcg_cap = vcpu->arch.mcg_cap;
944 unsigned bank_num = mcg_cap & 0xff;
947 case MSR_IA32_MCG_STATUS:
948 vcpu->arch.mcg_status = data;
950 case MSR_IA32_MCG_CTL:
951 if (!(mcg_cap & MCG_CTL_P))
953 if (data != 0 && data != ~(u64)0)
955 vcpu->arch.mcg_ctl = data;
958 if (msr >= MSR_IA32_MC0_CTL &&
959 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
960 u32 offset = msr - MSR_IA32_MC0_CTL;
961 /* only 0 or all 1s can be written to IA32_MCi_CTL */
962 if ((offset & 0x3) == 0 &&
963 data != 0 && data != ~(u64)0)
965 vcpu->arch.mce_banks[offset] = data;
973 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
975 struct kvm *kvm = vcpu->kvm;
976 int lm = is_long_mode(vcpu);
977 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
978 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
979 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
980 : kvm->arch.xen_hvm_config.blob_size_32;
981 u32 page_num = data & ~PAGE_MASK;
982 u64 page_addr = data & PAGE_MASK;
987 if (page_num >= blob_size)
990 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
994 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
996 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1005 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1009 set_efer(vcpu, data);
1012 data &= ~(u64)0x40; /* ignore flush filter disable */
1014 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1019 case MSR_FAM10H_MMIO_CONF_BASE:
1021 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1026 case MSR_AMD64_NB_CFG:
1028 case MSR_IA32_DEBUGCTLMSR:
1030 /* We support the non-activated case already */
1032 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1033 /* Values other than LBR and BTF are vendor-specific,
1034 thus reserved and should throw a #GP */
1037 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1040 case MSR_IA32_UCODE_REV:
1041 case MSR_IA32_UCODE_WRITE:
1042 case MSR_VM_HSAVE_PA:
1043 case MSR_AMD64_PATCH_LOADER:
1045 case 0x200 ... 0x2ff:
1046 return set_msr_mtrr(vcpu, msr, data);
1047 case MSR_IA32_APICBASE:
1048 kvm_set_apic_base(vcpu, data);
1050 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1051 return kvm_x2apic_msr_write(vcpu, msr, data);
1052 case MSR_IA32_MISC_ENABLE:
1053 vcpu->arch.ia32_misc_enable_msr = data;
1055 case MSR_KVM_WALL_CLOCK:
1056 vcpu->kvm->arch.wall_clock = data;
1057 kvm_write_wall_clock(vcpu->kvm, data);
1059 case MSR_KVM_SYSTEM_TIME: {
1060 if (vcpu->arch.time_page) {
1061 kvm_release_page_dirty(vcpu->arch.time_page);
1062 vcpu->arch.time_page = NULL;
1065 vcpu->arch.time = data;
1067 /* we verify if the enable bit is set... */
1071 /* ...but clean it before doing the actual write */
1072 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1074 vcpu->arch.time_page =
1075 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1077 if (is_error_page(vcpu->arch.time_page)) {
1078 kvm_release_page_clean(vcpu->arch.time_page);
1079 vcpu->arch.time_page = NULL;
1082 kvm_request_guest_time_update(vcpu);
1085 case MSR_IA32_MCG_CTL:
1086 case MSR_IA32_MCG_STATUS:
1087 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1088 return set_msr_mce(vcpu, msr, data);
1090 /* Performance counters are not protected by a CPUID bit,
1091 * so we should check all of them in the generic path for the sake of
1092 * cross vendor migration.
1093 * Writing a zero into the event select MSRs disables them,
1094 * which we perfectly emulate ;-). Any other value should be at least
1095 * reported, some guests depend on them.
1097 case MSR_P6_EVNTSEL0:
1098 case MSR_P6_EVNTSEL1:
1099 case MSR_K7_EVNTSEL0:
1100 case MSR_K7_EVNTSEL1:
1101 case MSR_K7_EVNTSEL2:
1102 case MSR_K7_EVNTSEL3:
1104 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1105 "0x%x data 0x%llx\n", msr, data);
1107 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1108 * so we ignore writes to make it happy.
1110 case MSR_P6_PERFCTR0:
1111 case MSR_P6_PERFCTR1:
1112 case MSR_K7_PERFCTR0:
1113 case MSR_K7_PERFCTR1:
1114 case MSR_K7_PERFCTR2:
1115 case MSR_K7_PERFCTR3:
1116 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1117 "0x%x data 0x%llx\n", msr, data);
1120 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1121 return xen_hvm_config(vcpu, data);
1123 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1127 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1134 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1138 * Reads an msr value (of 'msr_index') into 'pdata'.
1139 * Returns 0 on success, non-0 otherwise.
1140 * Assumes vcpu_load() was already called.
1142 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1144 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1147 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1149 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1151 if (!msr_mtrr_valid(msr))
1154 if (msr == MSR_MTRRdefType)
1155 *pdata = vcpu->arch.mtrr_state.def_type +
1156 (vcpu->arch.mtrr_state.enabled << 10);
1157 else if (msr == MSR_MTRRfix64K_00000)
1159 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1160 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1161 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1162 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1163 else if (msr == MSR_IA32_CR_PAT)
1164 *pdata = vcpu->arch.pat;
1165 else { /* Variable MTRRs */
1166 int idx, is_mtrr_mask;
1169 idx = (msr - 0x200) / 2;
1170 is_mtrr_mask = msr - 0x200 - 2 * idx;
1173 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1176 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1183 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1186 u64 mcg_cap = vcpu->arch.mcg_cap;
1187 unsigned bank_num = mcg_cap & 0xff;
1190 case MSR_IA32_P5_MC_ADDR:
1191 case MSR_IA32_P5_MC_TYPE:
1194 case MSR_IA32_MCG_CAP:
1195 data = vcpu->arch.mcg_cap;
1197 case MSR_IA32_MCG_CTL:
1198 if (!(mcg_cap & MCG_CTL_P))
1200 data = vcpu->arch.mcg_ctl;
1202 case MSR_IA32_MCG_STATUS:
1203 data = vcpu->arch.mcg_status;
1206 if (msr >= MSR_IA32_MC0_CTL &&
1207 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1208 u32 offset = msr - MSR_IA32_MC0_CTL;
1209 data = vcpu->arch.mce_banks[offset];
1218 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1223 case MSR_IA32_PLATFORM_ID:
1224 case MSR_IA32_UCODE_REV:
1225 case MSR_IA32_EBL_CR_POWERON:
1226 case MSR_IA32_DEBUGCTLMSR:
1227 case MSR_IA32_LASTBRANCHFROMIP:
1228 case MSR_IA32_LASTBRANCHTOIP:
1229 case MSR_IA32_LASTINTFROMIP:
1230 case MSR_IA32_LASTINTTOIP:
1233 case MSR_VM_HSAVE_PA:
1234 case MSR_P6_PERFCTR0:
1235 case MSR_P6_PERFCTR1:
1236 case MSR_P6_EVNTSEL0:
1237 case MSR_P6_EVNTSEL1:
1238 case MSR_K7_EVNTSEL0:
1239 case MSR_K7_PERFCTR0:
1240 case MSR_K8_INT_PENDING_MSG:
1241 case MSR_AMD64_NB_CFG:
1242 case MSR_FAM10H_MMIO_CONF_BASE:
1246 data = 0x500 | KVM_NR_VAR_MTRR;
1248 case 0x200 ... 0x2ff:
1249 return get_msr_mtrr(vcpu, msr, pdata);
1250 case 0xcd: /* fsb frequency */
1253 case MSR_IA32_APICBASE:
1254 data = kvm_get_apic_base(vcpu);
1256 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1257 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1259 case MSR_IA32_MISC_ENABLE:
1260 data = vcpu->arch.ia32_misc_enable_msr;
1262 case MSR_IA32_PERF_STATUS:
1263 /* TSC increment by tick */
1265 /* CPU multiplier */
1266 data |= (((uint64_t)4ULL) << 40);
1269 data = vcpu->arch.shadow_efer;
1271 case MSR_KVM_WALL_CLOCK:
1272 data = vcpu->kvm->arch.wall_clock;
1274 case MSR_KVM_SYSTEM_TIME:
1275 data = vcpu->arch.time;
1277 case MSR_IA32_P5_MC_ADDR:
1278 case MSR_IA32_P5_MC_TYPE:
1279 case MSR_IA32_MCG_CAP:
1280 case MSR_IA32_MCG_CTL:
1281 case MSR_IA32_MCG_STATUS:
1282 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1283 return get_msr_mce(vcpu, msr, pdata);
1286 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1289 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1297 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1300 * Read or write a bunch of msrs. All parameters are kernel addresses.
1302 * @return number of msrs set successfully.
1304 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1305 struct kvm_msr_entry *entries,
1306 int (*do_msr)(struct kvm_vcpu *vcpu,
1307 unsigned index, u64 *data))
1313 idx = srcu_read_lock(&vcpu->kvm->srcu);
1314 for (i = 0; i < msrs->nmsrs; ++i)
1315 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1317 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1325 * Read or write a bunch of msrs. Parameters are user addresses.
1327 * @return number of msrs set successfully.
1329 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1330 int (*do_msr)(struct kvm_vcpu *vcpu,
1331 unsigned index, u64 *data),
1334 struct kvm_msrs msrs;
1335 struct kvm_msr_entry *entries;
1340 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1344 if (msrs.nmsrs >= MAX_IO_MSRS)
1348 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1349 entries = vmalloc(size);
1354 if (copy_from_user(entries, user_msrs->entries, size))
1357 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1362 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1373 int kvm_dev_ioctl_check_extension(long ext)
1378 case KVM_CAP_IRQCHIP:
1380 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1381 case KVM_CAP_SET_TSS_ADDR:
1382 case KVM_CAP_EXT_CPUID:
1383 case KVM_CAP_CLOCKSOURCE:
1385 case KVM_CAP_NOP_IO_DELAY:
1386 case KVM_CAP_MP_STATE:
1387 case KVM_CAP_SYNC_MMU:
1388 case KVM_CAP_REINJECT_CONTROL:
1389 case KVM_CAP_IRQ_INJECT_STATUS:
1390 case KVM_CAP_ASSIGN_DEV_IRQ:
1392 case KVM_CAP_IOEVENTFD:
1394 case KVM_CAP_PIT_STATE2:
1395 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1396 case KVM_CAP_XEN_HVM:
1397 case KVM_CAP_ADJUST_CLOCK:
1398 case KVM_CAP_VCPU_EVENTS:
1401 case KVM_CAP_COALESCED_MMIO:
1402 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1405 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1407 case KVM_CAP_NR_VCPUS:
1410 case KVM_CAP_NR_MEMSLOTS:
1411 r = KVM_MEMORY_SLOTS;
1413 case KVM_CAP_PV_MMU: /* obsolete */
1420 r = KVM_MAX_MCE_BANKS;
1430 long kvm_arch_dev_ioctl(struct file *filp,
1431 unsigned int ioctl, unsigned long arg)
1433 void __user *argp = (void __user *)arg;
1437 case KVM_GET_MSR_INDEX_LIST: {
1438 struct kvm_msr_list __user *user_msr_list = argp;
1439 struct kvm_msr_list msr_list;
1443 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1446 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1447 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1450 if (n < msr_list.nmsrs)
1453 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1454 num_msrs_to_save * sizeof(u32)))
1456 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1458 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1463 case KVM_GET_SUPPORTED_CPUID: {
1464 struct kvm_cpuid2 __user *cpuid_arg = argp;
1465 struct kvm_cpuid2 cpuid;
1468 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1470 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1471 cpuid_arg->entries);
1476 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1481 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1484 mce_cap = KVM_MCE_CAP_SUPPORTED;
1486 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1498 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1500 kvm_x86_ops->vcpu_load(vcpu, cpu);
1501 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1502 unsigned long khz = cpufreq_quick_get(cpu);
1505 per_cpu(cpu_tsc_khz, cpu) = khz;
1507 kvm_request_guest_time_update(vcpu);
1510 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1512 kvm_x86_ops->vcpu_put(vcpu);
1513 kvm_put_guest_fpu(vcpu);
1516 static int is_efer_nx(void)
1518 unsigned long long efer = 0;
1520 rdmsrl_safe(MSR_EFER, &efer);
1521 return efer & EFER_NX;
1524 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1527 struct kvm_cpuid_entry2 *e, *entry;
1530 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1531 e = &vcpu->arch.cpuid_entries[i];
1532 if (e->function == 0x80000001) {
1537 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1538 entry->edx &= ~(1 << 20);
1539 printk(KERN_INFO "kvm: guest NX capability removed\n");
1543 /* when an old userspace process fills a new kernel module */
1544 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1545 struct kvm_cpuid *cpuid,
1546 struct kvm_cpuid_entry __user *entries)
1549 struct kvm_cpuid_entry *cpuid_entries;
1552 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1555 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1559 if (copy_from_user(cpuid_entries, entries,
1560 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1562 for (i = 0; i < cpuid->nent; i++) {
1563 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1564 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1565 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1566 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1567 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1568 vcpu->arch.cpuid_entries[i].index = 0;
1569 vcpu->arch.cpuid_entries[i].flags = 0;
1570 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1571 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1572 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1574 vcpu->arch.cpuid_nent = cpuid->nent;
1575 cpuid_fix_nx_cap(vcpu);
1577 kvm_apic_set_version(vcpu);
1578 kvm_x86_ops->cpuid_update(vcpu);
1581 vfree(cpuid_entries);
1586 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1587 struct kvm_cpuid2 *cpuid,
1588 struct kvm_cpuid_entry2 __user *entries)
1593 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1596 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1597 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1599 vcpu->arch.cpuid_nent = cpuid->nent;
1600 kvm_apic_set_version(vcpu);
1601 kvm_x86_ops->cpuid_update(vcpu);
1608 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1609 struct kvm_cpuid2 *cpuid,
1610 struct kvm_cpuid_entry2 __user *entries)
1615 if (cpuid->nent < vcpu->arch.cpuid_nent)
1618 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1619 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1624 cpuid->nent = vcpu->arch.cpuid_nent;
1628 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1631 entry->function = function;
1632 entry->index = index;
1633 cpuid_count(entry->function, entry->index,
1634 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1638 #define F(x) bit(X86_FEATURE_##x)
1640 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1641 u32 index, int *nent, int maxnent)
1643 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1644 unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1645 #ifdef CONFIG_X86_64
1646 unsigned f_lm = F(LM);
1650 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1653 const u32 kvm_supported_word0_x86_features =
1654 F(FPU) | F(VME) | F(DE) | F(PSE) |
1655 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1656 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1657 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1658 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1659 0 /* Reserved, DS, ACPI */ | F(MMX) |
1660 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1661 0 /* HTT, TM, Reserved, PBE */;
1662 /* cpuid 0x80000001.edx */
1663 const u32 kvm_supported_word1_x86_features =
1664 F(FPU) | F(VME) | F(DE) | F(PSE) |
1665 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1666 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1667 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1668 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1669 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1670 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1671 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1673 const u32 kvm_supported_word4_x86_features =
1674 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1675 0 /* DS-CPL, VMX, SMX, EST */ |
1676 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1677 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1678 0 /* Reserved, DCA */ | F(XMM4_1) |
1679 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1680 0 /* Reserved, XSAVE, OSXSAVE */;
1681 /* cpuid 0x80000001.ecx */
1682 const u32 kvm_supported_word6_x86_features =
1683 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1684 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1685 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1686 0 /* SKINIT */ | 0 /* WDT */;
1688 /* all calls to cpuid_count() should be made on the same cpu */
1690 do_cpuid_1_ent(entry, function, index);
1695 entry->eax = min(entry->eax, (u32)0xb);
1698 entry->edx &= kvm_supported_word0_x86_features;
1699 entry->ecx &= kvm_supported_word4_x86_features;
1700 /* we support x2apic emulation even if host does not support
1701 * it since we emulate x2apic in software */
1702 entry->ecx |= F(X2APIC);
1704 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1705 * may return different values. This forces us to get_cpu() before
1706 * issuing the first command, and also to emulate this annoying behavior
1707 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1709 int t, times = entry->eax & 0xff;
1711 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1712 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1713 for (t = 1; t < times && *nent < maxnent; ++t) {
1714 do_cpuid_1_ent(&entry[t], function, 0);
1715 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1720 /* function 4 and 0xb have additional index. */
1724 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1725 /* read more entries until cache_type is zero */
1726 for (i = 1; *nent < maxnent; ++i) {
1727 cache_type = entry[i - 1].eax & 0x1f;
1730 do_cpuid_1_ent(&entry[i], function, i);
1732 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1740 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1741 /* read more entries until level_type is zero */
1742 for (i = 1; *nent < maxnent; ++i) {
1743 level_type = entry[i - 1].ecx & 0xff00;
1746 do_cpuid_1_ent(&entry[i], function, i);
1748 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1754 entry->eax = min(entry->eax, 0x8000001a);
1757 entry->edx &= kvm_supported_word1_x86_features;
1758 entry->ecx &= kvm_supported_word6_x86_features;
1766 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1767 struct kvm_cpuid_entry2 __user *entries)
1769 struct kvm_cpuid_entry2 *cpuid_entries;
1770 int limit, nent = 0, r = -E2BIG;
1773 if (cpuid->nent < 1)
1775 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1776 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1778 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1782 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1783 limit = cpuid_entries[0].eax;
1784 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1785 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1786 &nent, cpuid->nent);
1788 if (nent >= cpuid->nent)
1791 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1792 limit = cpuid_entries[nent - 1].eax;
1793 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1794 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1795 &nent, cpuid->nent);
1797 if (nent >= cpuid->nent)
1801 if (copy_to_user(entries, cpuid_entries,
1802 nent * sizeof(struct kvm_cpuid_entry2)))
1808 vfree(cpuid_entries);
1813 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1814 struct kvm_lapic_state *s)
1817 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1823 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1824 struct kvm_lapic_state *s)
1827 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1828 kvm_apic_post_state_restore(vcpu);
1829 update_cr8_intercept(vcpu);
1835 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1836 struct kvm_interrupt *irq)
1838 if (irq->irq < 0 || irq->irq >= 256)
1840 if (irqchip_in_kernel(vcpu->kvm))
1844 kvm_queue_interrupt(vcpu, irq->irq, false);
1851 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1854 kvm_inject_nmi(vcpu);
1860 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1861 struct kvm_tpr_access_ctl *tac)
1865 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1869 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1873 unsigned bank_num = mcg_cap & 0xff, bank;
1876 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
1878 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1881 vcpu->arch.mcg_cap = mcg_cap;
1882 /* Init IA32_MCG_CTL to all 1s */
1883 if (mcg_cap & MCG_CTL_P)
1884 vcpu->arch.mcg_ctl = ~(u64)0;
1885 /* Init IA32_MCi_CTL to all 1s */
1886 for (bank = 0; bank < bank_num; bank++)
1887 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1892 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1893 struct kvm_x86_mce *mce)
1895 u64 mcg_cap = vcpu->arch.mcg_cap;
1896 unsigned bank_num = mcg_cap & 0xff;
1897 u64 *banks = vcpu->arch.mce_banks;
1899 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1902 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1903 * reporting is disabled
1905 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1906 vcpu->arch.mcg_ctl != ~(u64)0)
1908 banks += 4 * mce->bank;
1910 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1911 * reporting is disabled for the bank
1913 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1915 if (mce->status & MCI_STATUS_UC) {
1916 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1917 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
1918 printk(KERN_DEBUG "kvm: set_mce: "
1919 "injects mce exception while "
1920 "previous one is in progress!\n");
1921 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1924 if (banks[1] & MCI_STATUS_VAL)
1925 mce->status |= MCI_STATUS_OVER;
1926 banks[2] = mce->addr;
1927 banks[3] = mce->misc;
1928 vcpu->arch.mcg_status = mce->mcg_status;
1929 banks[1] = mce->status;
1930 kvm_queue_exception(vcpu, MC_VECTOR);
1931 } else if (!(banks[1] & MCI_STATUS_VAL)
1932 || !(banks[1] & MCI_STATUS_UC)) {
1933 if (banks[1] & MCI_STATUS_VAL)
1934 mce->status |= MCI_STATUS_OVER;
1935 banks[2] = mce->addr;
1936 banks[3] = mce->misc;
1937 banks[1] = mce->status;
1939 banks[1] |= MCI_STATUS_OVER;
1943 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
1944 struct kvm_vcpu_events *events)
1948 events->exception.injected = vcpu->arch.exception.pending;
1949 events->exception.nr = vcpu->arch.exception.nr;
1950 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
1951 events->exception.error_code = vcpu->arch.exception.error_code;
1953 events->interrupt.injected = vcpu->arch.interrupt.pending;
1954 events->interrupt.nr = vcpu->arch.interrupt.nr;
1955 events->interrupt.soft = vcpu->arch.interrupt.soft;
1957 events->nmi.injected = vcpu->arch.nmi_injected;
1958 events->nmi.pending = vcpu->arch.nmi_pending;
1959 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
1961 events->sipi_vector = vcpu->arch.sipi_vector;
1963 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
1964 | KVM_VCPUEVENT_VALID_SIPI_VECTOR);
1969 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
1970 struct kvm_vcpu_events *events)
1972 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
1973 | KVM_VCPUEVENT_VALID_SIPI_VECTOR))
1978 vcpu->arch.exception.pending = events->exception.injected;
1979 vcpu->arch.exception.nr = events->exception.nr;
1980 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
1981 vcpu->arch.exception.error_code = events->exception.error_code;
1983 vcpu->arch.interrupt.pending = events->interrupt.injected;
1984 vcpu->arch.interrupt.nr = events->interrupt.nr;
1985 vcpu->arch.interrupt.soft = events->interrupt.soft;
1986 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
1987 kvm_pic_clear_isr_ack(vcpu->kvm);
1989 vcpu->arch.nmi_injected = events->nmi.injected;
1990 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
1991 vcpu->arch.nmi_pending = events->nmi.pending;
1992 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
1994 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
1995 vcpu->arch.sipi_vector = events->sipi_vector;
2002 long kvm_arch_vcpu_ioctl(struct file *filp,
2003 unsigned int ioctl, unsigned long arg)
2005 struct kvm_vcpu *vcpu = filp->private_data;
2006 void __user *argp = (void __user *)arg;
2008 struct kvm_lapic_state *lapic = NULL;
2011 case KVM_GET_LAPIC: {
2013 if (!vcpu->arch.apic)
2015 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2020 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2024 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2029 case KVM_SET_LAPIC: {
2031 if (!vcpu->arch.apic)
2033 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2038 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2040 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2046 case KVM_INTERRUPT: {
2047 struct kvm_interrupt irq;
2050 if (copy_from_user(&irq, argp, sizeof irq))
2052 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2059 r = kvm_vcpu_ioctl_nmi(vcpu);
2065 case KVM_SET_CPUID: {
2066 struct kvm_cpuid __user *cpuid_arg = argp;
2067 struct kvm_cpuid cpuid;
2070 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2072 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2077 case KVM_SET_CPUID2: {
2078 struct kvm_cpuid2 __user *cpuid_arg = argp;
2079 struct kvm_cpuid2 cpuid;
2082 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2084 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2085 cpuid_arg->entries);
2090 case KVM_GET_CPUID2: {
2091 struct kvm_cpuid2 __user *cpuid_arg = argp;
2092 struct kvm_cpuid2 cpuid;
2095 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2097 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2098 cpuid_arg->entries);
2102 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2108 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2111 r = msr_io(vcpu, argp, do_set_msr, 0);
2113 case KVM_TPR_ACCESS_REPORTING: {
2114 struct kvm_tpr_access_ctl tac;
2117 if (copy_from_user(&tac, argp, sizeof tac))
2119 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2123 if (copy_to_user(argp, &tac, sizeof tac))
2128 case KVM_SET_VAPIC_ADDR: {
2129 struct kvm_vapic_addr va;
2132 if (!irqchip_in_kernel(vcpu->kvm))
2135 if (copy_from_user(&va, argp, sizeof va))
2138 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2141 case KVM_X86_SETUP_MCE: {
2145 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2147 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2150 case KVM_X86_SET_MCE: {
2151 struct kvm_x86_mce mce;
2154 if (copy_from_user(&mce, argp, sizeof mce))
2156 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2159 case KVM_GET_VCPU_EVENTS: {
2160 struct kvm_vcpu_events events;
2162 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2165 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2170 case KVM_SET_VCPU_EVENTS: {
2171 struct kvm_vcpu_events events;
2174 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2177 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2188 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2192 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2194 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2198 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2201 kvm->arch.ept_identity_map_addr = ident_addr;
2205 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2206 u32 kvm_nr_mmu_pages)
2208 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2211 mutex_lock(&kvm->slots_lock);
2212 spin_lock(&kvm->mmu_lock);
2214 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2215 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2217 spin_unlock(&kvm->mmu_lock);
2218 mutex_unlock(&kvm->slots_lock);
2222 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2224 return kvm->arch.n_alloc_mmu_pages;
2227 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2230 struct kvm_mem_alias *alias;
2231 struct kvm_mem_aliases *aliases;
2233 aliases = rcu_dereference(kvm->arch.aliases);
2235 for (i = 0; i < aliases->naliases; ++i) {
2236 alias = &aliases->aliases[i];
2237 if (alias->flags & KVM_ALIAS_INVALID)
2239 if (gfn >= alias->base_gfn
2240 && gfn < alias->base_gfn + alias->npages)
2241 return alias->target_gfn + gfn - alias->base_gfn;
2246 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2249 struct kvm_mem_alias *alias;
2250 struct kvm_mem_aliases *aliases;
2252 aliases = rcu_dereference(kvm->arch.aliases);
2254 for (i = 0; i < aliases->naliases; ++i) {
2255 alias = &aliases->aliases[i];
2256 if (gfn >= alias->base_gfn
2257 && gfn < alias->base_gfn + alias->npages)
2258 return alias->target_gfn + gfn - alias->base_gfn;
2264 * Set a new alias region. Aliases map a portion of physical memory into
2265 * another portion. This is useful for memory windows, for example the PC
2268 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2269 struct kvm_memory_alias *alias)
2272 struct kvm_mem_alias *p;
2273 struct kvm_mem_aliases *aliases, *old_aliases;
2276 /* General sanity checks */
2277 if (alias->memory_size & (PAGE_SIZE - 1))
2279 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2281 if (alias->slot >= KVM_ALIAS_SLOTS)
2283 if (alias->guest_phys_addr + alias->memory_size
2284 < alias->guest_phys_addr)
2286 if (alias->target_phys_addr + alias->memory_size
2287 < alias->target_phys_addr)
2291 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2295 mutex_lock(&kvm->slots_lock);
2297 /* invalidate any gfn reference in case of deletion/shrinking */
2298 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2299 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2300 old_aliases = kvm->arch.aliases;
2301 rcu_assign_pointer(kvm->arch.aliases, aliases);
2302 synchronize_srcu_expedited(&kvm->srcu);
2303 kvm_mmu_zap_all(kvm);
2307 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2311 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2313 p = &aliases->aliases[alias->slot];
2314 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2315 p->npages = alias->memory_size >> PAGE_SHIFT;
2316 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2317 p->flags &= ~(KVM_ALIAS_INVALID);
2319 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2320 if (aliases->aliases[n - 1].npages)
2322 aliases->naliases = n;
2324 old_aliases = kvm->arch.aliases;
2325 rcu_assign_pointer(kvm->arch.aliases, aliases);
2326 synchronize_srcu_expedited(&kvm->srcu);
2331 mutex_unlock(&kvm->slots_lock);
2336 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2341 switch (chip->chip_id) {
2342 case KVM_IRQCHIP_PIC_MASTER:
2343 memcpy(&chip->chip.pic,
2344 &pic_irqchip(kvm)->pics[0],
2345 sizeof(struct kvm_pic_state));
2347 case KVM_IRQCHIP_PIC_SLAVE:
2348 memcpy(&chip->chip.pic,
2349 &pic_irqchip(kvm)->pics[1],
2350 sizeof(struct kvm_pic_state));
2352 case KVM_IRQCHIP_IOAPIC:
2353 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2362 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2367 switch (chip->chip_id) {
2368 case KVM_IRQCHIP_PIC_MASTER:
2369 spin_lock(&pic_irqchip(kvm)->lock);
2370 memcpy(&pic_irqchip(kvm)->pics[0],
2372 sizeof(struct kvm_pic_state));
2373 spin_unlock(&pic_irqchip(kvm)->lock);
2375 case KVM_IRQCHIP_PIC_SLAVE:
2376 spin_lock(&pic_irqchip(kvm)->lock);
2377 memcpy(&pic_irqchip(kvm)->pics[1],
2379 sizeof(struct kvm_pic_state));
2380 spin_unlock(&pic_irqchip(kvm)->lock);
2382 case KVM_IRQCHIP_IOAPIC:
2383 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2389 kvm_pic_update_irq(pic_irqchip(kvm));
2393 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2397 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2398 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2399 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2403 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2407 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2408 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2409 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2410 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2414 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2418 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2419 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2420 sizeof(ps->channels));
2421 ps->flags = kvm->arch.vpit->pit_state.flags;
2422 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2426 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2428 int r = 0, start = 0;
2429 u32 prev_legacy, cur_legacy;
2430 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2431 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2432 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2433 if (!prev_legacy && cur_legacy)
2435 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2436 sizeof(kvm->arch.vpit->pit_state.channels));
2437 kvm->arch.vpit->pit_state.flags = ps->flags;
2438 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2439 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2443 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2444 struct kvm_reinject_control *control)
2446 if (!kvm->arch.vpit)
2448 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2449 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2450 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2455 * Get (and clear) the dirty memory log for a memory slot.
2457 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2458 struct kvm_dirty_log *log)
2461 struct kvm_memory_slot *memslot;
2462 unsigned long is_dirty = 0;
2463 unsigned long *dirty_bitmap = NULL;
2465 mutex_lock(&kvm->slots_lock);
2468 if (log->slot >= KVM_MEMORY_SLOTS)
2471 memslot = &kvm->memslots->memslots[log->slot];
2473 if (!memslot->dirty_bitmap)
2476 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2479 dirty_bitmap = vmalloc(n);
2482 memset(dirty_bitmap, 0, n);
2484 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2485 is_dirty = memslot->dirty_bitmap[i];
2487 /* If nothing is dirty, don't bother messing with page tables. */
2489 struct kvm_memslots *slots, *old_slots;
2491 spin_lock(&kvm->mmu_lock);
2492 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2493 spin_unlock(&kvm->mmu_lock);
2495 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2499 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2500 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2502 old_slots = kvm->memslots;
2503 rcu_assign_pointer(kvm->memslots, slots);
2504 synchronize_srcu_expedited(&kvm->srcu);
2505 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2510 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
2513 vfree(dirty_bitmap);
2515 mutex_unlock(&kvm->slots_lock);
2519 long kvm_arch_vm_ioctl(struct file *filp,
2520 unsigned int ioctl, unsigned long arg)
2522 struct kvm *kvm = filp->private_data;
2523 void __user *argp = (void __user *)arg;
2526 * This union makes it completely explicit to gcc-3.x
2527 * that these two variables' stack usage should be
2528 * combined, not added together.
2531 struct kvm_pit_state ps;
2532 struct kvm_pit_state2 ps2;
2533 struct kvm_memory_alias alias;
2534 struct kvm_pit_config pit_config;
2538 case KVM_SET_TSS_ADDR:
2539 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2543 case KVM_SET_IDENTITY_MAP_ADDR: {
2547 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2549 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2554 case KVM_SET_MEMORY_REGION: {
2555 struct kvm_memory_region kvm_mem;
2556 struct kvm_userspace_memory_region kvm_userspace_mem;
2559 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2561 kvm_userspace_mem.slot = kvm_mem.slot;
2562 kvm_userspace_mem.flags = kvm_mem.flags;
2563 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2564 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2565 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2570 case KVM_SET_NR_MMU_PAGES:
2571 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2575 case KVM_GET_NR_MMU_PAGES:
2576 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2578 case KVM_SET_MEMORY_ALIAS:
2580 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2582 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2586 case KVM_CREATE_IRQCHIP: {
2587 struct kvm_pic *vpic;
2589 mutex_lock(&kvm->lock);
2592 goto create_irqchip_unlock;
2594 vpic = kvm_create_pic(kvm);
2596 r = kvm_ioapic_init(kvm);
2599 goto create_irqchip_unlock;
2602 goto create_irqchip_unlock;
2604 kvm->arch.vpic = vpic;
2606 r = kvm_setup_default_irq_routing(kvm);
2608 mutex_lock(&kvm->irq_lock);
2609 kfree(kvm->arch.vpic);
2610 kfree(kvm->arch.vioapic);
2611 kvm->arch.vpic = NULL;
2612 kvm->arch.vioapic = NULL;
2613 mutex_unlock(&kvm->irq_lock);
2615 create_irqchip_unlock:
2616 mutex_unlock(&kvm->lock);
2619 case KVM_CREATE_PIT:
2620 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2622 case KVM_CREATE_PIT2:
2624 if (copy_from_user(&u.pit_config, argp,
2625 sizeof(struct kvm_pit_config)))
2628 mutex_lock(&kvm->slots_lock);
2631 goto create_pit_unlock;
2633 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2637 mutex_unlock(&kvm->slots_lock);
2639 case KVM_IRQ_LINE_STATUS:
2640 case KVM_IRQ_LINE: {
2641 struct kvm_irq_level irq_event;
2644 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2646 if (irqchip_in_kernel(kvm)) {
2648 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2649 irq_event.irq, irq_event.level);
2650 if (ioctl == KVM_IRQ_LINE_STATUS) {
2651 irq_event.status = status;
2652 if (copy_to_user(argp, &irq_event,
2660 case KVM_GET_IRQCHIP: {
2661 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2662 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2668 if (copy_from_user(chip, argp, sizeof *chip))
2669 goto get_irqchip_out;
2671 if (!irqchip_in_kernel(kvm))
2672 goto get_irqchip_out;
2673 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2675 goto get_irqchip_out;
2677 if (copy_to_user(argp, chip, sizeof *chip))
2678 goto get_irqchip_out;
2686 case KVM_SET_IRQCHIP: {
2687 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2688 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2694 if (copy_from_user(chip, argp, sizeof *chip))
2695 goto set_irqchip_out;
2697 if (!irqchip_in_kernel(kvm))
2698 goto set_irqchip_out;
2699 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2701 goto set_irqchip_out;
2711 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2714 if (!kvm->arch.vpit)
2716 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2720 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2727 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2730 if (!kvm->arch.vpit)
2732 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2738 case KVM_GET_PIT2: {
2740 if (!kvm->arch.vpit)
2742 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2746 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2751 case KVM_SET_PIT2: {
2753 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2756 if (!kvm->arch.vpit)
2758 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2764 case KVM_REINJECT_CONTROL: {
2765 struct kvm_reinject_control control;
2767 if (copy_from_user(&control, argp, sizeof(control)))
2769 r = kvm_vm_ioctl_reinject(kvm, &control);
2775 case KVM_XEN_HVM_CONFIG: {
2777 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
2778 sizeof(struct kvm_xen_hvm_config)))
2781 if (kvm->arch.xen_hvm_config.flags)
2786 case KVM_SET_CLOCK: {
2787 struct timespec now;
2788 struct kvm_clock_data user_ns;
2793 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
2802 now_ns = timespec_to_ns(&now);
2803 delta = user_ns.clock - now_ns;
2804 kvm->arch.kvmclock_offset = delta;
2807 case KVM_GET_CLOCK: {
2808 struct timespec now;
2809 struct kvm_clock_data user_ns;
2813 now_ns = timespec_to_ns(&now);
2814 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
2818 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
2831 static void kvm_init_msr_list(void)
2836 /* skip the first msrs in the list. KVM-specific */
2837 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
2838 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2841 msrs_to_save[j] = msrs_to_save[i];
2844 num_msrs_to_save = j;
2847 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2850 if (vcpu->arch.apic &&
2851 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2854 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
2857 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2859 if (vcpu->arch.apic &&
2860 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2863 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
2866 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2867 struct kvm_vcpu *vcpu)
2870 int r = X86EMUL_CONTINUE;
2873 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2874 unsigned offset = addr & (PAGE_SIZE-1);
2875 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2878 if (gpa == UNMAPPED_GVA) {
2879 r = X86EMUL_PROPAGATE_FAULT;
2882 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2884 r = X86EMUL_UNHANDLEABLE;
2896 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2897 struct kvm_vcpu *vcpu)
2900 int r = X86EMUL_CONTINUE;
2903 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2904 unsigned offset = addr & (PAGE_SIZE-1);
2905 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2908 if (gpa == UNMAPPED_GVA) {
2909 r = X86EMUL_PROPAGATE_FAULT;
2912 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2914 r = X86EMUL_UNHANDLEABLE;
2927 static int emulator_read_emulated(unsigned long addr,
2930 struct kvm_vcpu *vcpu)
2934 if (vcpu->mmio_read_completed) {
2935 memcpy(val, vcpu->mmio_data, bytes);
2936 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2937 vcpu->mmio_phys_addr, *(u64 *)val);
2938 vcpu->mmio_read_completed = 0;
2939 return X86EMUL_CONTINUE;
2942 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2944 /* For APIC access vmexit */
2945 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2948 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2949 == X86EMUL_CONTINUE)
2950 return X86EMUL_CONTINUE;
2951 if (gpa == UNMAPPED_GVA)
2952 return X86EMUL_PROPAGATE_FAULT;
2956 * Is this MMIO handled locally?
2958 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2959 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2960 return X86EMUL_CONTINUE;
2963 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2965 vcpu->mmio_needed = 1;
2966 vcpu->mmio_phys_addr = gpa;
2967 vcpu->mmio_size = bytes;
2968 vcpu->mmio_is_write = 0;
2970 return X86EMUL_UNHANDLEABLE;
2973 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2974 const void *val, int bytes)
2978 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2981 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2985 static int emulator_write_emulated_onepage(unsigned long addr,
2988 struct kvm_vcpu *vcpu)
2992 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2994 if (gpa == UNMAPPED_GVA) {
2995 kvm_inject_page_fault(vcpu, addr, 2);
2996 return X86EMUL_PROPAGATE_FAULT;
2999 /* For APIC access vmexit */
3000 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3003 if (emulator_write_phys(vcpu, gpa, val, bytes))
3004 return X86EMUL_CONTINUE;
3007 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3009 * Is this MMIO handled locally?
3011 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3012 return X86EMUL_CONTINUE;
3014 vcpu->mmio_needed = 1;
3015 vcpu->mmio_phys_addr = gpa;
3016 vcpu->mmio_size = bytes;
3017 vcpu->mmio_is_write = 1;
3018 memcpy(vcpu->mmio_data, val, bytes);
3020 return X86EMUL_CONTINUE;
3023 int emulator_write_emulated(unsigned long addr,
3026 struct kvm_vcpu *vcpu)
3028 /* Crossing a page boundary? */
3029 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3032 now = -addr & ~PAGE_MASK;
3033 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
3034 if (rc != X86EMUL_CONTINUE)
3040 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
3042 EXPORT_SYMBOL_GPL(emulator_write_emulated);
3044 static int emulator_cmpxchg_emulated(unsigned long addr,
3048 struct kvm_vcpu *vcpu)
3050 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3051 #ifndef CONFIG_X86_64
3052 /* guests cmpxchg8b have to be emulated atomically */
3059 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
3061 if (gpa == UNMAPPED_GVA ||
3062 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3065 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3070 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3072 kaddr = kmap_atomic(page, KM_USER0);
3073 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
3074 kunmap_atomic(kaddr, KM_USER0);
3075 kvm_release_page_dirty(page);
3080 return emulator_write_emulated(addr, new, bytes, vcpu);
3083 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3085 return kvm_x86_ops->get_segment_base(vcpu, seg);
3088 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3090 kvm_mmu_invlpg(vcpu, address);
3091 return X86EMUL_CONTINUE;
3094 int emulate_clts(struct kvm_vcpu *vcpu)
3096 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
3097 return X86EMUL_CONTINUE;
3100 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3102 struct kvm_vcpu *vcpu = ctxt->vcpu;
3106 *dest = kvm_x86_ops->get_dr(vcpu, dr);
3107 return X86EMUL_CONTINUE;
3109 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
3110 return X86EMUL_UNHANDLEABLE;
3114 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3116 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
3119 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
3121 /* FIXME: better handling */
3122 return X86EMUL_UNHANDLEABLE;
3124 return X86EMUL_CONTINUE;
3127 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3130 unsigned long rip = kvm_rip_read(vcpu);
3131 unsigned long rip_linear;
3133 if (!printk_ratelimit())
3136 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3138 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
3140 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3141 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3143 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3145 static struct x86_emulate_ops emulate_ops = {
3146 .read_std = kvm_read_guest_virt,
3147 .read_emulated = emulator_read_emulated,
3148 .write_emulated = emulator_write_emulated,
3149 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3152 static void cache_all_regs(struct kvm_vcpu *vcpu)
3154 kvm_register_read(vcpu, VCPU_REGS_RAX);
3155 kvm_register_read(vcpu, VCPU_REGS_RSP);
3156 kvm_register_read(vcpu, VCPU_REGS_RIP);
3157 vcpu->arch.regs_dirty = ~0;
3160 int emulate_instruction(struct kvm_vcpu *vcpu,
3166 struct decode_cache *c;
3167 struct kvm_run *run = vcpu->run;
3169 kvm_clear_exception_queue(vcpu);
3170 vcpu->arch.mmio_fault_cr2 = cr2;
3172 * TODO: fix emulate.c to use guest_read/write_register
3173 * instead of direct ->regs accesses, can save hundred cycles
3174 * on Intel for instructions that don't read/change RSP, for
3177 cache_all_regs(vcpu);
3179 vcpu->mmio_is_write = 0;
3180 vcpu->arch.pio.string = 0;
3182 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3184 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3186 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3187 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
3188 vcpu->arch.emulate_ctxt.mode =
3189 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3190 ? X86EMUL_MODE_REAL : cs_l
3191 ? X86EMUL_MODE_PROT64 : cs_db
3192 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3194 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3196 /* Only allow emulation of specific instructions on #UD
3197 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3198 c = &vcpu->arch.emulate_ctxt.decode;
3199 if (emulation_type & EMULTYPE_TRAP_UD) {
3201 return EMULATE_FAIL;
3203 case 0x01: /* VMMCALL */
3204 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3205 return EMULATE_FAIL;
3207 case 0x34: /* sysenter */
3208 case 0x35: /* sysexit */
3209 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3210 return EMULATE_FAIL;
3212 case 0x05: /* syscall */
3213 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3214 return EMULATE_FAIL;
3217 return EMULATE_FAIL;
3220 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3221 return EMULATE_FAIL;
3224 ++vcpu->stat.insn_emulation;
3226 ++vcpu->stat.insn_emulation_fail;
3227 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3228 return EMULATE_DONE;
3229 return EMULATE_FAIL;
3233 if (emulation_type & EMULTYPE_SKIP) {
3234 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3235 return EMULATE_DONE;
3238 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3239 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3242 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3244 if (vcpu->arch.pio.string)
3245 return EMULATE_DO_MMIO;
3247 if ((r || vcpu->mmio_is_write) && run) {
3248 run->exit_reason = KVM_EXIT_MMIO;
3249 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3250 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3251 run->mmio.len = vcpu->mmio_size;
3252 run->mmio.is_write = vcpu->mmio_is_write;
3256 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3257 return EMULATE_DONE;
3258 if (!vcpu->mmio_needed) {
3259 kvm_report_emulation_failure(vcpu, "mmio");
3260 return EMULATE_FAIL;
3262 return EMULATE_DO_MMIO;
3265 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3267 if (vcpu->mmio_is_write) {
3268 vcpu->mmio_needed = 0;
3269 return EMULATE_DO_MMIO;
3272 return EMULATE_DONE;
3274 EXPORT_SYMBOL_GPL(emulate_instruction);
3276 static int pio_copy_data(struct kvm_vcpu *vcpu)
3278 void *p = vcpu->arch.pio_data;
3279 gva_t q = vcpu->arch.pio.guest_gva;
3283 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
3284 if (vcpu->arch.pio.in)
3285 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
3287 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
3291 int complete_pio(struct kvm_vcpu *vcpu)
3293 struct kvm_pio_request *io = &vcpu->arch.pio;
3300 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3301 memcpy(&val, vcpu->arch.pio_data, io->size);
3302 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
3306 r = pio_copy_data(vcpu);
3313 delta *= io->cur_count;
3315 * The size of the register should really depend on
3316 * current address size.
3318 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
3320 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
3326 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
3328 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
3330 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
3332 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
3336 io->count -= io->cur_count;
3342 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3344 /* TODO: String I/O for in kernel device */
3347 if (vcpu->arch.pio.in)
3348 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3349 vcpu->arch.pio.size, pd);
3351 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3352 vcpu->arch.pio.port, vcpu->arch.pio.size,
3357 static int pio_string_write(struct kvm_vcpu *vcpu)
3359 struct kvm_pio_request *io = &vcpu->arch.pio;
3360 void *pd = vcpu->arch.pio_data;
3363 for (i = 0; i < io->cur_count; i++) {
3364 if (kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3365 io->port, io->size, pd)) {
3374 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
3378 vcpu->run->exit_reason = KVM_EXIT_IO;
3379 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3380 vcpu->run->io.size = vcpu->arch.pio.size = size;
3381 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3382 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3383 vcpu->run->io.port = vcpu->arch.pio.port = port;
3384 vcpu->arch.pio.in = in;
3385 vcpu->arch.pio.string = 0;
3386 vcpu->arch.pio.down = 0;
3387 vcpu->arch.pio.rep = 0;
3389 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3392 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3393 memcpy(vcpu->arch.pio_data, &val, 4);
3395 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3401 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3403 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3404 int size, unsigned long count, int down,
3405 gva_t address, int rep, unsigned port)
3407 unsigned now, in_page;
3410 vcpu->run->exit_reason = KVM_EXIT_IO;
3411 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3412 vcpu->run->io.size = vcpu->arch.pio.size = size;
3413 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3414 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3415 vcpu->run->io.port = vcpu->arch.pio.port = port;
3416 vcpu->arch.pio.in = in;
3417 vcpu->arch.pio.string = 1;
3418 vcpu->arch.pio.down = down;
3419 vcpu->arch.pio.rep = rep;
3421 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3425 kvm_x86_ops->skip_emulated_instruction(vcpu);
3430 in_page = PAGE_SIZE - offset_in_page(address);
3432 in_page = offset_in_page(address) + size;
3433 now = min(count, (unsigned long)in_page / size);
3438 * String I/O in reverse. Yuck. Kill the guest, fix later.
3440 pr_unimpl(vcpu, "guest string pio down\n");
3441 kvm_inject_gp(vcpu, 0);
3444 vcpu->run->io.count = now;
3445 vcpu->arch.pio.cur_count = now;
3447 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3448 kvm_x86_ops->skip_emulated_instruction(vcpu);
3450 vcpu->arch.pio.guest_gva = address;
3452 if (!vcpu->arch.pio.in) {
3453 /* string PIO write */
3454 ret = pio_copy_data(vcpu);
3455 if (ret == X86EMUL_PROPAGATE_FAULT) {
3456 kvm_inject_gp(vcpu, 0);
3459 if (ret == 0 && !pio_string_write(vcpu)) {
3461 if (vcpu->arch.pio.count == 0)
3465 /* no string PIO read support yet */
3469 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3471 static void bounce_off(void *info)
3476 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3479 struct cpufreq_freqs *freq = data;
3481 struct kvm_vcpu *vcpu;
3482 int i, send_ipi = 0;
3484 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3486 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3488 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3490 spin_lock(&kvm_lock);
3491 list_for_each_entry(kvm, &vm_list, vm_list) {
3492 kvm_for_each_vcpu(i, vcpu, kvm) {
3493 if (vcpu->cpu != freq->cpu)
3495 if (!kvm_request_guest_time_update(vcpu))
3497 if (vcpu->cpu != smp_processor_id())
3501 spin_unlock(&kvm_lock);
3503 if (freq->old < freq->new && send_ipi) {
3505 * We upscale the frequency. Must make the guest
3506 * doesn't see old kvmclock values while running with
3507 * the new frequency, otherwise we risk the guest sees
3508 * time go backwards.
3510 * In case we update the frequency for another cpu
3511 * (which might be in guest context) send an interrupt
3512 * to kick the cpu out of guest context. Next time
3513 * guest context is entered kvmclock will be updated,
3514 * so the guest will not see stale values.
3516 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3521 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3522 .notifier_call = kvmclock_cpufreq_notifier
3525 static void kvm_timer_init(void)
3529 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3530 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3531 CPUFREQ_TRANSITION_NOTIFIER);
3532 for_each_online_cpu(cpu) {
3533 unsigned long khz = cpufreq_get(cpu);
3536 per_cpu(cpu_tsc_khz, cpu) = khz;
3539 for_each_possible_cpu(cpu)
3540 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3544 int kvm_arch_init(void *opaque)
3547 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3550 printk(KERN_ERR "kvm: already loaded the other module\n");
3555 if (!ops->cpu_has_kvm_support()) {
3556 printk(KERN_ERR "kvm: no hardware support\n");
3560 if (ops->disabled_by_bios()) {
3561 printk(KERN_ERR "kvm: disabled by bios\n");
3566 r = kvm_mmu_module_init();
3570 kvm_init_msr_list();
3573 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3574 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3575 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3576 PT_DIRTY_MASK, PT64_NX_MASK, 0);
3586 void kvm_arch_exit(void)
3588 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3589 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3590 CPUFREQ_TRANSITION_NOTIFIER);
3592 kvm_mmu_module_exit();
3595 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3597 ++vcpu->stat.halt_exits;
3598 if (irqchip_in_kernel(vcpu->kvm)) {
3599 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3602 vcpu->run->exit_reason = KVM_EXIT_HLT;
3606 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3608 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3611 if (is_long_mode(vcpu))
3614 return a0 | ((gpa_t)a1 << 32);
3617 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3619 unsigned long nr, a0, a1, a2, a3, ret;
3622 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3623 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3624 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3625 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3626 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3628 trace_kvm_hypercall(nr, a0, a1, a2, a3);
3630 if (!is_long_mode(vcpu)) {
3638 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3644 case KVM_HC_VAPIC_POLL_IRQ:
3648 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3655 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3656 ++vcpu->stat.hypercalls;
3659 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3661 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3663 char instruction[3];
3665 unsigned long rip = kvm_rip_read(vcpu);
3669 * Blow out the MMU to ensure that no other VCPU has an active mapping
3670 * to ensure that the updated hypercall appears atomically across all
3673 kvm_mmu_zap_all(vcpu->kvm);
3675 kvm_x86_ops->patch_hypercall(vcpu, instruction);
3676 if (emulator_write_emulated(rip, instruction, 3, vcpu)
3677 != X86EMUL_CONTINUE)
3683 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3685 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3688 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3690 struct descriptor_table dt = { limit, base };
3692 kvm_x86_ops->set_gdt(vcpu, &dt);
3695 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3697 struct descriptor_table dt = { limit, base };
3699 kvm_x86_ops->set_idt(vcpu, &dt);
3702 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3703 unsigned long *rflags)
3705 kvm_lmsw(vcpu, msw);
3706 *rflags = kvm_get_rflags(vcpu);
3709 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3711 unsigned long value;
3715 value = vcpu->arch.cr0;
3718 value = vcpu->arch.cr2;
3721 value = vcpu->arch.cr3;
3724 value = kvm_read_cr4(vcpu);
3727 value = kvm_get_cr8(vcpu);
3730 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3737 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3738 unsigned long *rflags)
3742 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3743 *rflags = kvm_get_rflags(vcpu);
3746 vcpu->arch.cr2 = val;
3749 kvm_set_cr3(vcpu, val);
3752 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3755 kvm_set_cr8(vcpu, val & 0xfUL);
3758 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3762 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3764 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3765 int j, nent = vcpu->arch.cpuid_nent;
3767 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3768 /* when no next entry is found, the current entry[i] is reselected */
3769 for (j = i + 1; ; j = (j + 1) % nent) {
3770 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3771 if (ej->function == e->function) {
3772 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3776 return 0; /* silence gcc, even though control never reaches here */
3779 /* find an entry with matching function, matching index (if needed), and that
3780 * should be read next (if it's stateful) */
3781 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3782 u32 function, u32 index)
3784 if (e->function != function)
3786 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3788 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3789 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3794 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3795 u32 function, u32 index)
3798 struct kvm_cpuid_entry2 *best = NULL;
3800 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3801 struct kvm_cpuid_entry2 *e;
3803 e = &vcpu->arch.cpuid_entries[i];
3804 if (is_matching_cpuid_entry(e, function, index)) {
3805 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3806 move_to_next_stateful_cpuid_entry(vcpu, i);
3811 * Both basic or both extended?
3813 if (((e->function ^ function) & 0x80000000) == 0)
3814 if (!best || e->function > best->function)
3819 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
3821 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3823 struct kvm_cpuid_entry2 *best;
3825 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3827 return best->eax & 0xff;
3831 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3833 u32 function, index;
3834 struct kvm_cpuid_entry2 *best;
3836 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3837 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3838 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3839 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3840 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3841 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3842 best = kvm_find_cpuid_entry(vcpu, function, index);
3844 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3845 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3846 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3847 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3849 kvm_x86_ops->skip_emulated_instruction(vcpu);
3850 trace_kvm_cpuid(function,
3851 kvm_register_read(vcpu, VCPU_REGS_RAX),
3852 kvm_register_read(vcpu, VCPU_REGS_RBX),
3853 kvm_register_read(vcpu, VCPU_REGS_RCX),
3854 kvm_register_read(vcpu, VCPU_REGS_RDX));
3856 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3859 * Check if userspace requested an interrupt window, and that the
3860 * interrupt window is open.
3862 * No need to exit to userspace if we already have an interrupt queued.
3864 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
3866 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3867 vcpu->run->request_interrupt_window &&
3868 kvm_arch_interrupt_allowed(vcpu));
3871 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
3873 struct kvm_run *kvm_run = vcpu->run;
3875 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3876 kvm_run->cr8 = kvm_get_cr8(vcpu);
3877 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3878 if (irqchip_in_kernel(vcpu->kvm))
3879 kvm_run->ready_for_interrupt_injection = 1;
3881 kvm_run->ready_for_interrupt_injection =
3882 kvm_arch_interrupt_allowed(vcpu) &&
3883 !kvm_cpu_has_interrupt(vcpu) &&
3884 !kvm_event_needs_reinjection(vcpu);
3887 static void vapic_enter(struct kvm_vcpu *vcpu)
3889 struct kvm_lapic *apic = vcpu->arch.apic;
3892 if (!apic || !apic->vapic_addr)
3895 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3897 vcpu->arch.apic->vapic_page = page;
3900 static void vapic_exit(struct kvm_vcpu *vcpu)
3902 struct kvm_lapic *apic = vcpu->arch.apic;
3905 if (!apic || !apic->vapic_addr)
3908 idx = srcu_read_lock(&vcpu->kvm->srcu);
3909 kvm_release_page_dirty(apic->vapic_page);
3910 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3911 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3914 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3918 if (!kvm_x86_ops->update_cr8_intercept)
3921 if (!vcpu->arch.apic)
3924 if (!vcpu->arch.apic->vapic_addr)
3925 max_irr = kvm_lapic_find_highest_irr(vcpu);
3932 tpr = kvm_lapic_get_cr8(vcpu);
3934 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3937 static void inject_pending_event(struct kvm_vcpu *vcpu)
3939 /* try to reinject previous events if any */
3940 if (vcpu->arch.exception.pending) {
3941 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3942 vcpu->arch.exception.has_error_code,
3943 vcpu->arch.exception.error_code);
3947 if (vcpu->arch.nmi_injected) {
3948 kvm_x86_ops->set_nmi(vcpu);
3952 if (vcpu->arch.interrupt.pending) {
3953 kvm_x86_ops->set_irq(vcpu);
3957 /* try to inject new event if pending */
3958 if (vcpu->arch.nmi_pending) {
3959 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3960 vcpu->arch.nmi_pending = false;
3961 vcpu->arch.nmi_injected = true;
3962 kvm_x86_ops->set_nmi(vcpu);
3964 } else if (kvm_cpu_has_interrupt(vcpu)) {
3965 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3966 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3968 kvm_x86_ops->set_irq(vcpu);
3973 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
3976 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3977 vcpu->run->request_interrupt_window;
3980 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3981 kvm_mmu_unload(vcpu);
3983 r = kvm_mmu_reload(vcpu);
3987 if (vcpu->requests) {
3988 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3989 __kvm_migrate_timers(vcpu);
3990 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3991 kvm_write_guest_time(vcpu);
3992 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3993 kvm_mmu_sync_roots(vcpu);
3994 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3995 kvm_x86_ops->tlb_flush(vcpu);
3996 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3998 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4002 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4003 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4011 kvm_x86_ops->prepare_guest_switch(vcpu);
4012 kvm_load_guest_fpu(vcpu);
4014 local_irq_disable();
4016 clear_bit(KVM_REQ_KICK, &vcpu->requests);
4017 smp_mb__after_clear_bit();
4019 if (vcpu->requests || need_resched() || signal_pending(current)) {
4020 set_bit(KVM_REQ_KICK, &vcpu->requests);
4027 inject_pending_event(vcpu);
4029 /* enable NMI/IRQ window open exits if needed */
4030 if (vcpu->arch.nmi_pending)
4031 kvm_x86_ops->enable_nmi_window(vcpu);
4032 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4033 kvm_x86_ops->enable_irq_window(vcpu);
4035 if (kvm_lapic_enabled(vcpu)) {
4036 update_cr8_intercept(vcpu);
4037 kvm_lapic_sync_to_vapic(vcpu);
4040 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4044 if (unlikely(vcpu->arch.switch_db_regs)) {
4046 set_debugreg(vcpu->arch.eff_db[0], 0);
4047 set_debugreg(vcpu->arch.eff_db[1], 1);
4048 set_debugreg(vcpu->arch.eff_db[2], 2);
4049 set_debugreg(vcpu->arch.eff_db[3], 3);
4052 trace_kvm_entry(vcpu->vcpu_id);
4053 kvm_x86_ops->run(vcpu);
4056 * If the guest has used debug registers, at least dr7
4057 * will be disabled while returning to the host.
4058 * If we don't have active breakpoints in the host, we don't
4059 * care about the messed up debug address registers. But if
4060 * we have some of them active, restore the old state.
4062 if (hw_breakpoint_active())
4063 hw_breakpoint_restore();
4065 set_bit(KVM_REQ_KICK, &vcpu->requests);
4071 * We must have an instruction between local_irq_enable() and
4072 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4073 * the interrupt shadow. The stat.exits increment will do nicely.
4074 * But we need to prevent reordering, hence this barrier():
4082 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4085 * Profile KVM exit RIPs:
4087 if (unlikely(prof_on == KVM_PROFILING)) {
4088 unsigned long rip = kvm_rip_read(vcpu);
4089 profile_hit(KVM_PROFILING, (void *)rip);
4093 kvm_lapic_sync_from_vapic(vcpu);
4095 r = kvm_x86_ops->handle_exit(vcpu);
4101 static int __vcpu_run(struct kvm_vcpu *vcpu)
4104 struct kvm *kvm = vcpu->kvm;
4106 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4107 pr_debug("vcpu %d received sipi with vector # %x\n",
4108 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4109 kvm_lapic_reset(vcpu);
4110 r = kvm_arch_vcpu_reset(vcpu);
4113 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4116 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4121 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4122 r = vcpu_enter_guest(vcpu);
4124 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4125 kvm_vcpu_block(vcpu);
4126 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4127 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4129 switch(vcpu->arch.mp_state) {
4130 case KVM_MP_STATE_HALTED:
4131 vcpu->arch.mp_state =
4132 KVM_MP_STATE_RUNNABLE;
4133 case KVM_MP_STATE_RUNNABLE:
4135 case KVM_MP_STATE_SIPI_RECEIVED:
4146 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4147 if (kvm_cpu_has_pending_timer(vcpu))
4148 kvm_inject_pending_timer_irqs(vcpu);
4150 if (dm_request_for_irq_injection(vcpu)) {
4152 vcpu->run->exit_reason = KVM_EXIT_INTR;
4153 ++vcpu->stat.request_irq_exits;
4155 if (signal_pending(current)) {
4157 vcpu->run->exit_reason = KVM_EXIT_INTR;
4158 ++vcpu->stat.signal_exits;
4160 if (need_resched()) {
4161 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4163 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4167 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4168 post_kvm_run_save(vcpu);
4175 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4182 if (vcpu->sigset_active)
4183 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4185 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4186 kvm_vcpu_block(vcpu);
4187 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4192 /* re-sync apic's tpr */
4193 if (!irqchip_in_kernel(vcpu->kvm))
4194 kvm_set_cr8(vcpu, kvm_run->cr8);
4196 if (vcpu->arch.pio.cur_count) {
4197 r = complete_pio(vcpu);
4201 if (vcpu->mmio_needed) {
4202 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4203 vcpu->mmio_read_completed = 1;
4204 vcpu->mmio_needed = 0;
4206 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4207 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
4208 EMULTYPE_NO_DECODE);
4209 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4210 if (r == EMULATE_DO_MMIO) {
4212 * Read-modify-write. Back to userspace.
4218 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4219 kvm_register_write(vcpu, VCPU_REGS_RAX,
4220 kvm_run->hypercall.ret);
4222 r = __vcpu_run(vcpu);
4225 if (vcpu->sigset_active)
4226 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4232 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4236 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4237 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4238 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4239 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4240 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4241 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4242 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4243 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4244 #ifdef CONFIG_X86_64
4245 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4246 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4247 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4248 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4249 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4250 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4251 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4252 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4255 regs->rip = kvm_rip_read(vcpu);
4256 regs->rflags = kvm_get_rflags(vcpu);
4263 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4267 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4268 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4269 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4270 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4271 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4272 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4273 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4274 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4275 #ifdef CONFIG_X86_64
4276 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4277 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4278 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4279 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4280 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4281 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4282 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4283 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4286 kvm_rip_write(vcpu, regs->rip);
4287 kvm_set_rflags(vcpu, regs->rflags);
4289 vcpu->arch.exception.pending = false;
4296 void kvm_get_segment(struct kvm_vcpu *vcpu,
4297 struct kvm_segment *var, int seg)
4299 kvm_x86_ops->get_segment(vcpu, var, seg);
4302 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4304 struct kvm_segment cs;
4306 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4310 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4312 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4313 struct kvm_sregs *sregs)
4315 struct descriptor_table dt;
4319 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4320 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4321 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4322 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4323 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4324 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4326 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4327 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4329 kvm_x86_ops->get_idt(vcpu, &dt);
4330 sregs->idt.limit = dt.limit;
4331 sregs->idt.base = dt.base;
4332 kvm_x86_ops->get_gdt(vcpu, &dt);
4333 sregs->gdt.limit = dt.limit;
4334 sregs->gdt.base = dt.base;
4336 sregs->cr0 = vcpu->arch.cr0;
4337 sregs->cr2 = vcpu->arch.cr2;
4338 sregs->cr3 = vcpu->arch.cr3;
4339 sregs->cr4 = kvm_read_cr4(vcpu);
4340 sregs->cr8 = kvm_get_cr8(vcpu);
4341 sregs->efer = vcpu->arch.shadow_efer;
4342 sregs->apic_base = kvm_get_apic_base(vcpu);
4344 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4346 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4347 set_bit(vcpu->arch.interrupt.nr,
4348 (unsigned long *)sregs->interrupt_bitmap);
4355 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4356 struct kvm_mp_state *mp_state)
4359 mp_state->mp_state = vcpu->arch.mp_state;
4364 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4365 struct kvm_mp_state *mp_state)
4368 vcpu->arch.mp_state = mp_state->mp_state;
4373 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4374 struct kvm_segment *var, int seg)
4376 kvm_x86_ops->set_segment(vcpu, var, seg);
4379 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
4380 struct kvm_segment *kvm_desct)
4382 kvm_desct->base = get_desc_base(seg_desc);
4383 kvm_desct->limit = get_desc_limit(seg_desc);
4385 kvm_desct->limit <<= 12;
4386 kvm_desct->limit |= 0xfff;
4388 kvm_desct->selector = selector;
4389 kvm_desct->type = seg_desc->type;
4390 kvm_desct->present = seg_desc->p;
4391 kvm_desct->dpl = seg_desc->dpl;
4392 kvm_desct->db = seg_desc->d;
4393 kvm_desct->s = seg_desc->s;
4394 kvm_desct->l = seg_desc->l;
4395 kvm_desct->g = seg_desc->g;
4396 kvm_desct->avl = seg_desc->avl;
4398 kvm_desct->unusable = 1;
4400 kvm_desct->unusable = 0;
4401 kvm_desct->padding = 0;
4404 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4406 struct descriptor_table *dtable)
4408 if (selector & 1 << 2) {
4409 struct kvm_segment kvm_seg;
4411 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4413 if (kvm_seg.unusable)
4416 dtable->limit = kvm_seg.limit;
4417 dtable->base = kvm_seg.base;
4420 kvm_x86_ops->get_gdt(vcpu, dtable);
4423 /* allowed just for 8 bytes segments */
4424 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4425 struct desc_struct *seg_desc)
4427 struct descriptor_table dtable;
4428 u16 index = selector >> 3;
4430 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4432 if (dtable.limit < index * 8 + 7) {
4433 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4436 return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4439 /* allowed just for 8 bytes segments */
4440 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4441 struct desc_struct *seg_desc)
4443 struct descriptor_table dtable;
4444 u16 index = selector >> 3;
4446 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4448 if (dtable.limit < index * 8 + 7)
4450 return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4453 static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4454 struct desc_struct *seg_desc)
4456 u32 base_addr = get_desc_base(seg_desc);
4458 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4461 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4463 struct kvm_segment kvm_seg;
4465 kvm_get_segment(vcpu, &kvm_seg, seg);
4466 return kvm_seg.selector;
4469 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4471 struct kvm_segment *kvm_seg)
4473 struct desc_struct seg_desc;
4475 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4477 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4481 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4483 struct kvm_segment segvar = {
4484 .base = selector << 4,
4486 .selector = selector,
4497 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4501 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4503 return (seg != VCPU_SREG_LDTR) &&
4504 (seg != VCPU_SREG_TR) &&
4505 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4508 static void kvm_check_segment_descriptor(struct kvm_vcpu *vcpu, int seg,
4511 /* NULL selector is not valid for CS and SS */
4512 if (seg == VCPU_SREG_CS || seg == VCPU_SREG_SS)
4514 kvm_queue_exception_e(vcpu, TS_VECTOR, selector >> 3);
4517 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4518 int type_bits, int seg)
4520 struct kvm_segment kvm_seg;
4522 if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4523 return kvm_load_realmode_segment(vcpu, selector, seg);
4524 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4527 kvm_check_segment_descriptor(vcpu, seg, selector);
4528 kvm_seg.type |= type_bits;
4530 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4531 seg != VCPU_SREG_LDTR)
4533 kvm_seg.unusable = 1;
4535 kvm_set_segment(vcpu, &kvm_seg, seg);
4539 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4540 struct tss_segment_32 *tss)
4542 tss->cr3 = vcpu->arch.cr3;
4543 tss->eip = kvm_rip_read(vcpu);
4544 tss->eflags = kvm_get_rflags(vcpu);
4545 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4546 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4547 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4548 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4549 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4550 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4551 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4552 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4553 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4554 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4555 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4556 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4557 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4558 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4559 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4562 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4563 struct tss_segment_32 *tss)
4565 kvm_set_cr3(vcpu, tss->cr3);
4567 kvm_rip_write(vcpu, tss->eip);
4568 kvm_set_rflags(vcpu, tss->eflags | 2);
4570 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4571 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4572 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4573 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4574 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4575 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4576 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4577 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4579 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4582 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4585 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4588 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4591 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4594 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4597 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4602 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4603 struct tss_segment_16 *tss)
4605 tss->ip = kvm_rip_read(vcpu);
4606 tss->flag = kvm_get_rflags(vcpu);
4607 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4608 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4609 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4610 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4611 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4612 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4613 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4614 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4616 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4617 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4618 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4619 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4620 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4623 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4624 struct tss_segment_16 *tss)
4626 kvm_rip_write(vcpu, tss->ip);
4627 kvm_set_rflags(vcpu, tss->flag | 2);
4628 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4629 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4630 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4631 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4632 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4633 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4634 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4635 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4637 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4640 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4643 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4646 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4649 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4654 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4655 u16 old_tss_sel, u32 old_tss_base,
4656 struct desc_struct *nseg_desc)
4658 struct tss_segment_16 tss_segment_16;
4661 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4662 sizeof tss_segment_16))
4665 save_state_to_tss16(vcpu, &tss_segment_16);
4667 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4668 sizeof tss_segment_16))
4671 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4672 &tss_segment_16, sizeof tss_segment_16))
4675 if (old_tss_sel != 0xffff) {
4676 tss_segment_16.prev_task_link = old_tss_sel;
4678 if (kvm_write_guest(vcpu->kvm,
4679 get_tss_base_addr(vcpu, nseg_desc),
4680 &tss_segment_16.prev_task_link,
4681 sizeof tss_segment_16.prev_task_link))
4685 if (load_state_from_tss16(vcpu, &tss_segment_16))
4693 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4694 u16 old_tss_sel, u32 old_tss_base,
4695 struct desc_struct *nseg_desc)
4697 struct tss_segment_32 tss_segment_32;
4700 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4701 sizeof tss_segment_32))
4704 save_state_to_tss32(vcpu, &tss_segment_32);
4706 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4707 sizeof tss_segment_32))
4710 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4711 &tss_segment_32, sizeof tss_segment_32))
4714 if (old_tss_sel != 0xffff) {
4715 tss_segment_32.prev_task_link = old_tss_sel;
4717 if (kvm_write_guest(vcpu->kvm,
4718 get_tss_base_addr(vcpu, nseg_desc),
4719 &tss_segment_32.prev_task_link,
4720 sizeof tss_segment_32.prev_task_link))
4724 if (load_state_from_tss32(vcpu, &tss_segment_32))
4732 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4734 struct kvm_segment tr_seg;
4735 struct desc_struct cseg_desc;
4736 struct desc_struct nseg_desc;
4738 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4739 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4741 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4743 /* FIXME: Handle errors. Failure to read either TSS or their
4744 * descriptors should generate a pagefault.
4746 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4749 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4752 if (reason != TASK_SWITCH_IRET) {
4755 cpl = kvm_x86_ops->get_cpl(vcpu);
4756 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4757 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4762 if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4763 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4767 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4768 cseg_desc.type &= ~(1 << 1); //clear the B flag
4769 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4772 if (reason == TASK_SWITCH_IRET) {
4773 u32 eflags = kvm_get_rflags(vcpu);
4774 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4777 /* set back link to prev task only if NT bit is set in eflags
4778 note that old_tss_sel is not used afetr this point */
4779 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4780 old_tss_sel = 0xffff;
4782 if (nseg_desc.type & 8)
4783 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4784 old_tss_base, &nseg_desc);
4786 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4787 old_tss_base, &nseg_desc);
4789 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4790 u32 eflags = kvm_get_rflags(vcpu);
4791 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4794 if (reason != TASK_SWITCH_IRET) {
4795 nseg_desc.type |= (1 << 1);
4796 save_guest_segment_descriptor(vcpu, tss_selector,
4800 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4801 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4803 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4807 EXPORT_SYMBOL_GPL(kvm_task_switch);
4809 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4810 struct kvm_sregs *sregs)
4812 int mmu_reset_needed = 0;
4813 int pending_vec, max_bits;
4814 struct descriptor_table dt;
4818 dt.limit = sregs->idt.limit;
4819 dt.base = sregs->idt.base;
4820 kvm_x86_ops->set_idt(vcpu, &dt);
4821 dt.limit = sregs->gdt.limit;
4822 dt.base = sregs->gdt.base;
4823 kvm_x86_ops->set_gdt(vcpu, &dt);
4825 vcpu->arch.cr2 = sregs->cr2;
4826 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4827 vcpu->arch.cr3 = sregs->cr3;
4829 kvm_set_cr8(vcpu, sregs->cr8);
4831 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4832 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4833 kvm_set_apic_base(vcpu, sregs->apic_base);
4835 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4836 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4837 vcpu->arch.cr0 = sregs->cr0;
4839 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
4840 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4841 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
4842 load_pdptrs(vcpu, vcpu->arch.cr3);
4843 mmu_reset_needed = 1;
4846 if (mmu_reset_needed)
4847 kvm_mmu_reset_context(vcpu);
4849 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4850 pending_vec = find_first_bit(
4851 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4852 if (pending_vec < max_bits) {
4853 kvm_queue_interrupt(vcpu, pending_vec, false);
4854 pr_debug("Set back pending irq %d\n", pending_vec);
4855 if (irqchip_in_kernel(vcpu->kvm))
4856 kvm_pic_clear_isr_ack(vcpu->kvm);
4859 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4860 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4861 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4862 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4863 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4864 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4866 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4867 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4869 update_cr8_intercept(vcpu);
4871 /* Older userspace won't unhalt the vcpu on reset. */
4872 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4873 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4874 !(vcpu->arch.cr0 & X86_CR0_PE))
4875 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4882 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4883 struct kvm_guest_debug *dbg)
4885 unsigned long rflags;
4890 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
4892 if (vcpu->arch.exception.pending)
4894 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4895 kvm_queue_exception(vcpu, DB_VECTOR);
4897 kvm_queue_exception(vcpu, BP_VECTOR);
4901 * Read rflags as long as potentially injected trace flags are still
4904 rflags = kvm_get_rflags(vcpu);
4906 vcpu->guest_debug = dbg->control;
4907 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
4908 vcpu->guest_debug = 0;
4910 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
4911 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4912 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4913 vcpu->arch.switch_db_regs =
4914 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4916 for (i = 0; i < KVM_NR_DB_REGS; i++)
4917 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4918 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4921 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
4922 vcpu->arch.singlestep_cs =
4923 get_segment_selector(vcpu, VCPU_SREG_CS);
4924 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu);
4928 * Trigger an rflags update that will inject or remove the trace
4931 kvm_set_rflags(vcpu, rflags);
4933 kvm_x86_ops->set_guest_debug(vcpu, dbg);
4944 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4945 * we have asm/x86/processor.h
4956 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4957 #ifdef CONFIG_X86_64
4958 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4960 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4965 * Translate a guest virtual address to a guest physical address.
4967 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4968 struct kvm_translation *tr)
4970 unsigned long vaddr = tr->linear_address;
4975 idx = srcu_read_lock(&vcpu->kvm->srcu);
4976 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4977 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4978 tr->physical_address = gpa;
4979 tr->valid = gpa != UNMAPPED_GVA;
4987 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4989 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4993 memcpy(fpu->fpr, fxsave->st_space, 128);
4994 fpu->fcw = fxsave->cwd;
4995 fpu->fsw = fxsave->swd;
4996 fpu->ftwx = fxsave->twd;
4997 fpu->last_opcode = fxsave->fop;
4998 fpu->last_ip = fxsave->rip;
4999 fpu->last_dp = fxsave->rdp;
5000 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5007 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5009 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5013 memcpy(fxsave->st_space, fpu->fpr, 128);
5014 fxsave->cwd = fpu->fcw;
5015 fxsave->swd = fpu->fsw;
5016 fxsave->twd = fpu->ftwx;
5017 fxsave->fop = fpu->last_opcode;
5018 fxsave->rip = fpu->last_ip;
5019 fxsave->rdp = fpu->last_dp;
5020 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5027 void fx_init(struct kvm_vcpu *vcpu)
5029 unsigned after_mxcsr_mask;
5032 * Touch the fpu the first time in non atomic context as if
5033 * this is the first fpu instruction the exception handler
5034 * will fire before the instruction returns and it'll have to
5035 * allocate ram with GFP_KERNEL.
5038 kvm_fx_save(&vcpu->arch.host_fx_image);
5040 /* Initialize guest FPU by resetting ours and saving into guest's */
5042 kvm_fx_save(&vcpu->arch.host_fx_image);
5044 kvm_fx_save(&vcpu->arch.guest_fx_image);
5045 kvm_fx_restore(&vcpu->arch.host_fx_image);
5048 vcpu->arch.cr0 |= X86_CR0_ET;
5049 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5050 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5051 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5052 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5054 EXPORT_SYMBOL_GPL(fx_init);
5056 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5058 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
5061 vcpu->guest_fpu_loaded = 1;
5062 kvm_fx_save(&vcpu->arch.host_fx_image);
5063 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5065 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
5067 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5069 if (!vcpu->guest_fpu_loaded)
5072 vcpu->guest_fpu_loaded = 0;
5073 kvm_fx_save(&vcpu->arch.guest_fx_image);
5074 kvm_fx_restore(&vcpu->arch.host_fx_image);
5075 ++vcpu->stat.fpu_reload;
5077 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
5079 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5081 if (vcpu->arch.time_page) {
5082 kvm_release_page_dirty(vcpu->arch.time_page);
5083 vcpu->arch.time_page = NULL;
5086 kvm_x86_ops->vcpu_free(vcpu);
5089 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5092 return kvm_x86_ops->vcpu_create(kvm, id);
5095 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5099 /* We do fxsave: this must be aligned. */
5100 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5102 vcpu->arch.mtrr_state.have_fixed = 1;
5104 r = kvm_arch_vcpu_reset(vcpu);
5106 r = kvm_mmu_setup(vcpu);
5113 kvm_x86_ops->vcpu_free(vcpu);
5117 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5120 kvm_mmu_unload(vcpu);
5123 kvm_x86_ops->vcpu_free(vcpu);
5126 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5128 vcpu->arch.nmi_pending = false;
5129 vcpu->arch.nmi_injected = false;
5131 vcpu->arch.switch_db_regs = 0;
5132 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5133 vcpu->arch.dr6 = DR6_FIXED_1;
5134 vcpu->arch.dr7 = DR7_FIXED_1;
5136 return kvm_x86_ops->vcpu_reset(vcpu);
5139 int kvm_arch_hardware_enable(void *garbage)
5142 * Since this may be called from a hotplug notifcation,
5143 * we can't get the CPU frequency directly.
5145 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5146 int cpu = raw_smp_processor_id();
5147 per_cpu(cpu_tsc_khz, cpu) = 0;
5150 kvm_shared_msr_cpu_online();
5152 return kvm_x86_ops->hardware_enable(garbage);
5155 void kvm_arch_hardware_disable(void *garbage)
5157 kvm_x86_ops->hardware_disable(garbage);
5158 drop_user_return_notifiers(garbage);
5161 int kvm_arch_hardware_setup(void)
5163 return kvm_x86_ops->hardware_setup();
5166 void kvm_arch_hardware_unsetup(void)
5168 kvm_x86_ops->hardware_unsetup();
5171 void kvm_arch_check_processor_compat(void *rtn)
5173 kvm_x86_ops->check_processor_compatibility(rtn);
5176 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5182 BUG_ON(vcpu->kvm == NULL);
5185 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5186 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5187 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5189 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5191 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5196 vcpu->arch.pio_data = page_address(page);
5198 r = kvm_mmu_create(vcpu);
5200 goto fail_free_pio_data;
5202 if (irqchip_in_kernel(kvm)) {
5203 r = kvm_create_lapic(vcpu);
5205 goto fail_mmu_destroy;
5208 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5210 if (!vcpu->arch.mce_banks) {
5212 goto fail_free_lapic;
5214 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5218 kvm_free_lapic(vcpu);
5220 kvm_mmu_destroy(vcpu);
5222 free_page((unsigned long)vcpu->arch.pio_data);
5227 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5231 kfree(vcpu->arch.mce_banks);
5232 kvm_free_lapic(vcpu);
5233 idx = srcu_read_lock(&vcpu->kvm->srcu);
5234 kvm_mmu_destroy(vcpu);
5235 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5236 free_page((unsigned long)vcpu->arch.pio_data);
5239 struct kvm *kvm_arch_create_vm(void)
5241 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5244 return ERR_PTR(-ENOMEM);
5246 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5247 if (!kvm->arch.aliases) {
5249 return ERR_PTR(-ENOMEM);
5252 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5253 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5255 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5256 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5258 rdtscll(kvm->arch.vm_init_tsc);
5263 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5266 kvm_mmu_unload(vcpu);
5270 static void kvm_free_vcpus(struct kvm *kvm)
5273 struct kvm_vcpu *vcpu;
5276 * Unpin any mmu pages first.
5278 kvm_for_each_vcpu(i, vcpu, kvm)
5279 kvm_unload_vcpu_mmu(vcpu);
5280 kvm_for_each_vcpu(i, vcpu, kvm)
5281 kvm_arch_vcpu_free(vcpu);
5283 mutex_lock(&kvm->lock);
5284 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5285 kvm->vcpus[i] = NULL;
5287 atomic_set(&kvm->online_vcpus, 0);
5288 mutex_unlock(&kvm->lock);
5291 void kvm_arch_sync_events(struct kvm *kvm)
5293 kvm_free_all_assigned_devices(kvm);
5296 void kvm_arch_destroy_vm(struct kvm *kvm)
5298 kvm_iommu_unmap_guest(kvm);
5300 kfree(kvm->arch.vpic);
5301 kfree(kvm->arch.vioapic);
5302 kvm_free_vcpus(kvm);
5303 kvm_free_physmem(kvm);
5304 if (kvm->arch.apic_access_page)
5305 put_page(kvm->arch.apic_access_page);
5306 if (kvm->arch.ept_identity_pagetable)
5307 put_page(kvm->arch.ept_identity_pagetable);
5308 kfree(kvm->arch.aliases);
5312 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5313 struct kvm_memory_slot *memslot,
5314 struct kvm_memory_slot old,
5315 struct kvm_userspace_memory_region *mem,
5318 int npages = memslot->npages;
5320 /*To keep backward compatibility with older userspace,
5321 *x86 needs to hanlde !user_alloc case.
5324 if (npages && !old.rmap) {
5325 unsigned long userspace_addr;
5327 down_write(¤t->mm->mmap_sem);
5328 userspace_addr = do_mmap(NULL, 0,
5330 PROT_READ | PROT_WRITE,
5331 MAP_PRIVATE | MAP_ANONYMOUS,
5333 up_write(¤t->mm->mmap_sem);
5335 if (IS_ERR((void *)userspace_addr))
5336 return PTR_ERR((void *)userspace_addr);
5338 memslot->userspace_addr = userspace_addr;
5346 void kvm_arch_commit_memory_region(struct kvm *kvm,
5347 struct kvm_userspace_memory_region *mem,
5348 struct kvm_memory_slot old,
5352 int npages = mem->memory_size >> PAGE_SHIFT;
5354 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5357 down_write(¤t->mm->mmap_sem);
5358 ret = do_munmap(current->mm, old.userspace_addr,
5359 old.npages * PAGE_SIZE);
5360 up_write(¤t->mm->mmap_sem);
5363 "kvm_vm_ioctl_set_memory_region: "
5364 "failed to munmap memory\n");
5367 spin_lock(&kvm->mmu_lock);
5368 if (!kvm->arch.n_requested_mmu_pages) {
5369 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5370 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5373 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5374 spin_unlock(&kvm->mmu_lock);
5377 void kvm_arch_flush_shadow(struct kvm *kvm)
5379 kvm_mmu_zap_all(kvm);
5380 kvm_reload_remote_mmus(kvm);
5383 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5385 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5386 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5387 || vcpu->arch.nmi_pending ||
5388 (kvm_arch_interrupt_allowed(vcpu) &&
5389 kvm_cpu_has_interrupt(vcpu));
5392 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5395 int cpu = vcpu->cpu;
5397 if (waitqueue_active(&vcpu->wq)) {
5398 wake_up_interruptible(&vcpu->wq);
5399 ++vcpu->stat.halt_wakeup;
5403 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5404 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5405 smp_send_reschedule(cpu);
5409 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5411 return kvm_x86_ops->interrupt_allowed(vcpu);
5414 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5416 unsigned long rflags;
5418 rflags = kvm_x86_ops->get_rflags(vcpu);
5419 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5420 rflags &= ~(unsigned long)(X86_EFLAGS_TF | X86_EFLAGS_RF);
5423 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5425 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5427 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5428 vcpu->arch.singlestep_cs ==
5429 get_segment_selector(vcpu, VCPU_SREG_CS) &&
5430 vcpu->arch.singlestep_rip == kvm_rip_read(vcpu))
5431 rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
5432 kvm_x86_ops->set_rflags(vcpu, rflags);
5434 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5436 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5437 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5438 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5439 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5440 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5441 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5443 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5444 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);